A method and system for suppressing off-grid voltage inter-harmonics of a grid-forming energy storage converter

By combining full-phase FFT and FIR filters with PWM pulse control signals, the shortcomings of grid-type energy storage converters in suppressing off-grid voltage interharmonics are solved, achieving effective suppression of interharmonics and improving power quality and load stability.

CN121036032BActive Publication Date: 2026-03-27UNIV OF SCI & TECH BEIJING
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-08-25
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing grid-connected energy storage converters lack effective means to suppress non-integer harmonics (interharmonics) when suppressing off-grid voltage, resulting in a decline in voltage stability and power quality, especially affecting the normal use of loads in remote mountainous areas, areas without electricity, islands, and communication base stations.

Method used

Full-phase FFT is used to perform harmonic analysis on the off-grid three-phase output voltage, extract interharmonics and design FIR filters, eliminate voltage interharmonics by PWM pulse control signals, and combine the control of the voltage outer loop and the positive feedforward loop to generate three-phase off-grid voltage using space vector modulation to achieve interharmonic suppression.

Benefits of technology

It effectively suppresses voltage harmonics in the output of grid-type energy storage converters, improves voltage stability and power quality, and eliminates flickering on the load.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a network-constructing energy storage converter off-grid voltage inter-harmonic suppression method and system, and belongs to the technical field of micro grids. The method comprises the following steps: collecting off-grid three-phase output voltage of the network-constructing energy storage converter; extracting inter-harmonics in the off-grid three-phase output voltage; based on the extracted inter-harmonics, corresponding PWM pulse control signals are generated, and then three-phase off-grid voltage is generated, so that voltage inter-harmonics output by the network-constructing energy storage converter are eliminated. The technical scheme of the application adopts full-phase FFT to analyze voltage output signals, and can extract inter-harmonics of voltage output signals of the network-constructing energy storage converter; and corresponding PWM pulse control signals are generated through space vector modulation, and then voltage inter-harmonics output by the network-constructing energy storage converter can be effectively suppressed.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of micro-grid, in particular to a method and system for suppressing off-grid voltage inter-harmonic of network-constructing energy storage converter. BACKGROUND

[0002] With the continuous development of micro-grid application technology, off-grid energy storage system is increasingly widely used, which can operate independently without relying on the power grid, and is more commonly used in remote mountainous areas, unpowered areas, islands, communication base stations and street lamps and other application sites. The connection of a large number of nonlinear loads will lead to frequent occurrence of off-grid voltage harmonic pollution, which seriously affects voltage stability and deteriorates power quality. In addition to the common integer harmonics, there are also voltage inter-harmonics in the voltage, which affect the normal use of local loads, especially the flickering phenomenon of lighting and other loads. At present, the harmonic suppression method of network-constructing energy storage converter mainly extracts and suppresses the integer harmonics generated by nonlinear loads, but has no good suppression effect on inter-harmonics (non-integer harmonics). SUMMARY

[0003] The present application provides a method and system for suppressing off-grid voltage inter-harmonic of network-constructing energy storage converter to solve the technical problem that the prior art has no good suppression effect on inter-harmonics (non-integer harmonics).

[0004] To solve the above technical problems, the present application provides the following technical solutions:

[0005] On the one hand, the present application provides a method for suppressing off-grid voltage inter-harmonic of network-constructing energy storage converter, which comprises:

[0006] Collecting off-grid three-phase output voltage of network-constructing energy storage converter;

[0007] Extracting inter-harmonics in the off-grid three-phase output voltage;

[0008] Based on the extracted inter-harmonics, corresponding PWM pulse control signals are generated, and then three-phase off-grid voltage is generated to eliminate the voltage inter-harmonics output by the network-constructing energy storage converter.

[0009] Further, the extraction of the inter-harmonics in the off-grid three-phase output voltage comprises:

[0010] Performing harmonic analysis on the off-grid three-phase output voltage using full-phase FFT to obtain harmonic analysis results;

[0011] Based on the phase spectrum flatness characteristic, the frequency position of the dense spectrum harmonics and inter-harmonics in the signal is determined according to the harmonic analysis results, so as to obtain the inter-harmonics corresponding to the dense spectrum as the inter-harmonics to be eliminated;

[0012] designing a filter according to a frequency range of the inter-harmonic to be eliminated, and extracting the off-grid three-phase output voltage signal of the grid-connected energy storage converter using the designed filter.

[0013] Further, the filter is a FIR filter.

[0014] The designing of the filter according to the frequency range of the inter-harmonic to be eliminated comprises:

[0015] The unit impulse response of the FIR filter is truncated into a finite length unit impulse response h d (n).

[0016] The Hann window function w(n) is used to window h d (n), and a processed unit impulse response h(n) is obtained: h(n)=h d (n)w(n), and h(n) is used as the filter coefficient of the FIR filter.

[0017] Further, based on the extracted inter-harmonic, a corresponding PWM pulse control signal is generated, and then a three-phase off-grid voltage is generated to eliminate the voltage inter-harmonic output by the grid-connected energy storage converter, which comprises:

[0018] The off-grid three-phase output voltage minus the extracted inter-harmonic is used as the off-grid output voltage feedforward, which is superimposed on the voltage reference term generated after the current controller of the fundamental positive sequence current component, to form the current loop output given voltage signal, and the inter-harmonic disturbance component on the positive feedforward loop is eliminated.

[0019] The off-grid three-phase output voltage minus the extracted inter-harmonic is used as the feedback of the voltage outer loop control loop.

[0020] The voltage signal generated by superimposing the output of the voltage outer loop control loop and the output of the positive feedforward loop is used to generate a corresponding PWM pulse control signal through space vector modulation, and then a three-phase off-grid voltage is generated to eliminate the voltage inter-harmonic output by the grid-connected energy storage converter.

[0021] On the other hand, the present application also provides a grid-connected energy storage converter off-grid voltage inter-harmonic suppression system, which comprises:

[0022] A data acquisition module is configured to acquire the off-grid three-phase output voltage of the grid-connected energy storage converter.

[0023] An inter-harmonic extraction module is configured to extract the inter-harmonic in the off-grid three-phase output voltage.

[0024] A voltage inter-harmonic elimination module is configured to generate a corresponding PWM pulse control signal based on the extracted inter-harmonic, and further generate a three-phase off-grid voltage to eliminate the voltage inter-harmonic output by the grid-constructing energy storage converter.

[0025] Further, the inter-harmonic extraction module is specifically configured to:

[0026] Perform harmonic analysis on the off-grid three-phase output voltage by using full-phase FFT to obtain a harmonic analysis result;

[0027] Based on the phase spectrum flatness characteristic, determine the frequency position of the dense spectrum inter-harmonic in the signal based on the harmonic analysis result, so as to obtain the dense spectrum inter-harmonic as the inter-harmonic to be eliminated;

[0028] Design a filter according to the frequency range of the inter-harmonic to be eliminated, and extract the inter-harmonic of the off-grid three-phase output voltage signal of the grid-constructing energy storage converter by using the designed filter.

[0029] Further, the filter is an FIR filter;

[0030] The filter is designed according to the frequency range of the inter-harmonic to be eliminated, and includes:

[0031] Truncate the unit impulse response hd(n) of the FIR filter to a finite length;

[0032] Window hd(n) by using a Hanning window function w(n) to obtain a processed unit impulse response h(n): h(n)=hd(n)w(n), and use h(n) as the filter coefficient of the FIR filter.

[0033] Further, the voltage inter-harmonic elimination module is specifically configured to:

[0034] Subtract the extracted inter-harmonic from the off-grid three-phase output voltage as the off-grid output voltage feedforward, superimpose the voltage reference term generated after the current controller of the fundamental positive sequence current component, and form a current loop output given voltage signal to eliminate the inter-harmonic disturbance component on the positive feedforward loop;

[0035] Subtract the extracted inter-harmonic from the off-grid three-phase output voltage as the feedback of the voltage outer loop control loop;

[0036] Based on the voltage signal generated by superimposing the output of the voltage outer loop control loop and the output of the positive feedforward loop, generate a corresponding PWM pulse control signal by space vector modulation, and further generate a three-phase off-grid voltage to eliminate the voltage inter-harmonic output by the grid-constructing energy storage converter.

[0037] In still another aspect, the present application also provides an electronic device, comprising a processor and a memory; wherein the memory stores at least one instruction, which is loaded and executed by the processor to implement the above method.

[0038] In still another aspect, the present application also provides a computer readable storage medium, which stores at least one instruction, which is loaded and executed by a processor to implement the above method.

[0039] The technical scheme provided by the present application has at least the following beneficial effects:

[0040] The present application adopts full-phase FFT to analyze the voltage output signal, and can extract the inter-harmonic of the voltage output signal of the grid-connected energy storage converter; and generates the corresponding PWM pulse control signal through space vector modulation, thereby effectively suppressing the voltage inter-harmonic output by the grid-connected energy storage converter. BRIEF DESCRIPTION OF DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0042] Figure 1 is an execution flow diagram of the grid-connected energy storage converter off-grid voltage inter-harmonic suppression method provided by the embodiments of the present application;

[0043] Figure 2 is a full-phase FFT spectrum analysis data processing mode schematic diagram;

[0044] Figure 3 is a full-phase FFT amplitude spectrum and phase spectrum; wherein (a) is the full-phase FFT amplitude spectrum and phase spectrum of a single frequency signal x1(t); (b) is the full-phase FFT amplitude spectrum and phase spectrum of a single frequency signal x2(t); (c) is the full-phase FFT amplitude spectrum and phase spectrum of a composite signal x(t);

[0045] Figure 4 is a system block diagram of the electronic device provided by the embodiments of the present application. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical scheme and advantages of the present application clearer, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0047] First, it should be noted that in the embodiments of the present invention, the words "exemplarily," "for example," etc., are used to indicate that they are examples, illustrations, or descriptions. Any embodiment or design scheme described as "exemplary" in the present invention should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the term "exemplarily" is intended to present the concept in a specific manner. Furthermore, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either one or the other.

[0048] First Embodiment

[0049] This embodiment provides a method for suppressing off-grid voltage interharmonics in a grid-connected energy storage converter. The execution flow of this method for suppressing off-grid voltage interharmonics in a grid-connected energy storage converter is as follows: Figure 1 As shown, it includes:

[0050] S1, collects the off-grid three-phase output voltage of the grid-type energy storage converter;

[0051] S2, extract the interharmonics in the off-grid three-phase output voltage;

[0052] Specifically, in this embodiment, the implementation process of S2 is as follows:

[0053] S21, use full-phase FFT to perform harmonic analysis on the voltage to obtain harmonic and interharmonic components at each frequency;

[0054] The process of analyzing data using full-phase FFT (apFFT) is as follows: Figure 2 As shown, it includes: firstly, using a convolution window function W of length (2N-1). c (n) Weight the input vector x of length (2N-1) before and after the center sample point x(0) to reduce spectral leakage. The weighted data is denoted as x. w Then, x is spaced at N delay units. w Divide the data into two segments (first segment: from x) w ( (N+1) to x w (0); Second paragraph: From x w (0) to x w (N-1)), then overlap the two data segments and sum them to form an output vector y of length N; finally, perform FFT on the vector y to obtain the full-phase FFT spectrum analysis result Y.

[0055] If a single-frequency complex exponential signal is:

[0056]

[0057] In the formula: A is the amplitude, θ is the initial phase, and ω is the angular frequency, which is expressed as a frequency interval of β. , where n represents the state or change of the signal at different time points, and j represents the imaginary part of the signal.

[0058] The 2N-1 input data {x(-N+1),..., x(0),..., x(N-1)} are convoluted to obtain N output data, and then the N output data are subjected to FFT to obtain full-phase FFT spectrum analysis as:

[0059]

[0060] In the formula, A is an amplitude coefficient, representing the amplitude of the signal; N is the length or the number of sampling points of the signal; β represents the frequency offset or the normalized frequency of the signal; k is an index in the frequency domain, representing the kth frequency point; represents the frequency offset value; when (k-βN) is close to an integer, β k) is close to an integer, the amplitude of the spectrum function reaches a peak value; θ is the phase value of the full-phase FFT spectrum, which is also the theoretical phase value of the middle sample x(0);

[0061] In addition, in order to improve the accuracy, the phase difference can also be corrected.

[0062] S22, whether the signal contains dense spectrum components is determined according to the flatness of the phase spectrum, and the frequency positions of the dense spectrum harmonics and the overtones are obtained, and the overtones with high content and close frequency intervals are subjected to detailed analysis;

[0063] It should be noted that, in this embodiment, the overtones with high content and close frequency intervals are concentrated and suppressed according to the extracted full-frequency segment overtone amplitude and the frequency positions;

[0064] The full-phase FFT has phase invariance, and the phase spectrum presents flat distribution characteristics; it can be used to identify whether the signal contains dense multi-frequency overtones; when the phase spectrum corresponding to the amplitude spectrum peak does not have flatness, it can be judged as dense spectrum;

[0065] Suppose there is a single-frequency signal ;

[0066] Single-frequency signal ;

[0067] The composite signal x(t) = x1(t) + x2(t);

[0068] In the formula, t is time, f1=20Hz, θ1=150°, f2=20.2Hz, and θ2=50°; the frequency f s =128Hz, the sampling length is N=128, and the spectrum resolution formula , here f =2Hz, due to < f The composite signal x(t) belongs to a dense spectral distribution. Performing a full-phase FFT on x1(t), x2(t), and x(t) respectively yields the following results: Figure 3 The amplitude and phase spectra shown in (a), (b), and (c) are shown in the figure; it can be seen that... Figure 3 The phase spectra of (a) and (b) form a straight line, indicating no phase change and flatness, which conforms to the phase invariance characteristic of full-phase FFT; while Figure 3 The phase spectrum near the peak of the amplitude spectrum in (c) does not have flatness, and can be judged as a dense spectrum.

[0069] S23. After determining the interharmonics that need to be eliminated, design the corresponding window function filter according to the frequency range of dense interharmonics to extract the interharmonics of the voltage output signal of the grid-type energy storage converter.

[0070] It should be noted that, after determining the interharmonics that need to be eliminated, this embodiment designs a corresponding window function filter based on the frequency range of dense interharmonics to extract the interharmonics of the voltage output signal of the grid-type energy storage converter; the filter contains multiple frequency bands, and the interharmonics of these frequency bands are superimposed.

[0071] Specifically, in this embodiment, the filter is an FIR (Finite Impulse Response) filter. Since the actual unit impulse response h of the filter... d (n) is generally an infinitely long non-causal sequence and cannot be directly used as the unit impulse response of an FIR filter; it needs to be truncated to a finite length N, and the truncated unit impulse response is h. d However, direct truncation leads to spectral leakage and the Gibbs phenomenon. To reduce these effects, this embodiment uses the Hanning window function w(n) to modify the truncated impulse response h. d (n) Windowing is applied to obtain the processed unit impulse response: h(n) = h d Using h(n) as the filter coefficients of the FIR filter, a causal and finite-length filter can be obtained (causality means that the output of the system depends only on the current and past inputs, and not on the future inputs; finite length means that the impulse response of the filter decays to zero in a finite time, that is, the length of the impulse response is finite).

[0072] Based on the above, a Hanning window is used in the embodiment to calculate the unit impulse response of the FIR filter. The output of the final FIR filter is:

[0073]

[0074] In the formula, y is the output of the FIR filter; N is the order of the FIR filter; x is the input of the FIR filter; and h is the filter coefficient.

[0075] S3, based on the extracted inter-harmonic, generating a corresponding PWM pulse control signal, and further generating a three-phase off-grid voltage to eliminate the voltage inter-harmonic output by the grid-forming energy storage converter;

[0076] Specifically, in the embodiment, the implementation process of S3 is as follows:

[0077] S31, subtracting the extracted inter-harmonic component from the off-grid output voltage as the off-grid output voltage feedforward, superimposing the voltage reference term generated after the current controller of the fundamental positive sequence current component, and composing the current loop output given voltage signal to eliminate the inter-harmonic disturbance component on the positive feedforward loop;

[0078] S32, the voltage loop control is used to eliminate the influence of the voltage inter-harmonic component on the harmonic component suppression of the loop, that is, the off-grid voltage after removing the extracted voltage inter-harmonic component is used as the feedback of the voltage outer loop control loop;

[0079] S33, based on the superimposed voltage signal generated by the output of the voltage and current double-loop control loop and the voltage feedforward output, generating a corresponding PWM pulse control signal through space vector modulation, and further generating a three-phase off-grid voltage to eliminate the voltage inter-harmonic output by the grid-forming energy storage converter.

[0080] Among them, the space vector modulation related technology is prior art, so it will not be repeated here.

[0081] In summary, the embodiment provides a method for suppressing the off-grid voltage inter-harmonic of the grid-forming energy storage converter, which analyzes the voltage output signal by using full-phase FFT, and can extract the inter-harmonic of the voltage output signal of the grid-forming energy storage converter; and generates a corresponding PWM pulse control signal through space vector modulation, which can effectively suppress the voltage inter-harmonic output by the grid-forming energy storage converter.

[0082] Second embodiment

[0083] The embodiment provides a grid-forming energy storage converter off-grid voltage inter-harmonic suppression system, which comprises the following modules:

[0084] The data acquisition module is configured to acquire off-grid three-phase output voltage of the grid-forming energy storage converter.

[0085] The inter-harmonic extraction module is configured to extract inter-harmonics in the off-grid three-phase output voltage.

[0086] The voltage inter-harmonic elimination module is configured to generate corresponding PWM pulse control signals based on the extracted inter-harmonics, and further generate three-phase off-grid voltage to eliminate voltage inter-harmonics output by the grid-forming energy storage converter.

[0087] It should be noted that the grid-forming energy storage converter off-grid voltage inter-harmonic suppression system of the embodiment corresponds to the grid-forming energy storage converter off-grid voltage inter-harmonic suppression method of the first embodiment. The functions implemented by each functional module in the grid-forming energy storage converter off-grid voltage inter-harmonic suppression system of the embodiment correspond to each flow step in the grid-forming energy storage converter off-grid voltage inter-harmonic suppression method of the first embodiment. Therefore, no further description is provided here.

[0088] Third embodiment

[0089] The embodiment provides an electronic device, such as Figure 4 As shown in the figure, the electronic device includes a processor and a memory; wherein the processor and the memory can be connected through a communication bus; the memory stores at least one instruction, which is loaded and executed by the processor to implement the method of the first embodiment. In addition, the electronic device can also include a transceiver, and the processor and the transceiver can be connected through a communication bus, and the transceiver is configured to communicate with other devices.

[0090] Next, the electronic device will be described in detail in combination with Figure 4 The various constituent components of the electronic device will be described in detail as follows:

[0091] The processor is the control center of the electronic device. The electronic device can include multiple processors. Each of the processors can be a single-CPU or a multi-CPU. The processor can be one processor or a collective term of multiple processing elements. For example, the processor can be one or more central processing units (CPUs), other general purpose processors, application specific integrated circuits (ASICs), or one or more integrated circuits configured to implement an embodiment of the present application, such as one or more digital signal processors (DSPs), or one or more field programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The general purpose processor can be a microprocessor or any conventional processor, or the like. The processor can perform various functions of the electronic device by running or executing software programs stored in the memory and calling data stored in the memory.

[0092] In a specific implementation, as an embodiment, the processor can include one or more CPUs, such as CPU0 and CPU1 shown in FIG. 1, of course, this is only an exemplary description. Figure 4

[0093] The memory is used to store software programs for implementing the solution of the present application, and is controlled by the processor to perform. The specific implementation can refer to the above method embodiments, and will not be described here.

[0094] ​Optionally, the memory may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. The memory may be integrated with the processor or exist independently, and may be accessed through the interface circuit of the electronic device ( Figure 4 (Not shown in the image) is coupled to the processor; however, this embodiment of the invention does not impose specific limitations on this.

[0095] The transceiver may include a receiver and a transmitter. Figure 4 (Not shown separately). The receiver is used to implement the receiving function, and the transmitter is used to implement the transmitting function. The transceiver can be integrated with the processor or exist independently, and can be connected through the interface circuit of the electronic device (…). Figure 4 (Not shown in the image) is coupled to the processor, and this embodiment of the invention does not specifically limit this.

[0096] In addition, it should be noted that, Figure 4 The structure of the electronic device shown is not intended to limit the device. Actual devices may include more or fewer components than shown, or combine certain components, or have different component arrangements. Furthermore, the technical effects achieved by this electronic device when performing the method of the first embodiment described above can be referenced to the technical effects described in the first embodiment; therefore, they will not be repeated here.

[0097] Fourth embodiment

[0098] This embodiment provides a computer-readable storage medium storing at least one instruction, which is loaded and executed by a processor to implement the method of the first embodiment described above. The computer-readable storage medium may be a ROM, random access memory, CD-ROM, magnetic tape, floppy disk, or optical data storage device, etc. The instruction stored therein can be loaded and executed by a processor in a terminal.

[0099] Moreover, it should be noted that the present application can be provided as a method, an apparatus, or a computer program product. Therefore, the embodiments of the present application can take the form of an entirely or partially hardware embodiment, an entirely or partially software embodiment, or an embodiment combining software and hardware aspects. Furthermore, when implemented in software, the embodiments of the present application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, a computer diskette, an optical storage medium, a magnetic storage medium, and a semiconductor memory device). The computer program product includes one or more computer instructions that when loaded and executed by a computer, cause the computer to carry out the processes or functions described in the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable apparatus. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, such as from a website, a computer, a server, or a data center to another website, computer, server, or data center through a wired (for example, infrared, wireless, microwave, or the like) manner. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, data center, or the like, including one or more collections of available media. The available media can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state disk.

[0100] The embodiments of the present application are described with reference to flowcharts and / or block diagrams of the method, terminal device (system), and computer program product according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, an embedded processor, or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate a device that implements the flowcharts and / or block diagrams. Figure 1 The flowcharts and / or block diagrams Figure 1 The apparatus that implements the functions specified in one or more flows and / or blocks.

[0101] These computer program instructions can also be stored in a computer-readable memory that can direct the computer or other programmable data processing terminal device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product that includes instruction apparatus, which implements the flowcharts and / or block diagrams. Figure 1 The flowcharts and / or block diagrams Figure 1the functions specified in the individual block or blocks. Such computer program instructions can also be loaded into a computer or other programmable data processing devices, so that a series of operational steps are performed on the computer or other programmable devices to generate a computer-implemented process, thus the instructions executed on the computer or other programmable devices provide processes for implementing the functions specified in the flowchart block(s) or block(s). Figure 1 the functions specified in the individual block or blocks. Such computer program instructions can also be loaded into a computer or other programmable data processing devices, so that a series of operational steps are performed on the computer or other programmable devices to generate a computer-implemented process, thus the instructions executed on the computer or other programmable devices provide processes for implementing the functions specified in the flowchart block(s) or block(s). Figure 1 Figure 1 the functions specified in the individual block or blocks. Such computer program instructions can also be loaded into a computer or other programmable data processing devices, so that a series of operational steps are performed on the computer or other programmable devices to generate a computer-implemented process, thus the instructions executed on the computer or other programmable devices provide processes for implementing the functions specified in the flowchart block(s) or block(s).

[0102] It should also be noted that, in the present document, the terms such as first and second, etc. are merely used to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or terminal device. Without more limitations, the element defined by the statement "including a…", does not exclude the presence of other identical elements in the process, method, article or terminal device including the element. In addition, the term "and / or" is merely a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the existence of A alone, the existence of A and B together, and the existence of B alone, where A and B can be singular or plural. In addition, the character " / " in the present document generally represents an "or" relationship between the preceding and following associated objects, but it can also represent an "and / or" relationship, which can be understood in the context before and after. "At least one" means one or more, and "multiple" means two or more. "At least one of the following" or similar expressions means any combination of these items, including single item or any combination of multiple items. For example, at least one of a, b or c can represent a, b, c, a-b, a-c, b-c, or a-b-c, where a, b, and c can be single or multiple.

[0103] In addition, it can be understood that in various embodiments of the present application, the size of the sequence number of the above processes does not mean the order of execution, and the execution order of the processes should be determined by their functions and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0104] Those skilled in the art can appreciate that the units and algorithm steps of the examples described in combination with the embodiments disclosed herein can be realized in electronic hardware or in a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0105] In several embodiments provided by the present application, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely schematic, for example, the division of functional modules / units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another device, or some features can be omitted or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed units can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms. The units described as separate components can be or can not be physically separated, and the components displayed as units can be or can not be physical units, that is, can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment. In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present, or two or more units can be integrated in one unit.

[0106] If the method is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiments of the present application. The foregoing storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0107] Finally, it should be noted that the above description is only the preferred embodiment of the application, it should be pointed out that although the preferred embodiment of the application has been described, for those skilled in the art, once the basic creative concept of the application is known, several improvements and refinements can be made without departing from the principles of the application, and these improvements and refinements should also be considered as the protection scope of the application. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the application.

Claims

1. A method for suppressing off-grid voltage inter-harmonics of a grid-forming energy storage converter, characterized in that, The method comprises the steps of: acquiring off-grid three-phase output voltage of a grid-forming energy storage converter; extracting interharmonics in the off-grid three-phase output voltage; generating corresponding PWM pulse control signals based on the extracted interharmonics, and then generating three-phase off-grid voltage to eliminate voltage interharmonics output by the grid-forming energy storage converter; the step of extracting interharmonics in the off-grid three-phase output voltage comprises: performing harmonic analysis on the off-grid three-phase output voltage by using full-phase FFT to obtain a harmonic analysis result; based on the phase spectrum flatness characteristic, determining the frequency positions of dense spectrum harmonics and interharmonics in the signal according to the harmonic analysis result, so as to obtain the interharmonics corresponding to the dense spectrum as interharmonics to be eliminated; designing a filter according to the frequency range of the interharmonics to be eliminated, and extracting the interharmonics of the off-grid three-phase output voltage signal of the grid-forming energy storage converter by using the designed filter; the step of generating corresponding PWM pulse control signals based on the extracted interharmonics, and then generating three-phase off-grid voltage to eliminate voltage interharmonics output by the grid-forming energy storage converter comprises: subtracting the extracted interharmonics from the off-grid three-phase output voltage as off-grid output voltage feedforward, superimposing the voltage reference term generated after the current controller of the fundamental positive sequence current component, and composing a current loop output given voltage signal to eliminate the interharmonic disturbance component on the positive feedforward loop; subtracting the extracted interharmonics from the off-grid three-phase output voltage as the feedback of the voltage outer loop control loop; generating corresponding PWM pulse control signals by space vector modulation based on the superimposed voltage signal generated from the output of the voltage outer loop control loop and the output of the positive feedforward loop, and then generating three-phase off-grid voltage to eliminate voltage interharmonics output by the grid-forming energy storage converter.

2. The network configuration type energy storage converter off-grid voltage interharmonic suppression method of claim 1, wherein, The filter is an FIR filter. The step of designing a filter according to the frequency range of the interharmonics to be eliminated comprises: Truncating the unit impulse response of the FIR filter to a finite length unit impulse response h d (n); The Hann window function w(n) is used to window h d (n), to obtain the processed unit impulse response h(n): h(n)=h d (n)w(n), and h(n) is used as the filter coefficient of the FIR filter.

3. A system for suppressing off-grid voltage harmonics in a grid-connected energy storage converter, characterized in that, The method comprises the steps of: a data acquisition module is configured to acquire off-grid three-phase output voltage of a grid-forming energy storage converter; an interharmonic extraction module is configured to extract interharmonics in the off-grid three-phase output voltage; a voltage interharmonic elimination module is configured to generate corresponding PWM pulse control signals based on the extracted interharmonics, and then generate three-phase off-grid voltage to eliminate voltage interharmonics output by the grid-forming energy storage converter; the interharmonic extraction module is specifically configured to: perform harmonic analysis on the off-grid three-phase output voltage by using full-phase FFT to obtain a harmonic analysis result; based on the phase spectrum flatness characteristic, determine the frequency positions of dense spectrum harmonics and interharmonics in the signal according to the harmonic analysis result, so as to obtain the interharmonics corresponding to the dense spectrum as interharmonics to be eliminated; design a filter according to the frequency range of the interharmonics to be eliminated, and extract the interharmonics of the off-grid three-phase output voltage signal of the grid-forming energy storage converter by using the designed filter; the voltage interharmonic elimination module is specifically configured to: The off-grid three-phase output voltage minus the extracted inter-harmonic is used as the off-grid output voltage feedforward, which is superimposed on the voltage reference generated by the current controller after the fundamental positive sequence current component, to form the current loop output given voltage signal, eliminating the inter-harmonic disturbance component in the positive feedforward loop; The off-grid three-phase output voltage minus the extracted inter-harmonic is used as the voltage outer loop control loop feedback; The voltage signal generated by the superposition of the output of the voltage outer loop control loop and the output of the positive feedforward loop is used to generate the corresponding PWM pulse control signal through space vector modulation, and then generate three-phase off-grid voltage, eliminating the voltage inter-harmonic output by the network type energy storage converter.

4. The system for suppressing off-grid voltage inter-harmonics of a network-forming energy storage converter of claim 3, wherein, The filter is a FIR filter; The filter is designed according to the frequency range of the inter-harmonic to be eliminated, including: The unit impulse response of the FIR filter is truncated to a finite length unit impulse response h d (n); The Hann window function w(n) is used to window h d (n), to obtain the processed unit impulse response h(n): h(n)=h d (n)w(n), and h(n) is used as the filter coefficient of the FIR filter.

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