Power chip measuring circuit and measuring jig

Abstract

The invention provides a power chip measuring circuit and a measuring jig, and relates to the technical field of power device testing. The power chip measuring circuit comprises a plurality of over-current protection units and a main power loop, one over-current protection unit is additionally arranged between the main power loop and each probe, and when an electric signal on the probe is detected to be abnormal, the over-current protection units or the main power loop disconnect the probe, so that the power chip is measured. The purpose of protecting each probe in direct contact with the tested power chip is achieved, the test safety and yield are improved, meanwhile, excessive devices are not added, and the problem that each probe in direct contact with the chip cannot be protected in a traditional test scheme is solved.

Description

Technical Field

[0001] This application relates to the field of power device testing technology, and more specifically, to a power chip measurement circuit and a measurement fixture. Background Technology

[0002] With the rapid development of new energy electric vehicles, silicon carbide power devices (such as SiC MOSFETs) are being used more and more widely. Their manufacturing process includes key stages such as wafer testing, known-good-die (KGD) testing, and packaging testing. In the known-good-die (KGD) stage, the wafer is diced into multiple known-good-die chips, and then each chip undergoes parameter performance testing to verify whether its electrical performance meets design requirements before packaging.

[0003] Currently, bare chip testing relies on the probes of the measurement fixture to contact the pads of the bare chip to achieve electrical connection, and a protection switch is connected in series in the measurement circuit. When a short circuit overcurrent is detected in the device, the protection switch will activate and disconnect the main power circuit to prevent the energy stored in the bus capacitor from damaging the device under test and the measurement fixture, thus playing a protective role.

[0004] However, the above solution increases the stray inductance of the main power circuit due to the series protection switch, and cannot protect every probe that is in direct contact with the chip. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of the prior art by providing a power chip measurement circuit and a measurement fixture, thereby solving the technical problems existing in the prior art.

[0006] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide a power chip measurement circuit, the circuit comprising: multiple overcurrent protection units and a main power circuit; One end of each of the overcurrent protection units is connected to one end of the main power circuit, and the other end of each of the overcurrent protection units is connected to the corresponding probe. Each probe is connected to the first side of the power chip under test. The other end of the main power circuit is connected to the second side of the power chip under test; The main power circuit is used to receive test commands issued from the outside, and output high-voltage electrical signals according to the test commands, and transmit them to the power chip under test via each of the overcurrent protection units and the probes connected to each of the overcurrent protection units. Each of the overcurrent protection units is used to acquire the electrical signal on the probe connected to the corresponding overcurrent protection unit; When an abnormality is detected in the electrical signal on the probe, the overcurrent protection unit or the main power circuit disconnects the probe.

[0007] Optionally, the main power circuit includes: a high-voltage source, a supporting capacitor, and a power transistor under test; One end of the high-voltage source is connected to one end of the supporting capacitor and the emitter of the power transistor under test, respectively. The drain of the power transistor under test is connected to one end of each of the overcurrent protection units; The other end of each overcurrent protection unit is connected to one end of the corresponding probe; The other end of the probe corresponding to each of the overcurrent protection units is connected to the first side of the power chip under test; The other end of the high voltage source is connected to the other end of the supporting capacitor and the second side of the power chip under test, respectively. The base of the power transistor under test is used to receive an external on / off signal to drive the power transistor under test to conduct, so as to transmit the high-voltage electrical signal output by the high-voltage source to the power chip under test.

[0008] Optionally, the overcurrent protection unit includes: a sampling resistor, a sampling circuit, a processing unit, and a protection power transistor; One end of the sampling resistor is connected to the first input terminal of the sampling circuit and one end of the probe corresponding to the overcurrent protection unit, respectively. The other end of the sampling resistor is connected to the second input terminal of the sampling circuit, the emitter of the protection power transistor, and the first output terminal of the processing unit, respectively. The output terminal of the sampling circuit is connected to the input terminal of the processing unit, the second output terminal of the processing unit is connected to the base of the protection power transistor, and the collector of the protection power transistor is connected to the drain of the test power transistor. The sampling circuit is used to acquire the voltage signal across the sampling resistor and send the voltage signal to the processing unit. The processing unit is configured to control the protection power transistor to disconnect if the detected voltage signal is greater than the voltage protection threshold.

[0009] Optionally, the overcurrent protection unit further includes a reference resistor, and the processing unit is provided with a constant current source circuit; One end of the reference resistor is connected to the processing unit; the other end of the reference resistor is grounded. The voltage protection threshold is the product of the reference resistor and the constant current output by the constant current source circuit.

[0010] Optionally, the main power circuit includes: a high-voltage source, a supporting capacitor and a power transistor under test, a driver, and a control unit; One end of the high-voltage source is connected to one end of the supporting capacitor and the emitter of the power transistor under test, respectively. The drain of the power transistor under test is connected to one end of each of the overcurrent protection units; The other end of each overcurrent protection unit is connected to one end of the corresponding probe; The other end of the probe corresponding to each of the overcurrent protection units is connected to the first side of the power chip under test; The other end of the high voltage source is connected to the other end of the supporting capacitor, the first input terminal of the control unit, and the second side of the power chip under test. The base of the power transistor under test is connected to one end of the driver, and the other end of the driver is connected to the output of the control unit; the second input of the control unit is connected to the output of each of the overcurrent protection units. The control unit is used to acquire the detection signals of each of the overcurrent protection units and the electrical signals output from the second side of the power chip under test. If any abnormality is detected in the detection signal of any overcurrent protection unit or the electrical signals output from the second side of the power chip under test, the control unit controls the power transistor under test to disconnect.

[0011] Optionally, the control unit is further configured to: Based on the detection signals of each of the overcurrent protection units, the current flow status of the probe corresponding to each of the overcurrent protection units is determined.

[0012] Optionally, the overcurrent protection unit includes: a first resistor, a second resistor, and a comparator; One end of the first resistor is connected to one end of the probe corresponding to the overcurrent protection unit, one end of the second resistor, the positive input terminal of the comparator, and one end of the parasitic inductance; wherein, the parasitic inductance is on the probe corresponding to the overcurrent protection unit; The other end of the second resistor is connected to the power supply terminal; The negative input terminal of the comparator is used to connect a preset reference voltage signal; The comparator is used to acquire the voltage change signal of the parasitic inductance and compare the voltage change signal with the reference voltage signal. If the voltage change signal is detected to be less than the reference voltage signal, the output level signal is flipped.

[0013] Optionally, the control unit is further configured to: If a level flip is detected in the comparator output of any overcurrent protection unit, the power transistor under test is disconnected.

[0014] Optionally, the control unit is further configured to: The current flow state of the probe corresponding to each overcurrent protection unit is determined based on the level signal output by the comparator in each overcurrent protection unit.

[0015] Secondly, this application also provides a measuring fixture, including the power chip measuring circuit and chassis clamp described in the first aspect; the power chip to be measured is fixed on the chassis clamp.

[0016] The beneficial effects of this application are: This application provides a power chip measurement circuit and measurement fixture. By adding an overcurrent protection unit between the main power circuit and each probe, when an abnormal electrical signal is detected on the probe, the overcurrent protection unit or the main power circuit disconnects the probe connection, thereby achieving the purpose of protecting each probe that is in direct contact with the power chip under test. This improves test safety and yield, and does not add too many components. It solves the problem that traditional test solutions cannot protect each probe that is in direct contact with the chip. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a physical image of a bare silicon carbide chip. Figure 2 This is a schematic diagram of the structure of a power chip measurement circuit provided in an embodiment of this application; Figure 3 This is a schematic diagram of the main power circuit in the first protection scheme provided in the embodiments of this application; Figure 4 This is a schematic diagram of the overcurrent protection unit in the first protection scheme provided in the embodiments of this application; Figure 5 This is a schematic diagram of the main power circuit in the second protection scheme provided in the embodiments of this application; Figure 6 This is a schematic diagram of the overcurrent protection unit in the second protection scheme provided in the embodiments of this application; Figure 7 This is a schematic diagram of the polarity of the parasitic inductance induced voltage provided in an embodiment of this application; Figure 8 This is a schematic diagram of a measuring fixture provided in an embodiment of this application.

[0019] Icons: 10 - Main power circuit; 20 - Overcurrent protection unit. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0021] First, the background technology involved in this application will be introduced.

[0022] refer to Figure 1 The image shown is a physical diagram of a bare silicon carbide chip. The bottom of the chip is the drain of the SiC MOSFET, the two large white areas on the front are the sources, the central area on the right is the gate, and the white areas on both sides of the right are the Kelvin sources. When applying high voltage and high current to the chip for testing, it is necessary to use a measuring fixture probe to pierce the chip surface to connect the chip to the external measuring circuit.

[0023] Currently, bare chip testing relies on the probes of the measurement fixture to contact the pads of the bare chip to achieve electrical connection, and a protection switch is connected in series in the measurement circuit. When a short circuit overcurrent is detected in the device, the protection switch will activate and disconnect the main power circuit to prevent the energy stored in the bus capacitor from damaging the device under test and the measurement fixture, thus playing a protective role.

[0024] However, the above solution increases the stray inductance of the main power circuit due to the series protection switch, and cannot protect every probe that is in direct contact with the chip.

[0025] To address the aforementioned technical problems, this application provides a power chip measurement circuit. By adding an overcurrent protection unit between the main power circuit and each probe, when an abnormal electrical signal is detected on the probe, the overcurrent protection unit or the main power circuit disconnects the probe connection, thereby achieving the purpose of protecting each probe that is in direct contact with the power chip under test. This improves test safety and yield, and solves the problem that traditional test schemes cannot protect each probe that is in direct contact with the chip.

[0026] Figure 2 This is a schematic diagram of a power chip measurement circuit provided in an embodiment of this application; see reference. Figure 2 As shown, the circuit includes: a main power circuit 10 and multiple overcurrent protection units 20; For example, if the first side of the power chip under test is connected to N probes (where N is greater than or equal to 1), then the device can be determined to include N overcurrent protection units. That is, each overcurrent protection unit is connected to the first side of the power chip under test via a corresponding probe. When an abnormal current is detected on a certain probe, the overcurrent protection unit can protect that probe.

[0027] It should be noted that the first side of the power chip under test is the area where the gate or drain of the power chip is located, and the second side of the power chip under test is the area where the drain of the power chip is located.

[0028] One end of each overcurrent protection unit 20 is connected to one end of the main power circuit 10, and the other end of each overcurrent protection unit 20 is connected to the corresponding probe. Each probe is connected to the first side of the power chip under test. The other end of the main power circuit 10 is connected to the second side of the power chip under test; The main power circuit 10 is used to receive test commands from the outside and output high-voltage electrical signals according to the test commands. The signals are then transmitted to the power chip under test via each overcurrent protection unit and the probes connected to each overcurrent protection unit.

[0029] Each overcurrent protection unit 20 is used to acquire the electrical signal on the probe connected to the corresponding overcurrent protection unit; When an abnormality is detected in the electrical signal on the probe, the overcurrent protection unit or the main power circuit disconnects the probe. The electrical signal on the probe can be a current signal, a voltage signal, or a current change rate signal.

[0030] In one feasible approach, when the main power circuit receives a test command from an external controller, it outputs a high-voltage electrical signal according to the command. This signal is then transmitted to the power chip under test (DUT) via each overcurrent protection unit and the corresponding probe. For example, the high-voltage signal can be transmitted to the DUT via overcurrent protection unit one and probe one, enabling high-voltage testing of the DUT. Each overcurrent protection unit acquires the current signal on the probe connected to it. If an abnormality is detected in the current signal on probe one, the overcurrent protection unit one is controlled to disconnect from probe one, or the main power circuit is controlled to disconnect from probe one. This achieves the purpose of protecting each probe that is in direct contact with the DUT, improving test safety and yield, without adding too many components, thus solving the technical problems of traditional methods.

[0031] In summary, the embodiments of this application provide a power chip measurement circuit. By adding an overcurrent protection unit between the main power circuit and each probe, when an abnormal electrical signal is detected on the probe, the overcurrent protection unit or the main power circuit disconnects the probe connection, thereby achieving the purpose of protecting each probe that is in direct contact with the power chip under test. This improves test safety and yield, without adding too many components, and solves the problem that traditional test schemes cannot protect each probe that is in direct contact with the chip.

[0032] Optionally, this application provides two protection schemes.

[0033] The first type is a resistance-based overcurrent protection scheme, as detailed below.

[0034] Optionally, refer to Figure 3 As shown, the main power circuit includes: a high-voltage source, a supporting capacitor C, and a power transistor T1 under test; One end of the high-voltage source is connected to one end of the supporting capacitor C and the emitter of the power transistor T1 under test; The drain of the power transistor T1 under test is connected to one end of each overcurrent protection unit. The other end of each overcurrent protection unit is connected to one end of the corresponding probe.

[0035] The other end of the probe corresponding to each overcurrent protection unit is connected to the first side of the power chip under test.

[0036] The other end of the high voltage source is connected to the other end of the supporting capacitor C1 and the second side of the power chip under test.

[0037] The base of the power transistor T1 under test is used to connect to an external input on / off signal to drive the power transistor under test to conduct, so as to transmit the high voltage signal output by the high voltage source to the power chip under test.

[0038] In this embodiment, when performing high-voltage testing on the power chip under test, the auxiliary power transistor T1 receives the conduction signal sent by the external driver U3. Under the action of the conduction signal, the auxiliary power transistor T1 is driven to conduct, transmitting the high-voltage electrical signal provided by the high-voltage source in the main power circuit to each overcurrent protection unit. Each overcurrent protection unit remains in a normally conducting state. Then, the high-voltage electrical signal is transmitted to the power chip under test through each overcurrent protection unit and the probe corresponding to each overcurrent protection unit, realizing the high-voltage testing of the power chip under test. During the test, if the overcurrent protection unit detects an abnormality in the current signal on the probe, such as the current signal being greater than a preset current threshold, the overcurrent protection unit switches to the off state, thereby protecting the probe and the power chip under test.

[0039] In another feasible approach, if all probes make good contact and the power chip under test is in good condition throughout the entire test, then each overcurrent protection unit remains in a normally conducting state, thus realizing dynamic testing of the power chip under test.

[0040] Optionally, refer to Figure 4 As shown, taking overcurrent protection unit one as an example, the internal structure of each overcurrent protection unit is introduced. Overcurrent protection unit one includes: a sampling resistor R1, a sampling circuit U1, a processing unit U2, and a protection power transistor Q1; One end of the sampling resistor R1 is connected to the first input terminal of the sampling circuit U1 and one end of the probe 1 corresponding to the overcurrent protection unit, respectively. The other end of the sampling resistor R1 is connected to the second input terminal of the sampling circuit U1, the emitter of the protection power transistor Q1, and the first output terminal of the processing unit U2, respectively. The output terminal of the sampling circuit U1 is connected to the input terminal of the processing unit U2, the second output terminal of the processing unit U2 is connected to the base of the protection power transistor Q1, and the collector of the protection power transistor Q1 is connected to the drain of the test power transistor T1. The sampling circuit U1 is used to acquire the voltage signal across the sampling resistor R1 and send the voltage signal to the processing unit U2; The processing unit U2 is used to control the protection power transistor Q1 to disconnect if the detected voltage signal is greater than the voltage protection threshold.

[0041] In this embodiment, during the short-circuit test, the power transistor T1 under test is turned on first. The protection power transistor Q1 connected in series in the overcurrent protection unit is in a normally conducting state. When the external driver U3 sends an on signal, several thousand amperes of current flow instantaneously flow through the main power circuit. Since there are multiple probes in contact with the power chip under test, with a number between 30 and 50, each probe is evenly distributed with tens of amperes of current under high current conditions. The current of each branch is converted into a voltage signal through the sampling resistor R1 and transmitted to the processing unit U2 through the sampling circuit U1. The processing unit U2 performs an internal comparison. If the voltage exceeds the voltage protection threshold, it will directly control the protection power transistor Q1 to turn off, thereby protecting the probes and the power chip under test.

[0042] Optionally, the overcurrent protection unit also includes: a reference resistor Rref, and a constant current source circuit is provided in the processing unit; One end of the reference resistor Rref is connected to the processing unit U2; the other end of the reference resistor Rref is grounded. The voltage protection threshold is the product of the reference resistor and the constant current output by the constant current source circuit.

[0043] Optionally, the voltage protection threshold can be set via a reference resistor Rref. The processing unit U2 has a built-in constant current source circuit, and the voltage protection threshold V = i * Rref, where i is the constant current output by the constant current source circuit. This allows for flexible setting of the voltage protection threshold, improving the applicability of the overcurrent protection unit.

[0044] The second type is the overcurrent protection scheme based on the rate of change of current, as detailed below.

[0045] Optionally, refer to Figure 5 As shown, the main power circuit includes: a high-voltage source, a supporting capacitor C and a test power transistor T1, a driver U4 and a control unit M1.

[0046] One end of the high-voltage source is connected to one end of the supporting capacitor C and the emitter of the power transistor T1 under test; The drain of the power transistor T1 under test is connected to one end of each overcurrent protection unit. The other end of each overcurrent protection unit is connected to one end of the corresponding probe; for example, the other end of overcurrent protection unit one is connected to one end of probe 1.

[0047] The other end of the probe corresponding to each overcurrent protection unit is connected to the first side of the power chip under test. That is, the other end of all probes is connected to the first side of the power chip under test.

[0048] The other end of the high voltage source is connected to the other end of the supporting capacitor C, the first input terminal of the control unit M1, and the second side of the power chip under test. The base of the power transistor T1 under test is connected to one end of the driver, and the other end of the driver U4 is connected to the output of the control unit M1; the second input of the control unit M1 is connected to the output of each overcurrent protection unit respectively. The control unit M1 is used to acquire the detection signals of each overcurrent protection unit and the electrical signal output from the second side of the power chip under test. If any abnormality is detected in the detection signal of any overcurrent protection unit or the electrical signal output from the second side of the power chip under test, the auxiliary power transistor T1 is controlled to disconnect.

[0049] In this embodiment, the auxiliary power transistor T1 receives an externally sent conduction signal, which drives the auxiliary power transistor T1 to conduct. During the test, each overcurrent protection unit collects the electrical signals on the corresponding probes, and the control unit M1 collects the electrical signals on the main power circuit. If any abnormality is detected in the detection signal of any overcurrent protection unit or the electrical signal output from the second side of the power chip under test, the auxiliary power transistor T1 is controlled to disconnect, thereby protecting the probes and the power chip under test.

[0050] Optionally, in this embodiment, the power transistor T1 on the main power circuit protects all probes and the power chip under test to ensure the safety of the test.

[0051] Optionally, the control unit is also used for: Based on the detection signals of each overcurrent protection unit, the current flow status of the probe corresponding to each overcurrent protection unit is determined.

[0052] In this embodiment, the control unit can also monitor the current flow status of the probes corresponding to each overcurrent protection unit based on the detection signals output by each overcurrent protection unit, realizing online detection of probe current flow. Simultaneously, it can sense the output signal instantly upon current change, improving the circuit protection response time (protection can be activated within tens of nanoseconds). Therefore, this embodiment has excellent performance characteristics such as not increasing the impedance of the main circuit and fast protection response time.

[0053] Optionally, refer to Figure 6 As shown, the overcurrent protection unit includes: a first resistor R2, a second resistor R3, and a comparator U5; One end of the first resistor R2 is connected to one end of the probe corresponding to the overcurrent protection unit, one end of the second resistor R3, the positive input terminal of the comparator U5, and one end of the parasitic inductance Ls; wherein, the parasitic inductance Ls is on the probe corresponding to the overcurrent protection unit.

[0054] In this embodiment, an overcurrent protection unit with n embedded probes is used. By reserving auxiliary points on the power pins, the parasitic inductance Ls on the probes is used to detect changes in current and generate an induced voltage that is positive on top and negative on the bottom. The first resistor R2 is connected to the parasitic inductance Ls, and the current flow on each probe from 1 to n can be determined in the same way.

[0055] The other end of the second resistor R3 is connected to the power supply terminal Vdd. The negative input terminal of comparator U5 is used to connect to a preset reference voltage signal Vref; Comparator U5 is used to acquire the voltage change signal of the parasitic inductance Ls and compare the voltage change signal with the reference voltage signal. If the detected voltage change signal is less than the reference voltage signal, the output level signal is flipped.

[0056] In this embodiment, reference Figure 7 The diagram shown illustrates the polarity of the parasitic inductance-induced voltage. Figures 6-7As shown, the potential of the lower end of the first resistor R2 and the parasitic inductance Ls is 0. If no current flows through, the voltage at the positive input terminal of comparator U5 is Vdd*R1 / (R1+R2). When the power chip under test is turned on, there is a large instantaneous current jump in the current-carrying loop. The current change rate is di / dt. The voltage change at the positive input terminal of comparator U5 is Vdd*R1 / (R1+R2)-Ls*(di / dt). If the detected voltage change signal is lower than the set reference voltage signal Vref, it indicates that there is an abnormality in the current of this branch, and the level signal output by comparator U5 flips.

[0057] Therefore, by checking whether the level signal output by comparator U5 in each overcurrent protection unit changes, it can be determined whether there is an abnormality in the rate of change of current on the corresponding probe of each overcurrent protection unit, thus realizing the monitoring of the current flow on each probe.

[0058] Optionally, the control unit is also used for: If a level flip is detected in the comparator output of any overcurrent protection unit, the power transistor under test is disconnected.

[0059] Optionally, during the test, if the control unit detects a level flip of the comparator U5 output in the overcurrent protection unit 1, such as 1->0, it can determine that there is an abnormality in the electrical signal of the branch where the overcurrent protection unit 1 is located, and control the power transistor T1 under test to disconnect, thereby protecting the probe and the power chip under test.

[0060] Optionally, the control unit is also used for: The current flow status of the probe corresponding to each overcurrent protection unit is determined based on the level signal output by the comparator in each overcurrent protection unit.

[0061] Optionally, the N groups of overcurrent protection units can be designed with the same parasitic inductance Ls in each circuit through structural countermeasures. When the current change rate di / dt is greater than the reference value, the level signal output by the comparator will flip. The control unit M1 can detect the current flow on the probe by detecting the output of each comparator.

[0062] Alternatively, in the second protection scheme, no additional impedance is added to the main circuit. This not only ensures the test performance but also enables online detection of probe current flow. At the same time, the output signal can be sensed instantly when the current changes, improving the circuit protection response time (protection can be activated in tens of ns).

[0063] Therefore, the power chip measurement circuit provided in this application provides two test protection circuit schemes. Both of these protection schemes provide a measurement connection structure without lead conditions when measuring the power chip under test. The first one has a simple structure and reliable protection, while the second one has excellent performance such as not increasing the additional main circuit impedance and fast protection response time.

[0064] Optionally, refer to Figure 8 As shown, this application provides a measuring fixture, which includes the power chip measuring circuit and chassis clamp provided in the above embodiments.

[0065] The power chip under test is fixed on the chassis fixture.

[0066] In this embodiment, a measuring fixture is also provided for performing performance testing on the power chip under test. Figure 8 As shown, the electrical connection structure between the power chip under test and the measuring fixture is shown. The power chip under test is fixed by the bottom clamp and the left and right limiting grooves. A boss electrode is added above the chassis clamp as shown in the red area. After the power chip under test is pressed, the drain resource can be transferred to the side probe. The electrodes of the power chip are all introduced into the power chip measurement circuit through the probe, realizing a reliable connection between the measurement resource and the power chip under test.

[0067] The measuring fixture provided in this application can achieve overcurrent protection for all probes with fast response time and reliable protection, thus improving the safety of testing.

[0068] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0069] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0070] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0071] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A power chip measurement circuit, characterized in that, The circuit includes: multiple overcurrent protection units and a main power circuit; One end of each of the overcurrent protection units is connected to one end of the main power circuit, and the other end of each of the overcurrent protection units is connected to the corresponding probe. Each probe is connected to the first side of the power chip under test. The other end of the main power circuit is connected to the second side of the power chip under test; The main power circuit is used to receive test commands issued from the outside, and output high-voltage electrical signals according to the test commands, and transmit them to the power chip under test via each of the overcurrent protection units and the probes connected to each of the overcurrent protection units. Each of the overcurrent protection units is used to acquire the electrical signal on the probe connected to the corresponding overcurrent protection unit; When an abnormality is detected in the electrical signal on the probe, the overcurrent protection unit or the main power circuit disconnects the probe.

2. The circuit according to claim 1, characterized in that, The main power circuit includes: a high-voltage source, a supporting capacitor, and a power transistor under test; One end of the high-voltage source is connected to one end of the supporting capacitor and the emitter of the power transistor under test, respectively. The drain of the power transistor under test is connected to one end of each of the overcurrent protection units; The other end of each overcurrent protection unit is connected to one end of the corresponding probe; The other end of the probe corresponding to each of the overcurrent protection units is connected to the first side of the power chip under test; The other end of the high voltage source is connected to the other end of the supporting capacitor and the second side of the power chip under test, respectively. The base of the power transistor under test is used to receive an external on / off signal to drive the power transistor under test to conduct, so as to transmit the high-voltage electrical signal output by the high-voltage source to the power chip under test.

3. The circuit according to claim 2, characterized in that, The overcurrent protection unit includes: a sampling resistor, a sampling circuit, a processing unit, and a protection power transistor; One end of the sampling resistor is connected to the first input terminal of the sampling circuit and one end of the probe corresponding to the overcurrent protection unit, respectively. The other end of the sampling resistor is connected to the second input terminal of the sampling circuit, the emitter of the protection power transistor, and the first output terminal of the processing unit, respectively. The output terminal of the sampling circuit is connected to the input terminal of the processing unit, the second output terminal of the processing unit is connected to the base of the protection power transistor, and the collector of the protection power transistor is connected to the drain of the test power transistor. The sampling circuit is used to acquire the voltage signal across the sampling resistor and send the voltage signal to the processing unit. The processing unit is configured to control the protection power transistor to disconnect if the detected voltage signal is greater than a preset voltage protection threshold.

4. The circuit according to claim 3, characterized in that, The overcurrent protection unit further includes a reference resistor, and the processing unit is provided with a constant current source circuit. One end of the reference resistor is connected to the processing unit; the other end of the reference resistor is grounded. The voltage protection threshold is the product of the reference resistor and the constant current output by the constant current source circuit.

5. The circuit according to claim 1, characterized in that, The main power circuit includes: a high-voltage source, a supporting capacitor and a power transistor under test, a driver, and a control unit; One end of the high-voltage source is connected to one end of the supporting capacitor and the emitter of the power transistor under test, respectively. The drain of the power transistor under test is connected to one end of each of the overcurrent protection units; The other end of each overcurrent protection unit is connected to one end of the corresponding probe; The other end of the probe corresponding to each of the overcurrent protection units is connected to the first side of the power chip under test; The other end of the high voltage source is connected to the other end of the supporting capacitor, the first input terminal of the control unit, and the second side of the power chip under test. The base of the power transistor under test is connected to one end of the driver, and the other end of the driver is connected to the output of the control unit; the second input of the control unit is connected to the output of each of the overcurrent protection units. The control unit is used to acquire the detection signals of each of the overcurrent protection units and the electrical signals output from the second side of the power chip under test. If any abnormality is detected in the detection signal of any overcurrent protection unit or the electrical signals output from the second side of the power chip under test, the control unit controls the power transistor under test to disconnect.

6. The circuit according to claim 5, characterized in that, The control unit is also used for: Based on the detection signals of each of the overcurrent protection units, the current flow status of the probe corresponding to each of the overcurrent protection units is determined.

7. The circuit according to claim 5, characterized in that, The overcurrent protection unit includes: a first resistor, a second resistor, and a comparator; One end of the first resistor is connected to one end of the probe corresponding to the overcurrent protection unit, one end of the second resistor, the positive input terminal of the comparator, and one end of the parasitic inductance; wherein, the parasitic inductance is on the probe corresponding to the overcurrent protection unit; The other end of the second resistor is connected to the power supply terminal; The negative input terminal of the comparator is used to connect a preset reference voltage signal; The comparator is used to acquire the voltage change signal of the parasitic inductance and compare the voltage change signal with the reference voltage signal. If the voltage change signal is detected to be less than the reference voltage signal, the output level signal is flipped.

8. The circuit according to claim 7, characterized in that, The control unit is also used for: If a level flip is detected in the comparator output of any overcurrent protection unit, the power transistor under test is disconnected.

9. The circuit according to claim 7, characterized in that, The control unit is also used for: The current flow state of the probe corresponding to each overcurrent protection unit is determined based on the level signal output by the comparator in each overcurrent protection unit.

10. A measuring fixture, characterized in that, Includes the power chip measurement circuit and chassis fixture as described in any one of claims 1-9; The power chip under test is fixed on the chassis fixture.

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