Intelligent debugging method and system applied to power grid fusion terminal

Abstract

The application provides an intelligent debugging method and system applied to a power grid fusion terminal, relates to the technical field of power grid equipment debugging, and first establishes an association relationship between the debugging demand of the power grid fusion terminal and the current running state information of the terminal, generates a demand state association result, then carries out feature mapping processing based on the demand state association result, obtains a debugging feature mapping set containing function demand mapping features and performance demand mapping features, then executes strategy matching on the debugging feature mapping set by using a pre-trained debugging strategy, generates a terminal debugging strategy set, executes a debugging operation on the terminal according to the terminal debugging strategy set, generates a debugging execution result containing a function debugging result and a performance debugging result, and finally executes debugging strategy parameter adjustment based on the debugging execution result, generates an optimized terminal debugging strategy, can efficiently and accurately complete the debugging work of the power grid fusion terminal, and effectively improves the debugging quality and running stability of the terminal.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power grid equipment commissioning, in particular to an intelligent commissioning method and system applied to a power grid fusion terminal. BACKGROUND

[0002] In a power grid system, as a key device, the power grid fusion terminal undertakes important tasks such as data acquisition, transmission, processing, and interaction with various devices. Its stable and efficient operation is crucial to ensuring the safety and reliable power supply of the power grid. However, before and during the use of the power grid fusion terminal, comprehensive and accurate commissioning is required to ensure that its functions and performance indicators meet the actual needs of power grid operation.

[0003] The traditional commissioning method of the power grid fusion terminal mainly relies on manual operation and experience-based judgment. Commissioning personnel need to manually collect the terminal's running state information, analyze the commissioning requirements based on their professional knowledge and past experience, and develop appropriate commissioning strategies. The above-mentioned method is not only inefficient, but also susceptible to human factors, making it difficult to ensure the consistency and accuracy of the commissioning results. In addition, with the continuous expansion of the power grid and the increasing degree of intelligence, the functions and performance requirements of the power grid fusion terminal are becoming more and more complex and diverse. The traditional commissioning method is difficult to quickly and effectively respond to these changes, and cannot meet the efficiency and accuracy requirements of modern power grid terminal commissioning. SUMMARY

[0004] In view of the above-mentioned problems, in combination with the first aspect of the present application, the embodiments of the present application provide an intelligent commissioning method applied to a power grid fusion terminal, which comprises:

[0005] Establishing an association relationship between the commissioning requirements of the power grid fusion terminal and the current running state information of the terminal, generating a requirement state association result, the commissioning requirements including function commissioning requirements and performance commissioning requirements, and the current running state information of the terminal including terminal hardware running parameters and terminal software interaction data;

[0006] Performing feature mapping processing on the commissioning requirements and the current running state information of the terminal based on the requirement state association result, obtaining a commissioning feature mapping set, the commissioning feature mapping set including function requirement mapping features and performance requirement mapping features;

[0007] Performing strategy matching processing on the commissioning feature mapping set based on a pre-trained commissioning strategy, generating a terminal commissioning strategy set, the pre-trained commissioning strategy including function commissioning logic and performance commissioning logic;

[0008] Performing commissioning operations on the power grid fusion terminal according to the terminal commissioning strategy set, generating a commissioning execution result, the commissioning execution result including function commissioning results and performance commissioning results;

[0009] The debugging strategy parameter adjustment operation is performed based on the debugging execution result, an optimized terminal debugging strategy is generated, and the optimized terminal debugging strategy is used as a basis for subsequent power grid integrated terminal debugging.

[0010] In another aspect, the embodiment of the present application further provides an intelligent debugging system for a power grid integrated terminal, which comprises a processor and a machine readable storage medium, the machine readable storage medium is connected with the processor, the machine readable storage medium is used for storing programs, instructions or codes, and the processor is used for executing the programs, instructions or codes in the machine readable storage medium to realize the above method.

[0011] Based on the above aspects, by establishing the association relationship between the debugging requirements and the current running state information of the terminal, the core points of the terminal debugging can be accurately grasped, the requirements are closely combined with the actual state, the feature mapping set containing the function requirement mapping feature and the performance requirement mapping feature is obtained based on the requirement state association result, the pre-trained debugging strategy containing the function debugging logic and the performance debugging logic is used to perform the strategy matching processing on the debugging feature mapping set, the terminal debugging strategy set can be quickly and intelligently generated, and the generation efficiency and accuracy of the debugging strategy are greatly improved. After the debugging operation is performed according to the terminal debugging strategy set and the debugging execution result is generated, the debugging strategy parameter adjustment operation is performed based on the debugging execution result, the dynamic optimization and adaptive adjustment of the debugging strategy are realized, the debugging work of the power grid integrated terminal can be efficiently and accurately completed, and the debugging quality and the running stability of the terminal are effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is the execution flow diagram of the intelligent debugging method for the power grid integrated terminal provided by the embodiment of the present application.

[0013] Figure 2 is the schematic diagram of exemplary hardware and software components of the intelligent debugging system for the power grid integrated terminal provided by the embodiment of the present application. DETAILED DESCRIPTION

[0014] The present application will be described in detail below with reference to the accompanying drawings of the specification, Figure 1 is the flow diagram of the intelligent debugging method for the power grid integrated terminal provided by an embodiment of the present application, and the intelligent debugging method for the power grid integrated terminal will be described in detail below.

[0015] Step S110: Establish the association between the debugging requirements of the power grid fusion terminal and the current running state information of the terminal, generate the requirement state association result, the debugging requirements include functional debugging requirements and performance debugging requirements, and the current running state information of the terminal includes terminal hardware running parameters and terminal software interaction data.

[0016] In this embodiment, the edge computing fusion terminal debugging in the smart grid is taken as an example. The edge computing fusion terminal is responsible for distribution transformer substation equipment data acquisition, instruction forwarding and local data analysis function. The debugging requirements come from the quarterly maintenance tasks issued by the power grid operation and maintenance management platform, and cover functions and performance. The current running state information of the terminal is obtained in real time by the built-in state monitoring module of the terminal, and a complete running parameter snapshot is uploaded once every fixed time.

[0017] Step S111: Extract the functional debugging requirement elements and performance debugging requirement elements in the debugging requirements, the functional debugging requirement elements include terminal data acquisition function requirements and terminal instruction response function requirements, and the performance debugging requirement elements include terminal data transmission rate requirements and terminal running stability requirements.

[0018] The functional debugging requirement elements are parsed from the debugging requirement document. The data acquisition function requirement specifies that the terminal needs to support multi-type acquisition of analog, digital and state quantities, and the acquisition period needs to meet the monitoring accuracy requirements of different equipment. The instruction response function requirement requires that the response time of the terminal to the remote control instruction and the setting instruction issued by the operation and maintenance platform needs to meet the industry standard. In the performance debugging requirement elements, the data transmission rate requirement requires that the uplink and downlink data transmission rate between the terminal and the master station needs to be maintained in a stable interval, the running stability requirement requires that the continuous fault-free running time of the terminal needs to reach the specified standard, and the core function should not be interrupted under high load.

[0019] Step S112: Separate the terminal hardware running parameters and terminal software interaction data from the current running state information of the terminal, the terminal hardware running parameters include chip running state and interface connection state, and the terminal software interaction data includes data transmission log and instruction processing record.

[0020] The current running state information of the terminal is uploaded in a structured data format, and the hardware and software related data are separated through a data classification interface. The chip running state includes the core running frequency, core temperature, cache usage rate and core load distribution of the main chip; the interface connection state covers the connection state identifier, signal strength and bit error rate of the Ethernet interface, RS485 interface and optical fiber interface. The data transmission log records the start and end time, data type, transmission direction and transmission result of each data transmission; the instruction processing record includes the instruction receiving time, instruction type, parsing time, execution state and feedback time.

[0021] Step S113: input the functional debugging requirement elements and the terminal software interaction data into the correlation analysis module, establish a first correlation relationship between the functional debugging requirement elements and the terminal software interaction data, and the first correlation relationship is used to reflect the matching degree of the functional debugging requirement and the software interaction data.

[0022] After the correlation analysis module receives the functional debugging requirement elements and the terminal software interaction data, the data acquisition function requirement is compared with the acquisition data type and the cycle in the data transmission log, the matching items and the missing items of the actual acquisition type and the requirement type are marked, and the deviation of the acquisition cycle is counted. Meanwhile, the instruction response function requirement is correlated with the response time and the execution success rate in the instruction processing record, the processing time distribution of different types of instructions and the gap with the requirement standard are analyzed. The first correlation relationship is generated by a feature matching algorithm, and the matching scores of each functional requirement element and the corresponding software data are presented in matrix form.

[0023] Step S114: input the performance debugging requirement elements and the terminal hardware running parameters into the correlation analysis module, establish a second correlation relationship between the performance debugging requirement elements and the terminal hardware running parameters, and the second correlation relationship is used to reflect the matching degree of the performance debugging requirement and the hardware running parameters.

[0024] After the performance debugging requirement elements and the terminal hardware running parameters are input into the correlation analysis module, the data transmission rate requirement is correlated with the network interface rate and the cache processing capability in the chip running state, the fluctuation difference between the actual transmission rate and the requirement rate is analyzed, and the length of time when the rate meets the standard is recorded. The running stability requirement is correlated with the chip temperature and the interface error rate, the length of time when the chip temperature exceeds the threshold and the number of interface connection interruptions are counted, and the correlation between hardware parameter abnormalities and running faults is analyzed. The generated second correlation relationship displays the matching trend of the performance requirement elements and the hardware parameters in the form of a chart.

[0025] Step S115: integrate the first correlation relationship and the second correlation relationship to form a correlation relationship matrix, and each element in the correlation relationship matrix corresponds to a correlation degree description of a group of debugging requirement elements and running state information.

[0026] The row dimension of the correlation relationship matrix is the debugging requirement element, including the data acquisition function requirement, the instruction response function requirement, the data transmission rate requirement, and the running stability requirement. The column dimension is the running state information item, covering specific indicators of corresponding software interaction data and hardware running parameters. Each element in the matrix is represented by a correlation degree descriptor, such as "high matching", "moderate matching", "low matching", and "no matching", and is accompanied by a qualitative explanation of the matching deviation, such as "data acquisition cycle deviation 5%" and "chip temperature overrun 3 times", etc., which intuitively presents the correlation between the requirements and the state.

[0027] Step S116: Based on the association relationship matrix, the demand and state combination whose association degree meets the debugging priority requirement is screened out, and the screened demand and state combination and the corresponding association relationship are sorted into a demand state association result.

[0028] The debugging priority standard is set, the demand and state combination with an association degree of "low matching" and "no matching" is marked as high priority, "medium matching" is marked as medium priority, and "high matching" is marked as low priority. From the association relationship matrix, the combination items of high priority and medium priority are screened out, for example, the combination of functional demand with missing data acquisition type and corresponding log record, the combination of performance demand with transmission rate fluctuation exceeding standard and chip parameter, etc. After sorting according to the priority, the association relationship description, deviation performance and possible influence of each combination are supplemented to form a structured demand state association result.

[0029] Step S120: Based on the demand state association result, the debugging demand and the current running state information of the terminal are processed by feature mapping to obtain a debugging feature mapping set, which contains functional demand mapping features and performance demand mapping features.

[0030] Based on the demand state association result, the demand and state combination of high priority and medium priority are processed by feature mapping. The demand and software interaction data combination related to function and the demand and hardware parameter combination related to performance are extracted features, the demand elements and state information are converted into standardized features through mapping rules, and the feature dimensions are unified and can reflect the association relationship.

[0031] Step S121: Extracting the terminal software interaction data segment corresponding to the functional debugging demand element from the demand state association result, the terminal software interaction data segment contains interactive log related to data acquisition function requirement and processing record related to instruction response function requirement.

[0032] According to the functional demand item in the demand state association result, the corresponding record segment in the terminal software interaction data is located. The interactive log segment related to the data acquisition function requirement covers the acquisition task trigger record, data type identification, acquisition result code and abnormal prompt in a short period of time; the processing record segment related to the instruction response function requirement contains the receiving timestamp of various instructions, analysis process log, execution step record and feedback information, which ensures that the extracted segment completely covers the interactive process related to the demand.

[0033] Step S122: Performing feature extraction operation on the terminal software interaction data segment to generate software interaction features, the software interaction features contain data acquisition response features and instruction processing delay features, mapping the software interaction features with the functional debugging demand elements to obtain functional demand mapping features.

[0034] Features are extracted from the data collection related log fragments, including collection task response time length distribution, data type completeness identification, and abnormal collection frequency distribution, to form data collection response features. Features are extracted from the instruction processing record fragments, including instruction type identification accuracy, analysis time consumption distribution, and execution feedback delay distribution, to form instruction processing delay features. These features are mapped with the index requirements in the functional debugging demand elements, such as mapping the collection response time length distribution with the collection period requirement in the demand, marking the feature components that exceed the allowed range, and generating functional demand mapping features.

[0035] Step S123: At the same time, terminal hardware running parameter fragments corresponding to the performance debugging demand elements are extracted from the demand state association results, and the terminal hardware running parameter fragments include chip parameters related to data transmission rate requirements and interface parameters related to running stability requirements.

[0036] According to the performance demand items in the demand state association results, terminal hardware running parameter fragments are extracted. Chip parameter fragments related to data transmission rate requirements include real-time rate records of network interfaces, cache read / write speeds, and data processing throughput; interface parameter fragments related to running stability requirements include connection state switching records of each interface, signal strength fluctuations, and bit error rate trends, to ensure that the parameter fragments can reflect the hardware running state corresponding to the performance demand.

[0037] Step S124: Feature extraction operations are performed on the terminal hardware running parameter fragments to generate hardware running features, and the hardware running features include chip transmission efficiency features and interface connection stability features. The hardware running features are mapped with the performance debugging demand elements to obtain performance demand mapping features.

[0038] Features are extracted from the chip parameter fragments, including rate compliance rate, rate fluctuation frequency, cache utilization rate, and transmission rate correlation, to form chip transmission efficiency features. Features are extracted from the interface parameter fragments, including connection interruption frequency, signal strength attenuation rate, and bit error rate accumulation, to form interface connection stability features. These features are mapped with the standards in the performance debugging demand elements, such as mapping the chip transmission efficiency features with the demand rate threshold, marking the feature intervals with insufficient rate, and generating performance demand mapping features.

[0039] Step S125: The functional demand mapping features and the performance demand mapping features are arranged in the order of the association relationship in the demand state association results, so that each functional demand mapping feature corresponds to a unique functional debugging demand element and related terminal software interaction data, and each performance demand mapping feature corresponds to a unique performance debugging demand element and related terminal hardware running parameters.

[0040] The functional requirement mapping features and the performance requirement mapping features are sorted according to the priority order of the requirement elements in the requirement state association result. The functional requirement mapping features are arranged in the order of data acquisition functions and instruction response functions, and each feature is attached with a corresponding functional debugging requirement element description and an associated terminal software interaction data reference identifier. The performance requirement mapping features are arranged in the order of data transmission rates and running stability, and are also attached with corresponding performance debugging requirement elements and terminal hardware running parameter reference identifiers, to ensure the clear correspondence between the features and the requirements and data.

[0041] Step S126: Perform a dimension unification operation on the arranged functional requirement mapping features and performance requirement mapping features, so that the two kinds of features are in the same feature dimension space, forming a debugging feature mapping set.

[0042] The functional requirement mapping features and the performance requirement mapping features have different initial dimensions, which are mapped to a unified dimension space through feature conversion rules. For example, the time class feature (response time) in the functional feature and the rate class feature (transmission rate) in the performance feature are converted into feature components of the same order of magnitude through standardization processing, to ensure that each dimension of the feature vector represents the same type of attribute description. After dimension unification, the functional and performance requirement mapping features are combined into a complete debugging feature mapping set, and each feature vector contains multi-dimensional feature components related to function and performance.

[0043] Step S130: Perform strategy matching processing on the debugging feature mapping set based on a pre-trained debugging strategy, to generate a terminal debugging strategy set, wherein the pre-trained debugging strategy includes functional debugging logic and performance debugging logic.

[0044] The pre-trained debugging strategy is generated by training a large amount of historical debugging data. The functional debugging logic matches the corresponding functional debugging method for software interaction features, and the performance debugging logic matches the corresponding performance optimization strategy for hardware running features. After inputting the debugging feature mapping set, the two kinds of logic process the corresponding features respectively, output the matched debugging strategies, and integrate to form the terminal debugging strategy set.

[0045] Step S131: Input the functional requirement mapping features in the debugging feature mapping set into the functional debugging logic, and call a pre-stored functional debugging strategy library based on the functional debugging logic, wherein the functional debugging strategy library includes debugging operation templates corresponding to multiple functional abnormal scenarios.

[0046] The functional requirement mapping feature is input into the functional debugging logic in the form of a vector. The logic module first parses the exception identification in the feature, such as missing data collection type, instruction response delay, etc. According to the exception identification, the corresponding scene classification in the functional debugging strategy library is called, and all debugging operation templates under this classification are called from the library. Each template contains troubleshooting steps, parameter adjustment suggestions and verification methods for specific functional exceptions.

[0047] Step S1311: The pre-stored functional debugging strategy library is called from the functional debugging logic. Each debugging operation template in the functional debugging strategy library contains a template identification, an applicable functional exception scene description and a specific debugging step sequence.

[0048] The functional debugging strategy library is stored according to the functional exception type, such as data collection exception class, instruction processing exception class, data analysis exception class, etc. The template identification of each debugging operation template contains an exception type code and a scene subdivision number; the applicable functional exception scene description details the abnormal phenomenon, trigger condition and influence range corresponding to the template; and the specific debugging step sequence lists the operation instructions, checkpoints and expected results in order, such as “Step 1: Query the integrity of the collection task configuration file; Step 2: Verify the sensor interface mapping relationship”, etc.

[0049] Step S1312: Perform feature extraction operation on each debugging operation template in the functional debugging strategy library to generate template features. The template features include applicable scene features and step features. The applicable scene features correspond to the applicable functional exception scene description, and the step features correspond to the specific debugging step sequence.

[0050] The applicable functional exception scene description of the debugging operation template is extracted to form the applicable scene feature, such as the “missing collection type” scene feature containing missing type identification, associated sensor type, etc. The operation type, inspection object, parameter range, etc. are extracted from the specific debugging step sequence to form the step feature, such as the “configuration file inspection” in the step corresponding to the file type feature, and the “interface mapping verification” corresponding to the interface type feature. The template features are stored in the form of feature vectors, which are convenient for comparison with the functional requirement mapping features.

[0051] Step S1313: Extract the functional requirement mapping feature from the debugging feature mapping set. The functional requirement mapping feature includes data collection response feature and instruction processing delay feature. The functional requirement mapping feature is compared with the template features of each debugging operation template.

[0052] Extract the abnormal feature components in the function requirement mapping feature, such as the type missing identifier in the data collection response feature and the timeout frequency in the instruction processing delay feature. Compare these features with the applicable scene features of each debugging operation template one by one, analyze the matching degree of the feature components, such as the matching degree of the data collection type missing feature with the applicable scene feature of the "collection type missing" template and the matching degree of the instruction timeout feature with the applicable scene feature of the "instruction response delay" template.

[0053] Step S1314: Perform similarity analysis based on the comparison result, sort all debugging operation templates according to the similarity analysis result, and preliminarily determine the debugging operation template with the highest similarity as the candidate template.

[0054] The similarity analysis obtains a similarity score by calculating the number of matching items and the degree of fit of the feature components of the function requirement mapping feature and the template feature. The debugging operation templates are sorted from high to low according to the similarity score, and the top few templates with the highest score are selected as the preliminary candidate templates. For example, the function requirement mapping feature of the data collection type missing has the highest similarity score with the "collection configuration error" template, and is listed as the candidate template.

[0055] Step S1315: Combine the association relationship between the function debugging requirement elements and the terminal software interaction data in the requirement state association result, verify whether the candidate template is suitable for the current function debugging requirement and the corresponding terminal software interaction data, and if so, determine it as the function debugging candidate strategy.

[0056] Referring to the association description of the function requirement and the software data in the requirement state association result, such as "data collection type missing is related to sensor configuration log error", verify whether the step sequence of the candidate template can cover the checkpoints involved in the association relationship. For example, whether the candidate template includes a sensor configuration file checking step and an interface mapping verification step. If the debugging steps of the candidate template can completely adapt to the current function debugging requirement and the software data situation, it is determined as the function debugging candidate strategy.

[0057] Step S132: Input the performance requirement mapping feature in the debugging feature mapping set into the performance debugging logic, call the pre-stored performance debugging strategy library based on the performance debugging logic, and the performance debugging strategy library includes debugging operation templates corresponding to multiple performance abnormal scene categories.

[0058] After the performance requirement mapping feature is input into the performance debugging logic, the logic module identifies the performance bottleneck identifier in the feature, such as insufficient transmission rate and poor interface stability. According to the identifier, the corresponding scene category in the performance debugging strategy library is called to retrieve the debugging operation template under this category, which includes debugging steps such as hardware parameter adjustment and resource allocation optimization.

[0059] Step S1321: retrieve the pre-stored performance debugging strategy library from the performance debugging logic, each debugging operation template in the performance debugging strategy library contains a template number, an applicable performance abnormal scenario description, and a detailed debugging step list.

[0060] The performance debugging strategy library is classified by performance abnormal types, such as transmission rate abnormal class, running stability abnormal class, and resource occupation too high class. The template number of each template contains an abnormal class code and a solution number; the applicable performance abnormal scenario description describes the performance index abnormal range and hardware parameter characteristics corresponding to the template; and the detailed debugging step list lists the hardware parameter adjustment value range, resource allocation instruction, and stability test method.

[0061] Step S1322: perform feature extraction operation on each debugging operation template in the performance debugging strategy library to generate template performance features, the template performance features contain scene adaptation features and step execution features, the scene adaptation features correspond to the applicable performance abnormal scenario description, and the step execution features correspond to the detailed debugging step list.

[0062] The performance index threshold and hardware parameter abnormal range are extracted from the applicable performance abnormal scenario description to form the scene adaptation features, such as “transmission rate is lower than the standard value by 30%” and “interface error rate is higher than the threshold”. The operation object, parameter adjustment direction, and test type are extracted from the detailed debugging step list to form the step execution features, such as “chip frequency adjustment” and “cache allocation optimization”.

[0063] Step S1323: extract performance demand mapping features from the debugging feature mapping set, the performance demand mapping features contain chip transmission efficiency features and interface connection stability features, and perform feature matching between the performance demand mapping features and the template performance features of each debugging operation template.

[0064] The abnormal index features in the performance demand mapping features are extracted, such as the rate deficiency interval in the chip transmission efficiency features and the high error rate identifier in the interface connection stability features. These features are matched with the scene adaptation features of each template to analyze the corresponding degree of performance abnormal features and template applicable scenarios, for example, the rate deficiency feature and the scene adaptation feature matching condition of the “transmission rate optimization” template.

[0065] Step S1324: analyze the fitting degree of the performance demand mapping features and the template performance features based on the matching result, the fitting degree analysis is calculated based on the corresponding relationship between the performance problems reflected by the features and the template applicable scenarios.

[0066] The matching degree analysis obtains a matching score by counting the number of matched feature items, the degree of performance abnormality, and the overlap of the template application scope. For example, if the rate deficiency degree in the performance requirement mapping feature, the chip parameter feature, and the scene adaptation feature of a certain template are completely matched, and the operation object in the step execution feature is consistent with the current hardware type, the matching score of the template is higher.

[0067] Step S1325: According to the matching degree analysis result, all debugging operation templates are prioritized, and the debugging operation template with the highest matching degree is preliminarily selected as a candidate template.

[0068] The debugging operation templates are sorted in descending order of matching scores, and the template with the highest score is selected as the preliminary candidate template. For example, the performance feature of low chip transmission efficiency and high cache utilization rate has the highest matching degree with the "cache optimization + frequency adjustment" template, and is selected as the candidate template.

[0069] Step S1326: Referring to the association relationship between the performance debugging demand elements and the terminal hardware running parameters in the demand state association result, it is confirmed whether the candidate template meets the current performance debugging demand and the corresponding terminal hardware running parameter situation. If it meets, it is determined as a performance debugging candidate strategy.

[0070] According to the association description of performance demand and hardware parameter in the demand state association result, such as "transmission rate deficiency is related to chip cache bottleneck", it is checked whether the debugging steps of the candidate template are for the hardware parameters in the association relationship. For example, whether the candidate template contains steps such as cache cleaning and cache allocation adjustment, and whether it is adapted to the chip model and interface type of the current terminal. If it meets, it is determined as a performance debugging candidate strategy.

[0071] Step S133: According to the association relationship priority in the demand state association result, the execution order of the function debugging candidate strategy and the performance debugging candidate strategy is determined. The higher the priority, the more priority the debugging candidate strategy corresponding to the association relationship has.

[0072] The association relationships in the demand state association result are sorted by priority. High-priority association relationships usually correspond to association items that directly affect the core functions of the terminal, such as the association relationship between data acquisition function abnormality and instruction response delay, which has a higher priority than the association relationship between data transmission rate fluctuation and interface parameters. Based on this sorting rule, the priority values of the association relationships corresponding to the function debugging candidate strategy and the performance debugging candidate strategy are compared. If the priority value of the association relationship corresponding to the function debugging candidate strategy is higher than that of the performance debugging candidate strategy, the function debugging candidate strategy is placed in the front row of the execution order; otherwise, the performance debugging candidate strategy is placed in the front.

[0073] For example, if the association relationship of "data collection function abnormality and software interaction log error" has a higher priority than "insufficient transmission rate and chip cache bottleneck", the debugging strategy for the data collection function is executed first, and then the performance debugging strategy for the transmission rate is executed. After determining the execution order, the priority identifier and the corresponding execution sequence number of each strategy are recorded to ensure that subsequent debugging operations are performed in sequence.

[0074] Step S134: The function debugging candidate strategies and the performance debugging candidate strategies after determining the execution order are integrated, the corresponding debugging object identifier and the debugging operation step description of each strategy are supplemented, and a terminal debugging strategy set is generated.

[0075] After determining the execution order, the function debugging candidate strategies and the performance debugging candidate strategies are arranged in sequence according to the execution sequence number. The debugging object identifier is supplemented for each strategy. The debugging object identifier of the function debugging candidate strategy corresponds to the software module of the terminal, such as the data collection module, the instruction processing module, etc. The debugging object identifier of the performance debugging candidate strategy corresponds to the hardware component of the terminal, such as the main chip, the communication interface, the cache unit, etc.

[0076] At the same time, the debugging operation step description of each strategy is supplemented in detail, and the operation content, operation object, operation method and expected intermediate result of each step are clearly defined. For example, the "data collection function verification step" in the function debugging candidate strategy needs to be described as "sending a standard collection instruction to the data collection module, monitoring whether the collection data format returned by the module conforms to the preset specification, and recording the data field integrity and precision indicators". The "chip cache optimization step" in the performance debugging candidate strategy needs to be described as "reading the current cache occupancy rate through the terminal debugging interface, executing the cache fragment consolidation instruction, reassigning the cache partition size, reading the cache occupancy rate again and recording the changes".

[0077] The arranged strategies, the corresponding debugging object identifiers and the detailed operation step descriptions are integrated into a structured data set. Each strategy item contains the strategy type, the execution sequence number, the debugging object, the step list and other information, forming a terminal debugging strategy set.

[0078] Step S140: According to the terminal debugging strategy set, a debugging operation is performed on the power grid fusion terminal to generate a debugging execution result, which includes a function debugging result and a performance debugging result.

[0079] Call the terminal debugging interface, and send the debugging operation instructions in the terminal debugging strategy set to the power grid fusion terminal in execution order one by one. During the debugging operation process, the execution state information returned by the terminal is received in real time, and the execution progress of each strategy and the feedback data of the key nodes are recorded. After all the debugging operations are executed, the data acquisition results generated in the function debugging process, the instruction response results, the transmission rate results generated in the performance debugging process, and the running stability results are collected, and these results are sorted into the debugging execution results.

[0080] Step S141: Extract the debugging object identifier and the debugging operation step description corresponding to the function debugging candidate strategy from the terminal debugging strategy set, and determine the target component and the specific execution step of the function debugging.

[0081] The terminal debugging strategy set is traversed, and the strategy items of the type of function debugging are screened out, and the debugging object identifier and the debugging operation step description therein are extracted. According to the debugging object identifier, the specific software components of the power grid fusion terminal such as the data acquisition driving module and the instruction analysis module are located, and these components are determined as the target components of the function debugging. The debugging operation step description is sequentially decomposed into executable specific steps, the terminal interface to be called, the instruction parameters to be sent and the feedback indicators to be monitored for each step are determined, and a specific execution step list of the function debugging is formed.

[0082] Step S142: According to the specific execution step of the function debugging candidate strategy, the function debugging operation is performed on the target component of the power grid fusion terminal, and the real-time response of the target component is recorded during the function debugging operation, including whether the data acquisition is normal and whether the instruction response is timely.

[0083] In this embodiment, the function debugging candidate strategy is aimed at the abnormal response problem of the power distribution data acquisition module, and the specific execution step includes four links of parameter initialization, function triggering, feedback monitoring and result recording. When the function debugging operation is performed, initialization instructions are first sent to the power distribution data acquisition module through the debugging interface, the module parameters are reset and calibrated, and it is ensured that the module is in a standard working state.

[0084] Step S1421: Analyze the specific execution step of the function debugging candidate strategy, determine the operation content and operation order of each step, and the operation content includes triggering component function and reading component feedback.

[0085] The step text of the function debugging candidate strategy is structurally parsed, and the operation contents such as "trigger power distribution data acquisition function", "read real-time voltage acquisition value", "send remote control instruction", and "receive instruction execution reply" are extracted, and the operation sequence is determined according to the logic of "parameter initialization -> function triggering -> feedback reading -> instruction verification". Each operation content is marked with the corresponding execution condition, for example, "trigger power distribution data acquisition function" needs to be executed after module initialization is completed, and "receive instruction execution reply" needs to wait for a preset time window after the instruction is sent.

[0086] Step S1422: According to the operation sequence, trigger the preset function of the target component of the power grid fusion terminal, and after triggering the preset function, monitor the feedback signal of the target component in real time, record the generation time and feedback content of the feedback signal, and the feedback content includes data acquisition output information and instruction response confirmation information.

[0087] According to the parsed operation sequence, send a function triggering instruction to the power distribution data acquisition module through the debugging tool, start the periodic acquisition function of three-phase voltage and current data. After triggering the function, enable the signal monitoring tool to capture the output signal of the module in real time, record the generation timestamp of each data acquisition result, and the voltage value, current value, acquisition status code and other data acquisition output information contained in the output information. When sending a remote control instruction (such as adjusting the acquisition frequency), continuously monitor the instruction execution reply returned by the module, and record the instruction ID, execution status, completion time and other instruction response confirmation information in the reply.

[0088] Step S1423: Determine whether the data acquisition output information in the feedback signal meets the data acquisition function requirements in the function debugging requirement elements. If it meets the requirements, record that the data acquisition is normal, if it does not meet the requirements, record that the data acquisition is abnormal and the abnormal performance.

[0089] Compare the data acquisition output information with the requirements such as "voltage acquisition error ≤ allowed range" and "data update frequency ≥ preset frequency" in the function debugging requirement elements. If the voltage value error of continuous multiple acquisitions is within the allowed range, and the data update interval meets the preset frequency, record that the data acquisition is normal. If the acquisition value continuously exceeds the error range, the data update is interrupted or delayed beyond the threshold, etc., record that the data acquisition is abnormal, and describe the abnormal performance in detail, such as "A-phase voltage acquisition value continuously exceeds the error range for 5 times" and "data update interval is longer than the preset value".

[0090] Step S1424: Determine whether the instruction response confirmation information in the feedback signal meets the instruction response function requirements in the function debugging requirement elements. If it meets the requirements, record that the instruction response is timely, if it does not meet the requirements, record that the instruction response is delayed and the delay performance.

[0091] Check the difference between the receipt time in the instruction response confirmation information and the instruction sending time, and compare it with the requirement of "instruction response delay ≤ maximum delay threshold" in the functional debugging demand elements. If the difference is within the threshold range and the execution status in the receipt is "success", record the timely instruction response. If the difference exceeds the threshold or the receipt shows "instruction timeout", "execution failure" or other status, record the instruction response delay and describe the delay performance, such as "remote adjustment instruction receipt delay exceeds threshold" and "instruction execution status code shows parameter configuration conflict".

[0092] Step S1425: Integrate the judgment results of data collection and instruction response to form a real-time response situation record of the target component in the functional debugging operation, so that the record content corresponds to the functional debugging demand elements one by one.

[0093] The judgment results of data collection normal / abnormal are associated with the functional debugging demand elements such as "voltage collection accuracy" and "data continuity", and the judgment results of instruction response timely / delayed are associated with the demand elements such as "instruction execution efficiency" and "control reliability" to form a structured real-time response situation record. The record contains debugging items, judgment results, abnormal details and time stamps corresponding to each demand element, ensuring that subsequent analysis can be traced back to specific debugging links.

[0094] Step S143: Extract the debugging object identifier and debugging operation step description corresponding to the performance debugging candidate strategy from the terminal debugging strategy set to determine the target hardware and specific execution steps of performance debugging.

[0095] Similarly, traverse the terminal debugging strategy set, filter out strategy items of type performance debugging, extract their debugging object identifier and debugging operation step description. Determine the corresponding hardware components such as terminal main chip, Ethernet interface, wireless communication module according to the debugging object identifier, and determine these hardware as the target hardware of performance debugging. Decompose the debugging operation step description into specific execution steps, clearly define the hardware operation mode, parameter configuration requirements and monitoring points of each step, and form a list of specific execution steps of performance debugging.

[0096] Step S144: Perform performance debugging operation on the target hardware of the power grid fusion terminal according to the specific execution steps of the performance debugging candidate strategy, and record the real-time running situation of the hardware during the performance debugging operation, including whether the data transmission rate meets the standard and whether the running is stable.

[0097] According to the specific execution step list of performance debugging, connect the debugging interface of the target hardware through the hardware debugging tool. Perform hardware parameter configuration operations, such as adjusting the operating frequency of the main chip, setting the upper limit of the transmission bandwidth of the Ethernet interface, and configuring the signal gain parameters of the wireless communication module. After each parameter adjustment, perform data transmission testing, send fixed-size test data packets to the terminal, record the transmission time, packet loss number and retransmission number of the data packets, calculate the actual transmission rate and compare it with the rate requirement in the performance debugging demand.

[0098] At the same time, the running state parameters of the target hardware, such as chip temperature, interface voltage, current fluctuation, etc. are continuously monitored, and the change range and duration of the parameters are recorded. If the actual transmission rate reaches or exceeds the required value within the preset test duration, and the hardware state parameters are stable within the normal range without over-temperature, voltage anomaly, etc., it is determined that the data transmission rate meets the standard and is stable; if the transmission rate is continuously lower than the required value, or the hardware state parameters frequently fluctuate or exceed the normal range, record the specific performance of the transmission rate that does not meet the standard and the unstable operation.

[0099] Step S145: Collect real-time response conditions in functional debugging operations, and organize functional debugging results, which include data collection results and instruction response results.

[0100] The real-time response conditions recorded in the functional debugging process are classified and summarized according to the debugging steps. For the data collection link, the integrity, accuracy, timeliness, etc. of the collected data are organized to form data collection results, including normal collection times, abnormal collection times and abnormal type statistics. For the instruction response link, the instruction response time, response success rate, error code distribution, etc. are summarized to form instruction response results, including timely response times, delayed response times and delay duration distribution. The data collection results and instruction response results are integrated into functional debugging results, labeled with corresponding functional debugging candidate strategy identifiers and execution times.

[0101] Step S146: Collect real-time running conditions in performance debugging operations, and organize performance debugging results, which include transmission rate results and running stability results.

[0102] The real-time running recorded in the performance debugging process is summarized. For the data transmission rate link, the actual transmission rate value, rate fluctuation amplitude, and deviation amount from the required value of different test stages are sorted to form the transmission rate result, including the average rate, peak rate, minimum rate, and compliance rate statistics. For the running stability link, the change trend of the hardware state parameter, the number of abnormal event occurrences, and the duration are summarized to form the running stability result, including the parameter normal operation time length proportion, abnormal event type, and triggering condition. The transmission rate result and the running stability result are integrated into the performance debugging result, which is marked with the corresponding performance debugging candidate strategy identifier and execution time.

[0103] Step S147: The function debugging result and the performance debugging result are associated according to the execution order in the terminal debugging strategy set to form a debugging execution result containing a debugging strategy identifier and a corresponding result.

[0104] According to the execution sequence number in the terminal debugging strategy set, the function debugging result and the performance debugging result are arranged in order, and the mapping relationship between each debugging strategy identifier and the corresponding result is established. For example, the data acquisition result and the instruction response result corresponding to the function debugging strategy with the execution sequence number 1, and the transmission rate result and the running stability result corresponding to the performance debugging strategy with the execution sequence number 2. In the association process, the execution time length, resource occupation, and other auxiliary information of each strategy are supplemented to form a complete debugging execution result. The complete debugging execution result is stored in a structured data form, containing fields such as strategy identifier, execution order, result type, and specific index data.

[0105] Step S150: Based on the debugging execution result, a debugging strategy parameter adjustment operation is performed to generate an optimized terminal debugging strategy, which is used as the basis for subsequent power grid integrated terminal debugging.

[0106] The gap between the function debugging result and the function debugging requirement in the debugging execution result, and the gap between the performance debugging result and the performance debugging requirement are analyzed, and the strategy parameters that need to be adjusted are determined according to the gap type and degree. The associated weights, matching thresholds, and other parameters in the function debugging logic and the performance debugging logic are optimized through a parameter adjustment algorithm, and the debugging strategy is regenerated. After verification, the optimized terminal debugging strategy is stored in the strategy library for subsequent debugging operation of the same type of terminal.

[0107] Step S151: The function debugging result and the performance debugging result are extracted from the debugging execution result, and the matching of the function debugging result and the function debugging requirement is analyzed, and the matching of the performance debugging result and the performance debugging requirement is analyzed.

[0108] The functional debugging result and the performance debugging result are separated from the debugging execution result. For the functional debugging result, the integrity and the accuracy indexes in the data collection result are compared with the data collection function requirements in the functional debugging demand elements, and the compliance degree of the actual indexes and the demand indexes is calculated. The response time and the success rate in the instruction response result are compared with the instruction response function requirements, and whether the response performance meets the demand is analyzed.

[0109] For the performance debugging result, the average rate and the rate reaching the standard in the transmission rate result are compared with the data transmission rate requirements in the performance debugging demand elements, and the satisfaction of the rate performance is evaluated. The parameter normal operation proportion and the abnormal event number in the running stability result are compared with the running stability requirements, and whether the hardware running state meets the demand is judged. In the analysis process, the matching degree levels of each index, such as complete matching, partial matching and non-matching, are recorded, and the specific difference performances of the non-matching items are marked.

[0110] Step S152: input the matching situation of the functional debugging result and the functional debugging demand into the functional debugging logic as the basis for adjusting the functional debugging logic parameter, and adjust the associated weights of the feature and strategy matching in the functional debugging logic.

[0111] The functional debugging result shows that the power distribution data collection module has high matching degree on the "voltage collection precision" demand, but there is matching deviation on the "instruction response efficiency" demand. The matching situation is converted into a parameter adjustment signal, which is input into the weight adjustment module of the functional debugging logic, and the associated weights of the data collection feature and strategy matching and the associated weights of the instruction response feature and strategy matching are adjusted differently.

[0112] For example, step S1521: analyze the matching degree of the data collection result in the functional debugging result and the data collection function requirements in the functional debugging demand elements, determine the matching deviation of the data collection dimension, and the matching deviation reflects the difference direction and the difference degree of the actual result and the demand requirements.

[0113] The error value, the update frequency and other indexes in the data collection result are compared with the standard value of the data collection function requirements, and the deviation amount of each index is calculated. For example, if the actual voltage collection error mean value is a multiple of the allowable error, and the data update frequency is a proportion of the preset frequency, it is determined that the matching deviation of the data collection dimension is "error positive deviation" and "frequency negative deviation", and the difference degree is marked by the deviation level division rule (such as slight, moderate and severe).

[0114] Step S1522: analyze the matching degree of the instruction response result in the functional debugging result and the instruction response function requirements in the functional debugging demand elements, determine the matching deviation of the instruction response dimension, and the matching deviation reflects the difference direction and the difference degree of the actual result and the demand requirements.

[0115] Based on the delay time, execution success rate and other data in the instruction response result, the threshold value required by the instruction response function is compared. If the proportion of the average delay time exceeding the threshold value and the proportion of the execution success rate being lower than the required value are determined, the matching deviation of the instruction response dimension is "delay positive deviation" and "success rate negative deviation", and the difference degree is marked according to the deviation amount, such as "delay deviation moderate" and "success rate deviation slight".

[0116] Step S1523: The matching deviation of the data acquisition dimension and the matching deviation of the instruction response dimension are converted into adjustment signals recognizable by the function debugging logic, and the adjustment signals include deviation type and deviation level description.

[0117] According to the preset signal coding rule, "data acquisition error positive deviation (moderate)" is converted into "deviation type: acquisition accuracy; deviation level: 2", and "instruction response delay positive deviation (serious)" is converted into "deviation type: response timeliness; deviation level: 3". The adjustment signal adopts a structured format, including dimension identification, deviation type code, deviation level value and impact range description, so as to ensure that the function debugging logic can accurately analyze the deviation characteristics.

[0118] Step S1524: The adjustment signal is input into the parameter adjustment module of the function debugging logic, and the parameter adjustment module is positioned to the associated weight parameter in the matching process of the function requirement mapping feature and the function debugging strategy.

[0119] After the adjustment signal is transmitted into the parameter adjustment module of the function debugging logic through the interface, the module is positioned to the corresponding associated weight parameter group through the feature dimension index. For example, for the "acquisition accuracy" deviation type, the weight parameter matched by the data acquisition feature (such as error fluctuation feature, frequency stability feature) and the function debugging strategy is positioned; for the "response timeliness" deviation type, the weight parameter corresponding to the instruction response feature (such as delay distribution feature, success rate feature) is positioned.

[0120] Step S1525: According to the deviation type and deviation level description in the adjustment signal, the value of the corresponding associated weight parameter is adjusted, and after the adjustment is completed, the output of the function debugging logic is verified. The matching result of the function requirement mapping feature in the debugging feature mapping set by the function debugging logic after the adjustment parameter is compared with the result before the adjustment, and the effectiveness of the associated weight adjustment is confirmed.

[0121] According to the corresponding rules of the deviation level and the weight adjustment range, the associated weight parameters are adjusted. For example, for the case of "response timeliness" deviation level 3, the weight parameter corresponding to the instruction response feature is increased by a certain proportion; for the case of "collection accuracy" deviation level 2, the data collection feature weight parameter is kept unchanged. After the adjustment is completed, the same function requirement mapping features are input into the function debugging logic before and after the adjustment, and the output strategy matching results are compared. If the strategy matching degree related to the instruction response is improved after the adjustment, and the collection accuracy related strategy matching degree is stable, it is preliminarily confirmed that the adjustment is effective.

[0122] Step S1526: If the comparison result shows that the matching deviation is reduced, the adjusted associated weight parameter is retained; if the matching deviation is not reduced, the associated weight parameter is fine-tuned again according to the adjustment signal until the matching deviation meets the expected improvement direction.

[0123] By comparing the matching deviation values before and after the adjustment, if the instruction response delay deviation is reduced from severe to moderate and the collection accuracy deviation is maintained to be slight, the current adjusted associated weight parameter is retained. If the deviation is not reduced or new deviation appears after the adjustment, the weight parameter is fine-tuned by 10% of the deviation level, and the verification process is repeated. For example, if the response timeliness weight is too high after the first adjustment, resulting in the decrease of the collection accuracy strategy matching degree, the adjustment range is reduced, and the verification is performed again until all dimensions of the matching deviation show an improvement trend.

[0124] Step S153: The matching situation of the performance debugging result and the performance debugging demand is input into the performance debugging logic as the basis for adjusting the associated weight of the feature and the strategy matching in the performance debugging logic.

[0125] Similarly, the matching situation of the performance debugging result is converted into an adjustment signal input into the performance debugging logic. The signal contains the mismatch information of the transmission rate, running stability and other indicators. The performance debugging logic locates the corresponding associated weight parameters according to the signal, such as the weight corresponding to the transmission rate feature and the weight corresponding to the hardware stability feature. The weight value is adjusted according to the degree of mismatch. For the case that the transmission rate does not meet the standard, the weight of the transmission rate feature in the strategy matching is increased; for the running stability problem, the weight proportion of the hardware state feature is increased.

[0126] Step S154: Based on the adjusted parameters of the function debugging logic, the function requirement mapping features in the debugging feature mapping set are executed again to generate an optimized function debugging strategy.

[0127] The function debugging logic after the adjustment parameters is called to re-input the function requirement mapping features in the debugging feature mapping set into the function debugging strategy library for matching. The function debugging logic uses the updated correlation weight to calculate the matching degree of the features and the strategy template, and filters out the strategy template with the highest matching degree. The filtered strategy template is verified for applicability to ensure that it can improve the mismatched items in the previous function debugging result, and finally an optimized function debugging strategy is generated.

[0128] Step S155: Based on the performance debugging logic after the adjustment parameters, the performance requirement mapping features in the debugging feature mapping set are re-executed for strategy matching operation to generate an optimized performance debugging strategy.

[0129] The performance requirement mapping features are matched with the templates in the performance debugging strategy library using the performance debugging logic after the adjustment parameters. The performance debugging logic calculates the matching degree based on the new correlation weight and selects the template with the highest matching degree as the candidate. The improvement ability of the candidate template on the mismatched items in the performance debugging result is verified, such as whether it can effectively improve the transmission rate and enhance the running stability, to determine the optimized performance debugging strategy.

[0130] Step S156: According to the priority of the association relationship in the requirement state association result, the execution order of the optimized function debugging strategy and the optimized performance debugging strategy is determined.

[0131] According to the priority of the association relationship in the requirement state association result, the execution order of the optimized function debugging strategy and the optimized performance debugging strategy is determined.

[0132] Step S157: The optimized function debugging strategy, the optimized performance debugging strategy and the corresponding execution order are integrated to generate an optimized terminal debugging strategy, and the terminal debugging strategy is stored for subsequent debugging operation of the power grid integrated terminal.

[0133] The optimized function debugging strategy and the performance debugging strategy are arranged according to the determined execution order, and the debugging objects, operation steps, expected results and other information of the strategies are supplemented to integrate into a complete optimized terminal debugging strategy. The strategy is saved to the terminal debugging strategy library through an encrypted storage method, and an index association is established, so that when the same type of power grid integrated terminal debugging requirement is encountered subsequently, the optimized terminal debugging strategy can be quickly retrieved and called.

[0134] Figure 2An exemplary hardware and software components of the intelligent commissioning system 100 for grid convergence terminal that can implement the idea of the present application are shown. For example, the processor 120 can be used in the intelligent commissioning system 100 for grid convergence terminal and used to execute the functions in the present application.

[0135] The intelligent commissioning system 100 for grid convergence terminal can be a general server or a special-purpose server, both of which can be used to implement the intelligent commissioning method for grid convergence terminal of the present application. Although only one server is shown in the present application, for the sake of convenience, the functions described in the present application can be implemented in a distributed manner on multiple similar platforms to balance the processing load.

[0136] For example, the intelligent commissioning system 100 for grid convergence terminal can include a network port 110 connected to a network, one or more processors 120 for executing program instructions, a communication bus 130, and different forms of storage media 140, such as a disk, a ROM, or a RAM, or any combination thereof. Exemplarily, the intelligent commissioning system 100 for grid convergence terminal can also include program instructions stored in a ROM, a RAM, or other types of non-transitory storage media, or any combination thereof. The method of the present application can be implemented according to these program instructions. The intelligent commissioning system 100 for grid convergence terminal also includes an I / O interface 150 between the computer and other input / output devices.

[0137] For the sake of illustration, only one processor is described in the intelligent commissioning system 100 for grid convergence terminal. However, it should be noted that the intelligent commissioning system 100 for grid convergence terminal in the present application can also include multiple processors, so the steps performed by one processor described in the present application can also be jointly executed or individually executed by multiple processors. For example, if the processor of the intelligent commissioning system 100 for grid convergence terminal executes steps A and B, it should be understood that steps A and B can also be executed by two different processors together or individually in one processor. For example, a first processor executes step A, a second processor executes step B, or the first processor and the second processor jointly execute steps A and B.

[0138] In addition, the present application also provides a readable storage medium, wherein computer executable instructions are pre-set in the readable storage medium, and when the processor executes the computer executable instructions, the intelligent commissioning method for grid convergence terminal is implemented.

[0139] It should be noted that, in order to simplify the description of the present application and to help understand one or more embodiments of the present application, in the foregoing description of the embodiments of the present application, various features are sometimes combined into one embodiment, drawing or description thereof.

Claims

1. An intelligent commissioning method applied to a power grid convergence terminal, characterized in that, The method includes: Establish the correlation between the debugging requirements of the power grid integration terminal and the terminal's current operating status information, and generate the requirement status correlation result. The debugging requirements include functional debugging requirements and performance debugging requirements, and the terminal's current operating status information includes terminal hardware operating parameters and terminal software interaction data. Based on the requirement status association results, feature mapping processing is performed on debugging requirements and terminal current running status information to obtain a debugging feature mapping set, which includes functional requirement mapping features and performance requirement mapping features. Based on the pre-trained debugging strategy, a strategy matching process is performed on the debugging feature mapping set to generate a terminal debugging strategy set. The pre-trained debugging strategy includes functional debugging logic and performance debugging logic. Debugging operations are performed on the power grid convergence terminal according to the terminal debugging strategy set, and debugging execution results are generated, including functional debugging results and performance debugging results. Based on the debugging execution results, the debugging strategy parameters are adjusted to generate an optimized terminal debugging strategy, which will then serve as the basis for subsequent grid integration terminal debugging. The process of establishing the correlation between the commissioning requirements of the power grid integration terminal and the current operating status information of the terminal, and generating the requirement status correlation result, includes: Extract the functional debugging requirement elements and performance debugging requirement elements from the debugging requirements. The functional debugging requirement elements include terminal data acquisition function requirements and terminal command response function requirements. The performance debugging requirement elements include terminal data transmission rate requirements and terminal operation stability requirements. The terminal hardware operating parameters and terminal software interaction data are separated from the terminal's current operating status information. The terminal hardware operating parameters include chip operating status and interface connection status, and the terminal software interaction data includes data transmission logs and instruction processing records. Input the functional debugging requirement elements and the terminal software interaction data into the correlation analysis module to establish the first correlation relationship between the functional debugging requirement elements and the terminal software interaction data. The first correlation relationship is used to reflect the degree of matching between the functional debugging requirements and the software interaction data. Input the performance debugging requirements and terminal hardware operating parameters into the correlation analysis module to establish a second correlation between the performance debugging requirements and terminal hardware operating parameters. The second correlation is used to reflect the degree of matching between the performance debugging requirements and the hardware operating parameters. Integrate the first and second association relationships to form an association matrix, where each element in the association matrix corresponds to a description of the degree of association between a set of debugging requirement elements and running status information. Based on the association matrix, the required and state combinations that meet the debugging priority requirements are selected, and the selected required and state combinations and their corresponding associations are organized into the required and state association results.

2. The intelligent commissioning method for a power grid convergence terminal according to claim 1, characterized in that, The feature mapping process, based on the correlation results of the demand status, is performed on the debugging requirements and the current operating status information of the terminal to obtain a debugging feature mapping set, including: Extract terminal software interaction data fragments corresponding to functional debugging requirement elements from the requirement status association results. The terminal software interaction data fragments include interaction logs related to data acquisition function requirements and processing records related to instruction response function requirements. A feature extraction operation is performed on the terminal software interaction data fragments to generate software interaction features. The software interaction features include data acquisition response features and instruction processing delay features. The software interaction features are mapped with functional debugging requirement elements to obtain functional requirement mapping features. Simultaneously, terminal hardware operation parameter fragments corresponding to performance debugging requirement elements are extracted from the requirement status association results. The terminal hardware operation parameter fragments include chip parameters related to data transmission rate requirements and interface parameters related to operation stability requirements. A feature extraction operation is performed on the terminal hardware operating parameter fragments to generate hardware operating features. The hardware operating features include chip transmission efficiency features and interface connection stability features. The hardware operating features are mapped with performance debugging requirements to obtain performance requirement mapping features. The functional requirement mapping features and performance requirement mapping features are arranged in the order of the association relationship in the requirement status association results, so that each functional requirement mapping feature corresponds to a unique functional debugging requirement element and related terminal software interaction data, and each performance requirement mapping feature corresponds to a unique performance debugging requirement element and related terminal hardware operating parameters. Perform a dimension unification operation on the arranged functional requirement mapping features and performance requirement mapping features to make the two features lie in the same feature dimension space, forming a debugging feature mapping set.

3. The intelligent commissioning method for power grid convergence terminals according to claim 1, characterized in that, The pre-trained debugging strategy performs strategy matching processing on the debugging feature mapping set to generate a terminal debugging strategy set, including: The functional requirement mapping features in the debugging feature mapping set are input into the functional debugging logic. Based on the functional debugging logic, the pre-stored functional debugging strategy library is called. The functional debugging strategy library contains debugging operation templates corresponding to various functional anomaly scenarios. Based on the functional debugging logic, the matching degree between the functional requirement mapping features and each debugging operation template in the functional debugging strategy library is calculated, and the debugging operation template with the highest matching degree is selected as the functional debugging candidate strategy. The performance requirement mapping features in the debugging feature mapping set are input into the performance debugging logic. Based on the performance debugging logic, the pre-stored performance debugging strategy library is called. The performance debugging strategy library contains debugging operation templates corresponding to various performance anomaly scenarios. Based on the performance debugging logic, the matching degree between the performance requirement mapping features and each debugging operation template in the performance debugging strategy library is calculated, and the debugging operation template with the highest matching degree is selected as the performance debugging candidate strategy. Based on the priority of the association relationships in the requirement status association results, determine the execution order of the functional debugging candidate strategy and the performance debugging candidate strategy. The higher the priority of the association relationship, the higher the priority of the corresponding debugging candidate strategy. The functional debugging candidate strategies and performance debugging candidate strategies after the execution order is determined are integrated, and the debugging object identifier and debugging operation step description corresponding to each strategy are added to generate a set of terminal debugging strategies.

4. The intelligent commissioning method for a power grid convergence terminal according to claim 3, characterized in that, The step of inputting functional requirement mapping features from the debugging feature mapping set into the functional debugging logic, and calling the pre-stored functional debugging strategy library based on the functional debugging logic, includes: Retrieve the pre-stored function debugging strategy library from the function debugging logic. Each debugging operation template in the function debugging strategy library contains a template identifier, a description of the applicable function exception scenarios, and a specific debugging step sequence. Perform feature extraction on each debugging operation template in the functional debugging strategy library to generate template features. The template features include applicable scenario features and step features. The applicable scenario features correspond to the description of the applicable functional abnormality scenario, and the step features correspond to the specific debugging step sequence. Functional requirement mapping features are extracted from the debug feature mapping set. The functional requirement mapping features include data acquisition response features and instruction processing delay features. The functional requirement mapping features are then compared with the template features of each debug operation template. Based on the comparison results, a similarity analysis is performed. All debugging operation templates are sorted according to the similarity analysis results, and the debugging operation template with the highest similarity is initially determined as the candidate template. By combining the correlation between the functional debugging requirement elements and the terminal software interaction data in the requirement status association results, we can verify whether the candidate template is suitable for the current functional debugging requirements and the corresponding terminal software interaction data. If it is suitable, it is determined as a candidate strategy for functional debugging.

5. The intelligent commissioning method for a power grid convergence terminal according to claim 3, characterized in that, The step of inputting performance requirement mapping features from the debugging feature mapping set into the performance debugging logic, and calling the pre-stored performance debugging strategy library based on the performance debugging logic, includes: The pre-stored performance debugging strategy library is retrieved from the performance debugging logic. Each debugging operation template in the performance debugging strategy library includes a template number, a description of the applicable performance anomaly scenarios, and a detailed list of debugging steps. Perform feature extraction on each debugging operation template in the performance debugging strategy library to generate template performance features. The template performance features include scenario adaptation features and step execution features. The scenario adaptation features correspond to the description of applicable performance anomaly scenarios, and the step execution features correspond to a detailed list of debugging steps. Extract performance requirement mapping features from the debug feature mapping set. The performance requirement mapping features include chip transmission efficiency features and interface connection stability features. Perform feature matching between the performance requirement mapping features and the template performance features of each debug operation template. The matching results are used to analyze the degree of fit between the performance requirement mapping features and the performance features of each template. The degree of fit analysis is calculated based on the correspondence between the performance problems reflected by the features and the applicable scenarios of the templates. Based on the results of the fit analysis, all debugging operation templates are prioritized and the debugging operation template with the highest fit is initially selected as the candidate template. Refer to the correlation between performance debugging requirement elements and terminal hardware operating parameters in the reference requirement status association results to confirm whether the candidate templates meet the current performance debugging requirements and the corresponding terminal hardware operating parameters. If they do, they are determined as performance debugging candidate strategies.

6. The intelligent commissioning method applied to a power grid convergence terminal according to claim 1, characterized in that, The step of performing debugging operations on the power grid convergence terminal according to the terminal debugging strategy set and generating debugging execution results includes: Extract the debugging object identifier and debugging operation step description corresponding to the functional debugging candidate strategy from the terminal debugging strategy set, and determine the target component and specific execution steps of functional debugging; According to the specific execution steps of the functional debugging candidate strategy, perform functional debugging operations on the target components of the power grid integration terminal, and record the real-time response of the target components during the functional debugging operation, including whether the data acquisition is normal and whether the command response is timely. In addition, the debugging object identifier and debugging operation step description corresponding to the performance debugging candidate strategy are extracted from the terminal debugging strategy set to determine the target hardware and specific execution steps of performance debugging. According to the specific execution steps of the performance debugging candidate strategy, the performance debugging operation is performed on the target hardware of the power grid convergence terminal. During the performance debugging operation, the real-time operation status of the hardware is recorded, including whether the data transmission rate meets the standard and whether the operation is stable. Collect real-time response data during function debugging operations and compile it into function debugging results, which include data acquisition results and command response results. Collect real-time operational data during performance debugging operations and compile it into performance debugging results, which include transmission rate results and operational stability results. The functional debugging results and performance debugging results are associated according to the execution order in the terminal debugging policy set to form a debugging execution result containing the debugging policy identifier and the corresponding result.

7. The intelligent commissioning method for a power grid convergence terminal according to claim 6, characterized in that, The specific execution steps of the functional debugging candidate strategy, which involve performing functional debugging operations on the target components of the power grid convergence terminal, include: The specific execution steps of the debugging candidate strategies are analyzed, and the operation content and order of each step are determined. The operation content includes triggering component functions and reading component feedback. According to the operation sequence, the preset function of the target component of the power grid integration terminal is triggered. After the preset function is triggered, the feedback signal of the target component is monitored in real time, and the generation time and content of the feedback signal are recorded. The feedback content includes the output information of data acquisition and the confirmation information of command response. Determine whether the data acquisition output information in the feedback signal meets the data acquisition function requirements in the functional debugging requirements. If it does, record that the data acquisition is normal; if it does not, record the data acquisition abnormality and abnormal behavior. Determine whether the instruction response confirmation information in the feedback signal meets the instruction response function requirements in the functional debugging requirements. If it does, record that the instruction response is timely; if it does not, record the instruction response delay and the delay performance. The judgment results of data collection and the judgment results of command response are integrated to form a record of the real-time response of the target component in the functional debugging operation, so that the recorded content corresponds one-to-one with the functional debugging requirements.

8. The intelligent commissioning method for a power grid convergence terminal according to claim 1, characterized in that, The step of adjusting debugging strategy parameters based on debugging execution results to generate an optimized terminal debugging strategy, and using the optimized terminal debugging strategy as the basis for subsequent grid integration terminal debugging, includes: Extract functional debugging results and performance debugging results from the debugging execution results, analyze the matching between functional debugging results and functional debugging requirements, and analyze the matching between performance debugging results and performance debugging requirements. Input the matching results of the functional debugging with the functional debugging requirements into the functional debugging logic as the basis for adjusting the parameters of the functional debugging logic, and adjust the correlation weight of feature and strategy matching in the functional debugging logic. Input the matching results of performance debugging with the performance debugging requirements into the performance debugging logic as the basis for adjusting the parameters of the performance debugging logic, and adjust the correlation weight of feature and strategy matching in the performance debugging logic. Based on the adjusted function debugging logic, the strategy matching operation is re-executed on the function requirement mapping features in the debugging feature mapping set to generate an optimized function debugging strategy. Based on the performance debugging logic after parameter adjustment, the strategy matching operation is re-executed on the performance requirement mapping features in the debugging feature mapping set to generate an optimized performance debugging strategy. Based on the priority of the association relationships in the requirement status association results, determine the execution order of the optimized functional debugging strategy and the optimized performance debugging strategy; The optimized functional debugging strategy, the optimized performance debugging strategy, and the corresponding execution order are integrated to generate an optimized terminal debugging strategy. This terminal debugging strategy is stored for subsequent debugging operations of the grid convergence terminal.

9. An intelligent commissioning system for power grid convergence terminals, characterized in that, The intelligent debugging system for the power grid convergence terminal includes a processor and a memory, the memory and the processor being connected. The memory is used to store programs, instructions or code, and the processor is used to execute the programs, instructions or code in the memory to implement the intelligent debugging method for the power grid convergence terminal as described in any one of claims 1-8.

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