High-density photoelectric co-connection adapter plate based on low-loss silicon nitride grating coupler

Abstract

The invention provides a high-density photoelectric common connection pinboard based on a low-loss silicon nitride grating coupler. The invention aims to overcome the difficulty that the existing photoelectric heterogeneous chip is difficult to integrate, stack and package, and realizes high-density interconnection between the chip and the interposer by using a grating coupling structure and a silicon through hole technology, thereby realizing high-integration low-loss packaging of the heterogeneous chip on the interposer. According to the invention, high-efficiency optical interconnection between the heterogeneous chip and the photoelectric co-connection intermediate layer is realized through the high-efficiency grating coupler, and high-density electrical interconnection between the chip and the photoelectric co-connection intermediate layer is realized through the TSV technology and the RDL technology. Meanwhile, the optical interconnection efficiency between the interposer and the chip is improved by utilizing the electrode patterning advantage of the RDL technology, and the self-alignment between the chip and the interposer is realized. The method has extremely high compatibility to the packaging scene of the existing photoelectric heterogeneous chip, so that the method has great significance in improving the integration density and reducing the interconnection loss of a photoelectric heterogeneous integrated system and promoting the practicability of the photoelectric heterogeneous integrated system.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of optoelectronic heterogeneous integration, and in particular to a high-density optoelectronic co-connection adapter based on a low-loss silicon nitride grating coupler. The adapter realizes high-density optical-electric hybrid interconnection between heterogeneous chips and an interposer through the collaborative design of a grating coupling structure and through-silicon via (TSV) and redistribution layer (RDL) technology. BACKGROUND

[0002] With the increase in chip I / O density according to Moore's Law, there is a significant size mismatch between the I / O pitch of the chip and the substrate (such as a PCB). For example, the I / O pitch of the chip is 10-50 μm, while the pitch of the traditional BGA package is 100-150 μm, and direct interconnection cannot be achieved. At the same time, high-speed signals (such as 100 / 200 Gbps or above) face the problems of increased power consumption, crosstalk, and heat dissipation in long-distance electrical interconnection, and traditional optoelectronic conversion interfaces cannot meet the future T-level bandwidth requirements

[0003] The adapter technology is a commonly used packaging technology, which is often used for integrated packaging of chips and other electronic components. This technology uses plasma etching and other techniques to manufacture a substrate with through holes on the substrate to provide interconnection for the chip, and uses RDL technology to provide interconnection for the chip on the front and back surfaces of the interposer. The realization of optical interconnection between chips through optoelectronic heterogeneous integration can effectively solve the problems of bandwidth, power consumption, and delay of metal interconnection of microelectronic chips, and is an important extension of existing microelectronic chips. At the same time, the integration of multiple materials through optoelectronic heterogeneous integration can also produce a new generation of information devices (such as optical quantum integrated chips), which is an important field for the information industry to achieve extended Moore and beyond Moore technology.

[0004] In 2023, researchers proposed that an optoelectronic co-connection adapter can be designed based on the low loss and insulating properties of glass materials. In 2024, researchers proposed an optical adapter based on a silicon nitride material platform with low loss, wide bandwidth, and high misalignment tolerance, which is used for large-scale integration of many chips using thermal compression flip chip bonding. Existing optoelectronic co-connection adapter solutions or pure optical adapter solutions are difficult to simultaneously achieve high-density low-loss co-connection of optical and electrical signals, difficult to meet the requirements of channel density and transmission loss in actual application scenarios, and difficult to be applied in optoelectronic heterogeneous integration system scenarios. SUMMARY

[0005] The present application proposes a high-density optoelectronic co-connection adapter based on a low-loss silicon nitride grating coupler. The purpose is to overcome the difficulty of integrating and stacking existing optoelectronic heterogeneous chips, and to realize high-density interconnection between chips and an interposer using a grating coupling structure and through-silicon via technology, thereby realizing high-integration and low-loss packaging of heterogeneous chips on an interposer.

[0006] This invention achieves efficient optical interconnection between heterogeneous chips and optoelectronic interconnection interposers using high-efficiency grating couplers. Simultaneously, it utilizes through-silicon via (TSV) and redistribution line (RDL) technologies to achieve high-density electrical interconnection between the chips and the interposers. Furthermore, it leverages the electrode patterning advantages of RDL technology to enhance the optical interconnection efficiency between the interposers and chips and achieve self-alignment between the chips and the interposers. This invention exhibits strong compatibility with existing packaging scenarios for heterogeneous optoelectronic chips, thus significantly contributing to increasing the integration density and reducing interconnection losses in heterogeneous optoelectronic integrated systems, and promoting the practical application of such systems.

[0007] The technical solution of the present invention is as follows:

[0008] A high-density optoelectronic interconnect board based on a low-loss silicon nitride grating coupler is characterized by comprising a cladding layer, a waveguide layer, an upper redistribution layer, a via structure layer, and a lower redistribution layer stacked from bottom to top.

[0009] The waveguide layer is made of silicon nitride material and consists of a silicon nitride waveguide, a beam splitter multimode interferometer, a cross waveguide, and a two-dimensional arrangement of grating couplers to form an optical signal transmission circuit; the grating couplers are used to realize optical signal coupling and self-alignment between the chip and the interposer layer.

[0010] The via structure layer is composed of a through silicon via (TSV) array, and the TSVs are filled with copper or tungsten metal to form through metal electrodes for vertical electrical signal transmission.

[0011] The upper and lower redistribution layers achieve high-density interconnection of horizontal electrical signals through redistribution technology (RDL);

[0012] The cladding layer is used to restrict total internal reflection of light within the waveguide layer and suppress higher-order mode leakage.

[0013] Furthermore, the electrical interconnect density of the adapter board is not less than 200 channels / mm². 2 Optical interconnect density not less than 100 channels / mm 2 .

[0014] Furthermore, the optical signal transmission path of the waveguide layer also includes:

[0015] An input grating, whose period is matched to the wavelength of an external light source, is used to receive optical signals;

[0016] The output grating has an output angle that matches the optical input port of the receiving chip.

[0017] Furthermore, the metal electrode is made of copper or tungsten, with a diameter ≤5μm and a depth-to-width ratio ≥10:1. Its top and bottom are respectively connected to the chip pad and the packaging substrate. At the same time, the electrode surface is polished to form a metal reflector with a reflectivity ≥90% to enhance the coupling efficiency of the grating coupler and realize the transmission of electrical signals between the upper and lower surfaces of the optoelectronic co-connector board.

[0018] Furthermore, the fan-in area of ​​the upper redistribution layer adopts a tapered routing design, and the fan-out area of ​​the lower redistribution layer achieves resistance matching through a serpentine routing.

[0019] Furthermore, the two-dimensional arrangement of the grating coupler is a rectangular array or a hexagonal close-packed array.

[0020] The technical effects (advantages) of the present invention are as follows:

[0021] (1) The present invention is based on silicon nitride material to complete the preparation of the interlayer, which can realize low-loss transmission of optical signals, and at the same time, the large optical bandwidth can be applied to a variety of integrated optical systems;

[0022] (2) The present invention uses a grating coupler as the optical transmission port of the intermediary layer, which can complete the stacking and packaging of the chip and the intermediary layer. At the same time, the two-dimensional arrangement of the grating coupler can effectively improve the optical transmission channel density and reduce the requirements for alignment accuracy.

[0023] (3) The present invention uses TSV technology and RDL technology to realize the transmission of electrical signals above and below the interposer layer, which can effectively improve the signal channel density while improving the coupling efficiency of the grating coupler and realizing self-alignment between the chip and the interposer layer. Attached Figure Description

[0024] Other features, advantages, and benefits of the invention will become apparent to those skilled in the art upon reading the following detailed description of selected embodiments. The accompanying drawings are for further detailed description of the selected embodiments only and are not intended to limit the invention.

[0025] Figure 1 This is a cross-sectional schematic diagram of a high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler proposed in this invention.

[0026] Figure 2 This is a top view schematic diagram of a high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler proposed in this invention.

[0027] Figure 3 This is a schematic diagram of the layered structure of a high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler proposed in this invention. Detailed Implementation

[0028] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, but this should not limit the scope of protection of the present invention.

[0029] Please see Figure 1 and Figure 3 As shown in the figure, a high-density optoelectronic interconnect board based on a low-loss silicon nitride grating coupler consists of five layers from top to bottom, each layer working together to achieve high-density, low-loss transmission of optical and electrical signals. The layers include:

[0030] The cladding layer 7 covers the waveguide layer 8 and uses the principle of total internal reflection to confine the optical signal within the waveguide core for transmission, suppressing higher-order mode leakage, ensuring that only the main mode is effectively transmitted, and reducing optical signal crosstalk and loss.

[0031] Waveguide layer 8: In this embodiment, a silicon nitride thin film is grown on a silicon substrate using low-pressure chemical vapor deposition (LPCVD).

[0032] The upper redistribution layer 9 concentrates the chip's scattered input signals into a smaller area, optimizes the trace width and shape, and reduces high-speed signal reflection and crosstalk.

[0033] Through-hole structure layer 10: A through-silicon via (TSV) is formed by vertically drilling through the silicon substrate and filling it with copper or tungsten to create a through-hole metal electrode 5.

[0034] Lower redistribution layer: Distributes dense signal arrays to multiple target nodes (such as pads and package pins), and achieves resistance matching through serpentine routing.

[0035] A silicon nitride waveguide, a multimode interferometer, and a cross-waveguide structure are fabricated in the waveguide layer. Electrodes are fabricated in the cladding layer, waveguide layer, upper redistribution layer, via structure layer, and lower redistribution layer using via etching and metal filling processes. The complete optical path includes an input grating, a beam splitter multimode interferometer, a cross-waveguide, and an output grating. The metal electrodes enable electrical signal transmission between the upper and lower surfaces of the optoelectronic interconnect adapter board.

[0036] like Figure 2 The optical structures contained in the waveguide layer shown include a grating coupler 1, a waveguide 2, a beam splitter multimode interferometer 3, and a cross waveguide 4. The waveguide layer forms the optical signal transmission path of the optoelectronic co-connector board, and realizes optical signal transmission with the optical fiber / chip outside the board through the grating coupler.

[0037] like Figure 3As shown, the wafer structure of this invention, from top to bottom, consists of a cladding layer 7, a waveguide layer 8, an upper redistribution layer 9, a via structure layer 10, and a lower redistribution layer 11. The cladding layer 7 causes total internal reflection of light within the waveguide core, thereby limiting light propagation along a designated path and preventing higher-order mode leakage, ensuring only the dominant mode is effectively transmitted and reducing crosstalk. The waveguide layer 8, composed of the above structure, forms the optical signal transmission path of the optoelectronic interconnect adapter. The upper redistribution layer 9 concentrates multiple input signals into a smaller area, reducing the complexity of the signal path, and reduces signal reflection and crosstalk by optimizing the trace width and shape of the fan-in region, ensuring high-quality signal transmission. High-fidelity transmission of high-speed signals; the through-hole structure layer 10 penetrates the silicon substrate directly through vertical drilling, enabling high-speed signal transmission between multi-layer chips, reducing latency and power consumption, and significantly improving integration and chip area utilization; the lower redistribution layer 11 distributes the densely arranged signal array in a smaller area to multiple target nodes (such as pads, other chips, or package pins), supporting parallel transmission of multi-channel signals. By rationally designing the width and resistance matching of the fan-out traces, it ensures uniform distribution of signal power, avoids local overload or voltage drop, and the diffusion path can assist in heat dissipation by increasing the trace area to reduce the temperature of local hot spots. In the above layered structure, metal electrodes 5 are distributed to realize electrical signal transmission between the upper and lower surfaces of the optoelectronic co-connector board, and at the same time, they act as metal reflectors to improve the coupling efficiency of the grating coupler 1.

[0038] The above embodiments are used to explain and illustrate the present invention, but not to limit the present invention. Any modifications and changes made to the present invention within the spirit and scope of the claims shall fall within the protection scope of the present invention.

Claims

1. A high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler, characterized in that: It includes a cladding layer (7), a waveguide layer (8), an upper redistribution layer (9), a via structure layer (10), and a lower redistribution layer (11) stacked from bottom to top; The waveguide layer (8) is made of silicon nitride material and consists of a silicon nitride waveguide (2), a beam splitter multimode interferometer (3), a cross waveguide (4), and a two-dimensionally arranged grating coupler (1) to form an optical signal transmission circuit; the grating coupler is used to realize optical signal coupling and self-alignment between the chip and the interposer layer; The through-hole structure layer (10) is composed of a through-silicon via (TSV) array, and the through-silicon vias are filled with copper or tungsten metal to form through-metal electrodes (5) for vertical electrical signal transmission. The upper redistribution layer (9) and the lower redistribution layer (10) achieve high-density interconnection of horizontal electrical signals through redistribution technology (RDL); The cladding layer (7) is used to restrict the total internal reflection transmission of light within the waveguide layer and suppress higher-order mode leakage.

2. The high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler according to claim 1, characterized in that: The electrical interconnect density of the adapter board is not less than 200 channels / mm. 2 Optical interconnect density not less than 100 channels / mm 2 .

3. The high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler according to claim 1, characterized in that: The optical signal transmission path of the waveguide layer (8) also includes: An input grating, whose period is matched to the wavelength of an external light source, is used to receive optical signals; The output grating has an output angle that matches the optical input port of the receiving chip.

4. The high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler according to claim 1, characterized in that: The metal electrode (5) is made of copper or tungsten, with a diameter ≤5μm and a depth-to-width ratio ≥10:

1. Its top and bottom are respectively connected to the chip pad and the packaging substrate. At the same time, the electrode surface is polished to form a metal reflector with a reflectivity ≥90% to enhance the coupling efficiency of the grating coupler (1) and realize the transmission of electrical signals between the upper and lower surfaces of the optoelectronic co-connector board.

5. The high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler according to claim 1, characterized in that: The upper redistribution layer (9) adopts a tapered routing design in its fan-in region, and the lower redistribution layer (11) achieves resistance matching through a serpentine routing in its fan-out region.

6. The high-density optoelectronic co-connector board based on a low-loss silicon nitride grating coupler according to claim 1, characterized in that: The two-dimensional arrangement of the grating coupler (1) is a rectangular array or a hexagonal close-packed array.

Images