Feedback signal generation circuit and method for multiple controllers and vehicle terminal
By introducing signal input and feedback branches into a multi-controller system and using switching transistors and logic gates to control signal connections, the problem of abnormal signal feedback caused by changes in controller state is solved, thus improving the stability of the controller.
Patent Information
- Application Number
- CN202511280171.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-09
- Publication Date
- 2025-12-12
AI Technical Summary
In multi-controller systems, changes in controller state can lead to abnormal signal feedback, resulting in problems such as abnormal wake-up, increased power consumption, and aging of circuit components.
By introducing a signal input branch and a feedback branch in the first controller, and using the first switch to control the connection relationship of the signal input branch, the signal feedback branch is prevented from being mistakenly triggered to generate a feedback signal due to the second controller being in the target state. Logic gate units are used to perform logic operations on the status flag bits, and the adjustable resistor unit is adjusted to control the current, ensuring that the voltage of the signal input branch is within the preset range.
It effectively prevents abnormal signal feedback, reduces abnormal wake-ups, power consumption increases, and circuit component aging, thereby improving the stability of the controller.
Smart Images
Figure CN121115596A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of controller circuit, and particularly relates to a feedback signal generation circuit, method and vehicle terminal for multiple controllers. BACKGROUND
[0002] With the acceleration of the intelligentization and networking process of automobiles, domain controllers integrate the computing resources of multiple functional modules, for example, a cockpit domain controller integrates multimedia, navigation, air conditioning and other functions, and a vehicle body domain controller is responsible for door control, light management and other basic functions. This multi-controller architecture not only reduces the complexity of wiring harness by reducing the number of traditional ECUs, but also realizes resource reuse by sharing sensor signal sources, for example, the vehicle body domain and the cockpit domain controller jointly collect the main driver state signal to realize seat adjustment, welcome lighting and other linkage functions.
[0003] However, if multiple controllers simultaneously collect a signal source, the controller state change of one of the controllers will cause signal feedback abnormalities in other controllers. For example, when the cockpit domain controller enters the sleep mode, the internal pull-up circuit stops working, causing the node voltage to drop to the low voltage interval. Since the signal input ends of the vehicle body domain controller and the cockpit domain controller are in a series relationship, a current loop is formed between the vehicle body domain controller and the cockpit domain controller, causing the vehicle body domain controller to incorrectly identify the input signal and cause signal feedback abnormalities, which in turn leads to abnormal wake-up, power consumption increase, circuit component aging and other problems, affecting the stability of the controller. SUMMARY
[0004] To have a basic understanding of some aspects of the disclosed embodiments, a brief overview is given below. The summary is not an overall description of the application, nor is it intended to identify key / important elements or delineate the scope of the embodiments. It is presented as a prelude to the detailed description below.
[0005] In view of the above-mentioned disadvantages of the prior art, the present application provides a feedback signal generation circuit, method and vehicle terminal for multiple controllers to prevent signal feedback abnormalities in the controller and improve the stability of the controller.
[0006] The application provides a feedback signal generation circuit for a multi-controller, comprising: a first controller, comprising a signal input branch and a signal feedback branch, wherein the signal input branch is configured to receive an original signal, and the signal feedback branch is configured to generate a feedback signal corresponding to the original signal if a voltage of the original signal is in a preset trigger voltage interval; a second controller, connected to the signal input branch, wherein if the second controller is in a target state, a voltage of the second controller is in the trigger voltage interval, and the target state is one of a wake-up state and a sleep state; and a first switch tube, configured to control the signal input branch to be in an off state if the second controller is in the target state.
[0007] In an embodiment of the application, the signal input branch comprises: a first power supply end, connected to a power supply corresponding to the first controller; the first switch tube, a source of the first switch tube being connected to the first power supply end, and a gate of the first switch tube being configured to receive a switch control signal of the first switch tube; and a first input end, connected to a drain of the first switch tube and the second controller respectively, wherein the first input end is configured to receive the original signal.
[0008] In an embodiment of the application, the first controller further comprises a logic gate unit, the logic gate unit being connected to the gate of the first switch tube, and the logic gate unit being configured to perform logical operation on state flag bits corresponding to the first controller and the second controller respectively to obtain the switch control signal of the first switch tube, wherein the state flag bits are configured to carry a controller state, and the controller state comprises a wake-up state or a sleep state.
[0009] In an embodiment of the application, the logic gate unit obtains the switch control signal of the first switch tube in the following manner: if the first controller is in a wake-up state and the second controller is in a target opposite state, an on control signal of the first switch tube is output, otherwise, an off control signal of the first switch tube is output, wherein the target opposite state comprises a wake-up state or a sleep state, and the target opposite state is different from the target state.
[0010] In an embodiment of the application, the signal feedback branch comprises: a first power supply end; a second switch tube, a source of the second switch tube being connected to the first power supply end, and a gate of the second switch tube being connected to the signal input branch; and a first output end, connected to a drain of the second switch tube, wherein the first output end is configured to output the feedback signal.
[0011] In an embodiment of the present application, the signal input branch further comprises an adjustable resistance unit, configured to, if the second controller is in the target state, control the current of the signal input branch in a preset non-trigger current range by adjusting the resistance of the adjustable resistance unit, wherein if the current of the signal input branch is in the non-trigger current range, the second switch tube is in the off state.
[0012] The present application further provides a feedback signal generation method for a multi-controller, applied to the feedback signal generation circuit for a multi-controller, and the method comprises: using the first controller to listen to the state flag bit of the second controller; if the second controller is in the dormant state, using the second controller to broadcast the state flag bit of the second controller; if the first controller listens to the second controller in the dormant state, using the first controller to control the first switch tube to enter the off state.
[0013] In an embodiment of the present application, the method further comprises: if the second controller is in the dormant state, using the first input end of the first controller to receive an ADC signal; performing binary conversion according to the ADC signal to obtain a logic level signal; if the duration of the logic level signal in the stable state is greater than or equal to a preset duration threshold, the logic level signal is determined as the original signal, wherein the stable state comprises the logic level signal in the high level range or the low level range.
[0014] In an embodiment of the present application, using the first input end of the first controller to receive an ADC signal comprises: if the switching state of the first switch tube changes, after a preset waiting duration, using the first input end of the first controller to receive an ADC signal again.
[0015] The present application further provides a vehicle terminal, comprising: a processor and a memory; the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory, so that the vehicle terminal executes the above-mentioned method.
[0016] The present application has the following beneficial effects:
[0017] The original signal is received through the signal input branch of the first controller, if the voltage of the original signal is in the preset trigger voltage interval, the feedback signal corresponding to the original signal is generated through the signal feedback branch of the first controller, at the same time, the second controller collects the original signal, and the signal input branch establishes a series relationship with the signal feedback branch, when the second controller is in the target state, the voltage of the second controller is in the trigger voltage interval, the signal input branch is disconnected from the signal feedback branch or the second controller through the first switch tube. In this way, the connection relationship of the signal input branch is controlled through the first switch tube, to prevent the feedback signal from being generated by the signal feedback branch due to the second controller being in the target state, to avoid the abnormal feedback of the signal of the first controller due to the error recognition of the input signal, to reduce the frequency of problems such as abnormal wake-up, power consumption rising, and circuit component aging, and to improve the stability of the controller. BRIEF DESCRIPTION OF DRAWINGS
[0018] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the present application. It is to be expressly understood, however, that the drawings are included herein for illustrative purposes only and do not represent a limitation of the present application. Thus, it will be apparent to one of ordinary skill in the art that other embodiments can be practiced without departing from the spirit and scope of the present application.
[0019] In the drawings:
[0020] Figure 1 is a structural schematic diagram of a feedback signal generation circuit for multiple controllers in an embodiment of the present application;
[0021] Figure 2 is a structural schematic diagram of at least a part of a first controller in an embodiment of the present application;
[0022] Figure 3 is a structural schematic diagram of at least a part of a second controller in an embodiment of the present application;
[0023] Figure 4 is a flowchart of a feedback signal generation method for multiple controllers in an embodiment of the present application;
[0024] Figure 5 is a flowchart of another feedback signal generation method for multiple controllers in an embodiment of the present application. DETAILED DESCRIPTION
[0025] The following detailed description is presented in order to describe the embodiments of the application and it is not intended that the application be limited thereto. The following detailed description is presented for the purposes of describing the embodiments of the application and its best mode of operation. Details of the application, both as to its organization and manner of operation, together with the associated drawings are presented for purposes of illustration. It is contemplated that the application as described contemplate changes in the design and implementation of the application as expressed herein, changes to specific equipment as it is developed and permits a broader scope of use of the application than the examples given, which are presented for purposes of illustration only and are not intended to limit the scope of the application.
[0026] It is also noted that the examples provided in the following description are intended solely for the purpose of illustration and that no limitations of the scope of the application are intended to be implied therefrom. Those skilled in the art will recognize that the examples provided can have other examples and that they may be practiced in a variety of ways.
[0027] In the following description, numerous specific details are discussed in order to provide a thorough understanding of the embodiments of the application. However, it will be apparent to one skilled in the art that the embodiments of the application can be practiced without these specific details. In other instances, well-known structures and devices are not described in exhaustive detail, in order to avoid obscuring the embodiments of the application.
[0028] The terms "first", "second", and the like, as used in the description and the claims, refer to the objects that are distinguished from each other by the names, and do not necessarily indicate a specific order or a sequence. It is understood that the data thus used can be interchanged, as appropriate, to describe the embodiments of the application described herein. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion.
[0029] Unless otherwise specified, the term "a plurality of" means two or more.
[0030] In the present application, the character " / " represents an "or" relationship between the objects before and after it. For example, A / B means: A or B.
[0031] The term "and / or" is a description of the relationship between the objects, which means that there can be three relationships. For example, A and / or B means: A or B, or, A and B, the three relationships.
[0032] In combination Figure 1 As shown, the present application provides a feedback signal generation circuit for multi-controller, which includes a first controller 101, a second controller 102, a first switch tube Q1.
[0033] The first controller 101 includes a signal input branch and a signal feedback branch.
[0034] The signal input branch is configured to receive an original signal.
[0035] The signal feedback branch is configured to generate a feedback signal corresponding to the original signal if a voltage of the original signal is in a preset trigger voltage interval.
[0036] The second controller 102 is connected to the signal input branch.
[0037] If the second controller is in a target state, a voltage of the second controller is in the trigger voltage interval, and the target state is one of a wake-up state and a sleep state.
[0038] The first switch Q1 is configured to control the signal input branch to be in an off state if the second controller is in the target state.
[0039] The feedback signal generation circuit for multiple controllers provided by the present application receives an original signal through a signal input branch of a first controller, generates a feedback signal corresponding to the original signal through a signal feedback branch of the first controller if a voltage of the original signal is in a preset trigger voltage interval, and a second controller collects the original signal and establishes a series relationship with the signal input branch. When the second controller is in a target state, the voltage of the second controller is in the trigger voltage interval, and the signal input branch is disconnected from the signal feedback branch or the second controller through the first switch. In this way, the connection relationship of the signal input branch is controlled by the first switch to prevent the signal feedback branch from generating a feedback signal due to the second controller being in the target state, avoid the signal feedback abnormal phenomenon of the first controller due to the error recognition of the input signal, reduce the frequency of occurrence of abnormal wake-up, power consumption rise, circuit component aging and other problems, and improve the stability of the controller.
[0040] In some embodiments, the first controller 101 includes a body domain controller, and the second controller 102 includes a cabin domain controller.
[0041] In some embodiments, if the trigger voltage interval is a low voltage interval, the target state is a sleep state; and if the trigger voltage interval is a high voltage interval, the target state is a wake-up state.
[0042] In combination with Figure 2 the present application provides a body domain controller, Figure 2 as part of the body domain controller, the body domain controller includes a first power supply end V1, a voltage dividing resistor R1, a first switch Q1, an adjustable resistor unit R2, a protection diode D1, a filter capacitor C1, a first output end IN1, a second switch Q2, a pull-down resistor R3, a filter resistor R4, a filter capacitor C2, and a first output end OUT1.
[0043] Optionally, the signal input branch comprises: a first power supply end connected to a power supply corresponding to the first controller; a first switch tube, a source electrode of the first switch tube being connected to the first power supply end, a gate electrode of the first switch tube being configured to receive a switch control signal of the first switch tube; and a first input end connected to the drain electrode of the first switch tube and the second controller, wherein the first input end is configured to receive the original signal.
[0044] In combination Figure 2 As shown in FIG. 1, the signal input branch comprises a first power supply end V1, a voltage dividing resistor R1, a first switch tube Q1, an adjustable resistor unit R2, a protection diode D1, a filter capacitor C1, and a first output end IN1, wherein the first power supply end V1 is connected to a source electrode of the first switch tube Q1 through the voltage dividing resistor R1, a drain electrode of the first switch tube Q1 is connected to an anode of the protection diode D1 through the adjustable resistor unit R2, a cathode of the protection diode D1 is connected to the first output end IN1, a first end of the filter capacitor C1 is connected to the first output end IN1, and a second end of the filter capacitor C1 is grounded.
[0045] In some embodiments, the input ends of the first controller and the second controller are respectively connected to the same signal source, so that the input ends of the first controller and the second controller are connected in series with each other; if the original signal output by the signal source is a low-level signal, a current of the first power supply end V1 flows to the first output end IN1, so that a voltage of the signal input branch is in a high-level interval, a second switch tube of the control signal feedback branch is turned on, and a feedback signal is generated; similarly, if the second controller is in a dormant state, a voltage of the second controller is in a low-level interval, the current of the first power supply end V1 flows to the second controller through the input ends of the first controller and the second controller, a current loop is formed, the voltage of the signal input branch is in the high-level interval, and the second switch tube of the error control signal feedback branch is turned on, and the feedback signal is generated.
[0046] In some embodiments, the first switch tube Q1 is arranged between the first power supply end V1 and the first output end IN1, if the second controller is in a dormant state, the first switch tube Q1 is used to disconnect the connection between the first power supply end V1 and the first output end IN1, so that the current of the first power supply end V1 cannot be input to the second controller through the signal input branch, the voltage of the signal input branch is in a low-level interval, and the second switch tube of the signal feedback branch is in an off state, thereby avoiding the generation of the feedback signal by mistake.
[0047] Optionally, the signal feedback branch comprises: a first power supply end; a second switch tube, a source electrode of the second switch tube being connected to the first power supply end, a gate electrode of the second switch tube being connected to the signal input branch; and a first output end connected to a drain electrode of the second switch tube, wherein the first output end is configured to output a feedback signal.
[0048] In combination Figure 2As shown, the signal feedback branch includes a first power supply end V1, a second switch tube Q2, a pull-down resistor R3, a filter resistor R4, a filter capacitor C2 and a first output end OUT1; the first power supply end V1 is connected to the source of the second switch tube Q2; the gate of the second switch tube Q2 is connected between the first switch tube Q1 and the voltage dividing resistor R1; the drain of the second switch tube Q2 is respectively connected to the first end of the pull-down resistor R3 and the first end of the filter resistor R4; the second end of the pull-down resistor R3 is grounded; the second end of the filter resistor R4 is respectively connected to the first end of the filter capacitor C2 and the first output end OUT1; and the second end of the filter capacitor C2 is grounded.
[0049] In some embodiments, the second switch tube Q2 is a high-isolation MOSFET tube, and the reverse drain current of the high-isolation MOSFET tube is less than 1 μA, so that the abnormal loop is physically cut off when the second controller is in the sleep state by using the low reverse drain current characteristic.
[0050] Optionally, the first controller further includes a logic gate unit connected to the gate of the first switch tube, and the logic gate unit is configured to perform logical operation on the state flag bits corresponding to the first controller and the second controller respectively to obtain the switching control signal of the first switch tube, wherein the state flag bit is used to carry the state of the controller, and the state of the controller includes the wake-up state or the sleep state.
[0051] Optionally, the logic gate unit obtains the switching control signal of the first switch tube by: if the first controller is in the wake-up state and the second controller is in the target opposite state, outputting the turn-on control signal of the first switch tube, otherwise, outputting the turn-off control signal of the first switch tube, wherein the target opposite state includes the wake-up state or the sleep state, and the target opposite state is different from the target state.
[0052] In some embodiments, if the first controller is in the sleep state, the logic gate unit still outputs the turn-off control signal, so that the input end of the first controller is disconnected from the other controllers, thereby avoiding the current of the other controllers flowing into the first controller, and saving energy consumption.
[0053] In some embodiments, if the target state is the sleep state, the target opposite state is the wake-up state; and the logic gate unit obtains the turn-on control signal of the first switch tube by performing logical operation on the state flag bits corresponding to the first controller and the second controller respectively through an AND gate circuit, and the truth table of the logic gate circuit is shown in Table 1.
[0054] Table 1
[0055]
[0056]
[0057] Optionally, the signal input branch further comprises an adjustable resistance unit, configured to control the current of the signal input branch in a preset non-trigger current interval by adjusting the resistance of the adjustable resistance unit if the second controller is in the target state, wherein the second switch tube is in the off state if the current of the signal input branch is in the non-trigger current interval.
[0058] In some embodiments, the fixed resistance is replaced by an adjustable resistance unit, such as a digital potentiometer, and the resistance value of the adjustable resistance unit is matched according to the state flag bit of the second controller by using the first controller, and the adjustable resistance unit is controlled through the I2C bus.
[0059] In some embodiments, if the voltage at the first input end of the first controller is 3.3V and the resistance of the voltage dividing resistance R1 is 4.7kΩ, the resistance of the adjustable resistance unit R2 is adjusted to 4.7kΩ when the second controller is in the wake-up state; when the original signal is a low-level signal, the voltage at the first input end is divided by the voltage dividing resistance R1 and the adjustable resistance unit R2, and a high-level voltage is formed at the gate of the second switch tube Q2, realizing the conduction of the signal feedback branch.
[0060] In some embodiments, if the voltage at the first input end of the first controller is 3.3V and the resistance of the voltage dividing resistance R1 is 4.7kΩ, the resistance of the adjustable resistance unit R2 is adjusted to 20kΩ when the second controller is in the sleep state; when the first switch tube Q1 is in the on state due to failure, the current of the signal input branch is controlled to be less than 5μA by increasing the resistance of the adjustable resistance unit R2, so as to control the current of the control signal input branch in a preset non-trigger current interval, and the second switch tube remains in the off state.
[0061] In combination with Figure 3 As shown in the figure, the present application provides a cabin domain controller, Figure 3 for a part of the cabin domain controller, wherein the cabin domain controller comprises a second input end IN2, a protection resistance R5, a second power supply end V2, a pull-up resistance R6, a pull-down resistance R7, a filter resistance R8, a pull-down resistance R9, a filter capacitor C3 and a second output end OUT2.
[0062] In some embodiments, the first switch tube is set in the first controller after the second controller has been designed, so as to avoid modifying the design of the second controller and reduce the design cost.
[0063] In some embodiments, the second input end IN2 is connected to a first end of a protection resistor R5, the second power supply end V2 is connected to a second end of the protection resistor R5 through a pull-up resistor R6, the second end of the protection resistor R5 is connected to ground through a pull-down resistor R7, the second end of the protection resistor R5 is further connected to a first end of a filter resistor R8, a second end of the filter resistor R8 is connected to a first end of a pull-down resistor R9, a first end of a filter capacitor C3 and the second output end OUT2 respectively, and the second end of the pull-down resistor R9 and the second end of the filter capacitor C3 are connected to ground respectively.
[0064] In some embodiments, the first input end IN1 and the second input end IN2 are in a series connection; when the second controller is in a sleep state, the voltage of the second power supply end V2 is regarded as 0V, the current of the first input end IN1 flows into the second power supply end V2 through the protection resistor R5 and the pull-up resistor R6 in sequence, and the current of the first input end IN1 flows out through the protection resistor R5, the filter resistor R8 and the pull-down resistor R9 in sequence; when the first input end IN1 has current flowing out, the current of the signal input branch may reach the conduction condition of the second switch tube, so that the signal feedback branch generates an error feedback signal.
[0065] In combination with Figure 4 As shown in the drawings, the present application provides a feedback signal generation method for multiple controllers, applied to the feedback signal generation circuit for multiple controllers described above, and the method comprises the following steps:
[0066] In step S401, the first controller is used to listen to the state flag bit of the second controller;
[0067] In step S402, if the second controller is in a sleep state, the second controller is used to broadcast the state flag bit of the second controller;
[0068] In step S403, if the first controller listens to the second controller in a sleep state, the first controller is used to control the first switch tube to enter an off state.
[0069] The feedback signal generation method for multiple controllers provided in the application receives an original signal through a signal input branch of a first controller. If the voltage of the original signal is in a preset trigger voltage interval, a feedback signal corresponding to the original signal is generated through a signal feedback branch of the first controller. Meanwhile, a second controller is in series connection with the signal input branch, and the first controller and the second controller jointly collect the original signal. When the second controller is in a target state, the voltage of the second controller is in the trigger voltage interval, and the signal input branch is disconnected from the signal feedback branch or the second controller through a first switch tube. In this way, the connection relationship of the signal input branch is controlled through the first switch tube to prevent the signal feedback branch from generating a feedback signal due to the second controller being in the target state, avoid the signal feedback abnormal phenomenon of the first controller due to the error recognition of the input signal, and reduce the frequency of occurrence of problems such as abnormal wake-up, power consumption rise, and circuit component aging, thereby improving the stability of the controller.
[0070] Optionally, the method further comprises: if the second controller is in a sleep state, receiving an ADC signal through the first input end of the first controller; performing a binary conversion on the ADC signal to obtain a logic level signal; and if a duration of the logic level signal in a stable state is greater than or equal to a preset duration threshold, determining the logic level signal as the original signal, wherein the stable state includes that the logic level signal is in a high voltage interval or a low voltage interval.
[0071] In some embodiments, the ADC signal received by the first input end of the first controller is filtered through a software layer of the first controller to prevent signal fluctuation, including: converting 12-bit ADC values in the ADC signal into a logic level signal in a 0-3.3V voltage interval; if the voltage is greater than 2.5V, determining that the logic level signal is in a high voltage interval, otherwise, determining that the logic level signal is in a low voltage interval; if the logic level signal and the signal at the previous time point are in the same voltage interval, determining that it is in a stable state, and if the stable state exceeds a duration threshold of 10ms, the stable signal is taken as the original signal; if the logic level signal jumps or the duration of the stable state is less than 10ms, it is determined to be noise; finally, the first controller only processes the stable high voltage signal or the stable low voltage signal, filters the jump edge and noise in the signal, and avoids signal fluctuation.
[0072] Optionally, receiving the ADC signal through the first input end of the first controller includes: if the switching state of the first switch tube changes, after a preset waiting duration, the ADC signal is received through the first input end of the first controller again.
[0073] In some embodiments, after the switching state changes, the first switch tube is guaranteed to be in a stable physical state after a preset waiting duration, avoiding the influence of instantaneous jitter on signal monitoring.
[0074] In combination Figure 5 As shown in the specification, the application provides a feedback signal generation method for a multi-controller, comprising:
[0075] Step S501, the second controller broadcasts a state flag bit of the second controller;
[0076] Step S502, the central processor of the first controller listens to the state flag bit of the second controller;
[0077] Step S503, the central processor of the first controller listens to that the state flag bit of the second controller represents that the second controller is in a sleep state;
[0078] Step S504, the central processor of the first controller sends a high-resistance instruction to the adjustable resistance unit of the hardware layer;
[0079] The high-resistance instruction includes setting the resistance of the adjustable resistance unit to 20kΩ.
[0080] Step S505, the central processor of the first controller sends a shutdown control instruction to the first switch tube of the hardware layer;
[0081] Step S506, the central processor of the first controller sends a signal filtering instruction to the software layer;
[0082] The signal filtering instruction includes receiving an ADC signal through the first input end of the first controller, performing binary conversion according to the ADC signal to obtain a logic level signal, and determining the logic level signal as an original signal if the duration of the logic level signal in a stable state is greater than or equal to a preset duration threshold.
[0083] The feedback signal generation method for a multi-controller provided by the application receives an original signal through the signal input branch of the first controller, and if the voltage of the original signal is in a preset trigger voltage interval, generates a feedback signal corresponding to the original signal through the signal feedback branch of the first controller. At the same time, the second controller collects the original signal and establishes a series relationship with the signal input branch. When the second controller is in a target state, the voltage of the second controller is in the trigger voltage interval, and the signal input branch is disconnected from the signal feedback branch or the second controller through the first switch tube. In this way, the connection relationship of the signal input branch is controlled through the first switch tube, preventing the signal feedback branch from generating a feedback signal due to the second controller being in a target state, avoiding signal feedback abnormalities of the first controller due to incorrect identification of the input signal, reducing the frequency of problems such as abnormal wake-up, power consumption increase, and circuit component aging, thereby improving the stability of the controller.
[0084] The application also provides a vehicle terminal comprising the feedback signal generation circuit for multiple controllers as described above.
[0085] The above description and drawings are only illustrative of the embodiments of the present disclosure and enable those skilled in the art to practice them. Other embodiments can include structural, logical, electrical, process, and other changes. The embodiments are merely representative of the possible variations. Individual components and functions are optional unless explicitly required, and the order of operations can be varied. Portions and sub-combinations of some embodiments can be included in, or substituted for, portions and sub-combinations of other embodiments. Also, the word "comprise" as used in the application is used only to describe the embodiments and does not mean to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and / or" as used in the application refers to any and all possible combinations of one or more of the associated listed items. In addition, as used in this application, the term "comprise" and variations thereof such as "comprises" and / or "comprising", etc., mean the presence of stated features, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. Without more limitations, an element defined by the phrase "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or apparatus including the element. In this document, each embodiment focuses on the differences from other embodiments, and the same or similar parts between embodiments can be referred to each other. For the method, product, etc. disclosed by the embodiments, if it corresponds to the method part disclosed by the embodiments, the relevant part can be referred to the description of the method part.
[0086] Those skilled in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be realized in electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are realized in hardware or software, it can depend on the specific application and design constraints of the technical solution. The skilled person can use different methods for each specific application to implement the described functions, but such implementation should not be considered beyond the scope of the present application. The skilled person can clearly understand that, for the convenience and brevity of description, the specific working process of the above-described system, device and unit can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.
[0087] In the embodiments disclosed herein, the disclosed methods, products (including but not limited to devices, apparatuses, etc.) can be implemented in other manners. For example, the described device embodiments are merely schematic. For example, the division of the units is merely a logical function division. There can be another division manner for the actual implementation, for example, multiple units or components can be combined or integrated into another system, or some of the components can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms. The unit illustrated as a separate component can or can not be physically separate, and can or can not be a physical component. Some or all of the units can be selected according to actual needs to implement the embodiments. In addition, the units in the application can be integrated into a processing unit, or each unit can exist physically as a separate entity, or two or more units can be integrated into a unit.
[0088] The flowcharts and block diagrams in the drawings show the architectural, functional and operational aspects of possible implementations of systems, methods and computer program products according to the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment or a portion of code that contains one or more executable instructions for implementing the specified logical functions. In some alternative implementations, the functions noted in the blocks can occur in a different order than that shown in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. In the descriptions corresponding to the flowcharts and block diagrams in the drawings, the operations or steps corresponding to different blocks can also occur in an order different from that disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. Each block in the block diagrams and / or flowcharts, and the combination of blocks in the block diagrams and / or flowcharts, can be implemented by a dedicated hardware-based system that performs the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.
Claims
1. A feedback signal generation circuit for multiple controllers, characterized in that, include: The first controller includes a signal input branch and a signal feedback branch, wherein the signal input branch is used to receive the original signal, and the signal feedback branch is used to generate a feedback signal corresponding to the original signal if the voltage of the original signal is within a preset trigger voltage range. The second controller is connected to the signal input branch. If the second controller is in the target state, the voltage of the second controller is in the trigger voltage range. The target state is one of the wake-up state and the sleep state. The first switching transistor is used to control the signal input branch to be in the off state if the second controller is in the target state.
2. The circuit according to claim 1, characterized in that, The signal input branch includes: The first power supply terminal is connected to the power supply corresponding to the first controller; The first switching transistor has its source connected to the first power supply terminal, and its gate is used to receive the switching control signal of the first switching transistor. The first input terminal is connected to the drain of the first switching transistor and the second controller, respectively, wherein the first input terminal is used to receive the original signal.
3. The circuit according to claim 2, characterized in that, The first controller further includes a logic gate unit connected to the gate of the first switching transistor, the logic gate unit being used for: Logical operations are performed on the status flag bits corresponding to the first controller and the second controller respectively to obtain the switching control signal of the first switch transistor. The status flag bits are used to carry the controller status, which includes a wake-up state or a sleep state.
4. The circuit according to claim 3, characterized in that, The logic gate unit obtains the switching control signal of the first switching transistor in the following manner: If the first controller is in a wake-up state and the second controller is in a target opposition state, then the first switch transistor is output as a turn-on control signal; otherwise, the first switch transistor is output as a turn-off control signal. The target opposition state includes a wake-up state or a sleep state, and the target opposition state is different from the target state.
5. The circuit according to claim 1, characterized in that, The signal feedback branch includes: First power supply terminal; The second switch has its source connected to the first power supply terminal and its gate connected to the signal input branch. The first output terminal is connected to the drain of the second switching transistor, wherein the first output terminal is used to output the feedback signal.
6. The circuit according to claim 5, characterized in that, The signal input branch also includes: An adjustable resistor unit is used to control the current of the signal input branch within a preset non-trigger current range by adjusting the resistance of the adjustable resistor unit if the second controller is in the target state. If the current of the signal input branch is in the non-trigger current range, the second switch is in the off state.
7. A method for generating feedback signals for multiple controllers, characterized in that, The method, applied to a feedback signal generation circuit for a multi-controller as described in any one of claims 1 to 6, comprises: The first controller is used to monitor the status flag bit of the second controller; If the second controller is in sleep mode, then the status flag bit of the second controller is broadcast using the second controller. If the first controller detects that the second controller is in a sleep state, it uses the first controller to control the first switch to enter a shutdown state.
8. The method according to claim 7, characterized in that, The method further includes: If the second controller is in sleep mode, the ADC signal is received using the first input terminal of the first controller; The ADC signal is binarized to obtain a logic level signal; If the duration of the logic level signal in a stable state is greater than or equal to a preset duration threshold, then the logic level signal is determined as the original signal, wherein the stable state includes the logic level signal being in a high-level range or a low-level range.
9. The method according to claim 7 or 8, characterized in that, Receiving ADC signals using the first input terminal of the first controller includes: If the switching state of the first switch changes, the ADC signal is received again using the first input terminal of the first controller after a preset waiting time.
10. A vehicle terminal, characterized in that, Includes the feedback signal generation circuit for multiple controllers as described in any one of claims 1 to 6.