Method of manufacturing a silicon cavity and semiconductor structure

Abstract

The application discloses a method for manufacturing a silicon cavity and a semiconductor structure, and relates to the field of semiconductor manufacturing. The method comprises the following steps: forming a grid-shaped organic mask on the surface of a silicon substrate; performing an etching process on the exposed silicon substrate surface to form a silicon cavity at less than -10 DEG C; the etching process comprises a plurality of periodic cycle steps formed in sequence by deposition steps and etching steps; the deposition steps use CH4, CHF3 and H2 as deposition gas; the etching process comprises a first etching stage, a second etching stage and a third etching stage connected in sequence, the first etching stage uses F2 and N2 as etching gas, the second etching stage uses F2 and BF3 as etching gas, and the third etching stage uses F2 and C2F6 as etching gas. The application can improve the reliability and uniformity when protecting the sidewall of the forming silicon cavity, obtain a vertical sidewall morphology, and improve the etching rate.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor processing, in particular to a method for manufacturing a silicon cavity and a semiconductor structure obtained by using the method. BACKGROUND

[0002] In the manufacturing of a micro-electro-mechanical system (MEMS) device, such as a MEMS microphone, a deep silicon etching process (periodic cyclic etching process) is usually adopted to etch a silicon cavity on a silicon substrate. However, when multiple silicon cavities are simultaneously etched on the surface of the silicon substrate in an arrayed manner, the opening rate of the silicon cavities on the surface of the silicon substrate is very high (greater than 50%), which causes the spacing distance between two adjacent silicon cavities to be much smaller than the opening size of the silicon cavities. As a result, the size of a photoresist mask is also much smaller than the opening size of the silicon cavities, which leads to a very low selectivity of the photoresist mask. In the deep silicon etching process, a bottom side etching defect (excessive lateral etching at the bottom) is very likely to occur, forming a silicon cavity with a small top and a large bottom, and the angle of the sidewall is not perpendicular. When a conventional C4F8 is used as a deposition gas to deposit a polymer on the sidewall for protection, there is a problem of large fluctuation in the deposition thickness. If the deposition degree (time, power, and gas amount, etc.) is insufficient, the deposited polymer is likely to be deposited above the sidewall, and when the etching reaches the bottom of the silicon cavity, the polymer protection is insufficient, which is likely to cause a side etching. If the deposition degree is too high, a "grass" defect is likely to occur, which seriously affects the smoothness of the sidewall, thereby greatly increasing the difficulty of process control. In addition, since the etching depth of the silicon cavity is very large, the etching rate is also low when SF6 is used as an etching gas for periodic cyclic etching. Therefore, it is necessary to study a process method which can significantly improve the above problems, to avoid large fluctuation in the thickness of the polymer, improve the reliability and uniformity of the protection of the sidewall, make the angle of the sidewall perpendicular, and prevent the bottom from being side etched, and to improve the etching rate. SUMMARY

[0003] The present application aims to overcome the above problems existing in the prior art, and provides a method for manufacturing a silicon cavity and a semiconductor structure.

[0004] To achieve the above-mentioned purpose, the technical solutions of the present application are as follows:

[0005] According to a first aspect of the present application, the embodiments of the present application provide a method for manufacturing a silicon cavity, comprising:

[0006] providing a silicon substrate;

[0007] forming a grid-shaped organic mask on the surface of the silicon substrate, the grid defining an etching window;

[0008] performing an etching process at a first temperature less than -10℃ to etch the surface of the silicon substrate exposed in the etching window, and forming a silicon cavity on the silicon substrate;

[0009] The etching process comprises a plurality of periodic cycle steps formed in sequence by a deposition step and an etching step; the deposition step uses a first gas as a deposition gas to form a polymer layer on the sidewall of the silicon cavity in formation and the exposed surface of the organic mask to protect the sidewall and the organic mask during etching; the etching step uses a second gas as an etching gas to etch the polymer layer and the silicon substrate; the first gas comprises CH4, CHF3 and H2, and the second gas comprises F2, N2, BF3 and C2F6;

[0010] The etching process comprises a first etching stage, a second etching stage and a third etching stage connected in sequence, which are respectively used to form the top, middle and bottom of the silicon cavity in sequence; the first etching stage uses F2 and N2 as etching gas, the second etching stage uses F2 and BF3 as etching gas, and the third etching stage uses F2 and C2F6 as etching gas.

[0011] In some embodiments, the polymer layer comprises an a-C:H:F cross-linked polymer layer, by adding H2 in the first gas, the H atoms are combined with the dangling bonds of the carbon chains in the formed polymer to form stable C-H bonds, and the carbon chains are tightly connected together with -CH2- groups and -CH- groups as cross-linking points, which promotes the increase of cross-linking degree and forms an a-C:H:F cross-linked polymer layer with a three-dimensional network structure of high cross-linking.

[0012] In some embodiments, the flow ratio of CH4, CHF3 and H2 in the first gas is: CH4:CHF3:H2 = 1:2:3-1:5:10.

[0013] In some embodiments, when performing the first etching stage, the sidewall is also subjected to a first treatment by the plasma formed by the introduced N2 in the second gas to form a nitridation layer on the sidewall to assist in passivating the surface of the sidewall.

[0014] In some embodiments, when performing the second etching stage, the polymer layer is also subjected to a second treatment by the plasma formed by the introduced BF3 in the second gas to change the properties of the polymer layer and enhance the resistance of the polymer layer to lateral etching.

[0015] In some embodiments, during the third etching stage, a plasma formed by the C2F6 in the second gas is also used to provide a higher fluorocarbon ratio for inhibiting lateral etching of the bottom of the sidewall.

[0016] In some embodiments, during the first etching stage, the flow ratio of F2 and N2 in the second gas is F2:N2=5:1-10:1.

[0017] In some embodiments, during the second etching stage, the flow ratio of F2 and BF3 in the second gas is F2:BF3=8:1-20:1.

[0018] In some embodiments, during the third etching stage, the flow ratio of F2 and C2F6 in the second gas is F2:C2F6=10:1-20:1.

[0019] In some embodiments, the method further comprises, after each of the deposition step and the etching step is performed once or twice successively, performing a third treatment on the sidewall at a second temperature less than -10°C, including using HBr and O2 as third gas to remove a partial thickness of the polymer layer deposited on the sidewall and react with the silicon substrate material present and exposed on the surface of the protrusion to form a reaction product layer, and using CF4 and Ar as fourth gas to remove the reaction product layer to remove at least part of the protrusion.

[0020] In some embodiments, during the third treatment, a fourth treatment is performed on the exposed surface of the organic mask using a plasma formed by the HBr in the third gas to form a modification layer on the surface of the organic mask, a fifth treatment is performed on the exposed surface of the organic mask using a plasma formed by the O2 in the third gas to oxidize the exposed surface of the organic mask below -10°C and trigger a reaction by ambient deep ultraviolet light to form a hardening layer, the modification layer and the hardening layer together form a first protective layer, and a sixth treatment is performed on the exposed surface of the organic mask using a plasma formed by the CF4 in the fourth gas to form a carbon-containing protective film on the exposed surface of the organic mask as a second protective layer.

[0021] According to a second aspect of the present application, the embodiments of the present application also provide a semiconductor structure obtained by using the method for manufacturing a silicon cavity according to any one of the embodiments of the first aspect.

[0022] The embodiments of the present application can have / at least have the following advantages:

[0023] (1) By using small molecule gases (first gas and second gas) instead of traditional large molecule gases such as C4F8 and SF6 as deposition and etching gases, the diffusion coefficient can be increased, the gas transport efficiency can be improved, and the deposition and etching gases can be diffused more uniformly, which is more conducive to uniform deposition and etching reactions when forming silicon cavities. It can also significantly reduce physical sputtering of organic masks, thus reducing the consumption of organic masks. Furthermore, the overall process time is shortened through higher etching efficiency, which indirectly reduces the cumulative exposure time of organic masks, thereby improving the protection capability of organic masks and increasing the selectivity. In addition, by keeping the temperature (first temperature) during the etching process below -10°C, the chemical kinetics can be changed to enhance physical adsorption and reduce the reaction rate. This allows the polymer layer to be adsorbed more densely and uniformly on the sidewalls. Even at the bottom of the silicon cavity, it can effectively protect the sidewalls and effectively suppress lateral etching, avoiding bottom side-cutting. This improves the reliability and uniformity of sidewall protection and can obtain extremely vertical sidewall morphology. Meanwhile, small molecule etching gases can significantly improve etching rate and etching behavior at high depths.

[0024] (2) By using a combination of CH4, CHF3, and H2 as the deposition gas, a more uniform deposition can be achieved on the bottom of the sidewall, forming a three-dimensional network structure of aC:H:F cross-linked polymer (amorphous hydrocarbon fluoropolymer layer) with a lower fluorocarbon ratio, higher density, greater rigidity, and higher cross-linking degree on the sidewall at ultra-low temperature (first temperature). This layer exhibits excellent resistance to physical sputtering and chemical etching, providing better blocking effect. Therefore, only a thinner deposition thickness is required to effectively avoid lateral etching and prevent the occurrence of "grass-like" defects. Furthermore, by adding H2 to the deposition gas, the physical bombardment and chemical erosion of the organic mask by high-energy ions can be reduced, thereby reducing damage to the organic mask and protecting critical dimensions. This allows for the maintenance of a vertical sidewall morphology.

[0025] (3) By using a mixture of F2 as the etching gas, the high reactivity of F2 can be utilized to provide an abundant main etchant, reducing dependence on physical bombardment and improving the etching rate. Among them, small molecule reactants and products have a longer mean free path, which can reach the bottom of the silicon cavity and ensure the bottom etching rate; the generated ions are lighter and have a more concentrated energy distribution, achieving extreme anisotropic etching, significantly improving the flatness of the bottom of the silicon cavity, and reducing damage to the organic mask, resulting in more vertical sidewalls.

[0026] (4) By subdividing the etching process into sequentially connected first, second, and third etching stages, which are used to form the sequentially connected top, middle, and bottom of the silicon cavity, and by using a combination of F2 and N2 as etching gas in the first etching stage, the addition of N2 can form a stable plasma, which can reduce the severe etching behavior in the top region caused by the instability of the sheath layer and the mask edge effect in the early stage of etching, effectively ensuring the stability of the top critical dimension, reducing ion sputtering damage during the etching process, improving the protection of organic masks, and forming an extremely thin nitride layer on the sidewalls, which can further enhance the surface of the sidewalls. Assisted passivation is performed to prevent excessive lateral etching and improve the verticality of the sidewall top. In the second etching stage, a combination of F2 and BF3 is used as the etching gas. The incorporation of boron (B) alters the properties of the aC:H:F cross-linked polymer layer, enhancing its resistance to lateral etching and further improving the verticality and dimensional uniformity of the sidewall. In the third etching stage, a combination of F2 and C2F6 is used as the etching gas, providing a higher carbon-to-fluorine ratio, enhancing deposition, and effectively suppressing lateral etching of the sidewall bottom, thus eliminating the problem of bottom side-cutting. Therefore, this staged etching process not only overcomes the limitations of traditional single-stage etching processes in achieving high-precision control but also provides a more refined and controllable etching scheme for manufacturing high-performance devices, effectively expanding the etching process window.

[0027] (5) By using HBr and O2 as a third gas at a second temperature of less than -10°C after each one or two consecutive deposition and etching steps, a portion of the thickness of the polymer layer deposited on the sidewall is removed and reacted with the silicon substrate material on the surface of the exposed protrusions on the sidewall to generate a reaction product layer. Then, CF4 and Ar are used as a fourth gas to remove the reaction product layer to remove at least part of the protrusions. Thus, by performing the third treatment on the sidewall, the thickness uniformity of the polymer layer on the sidewall can be adjusted and the surface of the sidewall can be smoothed. By alternating the periodic cycle of the deposition and etching steps with the third treatment, the etching rate and sidewall quality can be balanced, thereby achieving a high etching rate and high etching precision (atomic level precision). It can also effectively improve the uniformity and roughness of the local polymer, solve the linewidth offset (titling) problem, achieve higher verticality (90°±0.2°), and achieve better uniformity (uniform size of the upper, middle and lower positions of the silicon cavity) and better sidewall smoothness. Furthermore, by using plasma formed from HBr in the third gas to form a modified layer on the surface of the organic mask, and plasma formed from O2 in the third gas to form a hardened layer on the surface of the organic mask, these two layers together form the first protective layer. Additionally, plasma formed from CF4 in the fourth gas forms a carbon-containing second protective layer on the surface of the organic mask. These methods reduce the consumption rate of the organic mask, thereby further improving the selectivity. Therefore, by performing multiple treatments on the organic mask, the surface quality and dimensional accuracy of the organic mask are effectively guaranteed. This not only significantly improves the selectivity of the organic mask but also enables the acquisition of more vertical sidewalls, thus having a positive impact on achieving higher etching depths and larger silicon cavity etching.

[0028] Other advantages of this application will be described in the following detailed description. Attached Figure Description

[0029] Figure 1 This is a flowchart illustrating a preferred embodiment of a method for manufacturing a silicon cavity according to this application.

[0030] Figure 2 This is a schematic diagram of the structure after forming an organic mask on a silicon substrate, which is a preferred embodiment of this application.

[0031] Figure 3 This is a schematic diagram of the structure after depositing a polymer layer on a silicon substrate and an organic mask, according to a preferred embodiment of this application.

[0032] Figure 4 This is a schematic diagram of the structure after a first cavity is formed on a silicon substrate, which is a preferred embodiment of this application.

[0033] Figure 5 This is a schematic diagram of the structure after a polymer layer is re-deposited on a silicon substrate and an organic mask, according to a preferred embodiment of this application.

[0034] Figure 6 This is a schematic diagram of the structure after a second cavity is formed on a silicon substrate, which is a preferred embodiment of this application.

[0035] Figure 7 This is a schematic diagram of a silicon cavity formed on a silicon substrate, provided as a preferred embodiment of this application.

[0036] Figure 8 This is a schematic diagram of the structure after removing the organic mask, which is a preferred embodiment of this application.

[0037] In the figure: 10. Silicon substrate; 11. Etching window; 12. Organic mask; 13. Carrier; 14. Polymer layer; 15. First cavity; 16. Second cavity; 17. Third cavity; 18. Silicon cavity. Detailed Implementation

[0038] To address the shortcomings of existing technologies, this application provides a method for manufacturing a silicon cavity, comprising:

[0039] Provide silicon substrates;

[0040] A grid-like organic mask is formed on the surface of the silicon substrate, and the grid defines the etching windows;

[0041] An etching process is performed at a first temperature of less than -10°C to etch the surface of the silicon substrate exposed in the etching window, thereby forming a silicon cavity on the silicon substrate.

[0042] The etching process includes multiple periodic cyclic steps sequentially consisting of a deposition step and an etching step. The deposition step uses a first gas as the deposition gas to form a polymer layer on the sidewalls of the forming silicon cavity and the exposed surface of the organic mask, thereby protecting the sidewalls and the organic mask during etching. The etching step uses a second gas as the etching gas to etch the polymer layer and the silicon substrate. The first gas includes CH4, CHF3, and H2, and the second gas includes F2, as well as N2, BF3, and C2F6.

[0043] The etching process includes a first etching stage, a second etching stage, and a third etching stage connected in sequence, which are used to form the top, middle, and bottom of the silicon cavity connected in sequence, respectively. The first etching stage uses F2 and N2 as etching gases, the second etching stage uses F2 and BF3 as etching gases, and the third etching stage uses F2 and C2F6 as etching gases.

[0044] The embodiments of this application enable the polymer layer to be more densely and uniformly adsorbed on the sidewalls, effectively protecting the sidewalls, effectively suppressing lateral etching, avoiding bottom side-cutting, and improving the protection of organic masks. This results in extremely vertical sidewall morphologies and significantly increases the etching rate. Furthermore, by subdividing the etching process into sequentially connected first, second, and third etching stages, used to form the sequentially connected top, middle, and bottom of the silicon cavity, and by using a combination of F2 and N2 as the etching gas in the first etching stage, a combination of F2 and BF3 in the second etching stage, and a combination of F2 and C2F6 in the third etching stage, the limitations of traditional single etching processes in achieving high-precision control are overcome. This provides a more refined and controllable etching scheme for the fabrication of high-performance devices, thus effectively expanding the etching process window.

[0045] This application also provides a semiconductor structure obtained using the above-described silicon cavity manufacturing method.

[0046] The specific embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0047] refer to Figure 1 According to a first aspect of this application, embodiments of this application provide a method for manufacturing a silicon cavity, comprising the following steps:

[0048] Step S11: Provide a silicon substrate.

[0049] refer to Figure 2 In some embodiments, the first surface of the silicon substrate 10 ( Figure 2 Integrated circuits, such as transistor structures, can be fabricated on the lower surface of the silicon substrate 10, and this needs to be done on the opposite second surface of the silicon substrate 10. Figure 2 A silicon cavity is fabricated on the upper surface (the middle part is the upper surface).

[0050] In some embodiments, the silicon substrate 10 may be doped to meet the desired electrical properties.

[0051] In some embodiments, by bonding a carrier 13 to a first surface of the silicon substrate 10, the device structure already fabricated on the first surface of the silicon substrate 10 can be protected when a silicon cavity is fabricated on a second surface of the silicon substrate 10.

[0052] In some embodiments, the carrier 13 may be, for example, a glass (SiO2) carrier.

[0053] Step S12: Form a mesh-like organic mask on the surface of a silicon substrate.

[0054] refer to Figure 2 In some embodiments, the silicon substrate 10 is inverted, with the wafer 13 positioned below it. An organic mask layer is then formed on the upper surface (second surface) of the silicon substrate 10, and the organic mask layer is patterned to form a continuously distributed grid of organic masks 12 on the upper surface of the silicon substrate 10. The grid between the organic masks 12 defines etching windows 11, exposing the upper surface of the silicon substrate 10 at the bottom of the etching windows 11. By forming the grid of organic masks 12, a plurality of silicon cavities forming an array can be fabricated on the upper surface of the silicon substrate 10.

[0055] In some embodiments, the organic material includes photoresist. That is, the organic material mask layer includes a photoresist layer, and the organic material mask 12 includes a photoresist mask.

[0056] In some embodiments, a spin coating process is used to form a photoresist layer on the upper surface of the silicon substrate 10. Then, a photolithography process is used to lithographically shape the photoresist layer, thereby forming a mesh-like photoresist pattern, i.e., an organic mask 12, on the upper surface of the silicon substrate 10.

[0057] Step S13: Perform the first etching stage of the etching process to etch the exposed surface of the silicon substrate to form the first cavity.

[0058] In some embodiments, an etching process is performed at a first temperature of less than -10°C, and an organic mask 12 is used as a mask to periodically etch the upper surface of the silicon substrate 10 exposed in the etching window 11 to form a silicon cavity on the silicon substrate 10.

[0059] The etching process includes multiple periodic cyclic steps, sequentially consisting of a deposition step and an etching step. The deposition step involves forming a polymer layer on the sidewalls (surface of the silicon substrate 10) and exposed surfaces (side and top surfaces) of the organic mask 12, using a first gas as the deposition gas, to protect the sidewalls and organic mask 12 during etching. The etching step involves etching the polymer layer and the silicon substrate 10 using a second gas as the etching gas. The etching step may further include a first etching step and a second etching step; the first etching step removes the polymer layer on the bottom surface to allow the second etching step to continue etching downwards onto the silicon substrate 10. By implementing multiple periodic cyclic steps, the silicon substrate 10 is etched multiple times, thereby forming a silicon cavity on the silicon substrate 10.

[0060] The first gas includes CH4, CHF3 and H2.

[0061] The second gas includes F2, as well as N2, BF3 and C2F6.

[0062] Furthermore, the etching process includes a first etching stage, a second etching stage, and a third etching stage that are sequentially connected, which are used for the top, middle, and bottom of the silicon cavity, respectively.

[0063] This step is used to perform the first etching stage of the etching process at an ultra-low temperature (first temperature) of less than -10°C to form the top of the silicon cavity.

[0064] refer to Figure 3 In some embodiments, the first etching stage includes multiple periodic cyclic steps formed sequentially by a deposition step and an etching step. First, a deposition step is performed using a first gas as the deposition gas to deposit a polymer layer 14 on the surface of the silicon substrate 10 and the exposed surface of the organic mask 12 to protect the silicon substrate 10 and the organic mask 12 during the subsequent etching step. A plasma of the first gas is obtained by ionizing the first gas introduced into the process chamber, which is then used to deposit the polymer layer 14.

[0065] Traditionally used deposition gas C4F8 is a large molecule gas. When depositing polymers on the sidewalls, it suffers from significant thickness fluctuations. Furthermore, for silicon cavities with large absolute etching depths, insufficient thickness leads to inadequate protection of the bottom sidewalls, easily causing side-holeing, while excessive thickness easily results in "grass-like" defects. This application, by using small-molecule CH4, CHF3, and H2 instead of the traditional large-molecule C4F8 as the deposition gas and maintaining the initial etching temperature below -10°C, offers the following core advantages in high-density and deep silicon cavity etching:

[0066] (1) Better sidewall protection quality: It can form a polymer layer 14 (aC:H:F cross-linked polymer layer) with a lower fluorocarbon ratio, higher density and higher degree of cross-linking.

[0067] (2) Reduce damage to organic mask 12: The use of small molecule deposition gas reduces the physical bombardment and chemical erosion of organic mask 12 by high-energy ions, protecting critical dimensions.

[0068] This application uses a mixed gas system of CH4, CHF3, and H2 (excluding C4F8), which generates an extremely rich chemical environment in plasma, producing more complex and superior products: it can generate a large number of small-sized free radicals such as CH3•, CH2•, CF•, CF2•, and H•. These active groups, aided by ion bombardment, adsorb and react on the sidewalls and bottom of the silicon material, forming a dense aC:H:F cross-linked polymer film (amorphous carbon film). The aC:H:F film is an amorphous hydrocarbon fluoropolymer whose structure is no longer linear but a highly cross-linked three-dimensional network structure.

[0069] Traditional deep silicon etching uses C4F8 as the deposition gas to form a polymer. When this polymer dissociates in the plasma, it generates a large number of CF2 free radicals and other large fluorocarbon groups (such as CF3, C2F5, etc.). This polymer has a "loose" Teflon-like structure, mainly composed of linear -CF2-CF2- chains. This structure is relatively loose and has weak mechanical strength. Furthermore, the polymer formed by C4F8 deposition gas has a high F / C ratio and contains a large amount of fluorine (F), making it more similar to Teflon and chemically inert, but not robust enough as an etching barrier layer.

[0070] This application's embodiments utilize a small-molecule deposition system formed by a combination of CH4, CHF3, and H2, exhibiting a low F / C ratio and a high H / C ratio. The introduction of H plays a crucial role in the following aspects:

[0071] (a) Termination of dangling bond: H atoms can combine with dangling bonds in the carbon chain to form stable CH bonds, making the polymer layer 14 structure more complete.

[0072] (b) Promote cross-linking: -CH2- and -CH- groups can be used as cross-linking points to tightly connect carbon chains together to form aC:H:F cross-linked polymer layer with a highly cross-linked three-dimensional network structure. Therefore, the polymer layer 14 formed on the sidewall has a better blocking effect and can effectively avoid lateral etching.

[0073] Therefore, the aC:H:F crosslinked polymer layer formed through the embodiments of this application has a highly crosslinked structure, which will be more dense and hard when deposited on the sidewall, and has excellent resistance to physical sputtering and chemical etching.

[0074] When the small molecule deposition gas system of this application embodiment cooperates with the organic mask 12, the following advantages will also be achieved:

[0075] (1) Reduce organic matter mask 12 loss:

[0076] In terms of chemistry: the traditional C4F8 deposition gas system generates a large number of F atoms, which chemically erode the organic mask 12 (the main component of the photoresist is a hydrocarbon polymer), causing the organic mask 12 to be consumed too quickly. However, in the small molecule system of CH4, CHF3 and H2 in the embodiments of this application, the addition of H2 "removes" a certain amount of F atoms, forming stable HF, which greatly reduces the chemical erosion of the organic mask 12.

[0077] From a physical perspective: the plasma conditions required for small molecule deposition are generally milder than those for large molecules, and the ion energy is relatively low, which reduces the physical sputtering of the organic material mask 12.

[0078] (2) Suppressing the bowing morphology:

[0079] The formation mechanism of drum-shaped defects: During the etching process, if the sidewall protective layer (polymer layer 14) is not strong enough, high-energy particles and free radicals from the plasma will laterally erode the sidewall from the top opening. The closer to the top, the stronger the bombardment and the cumulative effect over time, which leads to the sidewall being hollowed out and forming a drum shape.

[0080] Therefore, the robust protective layer (aC:H:F cross-linked polymer layer) formed by the small molecule deposition gas system of this application embodiment can effectively resist this lateral erosion. Thus, only a thin deposition thickness is required to effectively avoid lateral etching and prevent the occurrence of "grass-like" defects. Furthermore, since the polymer layer 14 can extend all the way to the bottom, it ensures that the etching rate is anisotropic from top to bottom, thereby maintaining the vertical sidewall morphology.

[0081] In some embodiments, the flow ratio of CH4, CHF3, and H2 in the deposition gas is CH4:CHF3:H2 = 1:2:3 to 1:5:10, and the flow ratio of CHF3 can vary continuously between 2 and 5, and the flow ratio of H2 can vary continuously between 3 and 10. However, it is not limited to this.

[0082] After the polymer layer 14 is formed, an etching step is performed at a first temperature, using a small molecule second gas as the etching gas to etch the polymer layer 14 and the silicon substrate 10.

[0083] refer to Figure 4In some embodiments, at an ultra-low temperature (first temperature) below -10°C, the etching steps included in the etching process are continued, and a combination of F2 and N2 is used as the etching gas to etch the polymer layer 14 and silicon substrate 10 formed in the previous step. By ionizing the F2 and N2 introduced into the process chamber, an F2 and N2 plasma is obtained, which is used to etch the polymer layer 14 and silicon substrate 10. Further, through the first etching step and the bombardment of the F2 and N2 plasma, the polymer layer 14 at the bottom of the etching window 11 is removed, and then through the second etching step, the exposed silicon substrate 10 is etched downwards using the F2 and N2 plasma. By implementing multiple periodic cycles of the etching process, a first cavity 15 with a certain etching depth is first formed on the upper surface of the silicon substrate 10 (after etching, the polymer layer 14 remains on the sidewalls of the organic mask 12 and the sidewalls of the etched structure). Figure 4 (This has been omitted). The first cavity 15 corresponds to the top of the silicon cavity to be formed.

[0084] In the first etching stage, when using a combination of F2 and N2 as the etching gas, the main reactive groups are: F•, N•. + N2 + N2 can dilute F2, preventing excessive reaction, and can form a stable plasma. This can mitigate the severe etching behavior in the top region caused by sheath instability and mask edge effects during the initial etching stage, effectively ensuring the stability of critical dimensions at the top. It can also reduce ion sputtering damage during etching, improving the protection of the organic mask 12. Furthermore, N... + N2 + It is a light ion, which can efficiently transfer energy to the bottom and minimize sputtering damage.

[0085] In some embodiments, during the first etching stage, plasma formed by N2 in the introduced second gas is also used to perform a first treatment on the sidewall of the first cavity 15 being formed, forming an extremely thin nitride layer on the sidewall, which assists in passivating the surface of the sidewall, preventing excessive lateral etching, improving the verticality of the top of the sidewall, thereby further improving the fidelity of the etched pattern, and thus enabling a more vertical sidewall to be obtained.

[0086] In some embodiments, when using a combination of F2 and N2 as the etching gas, the flow ratio of F2 to N2 is F2:N2 = 5:1 to 10:1. For example, the flow ratio of F2 to N2 can be 5:1, 6:1, 7:1, 8:1, 9:1, or 10:1, and the flow ratio of F2 can vary continuously between 5 and 10. However, it is not limited to this. N2 serves to provide light ions and stabilize the plasma, and within the above flow ratio range, excessive dilution of F2 can be avoided to prevent a decrease in the etching rate.

[0087] Step S14: Perform the second etching stage of the etching process, etch the bottom of the first cavity, and form a second cavity below the first cavity.

[0088] In some embodiments, by performing a deposition step in the etching process at a first temperature and using the aforementioned small-molecule first gas as the deposition gas, a polymer layer 14 is deposited again on the surface of the silicon substrate 10 (i.e., the inner wall of the first cavity 15 formed in the previous step) and on the exposed surface of the organic mask 12, such as... Figure 5 As shown, this is to protect the sidewalls of the first cavity 15 and the organic mask 12 during subsequent etching steps. Then, at a first temperature, using F2 and BF3 as etching gases, the etching steps in the etching process are performed to etch the polymer layer 14 and the silicon substrate 10. That is, through the first etching step, and through the bombardment of F2 and BF3 plasma, the polymer layer 14 on the bottom of the first cavity 15 is first removed, and then through the second etching step, the silicon material exposed at the bottom of the first cavity 15 is etched downwards by F2 and BF3 plasma. By performing multiple periodic cycles of the etching process, a second cavity 16 is formed below the first cavity 15, as shown. Figure 6 As shown ( Figure 6 The original bottom of the first cavity 15 is represented by a horizontal dashed line. After the etching step, residual polymer layers 14 remain on the sides of the organic mask 12 and the sidewalls of the first cavity 15 and the second cavity 16. Figure 6 (This has been omitted). The second cavity 16 corresponds to the middle of the silicon cavity to be formed.

[0089] When using a combination of F2 and BF3 as the etching gas, the main reactive groups are: F•, BF2. + BF + F2 exhibits high reactivity, providing an abundant primary etchant that not only reduces reliance on physical bombardment but also enhances the etching rate. BF x + It is a light ion, which can efficiently transfer energy to the bottom and enhance the etching reaction. At the same time, due to its light weight, it has a lower physical sputtering yield on the material, reducing physical damage to the bottom silicon and back sputtering of the top photoresist.

[0090] In some embodiments, during the second etching stage, plasma formed by BF3 in the introduced second gas is also used to perform a second treatment on the polymer layer 14 (aC:H:F crosslinked polymer layer) to change the properties of the polymer layer 14 by incorporating B element, thereby enhancing the resistance of the polymer layer 14 to lateral etching, thereby further improving the verticality and dimensional uniformity of the sidewalls and improving the quality of the etched middle section.

[0091] In some embodiments, when the etching gas uses a combination of F2 and BF3, the flow rate ratio of F2 to BF3 is F2:BF3 = 8:1 to 20:1. For example, the flow rate ratio of F2 to BF3 can be 8:1, 9:1, 10:1, 12:1, 15:1, 18:1, or 20:1, and the flow rate ratio of F2 can vary continuously between 8 and 20. However, it is not limited to this. BF3 is mainly used to introduce boron (B) and light ions.

[0092] Step S15: Perform the third etching stage of the etching process to etch the bottom of the second cavity and form a third cavity below the second cavity to form a silicon cavity.

[0093] In some embodiments, by performing a deposition step in the etching process at a first temperature and using the aforementioned small-molecule first gas as the deposition gas, a polymer layer 14 (not shown) is deposited again on the surface of the silicon substrate 10 (i.e., the inner walls of the first cavity 15 and the second cavity 16 formed in the previous step) and the exposed surface of the organic mask 12, so as to protect the sidewalls and the organic mask 12 during subsequent etching steps. Then, at the first temperature, using F2 and C2F6 as etching gases, an etching step in the etching process is performed to etch the polymer layer 14 and the silicon substrate 10. That is, through the first etching step and the bombardment of F2 and C2F6 plasma, the polymer layer 14 on the bottom of the second cavity 16 is first removed, and then through the second etching step, the silicon material exposed at the bottom of the second cavity 16 is etched downward through the F2 and C2F6 plasma. By implementing multiple periodic cycles of the etching process, a third cavity 17 is formed below the second cavity 16, as shown below. Figure 7 As shown ( Figure 7 Two horizontal dashed lines represent the original bottoms of the first cavity 15 and the second cavity 16, respectively. After the etching step, residual polymer layers 14 remain on the sides of the organic mask 12 and the sidewalls of the first cavity 15, the second cavity 16, and the third cavity 17. Figure 7 (The details are omitted). The third cavity 17 corresponds to the bottom of the silicon cavity. Thus, a silicon cavity 18, consisting of the successive first cavity 15, second cavity 16, and third cavity 17, is formed on the silicon substrate 10, as shown below. Figure 7 As shown.

[0094] In some embodiments, when performing the third etching stage, plasma formed by C2F6 in the introduced second gas is also used to provide a higher carbon-fluorine ratio to enhance deposition and effectively suppress lateral etching of the bottom sidewall, thereby eliminating the problem of bottom side-cutting.

[0095] Therefore, the embodiments of this application, by performing the etching process in stages, not only overcome the limitations of traditional single etching processes in achieving high-precision control, but also provide a more refined and controllable etching scheme for the manufacturing of high-performance devices, effectively expanding the etching process window.

[0096] In some embodiments, when the etching gas uses a combination of F2 and C2F6, the flow rate ratio of F2 to C2F6 is F2:C2F6 = 10:1 to 20:1. For example, the flow rate ratio of F2 to C2F6 can be 10:1, 11:1, 13:1, 15:1, 19:1, or 20:1, and the flow rate ratio of F2 can vary continuously between 10 and 20. However, it is not limited to this. C2F6 has strong depositivity, and within the above flow rate range, the problem of polymer blockage at the etching tip can be avoided.

[0097] In some embodiments, the first temperature is -85°C to -10°C. For example, the first temperature can be -85°C, -80°C, -70°C, -60°C, -50°C, -40°C, -30°C, -20°C, -15°C, or -10°C, or any value between any two of the aforementioned temperature values. However, it is not limited to these.

[0098] In some embodiments, the deposition step is performed over a period of 1 to 3 seconds. For example, the deposition step can be performed over a period of 1 second, 2 seconds, or 3 seconds, or any value between any two of the aforementioned time values. However, it is not limited to these two time values.

[0099] In some embodiments, the total time for performing the etching step is 2s to 6s, wherein the time for the first etching step and the second etching step are 1s to 3s, respectively. For example, the time for performing the first etching step or the second etching step can be 1s, 2s, or 3s, or any value between any two of the aforementioned time values. However, it is not limited to this.

[0100] When this application uses smaller molecule fluorine gas (F2) and its mixtures (combinations of F2 and N2, F2 and BF3, and F2 and C2F6) as etching gases to replace the traditional large molecule SF6 gas, the diffusion is more uniform, which is more conducive to reaching the bottom for etching reaction. By mixing F2 with other gases (nitrogen or fluorine-containing gases), various etching gases with different effects can be formed, thus achieving superior etching depth. Furthermore, although SF6 has six F atoms, only one F ion can dissociate to participate in the etching reaction; the remaining SF5 does not participate in the reaction and is thus extracted. F2 gas, on the other hand, can dissociate to produce two F ions, participating in more reactants than SF6, which can increase the etching rate, especially for etching structures at high depths (e.g., greater than 100 µm), significantly improving the machine's throughput.

[0101] Therefore, by employing the aforementioned small-molecule etching and deposition gases, this embodiment effectively increases the diffusion coefficient and improves the transport efficiency of the reaction gas. It also resolves the impact of thickness fluctuations in the C4F8 polymer on the control of sidewall perpendicularity, effectively improving the uniformity and roughness of the local polymer. This results in etching of silicon cavity structures with superior uniformity, better sidewall smoothness, and greater depth. Furthermore, using a mixed gas of F2 as the etching gas significantly enhances the etching rate and etching behavior at higher depths.

[0102] This application embodiment, by changing the etching gas from traditional SF6 to a combination of small-molecule F2 mixed gases, can better adapt to the needs of advanced processes. By optimizing reaction chemistry and plasma physics, significant performance improvements are achieved in molecular transport, reaction efficiency, and morphology control, which is a key technical path to achieve high-depth silicon cavity etching.

[0103] The differences between using a mixture of F2 and other gases as an etching gas and using traditional SF6 as an etching gas include:

[0104] (1) It can efficiently generate high-density F atoms: it provides abundant main etchant (F atoms) through a more efficient dissociation path.

[0105] (2) Excellent ion transport capability: Small molecule reactants and products have a longer mean free path, which can reach the bottom of a very deep depth, ensuring the bottom etching rate.

[0106] (3) Precise control of ion energy and angle: The generated ions are lighter and have a more concentrated energy distribution, achieving the ultimate anisotropic etching, which can significantly improve the flatness of the bottom of the silicon cavity 18 and obtain more vertical sidewalls, while reducing damage to the organic mask 12.

[0107] The common advantage mechanism of small molecule groups in the etching gas of the above-described embodiments of this application in the etching step may include:

[0108] (1) Higher F atom density and deep hole penetration capability: The dissociation energy of small molecule gases is usually lower than that of SF6, and under the same plasma conditions, a higher concentration of F atoms can be generated. F atoms and small molecule ions are lightweight and have a long mean free path, which can effectively diffuse to the bottom and maintain the etching rate at the bottom.

[0109] (2) Better Ion-Assisted Etching: The essence of etching is "ion-enhanced chemical etching." Removal of bottom silicon requires: a) chemical reaction by F atoms; b) ion bombardment to provide energy, break Si-Si bonds, and sputter away byproducts. Lighter ions are more efficient than SF4. x +Heavy ions can transfer energy to the bottom surface more effectively, enhancing the etching reaction; at the same time, due to their light weight, the physical sputtering yield of the material is lower, reducing physical damage to the bottom silicon and back-side sputtering of the top organic mask 12.

[0110] (3) Suppressing drum-shaped morphology: Drum-shaped morphology is caused by local failure of the sidewall protective layer, leading to lateral etching of silicon by F atoms and ions from the sides. The advantages of small molecule systems are: a) Higher F atom density means that the deposition step can be switched more quickly, avoiding lateral etching caused by long etching steps; b) Certain gases (such as N2) can assist in sidewall passivation; c) A more concentrated vertical ion beam reduces laterally scattered ions. The combined effect of these three factors ensures that etching is carried out primarily in the vertical direction.

[0111] (4) Reduced consumption of organic mask 12 due to physical bombardment: The ions generated by the small molecule system are lighter and have lower momentum than the heavy ions generated by SF6 under the same bias voltage. Therefore, the physical sputtering rate of organic mask 12 is significantly reduced, resulting in less consumption of organic mask 12 and improved pattern fidelity.

[0112] (5) Reduce the consumption of organic mask 12 caused by chemical erosion: Although F atoms will erode organic mask 12, the small molecule system shortens the overall process time through higher etching efficiency, which indirectly reduces the cumulative exposure time of organic mask 12.

[0113] In some embodiments, after each consecutive deposition and etching step, scallop-shaped stripes (not shown) are regularly formed on the sidewall. Each scallop-shaped stripe has a recess at its bottom and a protrusion at the junction of two scallop-shaped stripes, resulting in a rough surface morphology on the sidewall. Therefore, in this embodiment, after each consecutive deposition and etching step, a third treatment step is incorporated at a second temperature below -10°C to promptly remove excess polymer layer 14 on the sidewall, preventing uneven etching caused by excessive polymer thickness. This third treatment also removes at least some of the protrusions, reducing the roughness of the sidewall and improving its smoothness.

[0114] In some embodiments, the third process specifically includes: using plasma of HBr and O2 (third gas) to react with polymer layer 14 to remove part of the thickness of polymer layer 14 deposited on the sidewall, so as to adjust the thickness uniformity of polymer layer 14 on the sidewall, and reacting with silicon material on the surface of the exposed protrusions on the sidewall to generate silicon tetrabromide layer and silicon dioxide layer (reaction product layer); subsequently, stopping the introduction of HBr and O2, and using plasma of CF4 and Ar (fourth gas) to bombard the sidewall to etch and remove silicon dioxide on the protrusions, and desorbing tetrabromosilane and removing it from the sidewall, thereby removing at least part of the protrusions by removing the reaction product layer, and forming a smoother new sidewall, making the sidewall smoother, thereby reducing the roughness of the sidewall surface, and effectively avoiding the local rough peaks (Ra>5nm) caused by the random deposition of polymer on the sidewall in the past.

[0115] By alternating between the periodic cycles of deposition and etching steps and the third processing step, the etching rate and sidewall quality can be balanced, thereby achieving high etching rate and high etching precision (atomic level precision). It can also effectively improve the uniformity and roughness of local polymers, solve the linewidth offset (titling) problem, achieve higher verticality (90°±0.2°), and achieve better uniformity (uniform size of the upper, middle and lower positions of the silicon cavity) and better sidewall smoothness.

[0116] In some embodiments, during the third processing, plasma formed by HBr in the third gas can also be used to perform a fourth processing on the exposed surface of the organic mask 12. This fourth processing causes the chemical bonds in the organic mask material on the surface to break and recombine, forming polymer chains and creating a modified layer on the surface of the organic mask 12. This improves the etching resistance of the organic mask 12 by changing the C / H ratio on the surface of the organic mask material. The fourth processing is performed simultaneously with the third processing.

[0117] Furthermore, plasma formed from O2 in the third gas can be used to perform a fifth treatment on the exposed surface of the organic mask 12, causing slight oxidation of the exposed surface of the organic mask 12 below -10°C and triggering a reaction by deep ultraviolet light in the environment to form a hardened layer. The modified layer and the hardened layer can together form the first protective layer. The fifth treatment is completed simultaneously during the third treatment.

[0118] Furthermore, plasma formed from CF4 in the fourth gas can be used to perform a sixth treatment on the exposed surface of the organic mask 12, forming a carbon-containing protective film on the exposed surface of the organic mask 12 as a second protective layer. This sixth treatment is performed simultaneously with the third treatment.

[0119] By performing the above-mentioned multiple treatments on the organic mask 12, the consumption rate of the organic mask 12 can be reduced, and the etching barrier capability of the organic mask 12 can be improved. Therefore, the surface quality and dimensional accuracy of the organic mask 12 are effectively guaranteed, which not only significantly improves the selectivity of the organic mask 12, but also enables the acquisition of more vertical sidewalls, thus having a positive impact on achieving etching of silicon cavities with higher etching depth and larger size.

[0120] In some embodiments, the second temperature is -85°C to -10°C. For example, the second temperature can be -85°C, -80°C, -70°C, -60°C, -50°C, -40°C, -30°C, -20°C, -15°C, or -10°C, or any value between any two of the aforementioned temperature values. However, it is not limited to these.

[0121] In some embodiments, the third process is performed for 2 to 4 seconds. Furthermore, the time for introducing HBr and O2 is the same as the time for introducing CF4 and Ar, each for 1 to 2 seconds. However, this is not a limitation.

[0122] Step S16: Remove the organic mask.

[0123] refer to Figure 8 In some embodiments, after the silicon cavity 18 is formed, the upper surface of the silicon substrate 10 is bombarded with a plasma of a fifth gas to remove the organic mask 12 from the upper surface of the silicon substrate 10. The plasma of the fifth gas is obtained by ionizing the fifth gas introduced into the process chamber.

[0124] In some embodiments, the fifth gas includes an oxidizing gas. The oxidizing gas may be, for example, oxygen, and nitrogen may be introduced simultaneously as a diluent gas.

[0125] Next, remove slide 13.

[0126] After removing the organic mask 12 and the carrier 13, a silicon substrate 10 with its upper surface exposed and silicon cavities 18 formed is obtained, as shown below. Figure 8 As shown.

[0127] According to a second aspect of this application, embodiments of this application also provide a semiconductor structure obtained using a silicon cavity manufacturing method as provided in any of the embodiments of the first aspect above.

[0128] refer to Figure 8 In some embodiments, the semiconductor structure includes a silicon substrate 10 and a silicon cavity 18 formed on the upper surface of the silicon substrate 10.

[0129] In some embodiments, the semiconductor structure (silicon cavity 18) can be applied to MEMS devices (such as MEMS microphones, etc.).

[0130] In a third aspect, embodiments of this application also provide a plasma processing apparatus for performing the silicon cavity manufacturing method corresponding to the above embodiments to form the silicon cavity 18 (semiconductor structure) corresponding to the above embodiments. The plasma processing apparatus includes inductively coupled plasma (ICP) etching equipment or capacitively coupled plasma (CCP) etching equipment, etc.

[0131] In other aspects, embodiments of this application also provide an electronic device, including a silicon cavity 18 (semiconductor structure) obtained using the silicon cavity manufacturing method of the above embodiments. The electronic device can be a storage device, mobile phone, computer, tablet computer, electronic instrument, television, artificial intelligence device, etc.

[0132] In summary, by using small molecule gases (first gas and second gas) instead of traditional large molecule gases such as C4F8 and SF6 as deposition and etching gases, this application can increase the diffusion coefficient and improve gas transport efficiency, enabling more uniform diffusion of the deposition and etching gases. This facilitates uniform deposition and etching reactions during the formation of the silicon cavity 18, significantly reduces physical sputtering of the organic mask 12, thus reducing the consumption of the organic mask 12. Furthermore, the higher etching efficiency shortens the overall process time, indirectly reducing the cumulative exposure time of the organic mask 12, thereby improving the protection capability of the organic mask 12 and increasing the selectivity. Furthermore, by keeping the etching temperature (first temperature) below -10°C, the chemical kinetics can be altered to enhance physical adsorption and reduce the reaction rate. This allows the polymer layer 14 to be more densely and uniformly adsorbed on the sidewalls, effectively protecting the sidewalls even at the bottom of the silicon cavity 18 and effectively suppressing lateral etching, preventing bottom side-cutting. This improves the reliability and uniformity of sidewall protection, resulting in extremely vertical sidewall morphologies. Simultaneously, small-molecule etching gases can significantly enhance the etching rate and etching behavior at high depths.

[0133] The above are merely preferred embodiments of this application. These embodiments are not intended to limit the scope of protection of this application. Therefore, any equivalent changes made based on the description and drawings of this application should also be included within the scope of protection of this application.

Claims

1. A method for manufacturing a silicon cavity, characterized in that, include: Provide silicon substrates; A grid-like organic mask is formed on the surface of the silicon substrate, and the grid defines the etching windows; An etching process is performed at a first temperature of less than -10°C to etch the surface of the silicon substrate exposed in the etching window, thereby forming a silicon cavity on the silicon substrate. The etching process includes multiple periodic cyclic steps formed sequentially by deposition and etching steps; The deposition step uses a first gas as the deposition gas to form a polymer layer on the sidewalls of the forming silicon cavity and the exposed surface of the organic mask, so as to protect the sidewalls and the organic mask during etching. The etching step uses a second gas as the etching gas to etch the polymer layer and the silicon substrate; the first gas includes CH4, CHF3 and H2, and the second gas includes F2, as well as N2, BF3 and C2F6; The etching process includes a first etching stage, a second etching stage, and a third etching stage connected in sequence, which are used to form the top, middle, and bottom of the silicon cavity connected in sequence, respectively. The first etching stage uses F2 and N2 as etching gases, the second etching stage uses F2 and BF3 as etching gases, and the third etching stage uses F2 and C2F6 as etching gases.

2. The method for manufacturing a silicon cavity according to claim 1, characterized in that, The polymer layer includes an aC:H:F crosslinked polymer layer. By adding H2 to the first gas, H atoms combine with the dangling bonds of the carbon chains in the polymer to form stable CH bonds. The carbon chains are tightly connected together using -CH2- and -CH- groups as crosslinking points, which promotes the increase of crosslinking degree and forms an aC:H:F crosslinked polymer layer with a highly crosslinked three-dimensional network structure.

3. The method for manufacturing a silicon cavity according to claim 1, characterized in that, The flow rate ratio of CH4, CHF3 and H2 in the first gas is: CH4:CHF3:H2 = 1:2:3 to 1:5:

10.

4. The method for manufacturing a silicon cavity according to claim 1, characterized in that, During the first etching stage, plasma formed by N2 in the introduced second gas is also used to perform a first treatment on the sidewall, forming a nitride layer on the sidewall to assist in passivation of the sidewall surface.

5. The method for manufacturing a silicon cavity according to claim 1, characterized in that, During the second etching stage, plasma formed by BF3 in the introduced second gas is also used to perform a second treatment on the polymer layer to change the properties of the polymer layer and enhance its resistance to lateral etching.

6. The method for manufacturing a silicon cavity according to claim 1, characterized in that, During the third etching stage, plasma formed by C2F6 in the introduced second gas is also used to provide a higher carbon-to-fluorine ratio to suppress lateral etching of the bottom of the sidewall.

7. The method for manufacturing a silicon cavity according to claim 1, characterized in that, During the first etching stage, the flow ratio of F2 to N2 in the second gas is F2:N2 = 5:1 to 10:1; and / or, during the second etching stage, the flow ratio of F2 to BF3 in the second gas is F2:BF3 = 8:1 to 20:1; and / or, during the third etching stage, the flow ratio of F2 to C2F6 in the second gas is F2:C2F6 = 10:1 to 20:

1.

8. The method for manufacturing a silicon cavity according to claim 1, characterized in that, Also includes: After each of the deposition and etching steps performed once or twice consecutively, a third treatment is performed on the sidewall at a second temperature less than -10°C. This includes using HBr and O2 as third gases to remove a portion of the thickness of the polymer layer deposited on the sidewall and reacting it with the silicon substrate material on the exposed surface of the protrusions on the sidewall to generate a reaction product layer, and using CF4 and Ar as fourth gases to remove the reaction product layer to remove at least a portion of the protrusions.

9. The method for manufacturing a silicon cavity according to claim 8, characterized in that, During the third treatment, plasma formed by HBr in the third gas is also used to perform a fourth treatment on the exposed surface of the organic mask, forming a modified layer on the surface of the organic mask. Furthermore, plasma formed by O2 in the third gas is used to perform a fifth treatment on the exposed surface of the organic mask, causing oxidation of the exposed surface at -10°C and triggering a reaction by deep ultraviolet light in the environment to form a hardened layer. The modified layer and the hardened layer together form a first protective layer. Finally, plasma formed by CF4 in the fourth gas is used to perform a sixth treatment on the exposed surface of the organic mask, forming a carbon-containing protective film on the exposed surface of the organic mask as a second protective layer.

10. A semiconductor structure, characterized in that, It is obtained using the manufacturing method of the silicon cavity as described in any one of claims 1-9.

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