Micro-channel heat dissipation structure and preparation method thereof

Abstract

The invention relates to a micro-channel heat dissipation structure and a preparation method thereof. The structure comprises a glass substrate, wherein a plurality of TGV through holes vertically penetrate through the glass substrate; the first heat dissipation layer is configured to dissipate heat of the chip; and the second heat dissipation layer is configured to dissipate heat of the TGV through hole, the second heat dissipation layer is arranged below the first heat dissipation layer, and the second heat dissipation layer is communicated with the first heat dissipation layer. The preparation method comprises the following steps: preprocessing the chip and the glass substrate; and etching the glass substrate to form a first micro-channel and a second micro-channel. Aiming at a chip high-density heat source and TGV peripheral local hot spots, a high-density chip area-TGV annular peripheral area two-stage micro-channel layout is adopted, through parameter matching of the width, pitch and depth of the micro-channel, a convective heat transfer coefficient and flow resistance are balanced, the heat dissipation efficiency of unit volume is improved, the heat dissipation efficiency is improved by more than 30% compared with that of a plane structure, and the heat dissipation efficiency is improved by more than 30%. And the compact heat dissipation requirement of 3D integrated packaging is met.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and relates to a micro-channel heat dissipation structure and a preparation method thereof, in particular to a multi-layer partition micro-channel heat dissipation structure for a TGV chip and a preparation method thereof. BACKGROUND

[0002] In today's era of rapid development of science and technology, the semiconductor industry is undergoing unprecedented changes. The integration of chips is like a high-speed train, advancing rapidly. With each increase in chip integration, the computing power and functionality of the chip are greatly expanded, enabling it to handle more complex and massive data tasks. However, this leap in performance is not without cost. The heat generated by the chip during operation has risen sharply, becoming a key bottleneck restricting its further development.

[0003] Especially for TGV (Through Glass Via) chips, it occupies an important position in high-frequency signal transmission, miniaturized packaging and other cutting-edge application scenarios due to its unique structural advantages. With the development of 3D integrated packaging technology, the high-density integration of chips and TGVs leads to a significant increase in local heat flux. The traditional heat dissipation scheme has the following problems:

[0004] 1) Insufficient differential heat dissipation of heat sources: the heat flux of the back of the chip can reach 100-300W / cm 2 , and the outer wall of the TGV is prone to form local high-temperature spots due to the difference in thermal conductivity between the glass substrate (low thermal conductivity, about 1.2W / (m·K)) and the silicon chip (thermal conductivity about 150W / (m·K)). The existing single-structure micro-channel cannot simultaneously meet the high-efficiency heat dissipation needs of the two types of heat sources;

[0005] 2) Uneven flow distribution and uncontrolled pressure drop: the traditional manifold design is prone to uneven flow distribution among micro-channels, resulting in excessively low or high flow rates in local areas, causing heat exchange efficiency to decrease or pump power consumption to increase;

[0006] 3) Lack of three-dimensional integrated heat dissipation network: the layered structure of the glass substrate and the silicon chip lacks an efficient vertical heat conduction path, and the existing planar micro-channel cannot construct a cross-layer heat dissipation network, limiting the improvement of overall heat dissipation performance. SUMMARY

[0007] To solve at least one of the above problems in the prior art, the present application provides a micro-channel heat dissipation structure and a preparation method thereof, specifically a multi-layer partition micro-channel heat dissipation structure for a TGV chip and a preparation method thereof.

[0008] The first aspect of the present application provides a micro-channel heat dissipation structure, comprising:

[0009] A glass substrate with multiple TGV through-holes running vertically through it;

[0010] A first heat dissipation layer, configured to dissipate heat from the chip, is located inside the glass substrate; and

[0011] A second heat dissipation layer is configured to dissipate heat from the TGV through-hole. The second heat dissipation layer is disposed below the first heat dissipation layer and is connected to the first heat dissipation layer.

[0012] Furthermore, the chip is a silicon chip.

[0013] Furthermore, the thickness of the glass substrate is 0.5–1.0 mm; the glass substrate is borosilicate glass (thermal expansion coefficient 3.3 × 10⁻⁶). -6 / ℃).

[0014] Furthermore, the plurality of TGV through holes are arranged in a rectangular array; the diameter-to-depth ratio of the TGV through holes is 1:(1~2).

[0015] Furthermore, the diameter of the TGV through-hole is 50–200 μm and the depth is 100–200 μm.

[0016] Furthermore, it also includes:

[0017] A cooling medium inlet, configured to inject a cooling medium into the microchannel heat dissipation structure; and

[0018] A cooling medium outlet is configured to discharge the cooling medium, and the cooling medium outlet is in communication with the cooling medium inlet.

[0019] Furthermore, the chip is disposed on the glass substrate near the first heat dissipation layer. The first heat dissipation layer includes multiple first microchannels arranged around the TGV vias, and the multiple first microchannels are sequentially connected to form an S-shaped microchannel. The S-shaped microchannel includes an S-shaped microchannel body and a first inlet end and a first outlet end respectively disposed at both ends of the S-shaped microchannel body. The first inlet end is connected to the cooling medium inlet. The first heat dissipation layer maximizes the heat exchange area and increases the local flow rate, directly cooling a heat flux density of 100-300 W / cm². 2 The chip area.

[0020] Furthermore, the S-shaped microchannel is defined as including at least one complete S-shape.

[0021] Further, the plurality of TGV through holes comprises at least two groups of TGV through hole arrays, and the plurality of TGV through hole arrays are arranged at intervals from the cooling medium inlet to the manifold; and the plurality of first microchannels are arranged in an S-shaped curve around the TGV through hole arrays to form the S-shaped microchannels.

[0022] Further, the first microchannels comprise a plurality of first columnar channels and second columnar channels, and the second columnar channels are arc-shaped columnar channels.

[0023] Further, the first columnar channels and the second columnar channels are alternately connected, and the distance between adjacent first columnar channels is a first pitch, and the first pitch is adapted to the spacing between the plurality of TGV through holes.

[0024] Further, the first pitch is 50-150 μm; and the channel width of the first columnar channels and the second columnar channels is 50-100 μm.

[0025] Further, the second heat dissipation layer comprises a plurality of second microchannels, the second microchannels are sleeved outside the TGV through holes, and the plurality of second microchannels are through to form a second microchannel array; and the second microchannel array comprises a second microchannel array body, a second inlet end arranged at one end of the second microchannel array body, and a second outlet end arranged at the other end of the second microchannel array body.

[0026] Further, the second microchannels are columnar structure channels, the second microchannels are arranged below the first microchannels, and the second microchannels are sleeved outside the TGV through holes, and the second microchannels have cavities between the TGV through holes.

[0027] Further, the distance between adjacent second microchannels is a second pitch, and the second pitch is the same as the spacing between the plurality of TGV through holes.

[0028] Further, the second pitch is 150-300 μm; the channel width of the second microchannels is 150-300 μm; and the channel depth of the second microchannels is 100-200 μm. By increasing the channel width, sufficient flow is ensured, the pitch is encrypted to strengthen the convective heat transfer to the TGV side wall, and the local high temperature problem caused by the thermal resistance of the glass substrate is solved.

[0029] Further, the inner walls of the first microchannels and the second microchannels are provided with a hydrophilic coating.

[0030] Further, it further comprises:

[0031] A manifold is configured to communicate the first and second heat dissipation layers, and is connected to the first outlet end and the second inlet end to allow the cooling medium of the first heat dissipation layer to flow to the second heat dissipation layer through the manifold and be discharged from the cooling medium outlet. After the cooling medium enters the first heat dissipation layer from the cooling medium inlet, the cooling medium flows through the first outlet end, the manifold, the second inlet end, the second microchannel, the second outlet end, and the cooling medium outlet in sequence.

[0032] Further, the manifold is a tee-shaped manifold, which includes an inlet branch pipe and first and second outlet branch pipes in communication with the inlet branch pipe, the first outlet end is connected to the inlet branch pipe, and the second inlet end is connected to the first and second outlet branch pipes. The inlet branch pipe uniformly distributes the fluid to the microchannels of the first and second heat dissipation layers. The first and second outlet branch pipes collect the fluid and balance the pressure drops of the branches.

[0033] Further, the first and second outlet branch pipes are symmetrical.

[0034] Further, the width ratio of the inlet branch pipe to the first or second outlet branch pipe is (300-500):(200-400) μm. The flow rate difference of each region is ensured to be ≤5%, and the total pressure drop is controlled to be 10-30 kPa.

[0035] Further, a pump is arranged at the cooling medium inlet and the cooling medium outlet.

[0036] Further, a condensing device is arranged between the cooling medium inlet and the cooling medium outlet to recycle the cooling medium.

[0037] Further, the cooling medium is deionized water or electronic-grade coolant (such as 3M fluorinated liquid) to meet the requirements of insulation and high specific heat capacity.

[0038] Further, the first microchannel uses high flow rate (0.5-1.5 m / s) to enhance the heat exchange of the chip, and the second microchannel uses medium-low flow rate (0.3-1.0 m / s) to uniformly cool the TGV side wall, i.e., the first microchannel (chip back surface) directly cools the chip, and the second microchannel surrounds the TGV outer wall to form a three-dimensional heat dissipation path of "chip→first microchannel→second microchannel→TGV through hole".

[0039] Further, the flow rates of the first and second microchannels are related to the pump and the cross-sectional area of the channel.

[0040] Further, the inner wall of the first microchannel has a moderate roughness (Ra=1-5 μm) to induce turbulent flow to enhance heat exchange while avoiding excessive pressure drop.

[0041] The second aspect of the present application provides a method for preparing a micro-channel heat dissipation structure, comprising the following steps:

[0042] pre-treatment of the chip and the glass substrate; and

[0043] etching the glass substrate to form the first and second micro-channels.

[0044] Further, the pre-treatment of the chip and the glass substrate comprises:

[0045] cleaning the chip: cleaning the back of the chip with an organic solvent (such as acetone), then cleaning with isopropyl alcohol (IPA) to remove contaminants, rinsing with deionized water, and blowing dry with nitrogen; and

[0046] strengthening the glass substrate: soaking the glass substrate in an alkaline solution, heating to a controlled temperature (about 100-150°C) to enhance its mechanical strength, ensuring that it can withstand subsequent processes.

[0047] Further, the etching accuracy is ±5 μm.

[0048] Further, dry etching is used to form the first micro-channel on the glass substrate; the dry etching is reactive ion etching (RIE).

[0049] Further, dry etching or wet etching is used to form the second micro-channel on the glass substrate; the wet etching is hydrofluoric acid etching.

[0050] Further, it further comprises:

[0051] Spraying a hydrophilic coating (contact angle ≤30°) on the inner walls of the first and second micro-channels, thereby enhancing the wettability of the channel walls and improving the heat transfer performance.

[0052] Further, the hydrophilic coating is a silica nano-coating.

[0053] Further, it further comprises:

[0054] The chip and the glass substrate are bonded by anode bonding to mount the chip on the glass substrate, so that the chip and the glass substrate are tightly bonded without gaps, realizing glue-free packaging, and the interface thermal resistance is ≤0.1 m 2 ·K / W.

[0055] Further, in the anode bonding, the voltage is 500-1000 V and the temperature is 300-400°C. This process can ensure tight bonding between the two without the use of glue, thereby forming a high-strength, reliable connection and maintaining a low thermal resistance.

[0056] Further, the bonding area edge of the chip and the glass substrate is sealed to prevent fluid leakage. The sealing process can be completed using a sealant, a polymer-based adhesive, or a resin cured by ultraviolet light.

[0057] Further, the first microchannel inner wall is chemically etched to form a micron-level rough structure (Ra = 1-5 μm), which can promote turbulent flow in the cooling liquid and enhance convective heat transfer.

[0058] Further, the first microchannel inner wall is chemically etched to form a micron-level rough structure (Ra = 1-5 μm), which can promote turbulent flow in the cooling liquid and enhance convective heat transfer.

[0059] A metal or polymer joint is bonded at the manifold inlet and outlet positions to connect the external pumping and cooling circuit. The joint is ensured to be firm to avoid fluid leakage.

[0060] The working principle of the high-efficiency heat dissipation technology for TGV chips based on the microchannel thermosyphon principle is as follows:

[0061] When the TGV chip generates heat during operation, the high-density heat flow at the back of the chip is quickly conducted to the multi-layer partitioned microchannel heat dissipation structure through the low interfacial thermal resistance between the chip and the glass substrate. The high-flow-rate cooling liquid in the first microchannel of the first heat dissipation layer directly flushes the back of the chip, absorbing a large amount of heat through strong convective heat transfer; at the same time, the second microchannel cooling liquid in the second heat dissipation layer (TGV annular peripheral zone) uniformly cools the glass substrate, breaking through the low thermal conductivity bottleneck. After the flow is evenly distributed by the symmetrical manifold, the heat is transmitted from the upper chip area to the lower TGV area, and finally collected and discharged. In this process, the upper high-flow-rate (0.5-1.5 m / s) carries the core heat of the chip, the lower medium-low flow-rate (0.3-1.0 m / s) uniformly diffuses the heat, the transition buffer zone smooths the heat flow and pressure drop, and the convective effect enhanced by wall treatment, forming a high-efficiency three-dimensional heat dissipation cycle, continuously ensuring the stable operating temperature of the chip and the TGV through hole.

[0062] The present application has at least the following advantages: 1) the present application adopts a two-level microchannel layout of "high-density chip area-TGV annular peripheral area" for the high-density heat source of the chip and the local hot spot of the TGV periphery, and realizes differentiated efficient heat exchange through geometric parameter optimization, which is different from the traditional single-structure microchannel. The present application is targeted at two types of differentiated heat sources of the chip and the TGV, and realizes efficient heat dissipation of the two typical heat sources in the same liquid cooling system through the partition design of "high-density direct cooling + annular enhancement", solves the problem of local hot spot of the TGV caused by the low thermal conductivity of the glass substrate, and can reduce the TGV side wall temperature by 5-8 DEG C compared with the traditional scheme; 2) the present application constructs a microchannel network of the chip glass substrate, realizes cross-layer fluid coupling, ensures uniform distribution of flow in each area through the symmetric manifold structure, controls the system pressure drop within the pumping capacity range, ensures that the flow velocity uniformity error of each area is less than or equal to 5%, and controls the total pressure drop within the rated range of the pump, which takes into account the optimization of heat exchange efficiency and power consumption, and reduces the pumping power consumption by 15% compared with the traditional asymmetric manifold scheme; 3) the present application matches the microchannel width, pitch and depth parameters, balances the convective heat transfer coefficient and flow resistance, improves the heat dissipation efficiency per unit volume, and improves the heat dissipation efficiency by more than 30% compared with the plane structure, which meets the compact heat dissipation demand of 3D integrated packaging; 4) the present application adopts mature dry etching / wet etching, anode bonding process, and is compatible with glass-silicon hybrid substrate processing. The wall coating and roughness control can improve the heat exchange while avoiding the surge of manufacturing complexity, and is suitable for large-scale production, and provides a universal heat dissipation solution for high-density 3D packaging. BRIEF DESCRIPTION OF DRAWINGS

[0063] In order to further illustrate the above and other advantages and features of the embodiments of the present application, more detailed description of the embodiments of the present application will be presented with reference to the accompanying drawings. It can be understood that these drawings only depict typical embodiments of the present application, and therefore should not be considered as limiting the scope thereof. In the drawings, the same or corresponding parts will be denoted by the same or similar reference numerals for the sake of clarity.

[0064] Figure 1 A structural schematic diagram of the microchannel heat dissipation structure in some embodiments of the present application is shown;

[0065] Figure 2 A structural schematic diagram of the microchannel heat dissipation structure in some embodiments of the present application is shown;

[0066] Figure 3 A front view of the microchannel heat dissipation structure in some embodiments of the present application is shown;

[0067] Figure 4 A side view of the microchannel heat dissipation structure in some embodiments of the present application is shown;

[0068] Figure 5 A top view of the microchannel heat dissipation structure in some embodiments of the present application is shown;

[0069] Reference signs:

[0070] 1 - glass substrate, 2 - first heat dissipation layer, 201 - first microchannel, 3 - second heat dissipation layer, 301 - second microchannel, 4 - cooling medium inlet, 5 - cooling medium outlet, 6 - TGV through hole, 7 - manifold, 8 - overall package structure. DETAILED DESCRIPTION

[0071] It should be noted that the components in the various drawings can be shown exaggerated in scale for illustrative purposes and are not necessarily to scale.

[0072] In the present application, each embodiment is merely intended to illustrate the scheme of the present application and should not be understood as limiting.

[0073] In the present application, the quantifier "one" and "a" do not exclude the scenario of multiple elements, unless specifically indicated.

[0074] It should also be noted here that in the embodiments of the present application, only a part of the components or assemblies can be shown for the sake of clarity and simplicity, but those skilled in the art can understand that under the teaching of the present application, the required components or assemblies can be added according to the specific scene needs.

[0075] It should also be noted here that within the scope of the present application, the words "same", "equal", "equal to" and the like do not mean that the two values are absolutely equal, but allow a certain reasonable error, that is, the words also cover "substantially the same", "substantially equal", "substantially equal".

[0076] It should also be noted here that in the description of the present application, the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not mean that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are only for descriptive purposes and cannot be understood as explicitly or implicitly indicating relative importance.

[0077] In addition, the embodiments of the present application describe the process steps in a specific order, however this is only for the convenience of distinguishing the steps and is not limited to the order of the steps, and in different embodiments of the present application, the order of the steps can be adjusted according to the adjustment of the process.

[0078] In the following examples, the S-like shape in the S-like microchannel is defined as at least including a complete S shape, and specifically, the S-like microchannel can be described as a serpentine microchannel.

[0079] In the following examples, the chip is a silicon chip; the glass substrate 1 is borosilicate glass (coefficient of thermal expansion 3.3 x 10 -6 / ℃), the thickness of the glass substrate 1 is 0.5-1.0 mm; the cooling medium is deionized water or electronic-grade coolant (such as 3M fluorinated liquid), which meets the requirements of insulation and high specific heat capacity; the hydrophilic coating is a silica nano coating.

[0080] The following examples provide a microchannel heat dissipation structure, comprising:

[0081] The glass substrate 1 has a plurality of TGV through holes 6 vertically penetrating therethrough, the plurality of TGV through holes 6 are arranged in a rectangular array, the diameter of the TGV through hole 6 is 50-200 μm, and the depth is 100-200 μm; a chip (not shown) is arranged on the glass substrate 1, close to one side of the first heat dissipation layer 2;

[0082] The first heat dissipation layer 2 is configured to dissipate heat from the chip, and the first heat dissipation layer 2 is located inside the glass substrate 1; the first heat dissipation layer 2 includes a plurality of first microchannels 201, the first microchannels 201 are arranged around the TGV through holes 6, and the plurality of first microchannels 201 are connected in sequence to form an S-like microchannel; the S-like microchannel includes an S-like microchannel body and a first inlet end and a first outlet end respectively arranged at both ends of the S-like microchannel body, the first inlet end is connected with the cooling medium inlet 4, the first heat dissipation layer 2 maximizes the heat exchange area and improves the local flow rate, directly cooling the chip area with a heat flow density of 100-300 W / cm 2 The first heat dissipation layer 2 is configured to dissipate heat from the chip, and the first heat dissipation layer 2 is located inside the glass substrate 1; the first heat dissipation layer 2 includes a plurality of first microchannels 201, the first microchannels 201 are arranged around the TGV through holes 6, and the plurality of first microchannels 201 are connected in sequence to form an S-like microchannel; the S-like microchannel includes an S-like microchannel body and a first inlet end and a first outlet end respectively arranged at both ends of the S-like microchannel body, the first inlet end is connected with the cooling medium inlet 4, the first heat dissipation layer 2 maximizes the heat exchange area and improves the local flow rate, directly cooling the chip area with a heat flow density of 100-300 W / cm

[0083] a second heat dissipation layer 3 configured to dissipate heat from the TGV through holes 6, the second heat dissipation layer 3 being arranged below the first heat dissipation layer 2, the second heat dissipation layer 3 being in communication with the first heat dissipation layer 2, the second heat dissipation layer 3 comprising a plurality of second microchannels 301, the second microchannels 301 being arranged outside the TGV through holes 6, and the plurality of second microchannels 301 being through to form an array of second microchannels 301; the array of second microchannels 301 comprising an array body of second microchannels 301, a second inlet end arranged at one end of the array body of second microchannels 301, and a second outlet end arranged at the other end of the array body of second microchannels 301, the second microchannels 301 being cylindrical structure channels, the second microchannels 301 being arranged below the first microchannels 201, and the second microchannels 301 being arranged outside the TGV through holes 6, the second microchannels 301 and the TGV through holes 6 having cavities therebetween, the distance between adjacent second microchannels 301 being a second pitch, the second pitch being the same as the spacing between the plurality of TGV through holes 6, specifically, the second pitch being 150-300 μm, and the channel width of the second microchannels 301 being 150-300 μm; the channel depth of the second microchannels 301 being 100-200 μm, the flow being sufficient by increasing the channel width, the convection heat transfer to the TGV side wall being strengthened by the increased pitch, and the local high temperature problem caused by the thermal resistance of the glass substrate 1 being solved;

[0084] a cooling medium inlet 4 configured to inject a cooling medium into the microchannel heat dissipation structure;

[0085] a cooling medium outlet 5 configured to discharge the cooling medium, the cooling medium outlet 5 being in communication with the cooling medium inlet 4, and a pump being arranged at the cooling medium inlet 4 and the cooling medium outlet 5; and

[0086] A manifold 7 is configured to communicate the first heat dissipation layer 2 and the second heat dissipation layer 3, and the manifold 7 is connected with the first outlet end and the second inlet end to make the cooling medium of the first heat dissipation layer 2 flow to the second heat dissipation layer 3 through the manifold 7 and be discharged by the cooling medium outlet 5, forming an overall packaging structure 8 which can be adapted to a 3D stacked packaging environment. After the cooling medium enters the first heat dissipation layer 2 through the cooling medium inlet 4, the cooling medium flows through the first outlet end, the manifold 7, the second inlet end, the second microchannel 301, the second outlet end and the cooling medium outlet 5 in turn; specifically, the manifold 7 is a three-way manifold, the manifold 7 includes an inlet branch pipe and a first outlet branch pipe and a second outlet branch pipe which are in communication with the inlet branch pipe, and the first outlet end is connected with the inlet branch pipe; the second inlet end is connected with the first outlet branch pipe and the second outlet branch pipe, the inlet branch pipe uniformly distributes the fluid into the microchannels of the first heat dissipation layer 2 and the second heat dissipation layer 3, the first outlet branch pipe and the second outlet branch pipe are symmetrical, the width of the inlet branch pipe is 300-500 μm, the width of the first outlet branch pipe or the second outlet branch pipe is 200-400 μm, the first outlet branch pipe and the second outlet branch pipe collect the fluid and balance the pressure drop of each branch, ensuring that the flow rate difference of each region is ≤5%, and the total pressure drop is controlled within 10-30 kPa.

[0087] The first microchannel 201 adopts high flow rate (0.5-1.5 m / s) to strengthen the heat exchange of the chip, and the second microchannel 301 uses medium-low flow rate (0.3-1.0 m / s) to uniformly cool the TGV side wall, that is, the first microchannel 201 (the back of the chip) directly cools the chip, and the second microchannel 301 surrounds the outer wall of the TGV to form a three-dimensional heat dissipation path of “chip→first microchannel 201→second microchannel 301→TGV through hole 6”.

[0088] The following embodiment provides a preparation method of a microchannel heat dissipation structure, including the following steps:

[0089] Chip and glass substrate 1 pretreatment: clean the back of the chip with an organic solvent (such as acetone), then clean it with IPA to remove contaminants, rinse it with deionized water, and dry it with nitrogen; immerse the glass substrate 1 in an alkaline solution and heat it to 100-150℃ to enhance its mechanical strength to ensure that it can withstand subsequent processes.

[0090] Reactive ion etching is performed on the glass substrate 1 to form the first microchannel 201;

[0091] Dry etching or wet etching is performed on the glass substrate 1 to form the second microchannel 301, and the wet etching is hydrofluoric acid solution etching;

[0092] The chip and the glass substrate 1 are anodically bonded to mount the chip on the glass substrate 1, so that the chip and the glass substrate 1 are gaplessly bonded and realize glue-free packaging, and the interface thermal resistance is ≤0.1 m 2K / W; in an anodic bonding, the voltage is 500-1000V, and the temperature is 300-400℃;

[0093] The bonding area edge of the chip and the glass substrate 1 is sealed to prevent fluid leakage, wherein the sealing process can be completed by using a sealant, a polymer-based adhesive, or a resin cured by ultraviolet light;

[0094] The inner wall of the first microchannel 201 and the second microchannel 301 is sprayed with a hydrophilic coating (contact angle ≤ 30°);

[0095] Chemical etching is performed on the inner wall of the first microchannel 201 to form a micron-level rough structure (Ra = 1-5 μm), which can promote turbulent flow in the cooling liquid flow and thus enhance convective heat transfer; and

[0096] Metal or polymer joints are bonded at the inlet and outlet positions of the manifold 7 to connect the external pumping and cooling circuits.

[0097] The working principle of the high-efficiency heat dissipation technology for the TGV chip based on the microchannel thermosyphon principle is as follows:

[0098] When the TGV chip generates heat during operation, the high-density heat flow at the back of the chip is quickly conducted to the multi-layer partitioned microchannel heat dissipation structure through the low interfacial thermal resistance between the chip and the glass substrate 1. In the first microchannel 201 of the first heat dissipation layer 2, the high-flow-rate cooling liquid directly flushes the back of the chip and absorbs a large amount of heat through strong convective heat transfer; at the same time, the cooling liquid in the second microchannel 301 of the second heat dissipation layer 3 (TGV annular peripheral area) uniformly cools the glass substrate 1, breaking through the low thermal conductivity bottleneck. The cooling liquid in each area is evenly distributed in flow rate by the symmetrical manifold 7, and then transmits heat from the upper chip area to the lower TGV area, and finally collects and discharges. In this process, the upper high-flow-rate (0.5-1.5 m / s) cooling liquid carries away the core heat of the chip, the lower medium-low flow-rate (0.3-1.0 m / s) cooling liquid uniformly diffuses the heat, the transition buffer area smooths the heat flow and pressure drop, and the convective effect enhanced by wall treatment forms a high-efficiency three-dimensional heat dissipation cycle, which continuously guarantees the stable operating temperature of the chip and the TGV through hole 6.

[0099] The micro-channel heat dissipation structure in the embodiment is different from the traditional single-structure micro-channel. Aiming at the two types of different heat sources of the chip and the TGV, through the partition design of "high-density direct cooling + annular reinforcement", the efficient heat dissipation of the two typical heat sources in the same liquid cooling system is realized for the first time, the local hotspot problem of the TGV caused by the low thermal conductivity of the glass substrate 1 is solved, and compared with the traditional scheme, the temperature of the side wall of the TGV can be reduced by 5-8℃; the micro-channel heat dissipation structure in the embodiment ensures that the uniformity error of the flow rate of each region is less than or equal to 5%, the total pressure drop is controlled within the rated range of the pump, and the heat exchange efficiency and power consumption optimization are considered, compared with the traditional asymmetric manifold 7 scheme, the pump power consumption is reduced by 15%; compared with the planar structure, the heat dissipation efficiency of the embodiment is improved by more than 30%, which meets the compact heat dissipation requirement of 3D integrated packaging.

[0100] In some embodiments, a hydrophilic coating is provided on the inner wall of the first micro-channel 201 and the second micro-channel 301.

[0101] In some embodiments, a condensing device is further provided between the cooling medium inlet 4 and the cooling medium outlet 5 to recycle the cooling medium.

[0102] Although some embodiments of the present application have been described in the present application, those skilled in the art can understand that these embodiments are only shown as examples. Those skilled in the art can think of many variants, alternatives and improvements under the teaching of the present application without going beyond the scope of the present application. The appended claims are intended to define the scope of the present application, and thereby cover the methods and structures within the scope of the claims themselves and their equivalent transformations.

Claims

1. A microchannel heat dissipation structure, characterized in that, include: A glass substrate with multiple TGV through-holes running vertically through it; A first heat dissipation layer is configured to dissipate heat from the chip, and the first heat dissipation layer is located inside the glass substrate; as well as A second heat dissipation layer is configured to dissipate heat from the TGV through-hole. The second heat dissipation layer is disposed below the first heat dissipation layer and is connected to the first heat dissipation layer.

2. The microchannel heat dissipation structure according to claim 1, characterized in that, Also includes: A cooling medium inlet is configured to inject cooling medium into the microchannel heat dissipation structure; as well as A cooling medium outlet is configured to discharge the cooling medium, and the cooling medium outlet is in communication with the cooling medium inlet.

3. The microchannel heat dissipation structure according to claim 2, characterized in that, The chip is disposed on the glass substrate near the first heat dissipation layer. The first heat dissipation layer includes a plurality of first microchannels arranged around the TGV via and the plurality of first microchannels are sequentially connected to form an S-shaped microchannel. The S-shaped microchannel includes an S-shaped microchannel body and a first inlet end and a first outlet end respectively disposed at both ends of the S-shaped microchannel body. The first inlet end is connected to the cooling medium inlet.

4. The microchannel heat dissipation structure according to claim 3, characterized in that, The second heat dissipation layer includes multiple second microchannels, which are sleeved on the outside of the TGV through-hole and are interconnected to form a second microchannel array. The second microchannel array includes a second microchannel array body, a second inlet end located at one end of the second microchannel array body, and a second outlet end located at the other end of the second microchannel array body.

5. The microchannel heat dissipation structure according to claim 4, characterized in that, Also includes: A manifold configured to connect the first heat dissipation layer and the second heat dissipation layer, the manifold being connected to the first outlet end and the second inlet end.

6. The microchannel heat dissipation structure according to claim 4, characterized in that, Pumps are provided at the cooling medium inlet and the cooling medium outlet.

7. The microchannel heat dissipation structure according to claim 4, characterized in that, A condensation device is also provided between the cooling medium inlet and the cooling medium outlet to circulate the cooling medium.

8. A method for preparing a microchannel heat dissipation structure as described in any one of claims 1-7, characterized in that, Includes the following steps: Pre-treatment of chips and glass substrates; and The glass substrate is etched to form a first microchannel and a second microchannel.

9. The preparation method according to claim 8, characterized in that, Also includes: A hydrophilic coating is sprayed onto the inner walls of the first and second microchannels.

10. The preparation method according to claim 8, characterized in that, Also includes: The chip is anoly bonded to the glass substrate to mount the chip onto the glass substrate.

Images