Multi-ceramic-substrate stitch welding interconnection structure and product manufacturing method thereof

By using a multi-ceramic substrate stacked interconnect structure, and combining the technical advantages of different ceramic substrates, high-density wiring, high current overcurrent and high thermal conductivity are achieved, solving the problem that existing technologies cannot meet these requirements at the same time, and improving product performance and application range.

CN121123148APending Publication Date: 2025-12-12BEIJING SUPLET +1
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Patent Information

Application Number
CN202410752605.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-06-12
Publication Date
2025-12-12

AI Technical Summary

Technical Problem

Existing hybrid integrated circuit products cannot simultaneously meet the requirements of high-density wiring, high-current overcurrent, and high heat dissipation capacity, which limits the improvement of product performance.

Method used

It adopts a multi-ceramic substrate stacked interconnect structure, including a metal shell, a ceramic insulating plate, a ceramic power plate and a ceramic high-density plate. By combining the advantages of different process technologies, it can achieve high current overcurrent, high-density assembly and high thermal conductivity.

Benefits of technology

This improves the product's heat dissipation performance and high current carrying capacity, enabling miniaturized design and meeting the needs of high-temperature applications.

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Abstract

The invention provides a multi-ceramic-substrate stitch welding interconnection structure and a product manufacturing method thereof, and relates to the technical field of hybrid integrated circuit packaging, in which a ceramic insulating plate is welded at the bottom of a metal shell, a ceramic power plate is welded on the ceramic insulating plate, and a ceramic high-density plate is welded on the ceramic power plate. And the first wiring layer on the front surface and the second wiring layer on the back surface of the ceramic power board are connected through a power connecting pin. And the ceramic high-density board and the ceramic power board are connected through a bonding lead. The multi-ceramic-substrate stitch welding interconnection structure provided by the invention integrates the technical advantages of various types of ceramic substrates, so that the laminated substrate has the capabilities of large overcurrent, high-density assembly and high heat conduction and heat transfer at the same time. Therefore, a product using the multi-ceramic-substrate stitch welding interconnection structure provided by the invention also has the technical advantages, and the performance of the product is greatly superior to that of a product adopting a single-type substrate in the prior art.
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Description

Technical Field

[0001] This application relates to the field of hybrid integrated circuit packaging technology, and in particular to a multi-ceramic substrate stacked interconnect structure and its product manufacturing method. Background Technology

[0002] Hybrid integrated circuit products typically use high-temperature resistant ceramic substrates, giving them a wide operating temperature range and high reliability. These products are widely used in various special fields with harsh working environment requirements.

[0003] There are many manufacturing processes for ceramic substrates. Current hybrid integrated circuit products typically select a specific ceramic substrate technology for packaging based on their specific needs. Due to different manufacturing processes, different ceramic substrate technologies have different technical characteristics. For example, ceramic substrates using HTCC (High-temperature co-fired ceramics) and LTCC (Low-temperature co-fired ceramics) technologies can achieve high-density multilayer conductive stripe wiring structures, exhibiting high-density wiring characteristics; however, their thin conductive stripes lack high current carrying capacity, and their thermal conductivity is also relatively weak. Ceramic substrates using AMB (Active Metal Brazing) and DBC (Direct Bonded Copper) technologies employ thick copper wiring processes on both sides, possessing high current carrying capacity and excellent substrate heat dissipation capabilities; however, they can achieve lower wiring density. Ceramic substrates fabricated using technologies such as thick film, thin film, and DPC (Direct Plated Copper) fall between the two types of ceramic substrate technologies mentioned above in terms of wiring density, current carrying capacity, and heat dissipation capacity. Although their overall performance is balanced, their various indicators (such as wiring density, current carrying capacity, and heat dissipation capacity) are not outstanding, and their limitations are obvious.

[0004] Current hybrid integrated circuit products, constrained by the performance indicators of specific ceramic substrate technologies, find it difficult to simultaneously meet the requirements of high-density wiring, high current overcurrent, and high heat dissipation capabilities. This significantly limits further improvements in the performance indicators of related products. Summary of the Invention

[0005] In view of the above problems, this application provides a multi-ceramic substrate cascade interconnect structure and its product fabrication method, which solves the shortcomings of using a single technology substrate in existing hybrid integrated circuit products, so as to achieve the purpose of a multi-ceramic substrate cascade interconnect structure with high current overcurrent, high-density assembly and high thermal conductivity. The specific solution is as follows:

[0006] The first aspect of this application provides a multi-ceramic substrate stacked interconnect structure, the multi-ceramic substrate stacked interconnect structure comprising: a metal shell and a metal cover plate, the metal shell and the metal cover plate forming a cavity;

[0007] The cavity contains a ceramic insulating plate, a ceramic power plate, at least one ceramic high-density plate, and a power connection pin.

[0008] The ceramic insulating plate is welded to the bottom of the metal casing, the ceramic power plate is welded to the ceramic insulating plate, and at least one ceramic high-density plate is welded to the ceramic power plate;

[0009] The at least one high-density ceramic plate exposes at least a portion of the ceramic power plate;

[0010] The ceramic power plate and the ceramic high-density plate are connected by bonding wires.

[0011] The ceramic power board includes a first wiring layer on the front side and a second wiring layer on the back side, and the first wiring layer and the second wiring layer are soldered together by the power connection pin.

[0012] The ceramic power plate and the ceramic high-density plate are respectively welded to the pins of the metal casing.

[0013] In one possible implementation, the orthographic projection of the ceramic insulating plate in the first direction completely overlaps with the orthographic projection of the ceramic power plate in the first direction, wherein the first direction is perpendicular to the plane containing the bottom of the metal housing.

[0014] The ceramic insulating plate includes wiring layers located on the front and the back, respectively.

[0015] In one possible implementation, the thickness of the first wiring layer ranges from 100μm to 500μm, and the thickness of the second wiring layer ranges from 100μm to 500μm.

[0016] In one possible implementation, the ceramic high-density board includes wiring layers located on the front and back sides, respectively, and at least one inner wiring layer.

[0017] The at least one inner wiring layer is electrically connected to each other through interlayer vias in the ceramic high-density board.

[0018] In one possible implementation, the ceramic power plate is provided with a connecting pin welding ring and connecting pin through holes;

[0019] The power connection pin includes a pin cap and a pin tip;

[0020] The needle cap is placed inside the connecting needle welding ring and is welded to the second wiring layer of the ceramic power plate.

[0021] The needle passes through the connecting pin through-hole and is soldered to the first wiring layer of the ceramic power board.

[0022] In one possible implementation, the power connector is made of copper, the diameter of the connector tip is in the range of 0.5mm-1mm, and the thickness of the connector cap is in the range of 0.2mm-0.3mm.

[0023] The difference between the diameter of the needle cap and the diameter of the needle tip ranges from 0.6 mm to 1 mm.

[0024] In one possible implementation, the difference between the diameter of the connecting pin welding ring and the diameter of the pin cap is in the range of 0.2mm-0.4mm; the difference between the diameter of the connecting pin through hole and the diameter of the pin tip is in the range of 0.2mm-0.4mm.

[0025] In one possible implementation, the ceramic insulating plate, the ceramic power plate, and the ceramic high-density plate have substrate through-holes through which the pins of the metal housing pass.

[0026] In one possible implementation, signal-type components and bare signal-type chips are mounted on the surface of the high-density ceramic plate facing away from the ceramic insulating plate.

[0027] Power components and bare power chips are mounted on the exposed surface of the ceramic power board on the side opposite to the ceramic insulating board.

[0028] A second aspect of this application provides a method for manufacturing a product with a multi-ceramic substrate cascade interconnect structure, the method comprising:

[0029] Provide metal housing, metal cover plate, ceramic insulation plate, ceramic power board, at least one ceramic high-density board, power connection pin, signal components, signal bare chips, power components and power bare chips;

[0030] Solder is applied to the bottom of the metal casing, the surface of the ceramic insulating plate, the surface of the ceramic power plate, and the surface of the ceramic high-density plate.

[0031] The ceramic insulating plate, the power connection pin, the ceramic power plate, and the ceramic high-density plate are installed sequentially, with at least one ceramic high-density plate exposing at least a portion of the ceramic power plate;

[0032] The power-type components and the bare power-type chips are mounted on the exposed surface of the ceramic power plate on the side opposite to the ceramic insulating plate.

[0033] Some of the signal components and some of the bare chips of the signal type are mounted on the surface of the high-density ceramic plate away from the ceramic insulating plate.

[0034] Perform reflow soldering and then clean the area after soldering.

[0035] Welding is performed between the pins of the metal housing and the ceramic power plate and the ceramic high-density plate, and welding is performed between the ceramic power plate and the power connection pin.

[0036] Cleaning after welding;

[0037] The remaining portion of the signal-type components and the remaining portion of the bare chips of the signal-type components are mounted on the surface of the high-density ceramic plate away from the ceramic insulating plate.

[0038] Bonding connections are made between the power-type bare chips and the ceramic power board, between the signal-type bare chips and the ceramic high-density board, and between the ceramic power board and the ceramic high-density board.

[0039] Perform sealing and encapsulation.

[0040] By employing the above technical solution, this application provides a multi-ceramic substrate cascade interconnect structure and its manufacturing method, including a metal casing, a ceramic insulating plate, a ceramic power board, a ceramic high-density board, and power connection pins. The ceramic insulating plate is welded to the bottom of the metal casing, the ceramic power board is welded to the ceramic insulating plate, and the ceramic high-density board is welded to the ceramic power board. The first wiring layer on the front side and the second wiring layer on the back side of the ceramic power board are connected by power connection pins. The ceramic high-density board and the ceramic power board are connected by bonding wires. The multi-ceramic substrate cascade interconnect structure provided in this application uses different process technologies for the substrates used for cascade interconnection, resulting in different technical characteristics. Among them, the ceramic high-density board located in the upper layer can achieve high wiring density but does not have high current carrying capacity; the ceramic power board located in the middle layer has high current carrying capacity and high heat dissipation capacity, but low wiring density; the ceramic insulating plate located in the bottom layer has high thermal conductivity, but general wiring and current carrying capacity. In other words, the multi-ceramic substrate cascade interconnect structure provided in this application integrates the technical advantages of various types of ceramic substrates, enabling the cascaded substrate to simultaneously possess the capabilities of high current overcurrent, high-density assembly, and high thermal conductivity. Therefore, products using the multi-ceramic substrate cascade interconnect structure provided in this application also possess these technical advantages, and their performance is significantly superior to existing products using a single type of substrate.

[0041] In summary, the multi-ceramic substrate stacked interconnect structure provided in this application can significantly improve the heat dissipation performance and high current carrying capacity of the product, realize the miniaturization design of the product, and meet the application requirements of high temperature level of the product. Attached Figure Description

[0042] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0043] Figure 1 This is a cross-sectional schematic diagram of a multi-ceramic substrate stacked interconnect structure provided in an embodiment of the present invention;

[0044] Figure 2 This is one of the top view schematic diagrams of a ceramic high-density plate and a ceramic power plate being stacked and welded according to an embodiment of the present invention;

[0045] Figure 3 This is a second top view schematic diagram of a ceramic high-density plate and a ceramic power plate being stacked and welded according to an embodiment of the present invention;

[0046] Figure 4 A cross-sectional schematic diagram of a high-current interconnect structure with front and back wiring on a ceramic power board, provided in an embodiment of the present invention;

[0047] Figure 5 A cross-sectional schematic diagram of a ceramic high-density board provided in an embodiment of the present invention;

[0048] Figure 6 This is a schematic flowchart illustrating a product manufacturing method for a multi-ceramic substrate stacked interconnect structure provided in an embodiment of the present invention. Detailed Implementation

[0049] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is for explaining specific embodiments only and is not intended to limit the scope of this application.

[0050] The embodiments of this application will now be described with reference to the accompanying drawings. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are equally applicable to similar technical problems.

[0051] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] refer to Figure 1 , Figure 1This is a cross-sectional schematic diagram of a multi-ceramic substrate cascade interconnect structure provided in an embodiment of the present invention. Figure 1 As shown, an embodiment of the present invention provides a multi-ceramic substrate stacked interconnect structure including: a metal shell 11 and a metal cover plate 12, wherein the metal shell 11 and the metal cover plate 12 form a cavity.

[0053] The cavity contains a ceramic insulating plate 13, a ceramic power plate 14, at least one ceramic high-density plate 15, and a power connection pin 16.

[0054] The ceramic insulating plate 13 is welded to the bottom of the metal housing 11, the ceramic power plate 14 is welded to the ceramic insulating plate 13, and the at least one ceramic high-density plate 15 is welded to the ceramic power plate 14.

[0055] The welding solder of the welding layer 17 includes Pb37Sn63, Sn92.5Ag5Cu2.5, etc., and the thickness of the welding layer 17 formed by welding is approximately between 0.05mm and 0.1mm.

[0056] The at least one high-density ceramic plate 15 exposes at least a portion of the ceramic power plate 14. In other words, the size of the high-density ceramic plate 15 is smaller than the size of the ceramic power plate 14, resulting in a portion of the ceramic power plate 14 being exposed after stacking.

[0057] The orthographic projection of the ceramic insulating plate 13 in the first direction completely overlaps with the orthographic projection of the ceramic power plate 14 in the first direction, which is perpendicular to the plane containing the bottom of the metal housing 11. In other words, the dimensions of the ceramic insulating plate 13 and the ceramic power plate 14 are exactly the same, and they completely overlap after being stacked.

[0058] Products using the multi-ceramic substrate cascade interconnect structure provided in this invention require the mounting of components and bare chips on both the ceramic high-density board 15 and the ceramic power board 14. In specific product packaging examples, the ceramic high-density board 15 can be designed (including its size and shape, etc.) according to the area required for mounting the product's signal components 18 and signal bare chips 19, such as... Figure 2 As shown, Figure 2 This is one of the top-view schematic diagrams of a ceramic high-density board and a ceramic power board stacked together, provided as an embodiment of the present invention. The area on the ceramic power board 14 not covered by the ceramic high-density board 15 is the mounting area for power components 20 and power bare chips 21. Similarly, during product design, the ceramic power board design (including size and shape, etc.) needs to be based on the area occupied by the power components 20 and power bare chips 21. Furthermore, the ceramic high-density board 15 can also be configured as multiple boards as needed, such as... Figure 3 As shown, Figure 3 This is the second top view schematic diagram of a ceramic high-density plate and a ceramic power plate being stacked and welded according to an embodiment of the present invention. Figure 3 The example shows two ceramic high-density boards 15.

[0059] It should be noted that some large-size components 22 can also be installed in the area of ​​the ceramic power board 14 that is not covered by the ceramic high-density board 15. The specific type of the large-size components 22 is not limited in the embodiments of the present invention and can be determined according to the actual situation.

[0060] The ceramic power plate 14 and the ceramic high-density plate 15 are connected by bonding leads 23.

[0061] The ceramic power board 14 includes a first wiring layer on the front and a second wiring layer on the back, namely Figure 1 The wiring layer 24 shown is connected by soldering the first wiring layer and the second wiring layer via the power connection pin 16.

[0062] The ceramic power board 14 is typically manufactured using processes such as AMB and DBC. Both the front and back sides of the ceramic power board 14 employ thick copper wiring technology (copper thickness ranging from 0.1mm to 0.5mm) to form the first and second wiring layers, meeting the high current requirements of the product. Furthermore, the ceramic power board 14 material has high thermal conductivity, which, combined with the thick copper wiring covering its surface, achieves excellent thermal conductivity. The thick copper on the surface of the ceramic power board 14 is etched into wiring lines primarily through etching during the manufacturing process. Because the etching precision of thick copper is affected by the copper thickness, the achievable line width and spacing are typically between 0.3mm and 0.5mm, resulting in low wiring density. Generally, only double-sided wiring can be achieved on both sides, and there is no electrical connection between the wiring on the front and back sides.

[0063] like Figure 4 As shown, Figure 4 This is a cross-sectional schematic diagram of a high-current interconnect structure with front and back wiring on a ceramic power board, provided in an embodiment of the present invention. In this multi-ceramic substrate cascade interconnect structure, by drilling holes in the ceramic power board 14 and then connecting the front and back wiring layers of the ceramic power board 14 using power connector pins 16, power interconnection between the front and back wiring layers of the ceramic power board 14 is achieved. This significantly increases the wiring density of the cascade substrate, making power wiring and layout possible in products using this multi-ceramic substrate cascade interconnect structure.

[0064] The ceramic power plate 14 and the ceramic high-density plate 15 are respectively welded to the pins 25 of the metal casing 11. It should be noted that... Figure 1 The example also illustrates the housing insulator 26, which is the insulating component between the pin 25 and the metal housing 11.

[0065] It should be noted that, Figure 1 The number 27 indicates that the cavity is filled with nitrogen gas.

[0066] In an optional embodiment of the present invention, the ceramic insulating plate 13 includes wiring layers 30 located on the front and the back respectively.

[0067] The ceramic insulating plate 13 serves two main functions: firstly, it acts as an insulating layer to electrically isolate the product substrate wiring from the metal casing; secondly, it acts as a thermally conductive layer to transfer the heat generated by the ceramic power board 14 to the underlying metal casing 11. Based on these mechanisms, the ceramic insulating plate 13 does not require a high wiring density, but it does need good thermal conductivity. Suitable substrates include thick copper-based ceramic substrates (such as those using AMB or DBC technologies) and ceramic film-forming substrates (such as those using thick film, thin film, or DPC technologies).

[0068] However, considering that the ceramic insulating board 13, as a transition substrate, needs to be welded over a large area to the metal shell 11, and that the copper on the surface of the thick copper ceramic substrate is relatively thick (ranging from 0.1mm to 0.5mm), the coefficient of thermal expansion of copper differs somewhat from that of the metal shell substrate. In contrast, substrates using ceramic film deposition technology (thick film, thin film, DPC technology) have a thinner surface wiring layer (approximately 10μm), and the coefficient of thermal expansion of their substrate material is closer to that of the metal shell material (mainly Kovar and No. 10 steel). Therefore, considering long-term reliability, ceramic film deposition substrates are preferable for the ceramic insulating board 13, as they offer higher reliability over extended periods.

[0069] In an optional embodiment of the present invention, the ceramic power board 14 includes thick copper wiring layers distributed on the front and back sides of the ceramic power board 14, wherein the thickness of the thick copper wiring layers ranges from 100μm to 500μm. That is, the thickness of the first wiring layer ranges from 100μm to 500μm, and the thickness of the second wiring layer ranges from 100μm to 500μm.

[0070] The ceramic power board 14 uses thick copper wiring, which gives it good thermal conductivity and current carrying capacity. In this embodiment of the invention, the ceramic power board 14 is mainly used for soldering and assembling power components 20 and power bare chips 21, giving full play to the current carrying and heat dissipation advantages of the ceramic power board 14.

[0071] In an optional embodiment of the present invention, such as Figure 5 As shown, Figure 5This is a cross-sectional schematic diagram of a ceramic high-density board provided in an embodiment of the present invention. The ceramic high-density board 15 includes a wiring layer 35 located on the front side and a wiring layer 36 located on the back side, as well as at least one inner wiring layer 37.

[0072] The at least one inner wiring layer 37 is electrically connected to each other through the interlayer through-holes 38 of the ceramic high-density board 15.

[0073] High-density ceramic board 15, typically manufactured using HTCC, LTCC, and other processes, can achieve ultra-fine linewidths and spacings (minimum linewidth and spacing are usually around 0.1mm). Furthermore, due to the ability to perform multi-layer wiring within the ceramic inner layers, with interconnections between different inner wiring layers via through-holes 38, the wiring density is extremely high. However, because each wiring layer is relatively thin (typically around 10μm) and the high-density ceramic board 15 has a relatively low thermal conductivity, its achievable current-carrying capacity and thermal conductivity are both limited.

[0074] In this embodiment, signal components 18 and bare signal chips 19 are mounted on the surface of the high-density ceramic plate 15 opposite to the ceramic insulating plate 13. That is, this embodiment primarily utilizes the high-density ceramic plate 15 for high-density mounting of the signal components 18 and bare signal chips 19, fully leveraging the packaging density advantage of the high-density ceramic plate 15.

[0075] In an optional embodiment of the present invention, such as Figure 4 As shown, the ceramic power plate 14 has a connecting pin welding ring 31 and a connecting pin through hole 29 distributed on it.

[0076] The power connection pin 16 includes a pin cap 32 and a pin tip 33.

[0077] The needle cap 32 is placed inside the connecting needle welding ring 31 and is welded to the second wiring layer of the ceramic power board 14.

[0078] The needle 33 passes through the connecting needle through hole 29 and is soldered to the first wiring layer of the ceramic power board 14.

[0079] Specifically, in this embodiment of the invention, since the existing ceramic power board 14 uses thick copper wiring technology on both sides, there is no electrical connection between the thick copper wiring layers on the front and back sides. Therefore, in the multi-ceramic substrate cascade interconnect structure of this application, by drilling holes in the ceramic power board 14 and then using power connection pins 16 to solder the front and back sides of the ceramic power board 14, double-layer wiring of the ceramic power board 14 is achieved, which greatly improves the power wiring density of the cascade substrate. This makes it possible to assemble power components 20 and power bare chips 21 on the ceramic power board in products using the multi-ceramic substrate cascade interconnect structure provided in this embodiment of the invention.

[0080] In an optional embodiment of the present invention, the power connection pin 16 is made of copper, the diameter of the pin tip 33 is in the range of 0.5mm-1mm, and the thickness of the pin cap 32 is in the range of 0.2mm-0.3mm.

[0081] The difference between the diameter of the needle cap 32 and the diameter of the needle tip 33 is in the range of 0.6mm-1mm. In other words, the diameter of the needle cap 32 is 0.6mm-1mm larger than the diameter of the needle tip 33.

[0082] Specifically, in this embodiment of the invention, the power connection pin 16 is made of copper. Copper has extremely low resistivity and a relatively large conductive cross-section. After connecting the front and back wiring of the ceramic power board 14 by welding at both ends, the high current overcurrent requirement between the front and back conductive strips can be met.

[0083] In an optional embodiment of the present invention, the difference between the diameter of the connecting pin welding ring 31 and the diameter of the pin cap 32 is in the range of 0.2mm-0.4mm.

[0084] The difference between the diameter of the connecting needle through hole 29 and the diameter of the needle tip 33 is in the range of 0.2mm-0.4mm. In other words, the diameter of the connecting needle through hole 29 is 0.2mm-0.4mm larger than the diameter of the needle tip 33.

[0085] Specifically, in this embodiment of the invention, the power connection pin 16 includes a pin cap 32 and a pin tip 33. The pin cap 32 is located inside the connection pin welding ring 31 of the ceramic power plate 14 and is welded to the wiring layer (i.e., the second wiring layer) at the bottom of the ceramic power plate 14. The pin tip 33 passes through the connection pin through hole 29 of the ceramic power plate 14 and is welded to the wiring layer (i.e., the first wiring layer) at the top of the ceramic power plate 14. The design of the pin cap 32 of the power connection pin 16, the design of the connection pin welding ring 31 of the ceramic power plate 14, and the design of the connection pin through hole 29 are matched in size and position, which can limit the power connection pin 16 during the welding process and prevent the power connection pin 16 from drifting upward and shifting during the welding process, thus forming welding defects.

[0086] It needs to be explained that, Figure 4 The number 34 indicates the solder joint of the power connection pin 16.

[0087] In an optional embodiment of the present invention, the ceramic insulating plate 13, the ceramic power plate 14, and the ceramic high-density plate 15 have substrate through holes 28 through which the pins 25 of the metal housing 11 pass.

[0088] Specifically, in this embodiment of the invention, the diameter of the through hole 28 on the substrate is usually 0.4mm-0.6mm larger than the diameter of the pin 25 of the metal housing 11. In addition to serving as a passage for the pin 25 of the metal housing 11 in the structural design, it can also serve as a positioning and alignment function during the substrate stacking process and as a limiting function during the subsequent multi-ceramic substrate stacking and welding process.

[0089] In an optional embodiment of the present invention, signal components 18 and bare signal chips 19 are mounted on the surface of the high-density ceramic plate 15 facing away from the ceramic insulating plate 13.

[0090] Power components 20 and power bare chips 21 are mounted on the exposed surface of the ceramic power board 14 on the side opposite to the ceramic insulating board 13.

[0091] Specifically, in this embodiment of the invention, the ceramic power board 14 has excellent heat dissipation and current carrying capacity, but its wiring density is relatively low. Therefore, this embodiment primarily utilizes the ceramic power board 14 for soldering and assembling power components 20 and bare power chips 21, fully leveraging the current carrying and heat dissipation advantages of the ceramic power board 14. Furthermore, the ceramic high-density board 15 has high-density wiring capability, but its current carrying capacity is relatively poor and its heat dissipation capability is average. Therefore, in this embodiment of the invention, the ceramic high-density board 15 is primarily used for high-density assembly of signal components 18 and bare signal chips 19, fully leveraging the packaging density advantage of the ceramic high-density board 15.

[0092] Based on the above embodiments of the present invention, another embodiment of the present invention also provides a method for manufacturing a product with a multi-ceramic substrate stacked interconnect structure, referencing... Figure 6 , Figure 6 This is a schematic flowchart illustrating a method for fabricating a multi-ceramic substrate cascade interconnect structure according to an embodiment of the present invention. The method for fabricating a multi-ceramic substrate cascade interconnect structure according to an embodiment of the present invention includes:

[0093] S101: Provides a metal housing 11, a metal cover plate 12, a ceramic insulating plate 13, a ceramic power board 14, at least one ceramic high-density board 15, a power connection pin 16, signal components 18, signal bare chips 19, power components 20, and power bare chips 21.

[0094] S102: Apply solder to the bottom of the metal housing 11, the surface of the ceramic insulating plate 13, the surface of the ceramic power plate 14, and the surface of the ceramic high-density plate 15.

[0095] S103: The ceramic insulating plate 13, the power connection pin 16, the ceramic power plate 14 and the ceramic high-density plate 15 are installed in sequence, and at least one ceramic high-density plate 15 exposes at least a part of the ceramic power plate 14.

[0096] S104: The power-type components 20 and the power-type bare chips 21 are mounted on the exposed surface of the ceramic power plate 14 on the side opposite to the ceramic insulating plate 13.

[0097] S105: Install some of the signal components 18 and some of the signal bare chips 19 on the surface of the high-density ceramic plate 15 away from the ceramic insulating plate 14. The installation of the signal components 18 and signal bare chips 19 mainly includes two methods: bonding and soldering. This step mainly completes the installation of the soldered portion of the signal components 18 and signal bare chips 19.

[0098] S106: Perform reflow soldering and clean after soldering.

[0099] S107: Perform welding connection of the pins 25 of the metal housing 11 to the ceramic power plate 14 and the ceramic high-density plate 15, and perform welding connection of the ceramic power plate 14 to the power connection pin 16.

[0100] S108: Clean after welding.

[0101] S109: Install the remaining portion of the signal components 18 and the remaining portion of the bare signal chips 19 on the surface of the high-density ceramic plate 15 opposite to the ceramic insulating plate 13. The installation of the signal components 18 and the bare signal chips 19 mainly includes two methods: bonding and soldering. This step primarily completes the installation of the bonded portion of the signal components 18 and the bare signal chips 19.

[0102] S110: Perform bonding connections between the power-type bare chip 21 and the ceramic power board 14, the signal-type bare chip 19 and the ceramic high-density board 15, and the ceramic power board 14 and the ceramic high-density board 15.

[0103] S111: Perform sealing and encapsulation.

[0104] As described above, this application provides a multi-ceramic substrate cascade interconnect structure and its manufacturing method, including a metal housing 11, a ceramic insulating plate 13, a ceramic power board 14, a ceramic high-density board 15, and power connection pins 16. The ceramic insulating plate 13 is welded to the bottom of the metal housing 11, the ceramic power board 14 is welded to the ceramic insulating plate 13, and the ceramic high-density board 15 is welded to the ceramic power board 14. The first wiring layer on the front side and the second wiring layer on the back side of the ceramic power board 14 are connected by power connection pins 16. The ceramic high-density board 15 and the ceramic power board 14 are connected by bonding leads 23. The multi-ceramic substrate cascade interconnect structure provided in this application uses different process technologies for the substrates used for cascade interconnection, resulting in different technical characteristics. The high-density ceramic board 15 at the top layer achieves high wiring density but lacks high current carrying capacity; the ceramic power board 14 in the middle layer has high current carrying capacity and high heat dissipation capacity, but low wiring density; the ceramic insulating board 13 at the bottom layer has high thermal conductivity, but its wiring and current carrying capacity are average. In other words, the multi-ceramic substrate cascade interconnect structure provided in this application integrates the technical advantages of various types of ceramic substrates, enabling the cascade substrate to simultaneously possess high current carrying capacity, high-density assembly, and high thermal conductivity. Therefore, products using the multi-ceramic substrate cascade interconnect structure provided in this application also possess these technical advantages, and their performance is significantly better than that of existing products using a single type of substrate.

[0105] In summary, the multi-ceramic substrate stacked interconnect structure provided in this application can significantly improve the heat dissipation performance and high current carrying capacity of the product, realize the miniaturization design of the product, and meet the application requirements of high temperature level of the product.

[0106] The foregoing has provided a detailed description of a multi-ceramic substrate cascade interconnection structure and its manufacturing method. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

[0107] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0108] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0109] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A multi-ceramic substrate stacked interconnect structure, characterized in that, The multi-ceramic substrate stacked interconnect structure includes: a metal shell and a metal cover plate, wherein the metal shell and the metal cover plate form a cavity; The cavity contains a ceramic insulating plate, a ceramic power plate, at least one ceramic high-density plate, and a power connection pin. The ceramic insulating plate is welded to the bottom of the metal casing, the ceramic power plate is welded to the ceramic insulating plate, and at least one ceramic high-density plate is welded to the ceramic power plate; The at least one high-density ceramic plate exposes at least a portion of the ceramic power plate; The ceramic power plate and the ceramic high-density plate are connected by bonding wires. The ceramic power board includes a first wiring layer on the front side and a second wiring layer on the back side, and the first wiring layer and the second wiring layer are soldered together by the power connection pin. The ceramic power plate and the ceramic high-density plate are respectively welded to the pins of the metal casing.

2. The multi-ceramic substrate cascade interconnect structure according to claim 1, characterized in that, The orthographic projection of the ceramic insulating plate in the first direction completely overlaps with the orthographic projection of the ceramic power plate in the first direction, and the first direction is perpendicular to the plane where the bottom of the metal shell is located. The ceramic insulating plate includes wiring layers located on the front and the back, respectively.

3. The multi-ceramic substrate cascade interconnection structure according to claim 1, characterized in that, The thickness of the first wiring layer ranges from 100μm to 500μm, and the thickness of the second wiring layer ranges from 100μm to 500μm.

4. The multi-ceramic substrate cascade interconnection structure according to claim 1, characterized in that, The ceramic high-density board includes wiring layers located on the front and the back, respectively, and at least one inner wiring layer. The at least one inner wiring layer is electrically connected to each other through interlayer vias in the ceramic high-density board.

5. The multi-ceramic substrate cascade interconnection structure according to claim 1, characterized in that, The ceramic power plate is provided with connecting pin welding rings and connecting pin through holes; the power connecting pin includes a pin cap and a pin tip. The needle cap is placed inside the connecting needle welding ring and is welded to the second wiring layer of the ceramic power plate. The needle passes through the connecting pin through-hole and is soldered to the first wiring layer of the ceramic power board.

6. The multi-ceramic substrate cascade interconnect structure according to claim 5, characterized in that, The power connection pin is made of copper, the diameter of the pin head is in the range of 0.5mm-1mm, and the thickness of the pin cap is in the range of 0.2mm-0.3mm. The difference between the diameter of the needle cap and the diameter of the needle tip ranges from 0.6 mm to 1 mm.

7. The multi-ceramic substrate stacked interconnect structure according to claim 5, characterized in that, The difference between the diameter of the connecting pin welding ring and the diameter of the pin cap is in the range of 0.2mm-0.4mm; the difference between the diameter of the connecting pin through hole and the diameter of the pin tip is in the range of 0.2mm-0.4mm.

8. The multi-ceramic substrate cascade interconnect structure according to any one of claims 1-7, characterized in that, The ceramic insulating plate, the ceramic power plate, and the ceramic high-density plate have substrate through holes through which the pins of the metal housing pass.

9. The multi-ceramic substrate cascade interconnect structure according to any one of claims 1-7, characterized in that, Signal components and bare signal chips are mounted on the surface of the high-density ceramic plate away from the ceramic insulating plate. Power components and bare power chips are mounted on the exposed surface of the ceramic power board on the side opposite to the ceramic insulating board.

10. A method for manufacturing a product with a multi-ceramic substrate cascade interconnect structure, characterized in that, The product manufacturing method of the multi-ceramic substrate cascade interconnect structure includes: Provide metal housing, metal cover plate, ceramic insulation plate, ceramic power board, at least one ceramic high-density board, power connection pin, signal components, signal bare chips, power components and power bare chips; Solder is applied to the bottom of the metal casing, the surface of the ceramic insulating plate, the surface of the ceramic power plate, and the surface of the ceramic high-density plate. The ceramic insulating plate, the power connection pin, the ceramic power plate, and the ceramic high-density plate are installed sequentially, with at least one ceramic high-density plate exposing at least a portion of the ceramic power plate; The power-type components and the bare power-type chips are mounted on the exposed surface of the ceramic power plate on the side opposite to the ceramic insulating plate. Some of the signal components and some of the bare chips of the signal type are mounted on the surface of the high-density ceramic plate away from the ceramic insulating plate. Perform reflow soldering and then clean the area after soldering. Welding is performed between the pins of the metal housing and the ceramic power plate and the ceramic high-density plate, and welding is performed between the ceramic power plate and the power connection pin. Cleaning after welding; The remaining portion of the signal-type components and the remaining portion of the bare chips of the signal-type components are mounted on the surface of the high-density ceramic plate away from the ceramic insulating plate. Bonding connections are made between the power-type bare chips and the ceramic power board, between the signal-type bare chips and the ceramic high-density board, and between the ceramic power board and the ceramic high-density board. Perform sealing and encapsulation.