LED chip and semiconductor light-emitting device

By using TiOx or Al2O3 as an interface layer in LED chips, which directly contacts the metal layer and is formed in the same process as the Bragg reflector layer, the problem of poor adhesion between the metal layer and the reflector layer is solved, improving the yield and brightness of LED chips and reducing manufacturing costs.

CN121126984APending Publication Date: 2025-12-12TIANJIN SANAN OPTOELECTRONICS
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Patent Information

Application Number
CN202511120012.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-11
Publication Date
2025-12-12

AI Technical Summary

Technical Problem

In existing LED chips, the interface adhesion between the metal layer and the reflective layer is poor, making them easy to peel off, which affects yield and reliability. At the same time, the separate process for the ITO or IZO adhesion layer increases costs and affects brightness.

Method used

TiOx or Al2O3 is used as the interface layer, which is in direct contact with the metal layer and is formed in the same process as the Bragg reflector layer, thereby improving adhesion and eliminating the light-absorbing layer to improve brightness.

Benefits of technology

It enhances the interface robustness of LED chips, improves yield and reliability, reduces manufacturing costs, and increases brightness.

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Abstract

The invention provides an LED chip and a semiconductor light-emitting device, the LED chip is provided with a dielectric layer, a reflecting layer and a metal layer on the back surface of a semiconductor epitaxial laminated layer, the reflecting layer comprises a Bragg reflecting layer and an interface layer, the Bragg reflecting layer comprises a high-refractive-index material layer and a low-refractive-index material layer which are alternately laminated, and the interface layer is arranged between the high-refractive-index material layer and the low-refractive-index material layer. The refractive index of the interface layer is higher than that of the low-refractive-index material layer in the Bragg reflection layer; the thickness of the interface layer is smaller than the thickness of the high refractive index material layer in the Bragg reflection layer. A metal layer is in direct contact with the interface layer. The interface layer can be a TiOx or Al2O3 layer, and has good adhesion with the metal layer, so that the interface firmness of the TiOx or Al2O3 layer and the metal layer can be remarkably improved, and the yield of an LED chip is improved; the forming materials of the interface layer and the Bragg reflection layer are insulating transparent oxides, and even can have the same forming material as the high-refractive-index material layer in the Bragg reflection layer, so that the interface layer and the Bragg reflection layer can be formed in the same manufacturing process without additional operation manufacturing process, the manufacturing process of the LED chip is saved, and the reduction of the manufacturing cost is facilitated.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor devices, and more specifically, to an LED chip and a semiconductor light-emitting device. Background Technology

[0002] LED chips have seen rapid development in the lighting field as a light source. To meet the requirements of light emission, conductivity, and bonding, LED chips incorporate structures such as dielectric layers, reflective layers (e.g., DBR structures (layers of high and low refractive index materials)), and metal layers. Interfaces exist between these layers, and the strength of these interface adhesions is a significant factor affecting LED chip yield. For example, poor adhesion between the metal layer and the reflective layer leads to easy peeling, thus impacting the yield and reliability of the LED chip.

[0003] To improve the aforementioned problem of poor interface adhesion, an adhesion layer, such as an ITO or IZO layer, is typically deposited at the interface. However, since this ITO or IZO adhesion layer cannot be completed in the same process as the reflective layer or metal layer, it requires a separate sputtering operation, which undoubtedly increases the manufacturing cost of the LED chip. In addition, the aforementioned ITO or IZO adhesion layer will absorb light, affecting brightness. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the object of the present invention is to provide an LED chip and a semiconductor light-emitting device. In the LED chip of the present invention, the interface layer of the reflective layer is a high refractive index layer, such as TiO₂. x A layer or an Al2O3 layer. TiO x The Al2O3 layer or TiO2 layer has good adhesion to the metal layer, which can improve the adhesion effect between the two and improve the yield and reliability of the LED chip; on the other hand, TiO2 layer... x The reflective layer or Al2O3 layer can be fabricated in the same process as the reflective layer, reducing the vapor deposition process and effectively lowering the manufacturing cost of LED chips.

[0005] To achieve the above and other related objectives, the present invention provides an LED chip comprising at least:

[0006] A semiconductor epitaxial stack includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer stacked sequentially. The semiconductor epitaxial stack includes a light-emitting surface and a back surface opposite to the light-emitting surface.

[0007] A dielectric layer is located on the back side of the semiconductor epitaxial stack, and the refractive index of the dielectric layer is lower than that of the semiconductor epitaxial stack.

[0008] A reflective layer, located on the back side of the semiconductor epitaxial stack, includes a Bragg reflective layer and an interface layer located on the side of the Bragg reflective layer away from the dielectric layer. The Bragg reflective layer includes alternating layers of high-refractive-index material and low-refractive-index material, and the refractive index of the interface layer is higher than that of the low-refractive-index material layer in the Bragg reflective layer.

[0009] A metal layer is located on the side of the reflective layer away from the semiconductor epitaxial stack, and is electrically connected to the semiconductor epitaxial stack through the reflective layer and the dielectric layer;

[0010] In the reflective layer, the thickness of the interface layer is less than the thickness of the high refractive index material layer in the Bragg reflective layer. According to another embodiment of the present invention, a semiconductor light-emitting device is provided, comprising a circuit board and a plurality of light-emitting elements disposed on the circuit board, the light-emitting elements including the LED chip mentioned in this application.

[0011] As described above, the LED chip and semiconductor light-emitting device provided by the present invention have at least the following beneficial technical effects:

[0012] The LED chip of the present invention forms a dielectric layer, a reflective layer, and a metal layer on the back side of a semiconductor epitaxial stack. The reflective layer includes a Bragg reflective layer and an interface layer located on the side of the Bragg reflective layer away from the dielectric layer. The Bragg reflective layer includes alternating layers of high-refractive-index material and low-refractive-index material. The refractive index of the interface layer is higher than that of the low-refractive-index material layer in the Bragg reflective layer; the thickness of the interface layer is less than the thickness of the high-refractive-index material layer in the Bragg reflective layer. The metal layer is in direct contact with the interface layer. The interface layer can be, for example, TiO2. x Alternatively, an Al2O3 layer can be used, which exhibits excellent adhesion to the metal layer, significantly improving the interfacial bonding and increasing the yield of the LED chip. Furthermore, both the interface layer and the Bragg reflector layer are formed from insulating transparent oxides, and some can even share the same forming material as the high-refractive-index material layer in the Bragg reflector layer. Therefore, they can be formed in the same process as the Bragg reflector layer, eliminating the need for additional processing steps and reducing manufacturing costs. Simultaneously, eliminating the light-absorbing adhesion layer also contributes to improved LED chip brightness.

[0013] Semiconductor light-emitting devices including the LED chips described above in this invention also have high yield and brightness as well as low manufacturing costs. Attached Figure Description

[0014] Figure 1 The diagram shown is a schematic representation of the light emission of an LED chip in the prior art.

[0015] Figure 2 The diagram shown is a schematic diagram of an LED chip provided in Embodiment 1 of the present invention.

[0016] Figure 3 Displayed as Figure 2 A schematic diagram of the middle reflective layer.

[0017] Figure 4 The diagram shown is a schematic of an LED chip provided in an optional embodiment, as shown in Embodiment 1.

[0018] Figure 5 The diagram shown is a schematic of the LED chip provided in Example 2.

[0019] Figure 6 The diagram shown is a schematic of the LED chip provided in Example 3.

[0020] Figure 7 The diagram shown is a schematic diagram of the semiconductor light-emitting device provided in Embodiment 4 of the present invention.

[0021] Figure Labels

[0022] 11. Epitaxial structure; 12. Dielectric layer; 13. DBR structure; 14. Adhesion layer; 15. Metal mirror.

[0023] 100, LED chip; 110, Semiconductor epitaxial stack; 111, First conductivity type semiconductor layer; 112, Active layer; 113, Second conductivity type semiconductor layer; 1101, Light-emitting surface; 1102, Back side; 1103, Electrode mesa; 114, Current spreading layer; 1141, Recessed region; 1142, Plateau region; 120, Reflective layer; 1200, Through-hole; 1211, High refractive index material layer; 1212, Low refractive index material layer; 122, Interface layer; 130, Dielectric layer; 140, Metal layer; 150, Bonding layer; 160, Substrate; 171, First electrode structure; 1711, Pad; 1712, Extended electrode; 172, Second electrode structure; 180, Ohmic contact layer; 190, Insulating protective layer.

[0024] 200, LED chip; 210, Semiconductor epitaxial stack; 211, First conductivity type semiconductor layer; 212, Active layer; 213, Second conductivity type semiconductor layer; 2100, Through hole; 2101, Light-emitting surface; 2102, Back side; 220, Reflective layer; 230, Dielectric layer; 201, Insulating layer; 240, Metal layer; 250, Bonding layer; 260, Substrate; 2711, Electrode layer; 2712, First electrode; 272, Second electrode structure; 280, Transparent conductive layer; 290, Insulating protective layer.

[0025] 300, Semiconductor light-emitting device; 301, Circuit board; 302, Die-bonding area; 400, Light-emitting element. Detailed Implementation

[0026] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0027] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components, the shape, quantity, positional relationship and proportion of each component can be arbitrarily changed under the premise of realizing the technical solution of this invention, and the layout of the components may also be more complex.

[0028] like Figure 1 As shown, in existing vertical LED chips, a dielectric layer 12, a DBR structure 13 (a stack of titanium oxide and silicon oxide), and a metal mirror 15 (Ag or Au mirror) are formed on the back side of the epitaxial structure 11 to achieve total internal reflection of light radiated from the epitaxial structure 11, allowing the LED chip to emit light from its light-emitting surface. The surface layer of the aforementioned DBR structure (i.e., the layer furthest from the epitaxial structure 11) is a silicon oxide layer. The silicon oxide layer has poor adhesion to the Ag or Au mirror, and the interface is easily peeled off. To solve this problem, a layer with a thickness between [thickness range missing] is typically sputtered between the DBR structure 13 and the metal mirror 15. The adhesion layer 14, typically ITO or IZO, requires separate sputtering due to its different material composition and evaporation conditions compared to the DBR structure 13. This undoubtedly increases the manufacturing cost of the LED chip. Furthermore, ITO or IZO has a certain light absorption effect, which affects the brightness of the LED chip. Therefore, this invention provides a new chip structure to solve the problems of high manufacturing cost and reduced LED chip brightness.

[0029] An embodiment of the present invention provides an LED chip, which includes at least:

[0030] A semiconductor epitaxial stack includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer stacked sequentially. The semiconductor epitaxial stack includes a light-emitting surface and a back surface opposite to the light-emitting surface.

[0031] A dielectric layer is located on the back side of the semiconductor epitaxial stack, and the refractive index of the dielectric layer is lower than that of the semiconductor epitaxial stack.

[0032] A reflective layer, located on the side of the dielectric layer away from the back surface, includes a Bragg reflective layer and an interface layer located on the side of the Bragg reflective layer away from the dielectric layer. The Bragg reflective layer includes alternating layers of high-refractive-index material and low-refractive-index material, and the refractive index of the interface layer is higher than that of the low-refractive-index material layer in the Bragg reflective layer.

[0033] A metal layer is located on the side of the reflective layer away from the semiconductor epitaxial stack, and is electrically connected to the semiconductor epitaxial stack through the reflective layer and the dielectric layer;

[0034] In the reflective layer, the thickness of the interface layer is less than the thickness of the high refractive index material layer in the Bragg reflective layer.

[0035] The metal layer is in direct contact with the interface layer. This interface layer can be, for example, TiO₂. x Alternatively, an Al2O3 layer can be used, exhibiting excellent adhesion to the metal layer, significantly improving the interfacial bonding and increasing the yield of the LED chip. Furthermore, both the interface layer and the Bragg reflector layer are formed from insulating transparent oxides, and some can even share the same forming material as the high-refractive-index material layer in the Bragg reflector layer. Therefore, they can be formed in the same process as the Bragg reflector layer, eliminating the need for additional processing steps and reducing manufacturing costs. Simultaneously, the back side of the semiconductor epitaxial stack consists entirely of reflective material layers, lacking any light-absorbing layers. This increases light reflection while reducing light absorption, thus improving the brightness of the LED chip.

[0036] Optionally, the thickness of the interface layer is less than one-fifth the thickness of the high refractive index material layer in the Bragg reflector layer.

[0037] Optionally, the thickness of the high refractive index material layer in the Bragg reflector is between

[0038] Optionally, the thickness of the interface layer is less than or equal to

[0039] Optionally, the high refractive index material layer is TiO2. x or NbO y The low-refractive-index material layer is SiO. z For each layer, 1.5 ≤ x ≤ 2, 1.5 ≤ y ≤ 2.5; 1 ≤ z ≤ 2.

[0040] Optionally, the total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 100.

[0041] Optionally, the total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 10.

[0042] Optionally, the total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 5.

[0043] The limitations on the thickness of the interface layer, as well as the limitations on the thickness of the high-refractive-index material layer and the low-refractive-index material layer in the Bragg reflector layer, and the limitation on the number of stacked layers, enable the reflector layer to meet the requirements for light reflection while ensuring that the Bragg reflector layer is not too thick. This is beneficial for controlling the size of the vias that enable electrical connection between the metal layer and the semiconductor epitaxial stack.

[0044] Optionally, the material forming the interface layer is the same as the material forming the high refractive index material layer.

[0045] The interface layer and the high refractive index material layer have the same forming material, so they can be formed in the same process as the Bragg reflector layer. The thickness of the interface layer can be controlled by controlling parameters such as evaporation time and evaporation rate, without adding extra processes, which helps to reduce manufacturing costs.

[0046] Optionally, the material forming the interface layer is different from the material forming the high refractive index material layer.

[0047] The material used to form the interface layer can be selected based on the type of LED chip or actual needs, ensuring adhesion between the interface layer and the metal layer while increasing the applicability of the interface layer.

[0048] Optionally, the interface layer is an Al2O3 layer or a TiO2 layer. x Layer, 1.5≤x≤2.

[0049] As the interface layer above is also a reflective material layer, there is no light-absorbing material layer on the back side of the semiconductor epitaxial stack. Therefore, while increasing the reflection of light, it can also reduce the absorption of light, which is beneficial to improving the brightness of the LED chip.

[0050] Optionally, the LED chip further includes:

[0051] An ohmic contact layer is located between the semiconductor epitaxial stack and the metal layer, and is connected to the metal layer;

[0052] A substrate is located on the side of the metal layer away from the semiconductor epitaxial stack, with the front side of the substrate facing the semiconductor epitaxial stack;

[0053] A bonding layer, located between the substrate and the metal layer, bonds the semiconductor epitaxial stack to the substrate.

[0054] Optionally, the LED chip further includes an electrode structure, the electrode structure comprising:

[0055] The first electrode structure is located on one side of the light-emitting surface and is electrically connected to a semiconductor layer of the first conductivity type.

[0056] The second electrode structure is located on the back side of the substrate and is electrically connected to the semiconductor layer of the second conductivity type.

[0057] Optionally, the LED chip further includes:

[0058] A substrate having a front side and a back side disposed opposite to each other, wherein the semiconductor epitaxial stack is located on the front side;

[0059] A metal bonding layer is located between the substrate and the metal layer;

[0060] An insulating layer is located between the bonding layer and the metal layer, and the dielectric layer, the reflective layer, the metal layer, and the insulating layer extend to the periphery of the semiconductor epitaxial stack to form a mesa structure;

[0061] The first electrode structure includes an electrode layer and a first electrode. The electrode layer is located between the metal bonding layer and the insulating layer and is electrically connected to a first conductivity type semiconductor layer. The first electrode is located on the back side of the substrate.

[0062] The second electrode structure is located above the mesa structure and is electrically connected to the second conductivity type semiconductor layer via the metal layer.

[0063] The first electrode structure and the second electrode structure enable the LED chip to be electrically connected to the outside world, thereby realizing the photoelectric conversion of the LED chip.

[0064] Optionally, the LED chip further includes:

[0065] A substrate having a front side and a back side disposed opposite to each other, wherein the semiconductor epitaxial stack is located on the front side;

[0066] A metal bonding layer is located between the substrate and the metal layer, the metal bonding layer encapsulates the metal layer and forms a mesa structure around the semiconductor epitaxial stack;

[0067] The first electrode structure is located on one side of the light-emitting surface and is electrically connected to a semiconductor layer of the first conductivity type.

[0068] The second electrode structure is located above the mesa structure and is electrically connected to the semiconductor layer of the second conductivity type.

[0069] Optionally, the material forming the dielectric layer may be the same as or different from the material forming the low-refractive-index material layer in the Bragg reflector layer.

[0070] Optionally, the dielectric layer is a MgF2 layer or a SiO2 layer.

[0071] In vertically structured LED chips, the dielectric layer acts as a current barrier, preventing current concentration and promoting lateral current diffusion. The low refractive index of the dielectric layer enables total internal reflection, increasing the reflectivity on the back side of the semiconductor stack and thus improving the brightness of the LED chip. Furthermore, since the low-refractive-index material in both the dielectric and reflective layers is the same, different material layers can be deposited using the same vapor deposition process by adjusting parameters such as deposition time and rate. This also helps to save on manufacturing processes and reduce costs.

[0072] Optionally, the metal layer includes a metal reflective layer and a current spreading layer, wherein the metal reflective layer is adjacent to the reflective layer, and the current spreading layer is located between the dielectric layer and the metal reflective layer.

[0073] The current spreading layer facilitates the uniform diffusion of current on one side of the second conductivity type semiconductor layer.

[0074] According to another embodiment of the present invention, a semiconductor light-emitting device is provided, including a circuit board and a plurality of light-emitting elements disposed on the circuit board, wherein the light-emitting elements include any of the LED chips described in this application.

[0075] Semiconductor light-emitting devices include the aforementioned LED chips, thus achieving the same high light output brightness and lower manufacturing costs.

[0076] The LED chip and semiconductor light-emitting device of this application will now be described in detail through the following specific embodiments.

[0077] Example 1

[0078] This embodiment provides an LED chip, such as Figure 2 As shown, the LED chip 100 is formed in a vertical structure, comprising at least a semiconductor epitaxial stack 110, a reflective layer 120, and a metal layer 140. The semiconductor epitaxial structure 110 has a light-emitting surface 1101 and a back surface 1102 opposite to the light-emitting surface. To improve the light emission effect of the LED chip 100, the light-emitting surface 1101 is typically formed as a roughened surface. The reflective layer 120 is located on the back surface 1102 side of the semiconductor epitaxial stack 110, and the metal layer 140 is located on the side of the reflective layer 120 away from the back surface 1102.

[0079] Similarly, refer to Figure 2The semiconductor epitaxial stack 110 includes a first conductivity type semiconductor layer 111, an active layer 112, and a second conductivity type semiconductor layer 113, which are sequentially stacked. In this embodiment, the side of the first conductivity type semiconductor layer 111 away from the active layer 112 is the light-emitting surface 1101 of the semiconductor epitaxial stack 110, and the side of the second conductivity type semiconductor layer 113 away from the active layer 112 is the back surface 1102. The material of the semiconductor epitaxial stack 110 includes Al. a In b Ga (1-a-b) N or Al a In b Ga (1-a-b) P or Al a In b Ga (1-a-b) The semiconductor material is a III-V group As, where 0 ≤ a, b ≤ 1; a + b ≤ 1. Depending on the material composition of the active layer 112, when the material of the semiconductor epitaxial stack 110 is an AlInGaP series material, it can emit red light with a wavelength between 610 nm and 750 nm or yellow light with a wavelength between 550 nm and 570 nm. When the material of the semiconductor epitaxial stack 110 is an InGaN series material, it can emit blue light or deep blue light with a wavelength between 400 nm and 490 nm or green light with a wavelength between 490 nm and 550 nm. When the material of the semiconductor epitaxial stack 110 is an AlGaN series material, it can emit ultraviolet light with a wavelength between 400 nm and 250 nm. In this embodiment, the semiconductor epitaxial stack 110 is made of an AlInGaP series material, emitting red light with a wavelength between 610 nm and 750 nm. In other embodiments, the semiconductor epitaxial stack 110 can also be an InGaN series material, emitting blue light with a wavelength between 400 nm and 490 nm.

[0080] The active layer 112 can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multiquantum well (MQW). The multiquantum well structure is formed by alternating stacks of quantum well layers and quantum barrier layers, where the quantum barrier layer can be a GaN layer, an AlGaN layer, or an AlGaInP layer. Optionally, the active layer 120 can include multiquantum well structures such as GaN / AlGaN, InAlGaN / InAlGaN, InGaN / AlGaN, GaInP / AlGaInP, GaInP / AlInP, or InGaAs / AlInGaAs. To improve the luminescence efficiency of the active layer 112, the depth of the quantum wells, the number of paired quantum wells and quantum well barriers, the thickness, and / or other characteristics can be changed within the active layer 112.

[0081] like Figure 2 and Figure 3 As shown, the reflective layer 120 is located on the back side 1102 of the semiconductor epitaxial stack 110. In the direction away from the semiconductor epitaxial stack 110, the reflective layer 120 includes a Bragg reflective layer 121 and an interface layer 122 stacked sequentially. The Bragg reflective layer 121 includes alternating layers of high-refractive-index material 1211 and low-refractive-index material 1212. Here, high refractive index and low refractive index refer to the relative refractive indices of the stacked material layers, and do not represent specific refractive index values. Similarly, the stacking order of the high-refractive-index material layer 1211 and the low-refractive-index material layer 1212 is not limiting, but exemplary. That is, the starting layer of the Bragg reflective layer 121 can be either the high-refractive-index material layer 1211 or the low-refractive-index material layer 1212. Similarly, the ending layer of the Bragg reflective layer 121 (i.e., the layer immediately adjacent to the interface layer 122) can be either the high-refractive-index material layer 1211 or the low-refractive-index material layer 1212.

[0082] The aforementioned high-refractive-index material layer 1211 and low-refractive-index material layer 1212 can be SiO2, SiN, or SiO2. x N y TiO x A distributed Bragg mirror (DBR) is formed by repeatedly stacking two or more of the following materials: Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO2, TaO2, Nb2O5, or MgF2. For example, in this embodiment, the high refractive index material layer 1211 is TiO2. xLayers (e.g., TiO2, Ti2O3, or Ti3O5) or NbO y The high-refractive-index material layer 1211 (e.g., NbO2 or Nb2O5) and the low-refractive-index material layer 1212 are SiO2 layers. In the Bragg reflector layer 121, the total number of stacked layers of the high-refractive-index material layer 1211 and the low-refractive-index material layer 1212 is between 2 and 100 layers, further between 2 and 10 layers, and even further between 2 and 5 layers, such as 3, 4, 5, or 8 layers. The thickness of the aforementioned high-refractive-index material layer 1211 and low-refractive-index material layer 1212 is between... Furthermore, given The thicknesses of the high-refractive-index material layer 1211 and the low-refractive-index material layer 1212 are typically different. Alternatively, as... Figure 3 As shown, the thickness of the aforementioned high refractive index material layer 1211 further satisfies: Furthermore, For example, it could be or In the above, 'a' represents the number of high-refractive-index material layers 121. Within the Bragg reflector layer 121, the thicknesses of the multiple high-refractive-index material layers 1211 can be the same or different.

[0083] The interface layer 122 primarily serves to increase adhesion to the subsequently formed metal layer 140; therefore, its thickness is set to be less than the thickness of the high-refractive-index material layer 1211 in the Bragg reflector layer 121. Simultaneously, to ensure that both the interface layer 122 and the Bragg reflector layer 121 can simultaneously reflect light radiated from the semiconductor epitaxial stack 110, the refractive index of the interface layer 122 is greater than the refractive index of the low-refractive-index material layer 1212 in the Bragg reflector layer 121. In an optional embodiment, the interface layer 122 and the high-refractive-index material layer 1211 in the Bragg reflector layer 121 have the same material composition. For example, when the high-refractive-index material layer 1211 is TiO₂... x Layers (e.g., TiO2, Ti2O3, or Ti3O5) or NbO y When the layer is (e.g., NbO2 or Nb2O5), the interface layer 122 is also TiO2. x Layers (e.g., TiO2, Ti2O3, or Ti3O5) or NbO y The high refractive index layer 1211 is a TiO2, Ti2O3, Ti3O5, or Nb2O5 layer, and the interface layer 122 is also a TiO2, Ti2O3, Ti3O5, or Nb2O5 layer. However, the thickness of the interface layer 122 is different from the thickness of the high refractive index material layer 1211 in the Bragg reflector layer 121.

[0084] In another optional embodiment, the interface layer 122 is formed of a different material than the high refractive index material layer 1211 in the Bragg reflector layer 121. For example, the high refractive index material layer 1211 is TiO2. x Layers (e.g., TiO2, Ti2O3, or Ti3O5) or NbO y The interface layer 122 is an Al2O3 layer (e.g., NbO2 or Nb2O5).

[0085] In an optional embodiment, the thickness of the interface layer 122 is less than one-fifth the thickness of the high-refractive-index material layer 1211 in the Bragg reflector layer 121. For example... Figure 3 As shown, in an optional embodiment, the thickness h1 of the interface layer 122 satisfies: Furthermore, Furthermore, For example

[0086] Since the interface layer 122 and the Bragg reflection layer 121 are both formed by insulating transparent oxides, and can even have the same material composition as the high refractive index material layer 1211 in the Bragg reflection layer 121, they can be formed in the same vapor deposition process as the Bragg reflection layer 121. Different thicknesses can be controlled by adjusting parameters such as vapor deposition time or vapor deposition rate, thus greatly reducing the vapor deposition process and saving costs.

[0087] Similarly, Figure 2 As shown, a dielectric layer 130 is further provided between the reflective layer 120 and the semiconductor epitaxial stack 11. The dielectric layer 130 can be SiO2, SiN, or SiO2. x N y TiO x The dielectric layer is selected from any one of Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO2, TaO2, or MgF2. To improve the brightness of the LED chip, a low-refractive-index material, such as MgF2 or SiO2, is preferred. In optional embodiments, the dielectric layer 130 and the low-refractive-index material layer 1212 in the reflective layer 120 have the same material composition, for example, both are SiO2 layers. The dielectric layer 130 and the low-refractive-index material layer 1212 have the same material composition, which can serve as components of the reflective system, increasing the reflective effect; and in some embodiments, they can be formed in the same vapor deposition process as the reflective layer 120, which also helps to save costs.

[0088] The metal layer 140 is located on the side of the reflective layer 120 away from the semiconductor epitaxial stack 110 and is electrically connected to the semiconductor epitaxial stack 110. The metal layer 140 can be one or more alloys of Ag, Al, Cu, Sn, Au, etc. As described above, in this embodiment, the reflective layer 120 includes a DBR structure, and the metal layer 140 is an Ag mirror. In this embodiment, the dielectric layer 130, the reflective layer 120, and the metal layer 140 form a total internal reflection mirror system, increasing the reflection of light radiated from the active layer 112 and enhancing the light extraction efficiency of the light-emitting diode 100. The metal layer 140 is in direct contact with the interface layer 122 in the reflective layer 120, and the interface layer 122 is TiO2. x Layers (e.g., TiO2 or Ti3O5), NbO x The layer (e.g., NbO2 or Nb2O5) or Al2O3 layer has good adhesion to the metal layer 140 (e.g., Ag mirror), and the two can form a strong and stable interface, which is beneficial to improving the stability of the LED chip.

[0089] Refer again Figure 2 An ohmic contact layer 180 is formed on the back side 1102 of the semiconductor epitaxial stack 110. This ohmic contact layer 180 can also be a metal layer or a transparent conductive layer (TCO, such as ITO). The ohmic contact layer 180 is, for example, formed as a patterned structure and covered and encapsulated by a dielectric layer 130. To achieve electrical connection between the metal layer 140 and the semiconductor epitaxial stack 110 (specifically, the second conductivity type semiconductor layer 113 therein), a via 1200 is formed penetrating the reflective layer 120 and the dielectric layer 130. The bottom of the via 1200 exposes the ohmic contact layer 180. The metal layer 140 fills the via 1200, directly contacting the ohmic contact layer 180, and is electrically connected to the second conductivity type semiconductor layer 113 via the ohmic contact layer 180. (Refer to...) Figure 2 In this embodiment, the LED chip 100 further includes a substrate 160, and a semiconductor epitaxial stack 110 is bonded to the substrate 160 from the back side 1212. A bonding layer 150 is formed between the semiconductor epitaxial stack 110 and the substrate 160. Specifically, the bonding layer 150 is disposed between the metal layer 140 and the substrate 160. The bonding layer 150 bonds the semiconductor epitaxial stack 110 and the substrate 160 together. The substrate 160 can be a semiconductor substrate or a metal substrate, etc. In this embodiment, the substrate 160 is a silicon (Si) substrate, a germanium (Ge) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, an aluminum nitride (AlN) substrate, a gallium phosphide (GaP) substrate, or a copper-tungsten alloy (CuW) substrate, etc. Optionally, the bonding layer 150 is a metal bonding layer, such as Cu, Al, Sn, Au, Ag, Pb, Ti, Ni, In, Pt, or W, etc.

[0090] like Figure 2As shown, the LED chip 100 also includes an electrode structure and an insulating protective layer 190. Specifically, the electrode structure includes a first electrode structure 171 located above the light-emitting surface 1101 of the semiconductor epitaxial stack 110 and above the first conductivity type semiconductor layer 111, and a second electrode structure 172 located on the back side of the substrate (i.e., the side away from the semiconductor epitaxial stack 110). The first electrode structure 171 has a pad 1711 and an extension electrode 1712. The extension electrode 1712 extends from the pad 1711 to other areas of the light-emitting surface to improve the current diffusion effect and uniformity on the side of the first conductivity type semiconductor layer 111. In an optional embodiment, the extension electrode 1712 is formed as a finger-shaped extension electrode 1712, and the first electrode structure 171 may include one or more of the aforementioned extension electrodes 1712. The first electrode structure 171 and the second electrode structure 172 can be metal electrodes, such as nickel, gold, chromium, titanium, platinum, palladium, rhodium, iridium, aluminum, tin, indium, tantalum, copper, cobalt, iron, ruthenium, zirconium, tungsten, molybdenum, and combinations thereof, but the embodiments disclosed herein are not limited thereto. An insulating protective layer 190 is located on the exposed sidewalls and part of the surface of the light-emitting diode 100 to protect the light-emitting diode from damage by external moisture and impurities, thereby improving the reliability of the light-emitting diode. This insulating protective layer 170 can be SiO2, Si3N4, Al2O3, TiO2, ZnO, HfO2, etc.

[0091] like Figure 4 The diagram illustrates an alternative embodiment of the LED chip 100. In this alternative embodiment, a current spreading layer 114 is formed on the side of the second conductivity type semiconductor layer 113 of the semiconductor epitaxial stack 110 away from the active layer 112. The current spreading layer 114 is preferably a P-type GaP layer. The current spreading layer 114 can reduce resistance and make the current evenly distributed throughout the entire P-type semiconductor layer (i.e., the second conductivity type semiconductor layer 113), rather than concentrated near the electrodes.

[0092] In this embodiment, as Figure 4 As shown, the current spreading layer 114 has a recessed region 1141 and a platform region 1142 surrounding the recessed region 1141. The recessed region 1141 can be formed by etching away a portion of the current spreading layer 114 from the current spreading layer 1141 towards the first conductivity type semiconductor layer 111, without etching to the interface between the second conductivity type semiconductor layer 113 and the active layer 112; that is, the bottom of the recessed region 1141 is located within the current spreading layer 114 or the second conductivity type semiconductor layer 113. Optionally, the thickness of the current spreading layer 114 is between... The depth of the depression 1141 is between The current spreading layer 114 is relatively thin, for example, in When the current spread layer 1141 extends through the current spread layer 114 to the second conductivity type semiconductor layer 113, the bottom of the recessed region 1141 is located in the second conductivity type semiconductor layer 113. The current spread layer 114 is relatively thick, for example, greater than... In this configuration, the recessed region 1141 does not penetrate the current spreading layer 114, meaning the bottom of the recessed region 1141 is located within the current spreading layer 114. This arrangement of the recessed region 1141 reduces light absorption and improves the chip's luminous efficiency. In an optional embodiment, the shape of the longitudinal cross-section of the recessed region 1141 can be any suitable shape, such as a rectangle, triangle, or trapezoid. In an optional embodiment, an ohmic contact layer 180 is formed on the surface of the current spreading layer 114 away from the second conductivity type semiconductor layer 113. This ohmic contact layer 180 can also be a metal layer or a transparent conductive layer (TCO, such as ITO). This ohmic contact layer 180 facilitates the formation of ohmic contacts with the subsequent metal layer 140, improving current diffusion.

[0093] Similarly, refer to Figure 4 A dielectric layer 130 is formed on the side of the current spreading layer 114 away from the second conductivity type semiconductor layer 113. This dielectric layer 130 fills the aforementioned recessed region 1141 and covers the plateau region 1142. A relatively thick dielectric layer 130 can be formed, and a planarization process can be used to create a flat surface on the side of the dielectric layer 130 away from the current spreading layer 114. This facilitates the subsequent formation of a flat structure for the reflective layer 120, improving its reflective effect. The arrangement of the reflective layer 120 and the metal layer 140 is similar to that described above. Figure 2 and Figure 3 The settings in the LED 100 shown are the same, and will not be described again.

[0094] Example 2

[0095] This embodiment also provides an LED chip, see reference. Figure 5 As shown, the LED chip 200 is also formed in a vertical structure, and it also includes at least a semiconductor epitaxial stack 210, a reflective layer 220, and a metal layer 240. The semiconductor epitaxial structure 210 includes a first conductivity type semiconductor layer 211, an active layer 212, and a second conductivity type semiconductor layer 213 stacked sequentially. The semiconductor epitaxial stack 210 also has a light-emitting surface 2101 and a back surface 2102 opposite to the light-emitting surface, and the light-emitting surface 2101 is also formed as a roughened surface. The aforementioned reflective layer 220 is located on the back surface 2102 side of the semiconductor epitaxial stack 210, and the metal layer 240 is located on the side of the reflective layer 220 away from the back surface 2102. The reflective layer 220 also includes a Bragg reflective layer 221 and an interface layer 222. The aforementioned semiconductor epitaxial stack 210 and reflective layer 220 have the same configuration as the semiconductor epitaxial stack 110 and reflective layer 120 in Embodiment 1, and will not be described again.

[0096] The difference between this embodiment and Embodiment 1 is that:

[0097] The semiconductor epitaxial stack 210 has a via 2100 formed therein. The via 2100 extends from one side of the second conductivity type semiconductor layer 213 through the second conductivity type semiconductor layer 213 and the active layer 212, and extends into the first conductivity type semiconductor layer 211 to expose the first conductivity type semiconductor layer 211. The reflective layer 220 extends from the surface of the second conductivity type semiconductor layer 213 to cover the sidewall of the via 2100 to protect the semiconductor layer exposed by the sidewall of the via 2100, and at the same time facilitates the reflection of the radiation light from the active layer 212, thereby increasing the brightness.

[0098] A dielectric layer 230 is also disposed between the reflective layer 220 and the second conductivity type semiconductor layer 213. The arrangement of the reflective layer 220 and the dielectric layer 230 is the same as that in Embodiment 1, and will not be described again here. Figure 5 As shown, the LED chip 200 in this embodiment also includes a transparent conductive layer 280. This transparent layer 280 is located between the dielectric layer 230 and the second conductivity type semiconductor layer 230, and forms an ohmic contact with the second conductivity type semiconductor layer 230. The material of the transparent conductive layer 280 can be, for example, alloy materials such as ITO, IZO, AuZn, AuGe, NiAu, AuGeNi, or AuBe. The reflective layer 220 and the dielectric layer 230 are formed into a patterned structure to expose part of the transparent conductive layer 280. The metal layer 240 covers the reflective layer 220 and fills the hollow portions in the patterned reflective layer 220 to contact the transparent conductive layer 280. The metal layer 240 does not extend into the via 2100 to avoid short circuits with subsequent metal electrode materials.

[0099] Refer again Figure 5 The LED chip 200 also includes a substrate 260, an insulating layer 201, and a metal bonding layer 250. The substrate 260 has a front side and a back side disposed opposite to each other, and the semiconductor epitaxial stack 210 is located on the front side of the substrate 260. The substrate 260 and the metal bonding layer 250 have the same configuration as the substrate 260 and the metal bonding layer 250 in Embodiment 1, and will not be described again here. The insulating layer 201 is located between the substrate 260 and the metal layer 240, and extends to the sidewall of the via 2100, covering the dielectric layer 230 on the sidewall. Together with the dielectric layer 230, it protects the semiconductor layer at the sidewall of the via 2100 and reflects light. The dielectric layer 230, the reflective layer 220, the metal layer 240, and the insulating layer 201 extend to the periphery of the semiconductor epitaxial stack 210, forming a mesa structure.

[0100] The aforementioned metal layer 240 can also be one or more alloys of Ag, Al, Cu, Sn, Au, etc. As described above, in this embodiment, the reflective layer 220 is also a DBR structure, the metal reflective layer 2401 is an Ag mirror, and the reflective layer 220, dielectric layer 130, and metal layer 140 form a total internal reflection mirror system, increasing the reflection of light radiated from the active layer 212 and enhancing the light extraction efficiency of the light-emitting diode 200. The metal layer 240 is in direct contact with the interface layer 222 in the reflective layer 220, and the interface layer 222 is also TiO2. x Layers (e.g., TiO2 or Ti3O5), NbO y The layer (e.g., NbO2 or Nb3O5) or Al2O3 layer has good adhesion to the metal layer 240 (e.g., Ag mirror), and the two can form a strong and stable interface, which is beneficial to improving the stability of the LED chip.

[0101] like Figure 5 As shown, the metal bonding layer 250 is located between the substrate 260 and the insulating layer 201, and the metal bonding layer 250 fills the via 2100, forming a conductive plunger-like structure in the via 2100. Similarly, referring to... Figure 5 The LED chip 200 also includes an electrode structure, comprising a first electrode structure and a second electrode structure 272. The first electrode structure includes an electrode layer 2711 and a first electrode 2712. The electrode layer 2711 is located between the metal bonding layer 250 and the insulating layer 201. The electrode layer 2711 extends into the via 2100, covering the dielectric layer 130 on the sidewall and the exposed first conductive semiconductor layer 211 at the bottom, for electrical connection with the first conductive semiconductor layer 211. The first electrode 2712 is located on the back side of the substrate 260, and is electrically connected to the metal bonding layer 250 and the electrode layer 1711 via the substrate 260. The second electrode structure 272 is located above the mesa structure, specifically formed above the metal layer 240 in the mesa structure, and is electrically connected to the second conductive semiconductor layer 213 via the metal layer 240.

[0102] Refer again Figure 5 The surface of the LED chip 200 is also covered with an insulating protective layer 290, which can be SiO2, SiN, or SiO2. x N y TiO x The insulating protective layer 290 can protect the semiconductor epitaxial stack 210 from external moisture, impurities, etc., which is beneficial to improving the reliability and yield of the LED chip 200.

[0103] Example 3

[0104] This embodiment also provides an LED chip, see reference. Figure 6 As shown, the LED chip 100 also includes at least a semiconductor epitaxial stack 110, a reflective layer 120, a metal layer 140, a bonding layer 150, and a substrate 160. The semiconductor epitaxial structure 110 includes a first conductivity type semiconductor layer 111, an active layer 112, and a second conductivity type semiconductor layer 113 stacked sequentially. The semiconductor epitaxial stack 110 also has a light-emitting surface 1101 and a back surface 1102 opposite to the light-emitting surface, and the light-emitting surface 1101 is also formed as a roughened surface. The aforementioned reflective layer 120 is located on one side of the back surface 1102 of the semiconductor epitaxial stack 110, and the metal layer 140 is located on the side of the reflective layer 120 away from the back surface 1102. The reflective layer 220 also includes a Bragg reflective layer 121 and an interface layer 122. The aforementioned semiconductor epitaxial stack 110 and reflective layer 120 have the same configuration as the semiconductor epitaxial stack 110 and reflective layer 120 in Embodiment 1, and will not be described again.

[0105] The difference between this embodiment and Embodiment 1 is that:

[0106] like Figure 6 As shown, in the LED chip 100 of this embodiment, a mesa structure 1103 is formed on the side of the light-emitting surface 1101 of the semiconductor epitaxial stack 100. The surface of the mesa structure 1103 is a second conductivity type semiconductor layer 113. The substrate 160 is an insulating substrate, such as a glass substrate or a ceramic substrate. Preferably, the substrate 160 in this embodiment is an AlN ceramic substrate. The bonding layer 150 is located between the substrate 160 and the metal layer 140, and the bonding layer 150 encapsulates the metal layer 140, the reflective layer 120, and the dielectric layer 130, and extends along the sidewalls of the metal layer 140, the reflective layer 120, and the dielectric layer 130 to the back surface 1102 of the semiconductor epitaxial stack 110. The second electrode 172 is formed above the mesa structure 1103 and is connected to the bonding layer 150 through the second conductivity type semiconductor layer 113 in the mesa structure 1103. It is electrically connected to the second conductivity type semiconductor layer 113 through the bonding layer 150, the metal layer 140 and the ohmic contact layer 180.

[0107] Example 4

[0108] This embodiment provides a semiconductor light-emitting device, such as... Figure 7As shown, the semiconductor light-emitting device 300 includes a circuit board 301 and a plurality of light-emitting elements 400 disposed on the circuit board 301. A die-bonding region 302 is provided on one side of the circuit board 301 where the light-emitting elements 400 are disposed. This die-bonding region 302 is used to mount LED chips. The die-bonding region 302 includes two spaced-apart portions, which are electrically connected to the circuit layer 301. The aforementioned light-emitting unit 400 can be any one type of LED chip or a combination of multiple LED chips provided in Embodiments 1 to 3. The LED chip is connected to the die-bonding region 302 via an electrode structure and achieves electrical connection with the circuit board 301.

[0109] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. An LED chip, characterized in that, At least including: A semiconductor epitaxial stack includes a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer stacked sequentially. The semiconductor epitaxial stack includes a light-emitting surface and a back surface opposite to the light-emitting surface. A dielectric layer is located on the back side of the semiconductor epitaxial stack, and the refractive index of the dielectric layer is lower than that of the semiconductor epitaxial stack. A reflective layer, located on the side of the dielectric layer away from the back surface, includes a Bragg reflective layer and an interface layer located on the side of the Bragg reflective layer away from the dielectric layer. The Bragg reflective layer includes alternating layers of high-refractive-index material and low-refractive-index material, and the refractive index of the interface layer is higher than that of the low-refractive-index material layer in the Bragg reflective layer. A metal layer is located on the side of the reflective layer away from the semiconductor epitaxial stack, and is electrically connected to the semiconductor epitaxial stack through the reflective layer and the dielectric layer; In the reflective layer, the thickness of the interface layer is less than the thickness of the high refractive index material layer in the Bragg reflective layer.

2. The LED chip according to claim 1, characterized in that, The thickness of the interface layer is less than one-fifth the thickness of the high refractive index material layer in the Bragg reflector layer.

3. The LED chip according to claim 1, characterized in that, The thickness of the high refractive index material layer in the Bragg reflector is between 4. The LED chip according to claim 1, characterized in that, The thickness of the interface layer is less than or equal to 5. The LED chip according to claim 1, characterized in that, The high refractive index material layer is TiO₂. x or NbO y The low-refractive-index material layer is SiO. z For each layer, 1.5 ≤ x ≤ 2, 1.5 ≤ y ≤ 2.5; 1 ≤ z ≤ 2.

6. The LED chip according to claim 1, characterized in that, The total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 100.

7. The LED chip according to claim 1, characterized in that, The total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 10.

8. The LED chip according to claim 1, characterized in that, The total number of stacked layers of the high-refractive-index material layer and the low-refractive-index material layer is between 2 and 5.

9. The LED chip according to claim 1, characterized in that, The material forming the interface layer is the same as the material forming the high refractive index material layer.

10. The LED chip according to claim 1, characterized in that, The material forming the interface layer is different from the material forming the high refractive index material layer.

11. The LED chip according to claim 1, characterized in that, The interface layer is an Al2O3 layer or a TiO2 layer. x Layer, 1.5≤x≤2.

12. The LED chip according to claim 1, characterized in that, Also includes: An ohmic contact layer is located between the semiconductor epitaxial stack and the metal layer, and is connected to the metal layer; A substrate is located on the side of the metal layer away from the semiconductor epitaxial stack, with the front side of the substrate facing the semiconductor epitaxial stack; A bonding layer, located between the substrate and the metal layer, bonds the semiconductor epitaxial stack to the substrate.

13. The LED chip according to claim 12, characterized in that, It also includes an electrode structure, which comprises: The first electrode structure is located on one side of the light-emitting surface and is electrically connected to a semiconductor layer of the first conductivity type. The second electrode structure is located on the back side of the substrate and is electrically connected to the semiconductor layer of the second conductivity type.

14. The LED chip according to claim 14, characterized in that, Also includes: A substrate having a front side and a back side disposed opposite to each other, wherein the semiconductor epitaxial stack is located on the front side; A metal bonding layer is located between the substrate and the metal layer; An insulating layer is located between the bonding layer and the metal layer, and the dielectric layer, the reflective layer, the metal layer, and the insulating layer extend to the periphery of the semiconductor epitaxial stack to form a mesa structure; The first electrode structure includes an electrode layer and a first electrode. The electrode layer is located between the metal bonding layer and the insulating layer and is electrically connected to a first conductivity type semiconductor layer. The first electrode is located on the back side of the substrate. The second electrode structure is located above the mesa structure and is electrically connected to the second conductivity type semiconductor layer via the metal layer.

15. The LED chip according to claim 1, characterized in that, Also includes: A substrate having a front side and a back side disposed opposite to each other, wherein the semiconductor epitaxial stack is located on the front side; A metal bonding layer is located between the substrate and the metal layer, the metal bonding layer encapsulates the metal layer and forms a mesa structure on the periphery of the semiconductor epitaxial stack; The first electrode structure is located on one side of the light-emitting surface and is electrically connected to a semiconductor layer of the first conductivity type. The second electrode structure is located above the mesa structure and is electrically connected to the semiconductor layer of the second conductivity type.

16. The LED chip according to claim 1, characterized in that, The material forming the dielectric layer may be the same as or different from the material forming the low-refractive-index material layer in the Bragg reflector layer.

17. The LED chip according to claim 12, characterized in that, The dielectric layer is a MgF2 layer or a SiO2 layer.

18. The LED chip according to claim 14, characterized in that, The metal layer includes a metal reflective layer and a current spreading layer, wherein the metal reflective layer is adjacent to the reflective layer and the current spreading layer is located between the dielectric layer and the metal reflective layer.

19. A semiconductor light-emitting device, characterized in that, It includes a circuit board and a plurality of light-emitting elements disposed on the circuit board, wherein the light-emitting elements include the LED chip according to any one of claims 1 to 18.