PCB automatic wiring method and device, computer equipment and storage medium

Abstract

The invention relates to a PCB automatic wiring method and device, computer equipment and a storage medium, and the method comprises the steps: constructing a joint entropy model; the feature entropy of each wiring area in the joint entropy model corresponds to different weight coefficients; based on the plurality of wiring optimization targets, establishing a corresponding reinforcement learning agent; inputting the real-time wiring state of the PCB layout to be wired into the trained reinforcement learning agent so as to output a corresponding target action; the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target wiring area based on the dynamically adjusted joint entropy model; and generating a target wiring path corresponding to the next target wiring area. Through application of the method and the device, the problem of low wiring quality caused by lack of dynamic quantitative evaluation of spatial distribution complexity and incapability of being suitable for PCB wiring in high-frequency and high-density scenes is solved, dynamic quantitative evaluation of the spatial distribution complexity is realized so as to be suitable for PCB wiring in the high-frequency and high-density scenes, and the wiring quality is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of PCB automatic design, and particularly relates to a PCB automatic wiring method and device, computer equipment and a storage medium. BACKGROUND

[0002] With the rapid development of computer technology, chip integration has increased significantly, and automatic wiring has become an irreplaceable aspect in printed circuit board (PCB) design. Through automatic wiring, the labor cost and time expenditure can be significantly reduced. However, in the current automatic wiring algorithm, simple wiring design is usually based on artificial definition of features (such as wire density and length), and there is a lack of dynamic quantitative evaluation of spatial distribution complexity, which cannot be applied to PCB wiring in high-frequency and high-density scenarios, resulting in low wiring quality.

[0003] In view of the problem in the related art that there is a lack of dynamic quantitative evaluation of spatial distribution complexity, which cannot be applied to PCB wiring in high-frequency and high-density scenarios, resulting in low wiring quality, no effective solution has been proposed so far. SUMMARY

[0004] The present application provides a PCB automatic wiring method, device, computer equipment and storage medium to solve the problem in the related art that there is a lack of dynamic quantitative evaluation of spatial distribution complexity, which cannot be applied to PCB wiring in high-frequency and high-density scenarios, resulting in low wiring quality.

[0005] In a first aspect, the present application provides a PCB automatic wiring method, which comprises:

[0006] constructing a joint entropy model for determining the entropy value of a wiring area; each wiring area feature entropy in the joint entropy model corresponds to a different weight coefficient;

[0007] based on a plurality of wiring optimization objectives of a to-be-wired PCB layout, establishing a corresponding reinforcement learning agent, and training the reinforcement learning agent;

[0008] inputting the real-time wiring state of the to-be-wired PCB layout into the trained reinforcement learning agent to output a target action corresponding to the real-time wiring state; the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target wiring area in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model;

[0009] based on the next target wiring area in the target action, generating a target wiring path corresponding to the next target wiring area.

[0010] In some embodiments, the joint entropy model for determining the wiring area entropy value is constructed, comprising:

[0011] feature extraction is performed on each grid cell in each physical layer plane in the to-be-wired PCB layout to obtain a plurality of feature parameters of each grid cell;

[0012] determining a corresponding implicit space feature based on layout information of the to-be-wired PCB layout;

[0013] weighting and fusing a first wiring area feature entropy of each feature parameter and a second wiring area feature entropy of the implicit space feature to construct the joint entropy model.

[0014] In some embodiments, the geometry of each grid cell is adapted to the PCB board outline in the to-be-wired PCB layout.

[0015] In some embodiments, the implicit space feature includes an element topology feature and an electromagnetic coupling feature; and the determining of the implicit space feature corresponding to the layout information of the to-be-wired PCB layout comprises:

[0016] determining first input data and second input data based on the layout information of the to-be-wired PCB layout; the first input data includes node features and edge features of element connection relationships, and the second input data includes an electromagnetic field distribution matrix;

[0017] performing feature extraction on the first input data through a graph convolution network to obtain the element topology feature;

[0018] performing compression processing on the second input data through an autoencoder to obtain the electromagnetic coupling feature; the electromagnetic coupling feature is an electromagnetic distribution latent variable.

[0019] In some embodiments, the determining of the second wiring area feature entropy of the implicit space feature comprises:

[0020] determining an intra-class distribution entropy of the element topology feature based on a clustering result of the element topology feature; the element topology feature is a first multi-dimensional feature vector;

[0021] determining a principal component variance entropy of the electromagnetic coupling feature based on a principal component dimension reduction result of the electromagnetic coupling feature; the electromagnetic coupling feature is a second multi-dimensional feature vector;

[0022] determining the second wiring area feature entropy of the implicit space feature according to the intra-class distribution entropy and the principal component variance entropy.

[0023] In some embodiments, the PCB in the to-be-routed PCB layout is a flexible PCB; after determining the corresponding implicit spatial features based on the layout information of the to-be-routed PCB layout, the method further comprises:

[0024] determining a corresponding strain-aware entropy based on the finite element simulation strain data of the PCB;

[0025] weighting and fusing the first routing area feature entropy of each feature parameter, the second routing area feature entropy of the implicit spatial features, and the strain-aware entropy to obtain the joint entropy model.

[0026] In some embodiments, the method further comprises:

[0027] determining a routing decision space corresponding to the to-be-routed PCB layout; the routing decision space comprises a routing state space and a routing action space;

[0028] constructing a corresponding multi-objective cost function and / or reward function based on the plurality of routing optimization objectives of the to-be-routed PCB layout;

[0029] establishing a corresponding reinforcement learning agent based on the multi-objective cost function and / or the reward function, and the routing decision space.

[0030] In some embodiments, the method further comprises:

[0031] determining a plurality of training scenarios in a simulation PCB routing environment; each training scenario corresponds to a different PCB physical structure and the routing optimization objective;

[0032] based on each training scenario, performing multi-stage curriculum learning on the reinforcement learning agent using a proximal policy optimization algorithm to obtain the trained reinforcement learning agent.

[0033] In some embodiments, the method further comprises:

[0034] during the training process of the reinforcement learning agent, in response to an area selection action output by the reinforcement learning agent, processing a routing area selected by the area selection action through a path planning algorithm to obtain a corresponding routing path;

[0035] determining an actual value of the multi-objective cost function and / or the reward function based on the routing path;

[0036] dynamically adjust the reinforcement learning agent based on the actual values of the multi-objective cost function and / or the reward function.

[0037] In some embodiments, determining the next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model comprises:

[0038] determining an entropy value of each current candidate routing area in the to-be-routed PCB layout according to the dynamically adjusted joint entropy model;

[0039] generating a corresponding candidate area list based on a preset number of current candidate routing areas with the lowest entropy values;

[0040] selecting the next target routing area from the current candidate routing areas in the candidate area list based on the real-time routing state of the to-be-routed PCB layout through the policy network of the trained reinforcement learning agent.

[0041] In some embodiments, the method further comprises:

[0042] determining third input data based on the real-time routing state of the to-be-routed PCB layout; the third input data comprises an element layout image, a power network distribution, and a historical routing entropy value;

[0043] processing the third input data through a pre-trained heat map prediction model to obtain a corresponding entropy heat map;

[0044] based on the entropy heat map, performing shielding processing on a high-entropy area in the to-be-routed PCB layout to obtain an optimized to-be-routed PCB layout, taking the optimized to-be-routed PCB layout as the latest routing search space of the reinforcement learning agent.

[0045] In some embodiments, the shielding processing on the high-entropy area in the to-be-routed PCB layout based on the entropy heat map comprises:

[0046] determining predicted entropy values of different routing areas in the to-be-routed PCB layout based on the entropy heat map;

[0047] determining the routing area with a predicted entropy value greater than a shielding threshold as the high-entropy area; the shielding threshold is dynamically adjusted based on real-time routing progress and the number of current routing rule violations;

[0048] shielding processing on the high-entropy area in the to-be-routed PCB layout.

[0049] In some embodiments, the generating, based on the next target routing area in the target action, a target routing path corresponding to the next target routing area comprises:

[0050] inputting an element layout map of the next target routing area in the target action into a pre-trained generative adversarial network to output a corresponding routing path mask; the routing path mask contains the target routing path;

[0051] wherein the generator of the generative adversarial network is configured to generate the routing path mask based on the element layout map; and the discriminator of the generative adversarial network is configured to evaluate the local authenticity of the target routing path.

[0052] In some embodiments, the method further comprises:

[0053] performing physical rule checking on the target routing path by a physical rule checking layer integrated in the generator; the physical rule checking comprises one or more combinations of minimum line width checking, conductor width detection, via spacing checking, and microstrip line width error checking.

[0054] In a second aspect, a PCB automatic routing device is provided in the embodiments, comprising:

[0055] a construction module configured to construct a joint entropy model for determining routing area entropy values; each routing area feature entropy in the joint entropy model corresponds to a different weight coefficient;

[0056] a building module configured to build a corresponding reinforcement learning agent based on a plurality of routing optimization objectives of a to-be-routed PCB layout, and train the reinforcement learning agent;

[0057] a decision module configured to input a real-time routing state of the to-be-routed PCB layout into the trained reinforcement learning agent to output a target action corresponding to the real-time routing state; the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model;

[0058] a generation module configured to generate, based on the next target routing area in the target action, a target routing path corresponding to the next target routing area.

[0059] In a third aspect, a computer device is provided in the embodiments, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the PCB automatic routing method of the first aspect when executing the computer program.

[0060] In a fourth aspect, a storage medium is provided in the present embodiment, and the storage medium stores a computer program, and the computer program is executed by a processor to implement the PCB automatic wiring method in the first aspect.

[0061] Compared with the related art, the PCB automatic wiring method, device, computer device and storage medium provided in the present embodiment, by constructing a joint entropy model for determining the wiring area entropy value; each wiring area feature entropy in the joint entropy model corresponds to a different weight coefficient; based on a plurality of wiring optimization objectives of the to-be-wired PCB layout, a corresponding reinforcement learning agent is established; input the real-time wiring state of the to-be-wired PCB layout into the trained reinforcement learning agent to output the target action corresponding to the real-time wiring state; the target action includes dynamically adjusting each weight coefficient of the joint entropy model, and determining the next target wiring area in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model; based on the next target wiring area in the target action, a target wiring path corresponding to the next target wiring area is generated, which solves the problem of lack of dynamic quantitative evaluation of spatial distribution complexity, inability to apply PCB wiring in high-frequency and high-density scenarios, and low wiring quality, realizes dynamic quantitative evaluation of spatial distribution complexity to apply PCB wiring in high-frequency and high-density scenarios, and significantly improves the wiring quality.

[0062] The details of one or more embodiments of the present application are presented in the following drawings and description to make other features, objects and advantages of the present application more apparent. BRIEF DESCRIPTION OF DRAWINGS

[0063] The accompanying drawings illustrated herein are used to provide further understanding of the present application, and constitute a part of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation on the present application. In the drawings:

[0064] Figure 1 is a hardware structure block diagram of the terminal device of the PCB automatic wiring method provided by an embodiment of the present application;

[0065] Figure 2 is a flowchart of the PCB automatic wiring method provided by an embodiment of the present application;

[0066] Figure 3 is a flowchart of the GCN feature extraction method provided by an embodiment of the present application;

[0067] Figure 4 is a schematic diagram of the reinforcement learning agent provided by an embodiment of the present application;

[0068] Figure 5 is a schematic diagram of the U-net heat map prediction model provided by an embodiment of the present application;

[0069] Figure 6 is a schematic diagram of a generative adversarial network provided by an embodiment of the present application;

[0070] Figure 7 is a flowchart of a PCB automatic wiring method provided by a preferred embodiment of the present application;

[0071] Figure 8 is a structural block diagram of a PCB automatic wiring device provided by an embodiment of the present application.

[0072] In the figure: 102, processor; 104, memory; 106, transmission device; 108, input and output device; 10, construction module; 20, establishment module; 30, decision module; 40, generation module. DETAILED DESCRIPTION

[0073] In order to more clearly understand the objectives, technical solutions and advantages of the present application, the present application is described and explained below in conjunction with the accompanying drawings and embodiments.

[0074] Unless otherwise defined, technical terms or scientific terms used in the present application shall have the general meaning understood by a person with ordinary skill in the art to which the present application belongs. In the present application, "one", "a", "an", "the", "these" and similar words do not represent a quantitative limitation, and they can be singular or plural. In the present application, the terms "include", "contain", "have" and any variants thereof have the purpose of covering non-exclusive inclusion; for example, a process, method and system, product or device containing a series of steps or modules (units) are not limited to the listed steps or modules (units), but can include steps or modules (units) not listed, or can include other steps or modules (units) inherent to the process, method, product or device. In the present application, the terms "connected", "connected", "coupled" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. In the present application, "multiple" means two or more. The association between the associated objects is described by the term "and / or", which means that there can be three relationships, for example, "A and / or B" can mean that A exists alone, A and B exist together, and B exists alone. In general, the character " / " represents an "or" relationship between the objects before and after it. In the present application, the terms "first", "second", "third" and the like are only used to distinguish similar objects, and do not represent a specific order for the objects.

[0075] The method embodiments provided in the present embodiment can be executed in a terminal, a computer or a similar computing device. For example, the method embodiments are run on a terminal, Figure 1is a hardware structure block diagram of a terminal of the PCB automatic routing method of the embodiment. As shown in Figure 1 , the terminal can include one or more (only one is shown in Figure 1 ) processors 102 and a memory 104 for storing data, wherein the processor 102 can include but not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA. The above terminal can also include a transmission device 106 for communication function and an input and output device 108. Those skilled in the art can understand that Figure 1 the structure shown is only schematic, which does not limit the structure of the above terminal. For example, the terminal can include more or less components than those shown in Figure 1 , or have a different configuration from that shown in Figure 1 .

[0076] The memory 104 can be used to store computer programs, such as software programs and modules of application software, and the computer program corresponding to the PCB automatic routing method in the embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implements the above method. The memory 104 can include a high-speed random access memory, and can also include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid-state memories. In some examples, the memory 104 can further include a memory remotely arranged with respect to the processor 102, which can be connected to the terminal through a network. Examples of the above network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0077] The transmission device 106 is used to receive or send data via a network. The above network includes a wireless network provided by a communication provider of the terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC for short), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (Radio Frequency, RF for short) module, which is used to communicate with the Internet in a wireless manner.

[0078] In the embodiment, a PCB automatic routing method is provided, Figure 2 is a flowchart of the PCB automatic routing method of the embodiment, as shown in Figure 2 , the flowchart includes the following steps:

[0079] Step S220, constructing a joint entropy model for determining the entropy value of the routing area; each routing area feature entropy in the joint entropy model corresponds to a different weight coefficient;

[0080] Specifically, by grid modeling each physical layer plane in the to-be-routed PCB layout, each plane is divided into a plurality of grid cells, feature extraction is performed on each grid cell, a plurality of feature parameters of each grid cell are obtained, each feature parameter includes wire density (wire length in a unit grid and grid cell area), plating hole density (number of plating holes in the grid cell), current density, signal coupling strength (product of adjacent network signal frequency difference and parallel wire length), etc. At the same time, the layout information of the to-be-routed PCB layout is extracted by a machine learning algorithm to obtain the hidden space features of the PCB layout, which include but are not limited to element topology features and electromagnetic distribution features. It can be understood that the routing area features used to construct the joint entropy model can be selected based on actual application, which is not specifically limited here.

[0081] Further, a two-dimensional information entropy calculation is performed on each feature parameter (such as wire density) to obtain a first routing area feature entropy of each feature parameter, and a second routing area feature entropy of the hidden space features is calculated, and the first routing area feature entropy and the second routing area feature entropy of each feature parameter are fused by weighting to construct a joint entropy model. It should be noted that the joint entropy model is used to determine the routing area entropy value, each routing area feature entropy in the joint entropy model corresponds to a different weight coefficient, and each weight coefficient can be dynamically adjusted.

[0082] Step S240, based on a plurality of routing optimization objectives of the to-be-routed PCB layout, a corresponding reinforcement learning agent is established, and the reinforcement learning agent is trained;

[0083] Specifically, a routing decision space corresponding to the to-be-routed PCB layout is defined in advance, and the routing decision space includes a routing state space and a routing action space. The routing state space represents the real-time routing state of the to-be-routed PCB layout through structured information, i.e., represents the current routing environment, and the real-time routing state includes the current routing progress (expressed in percentage), the local entropy value (such as the 5x5 grid cell entropy average centered on the current routing point), the un-routed network list (including network priority, length constraint), etc. The routing action space is used to define the executable operations of the agent, including dynamically adjusting the weight coefficients of the joint entropy model (continuous action), and selecting the next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model (discrete action).

[0084] Furthermore, multiple routing optimization objectives are obtained for the PCB layout to be routed. These objectives include routing area entropy, routing path length, violation penalties based on routing rules, and electromagnetic interference risk scores. Based on each routing optimization objective, a corresponding multi-objective cost function and / or reward function are constructed to provide evaluation criteria for policy learning. Based on the multi-objective cost function and / or reward function, and the routing decision space, a corresponding reinforcement learning agent is built using a policy network. The policy network generates action probability distributions based on state inputs to guide routing decisions.

[0085] Subsequently, the reinforcement learning agent is trained in a simulated PCB routing environment to obtain the trained reinforcement learning agent. During the training process, the parameter optimization of the policy network depends on the feedback of the multi-objective cost function and / or reward function. For example, based on a custom PCB routing environment of OpenAI Gym, simulating the routing optimization task of a printed circuit board, a parallel training architecture can be adopted. Sixteen workers execute actions and collect data in parallel in their respective environments. The central learner summarizes the data, updates the policy network, and synchronizes it to each worker. The convergence condition is set to an average reward of more than 8.5 for 100 consecutive rounds, so as to eliminate the influence of random factors through the average reward of multiple rounds and ensure that the agent policy stably reaches near-optimal routing performance in most scenarios.

[0086] Step S260: Input the real-time routing status of the PCB layout to be routed into the trained reinforcement learning agent to output the target action corresponding to the real-time routing status; the target action includes dynamically adjusting the weight coefficients of the joint entropy model, and determining the next target routing area in the PCB layout to be routed based on the dynamically adjusted joint entropy model.

[0087] Specifically, in the actual routing analysis of the PCB layout to be routed, the real-time routing status of the PCB layout to be routed is input into the trained reinforcement learning agent to output the target action corresponding to the real-time routing status. The target action includes dynamically adjusting the weight coefficients of the joint entropy model and determining the next target routing area in the PCB layout to be routed based on the dynamically adjusted joint entropy model.

[0088] Specifically, after adjusting the weight coefficients, the entropy value of each current candidate routing region in the PCB layout to be routed is calculated according to the dynamically adjusted joint entropy model. Based on the preset number of current candidate routing regions with the lowest entropy values, a corresponding candidate region list is generated. Based on the real-time routing status of the PCB layout to be routed, the next target routing region is selected from each current candidate routing region in the candidate region list through the policy network of the trained reinforcement learning agent.

[0089] Step S280, based on the next target wiring area in the target action, a target wiring path corresponding to the next target wiring area is generated.

[0090] Specifically, the element layout map of the next target wiring area in the target action is input into the pre-trained generative adversarial network to output a corresponding wiring path mask, and the wiring path mask contains the target wiring path. Wherein, the generator of the generative adversarial network is used to generate the wiring path mask based on the element layout map, and the discriminator of the generative adversarial network is used to evaluate the local authenticity of the target wiring path. In other embodiments, A-star algorithm, steiner tree algorithm, etc. can be used for path planning to obtain the target wiring path.

[0091] With the rapid development of computer technology, chip integration has increased significantly, and automatic wiring has become an irreplaceable aspect in printed circuit board design. Through automatic wiring, labor costs and time overhead can be significantly reduced. However, in the current automatic wiring algorithm, simple wiring design is usually based on manually defined features such as wire density and length, lacking dynamic quantitative evaluation of spatial distribution complexity, and unable to apply to PCB wiring in high-frequency and high-density scenarios, resulting in low wiring quality.

[0092] Compared with the prior art, the joint entropy model for determining the wiring area entropy value is constructed; each wiring area feature entropy in the joint entropy model corresponds to a different weight coefficient; based on multiple wiring optimization targets of the to-be-wired PCB layout, a corresponding reinforcement learning agent is established; the real-time wiring state of the to-be-wired PCB layout is input into the trained reinforcement learning agent to output a target action corresponding to the real-time wiring state; the target action includes dynamically adjusting the weight coefficients of the joint entropy model, and determining the next target wiring area in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model; based on the next target wiring area in the target action, a target wiring path corresponding to the next target wiring area is generated. Based on this, by fusing different wiring area feature entropies to construct a dynamically weighted joint entropy model, the spatial distribution complexity is quantitatively evaluated, and a reinforcement learning agent is constructed based on multiple optimization targets, and the real-time entropy calculation and the wiring decision are efficiently coupled, so that the trained reinforcement learning agent can decide and optimize the wiring path, solve the problem of lack of dynamic quantitative evaluation of spatial distribution complexity, unable to apply to PCB wiring in high-frequency and high-density scenarios, resulting in low wiring quality, realize dynamic quantitative evaluation of spatial distribution complexity, and apply to PCB wiring in high-frequency and high-density scenarios. At the same time, the reinforcement learning and the joint entropy model are deeply integrated to realize global uniformity optimization, and the wiring quality is significantly improved.

[0093] In some embodiments, the joint entropy model for determining the wiring area entropy value in step S220 includes the following steps:

[0094] In step S221, feature extraction is performed on each grid cell in each physical layer plane of the to-be-routed PCB layout to obtain a plurality of feature parameters of each grid cell;

[0095] In step S222, based on the layout information of the to-be-routed PCB layout, corresponding implicit space features are determined.

[0096] In step S223, the first routing area feature entropy of each feature parameter and the second routing area feature entropy of the implicit space features are weighted and fused to construct a joint entropy model.

[0097] Specifically, each physical layer plane in the to-be-routed PCB layout is modeled by grid division, and each plane is divided into a plurality of grid cells. The size of the grid cell is dynamically adjusted according to the number of PCB layers and signal frequency, and the size calculation formula of the grid cell is as follows:

[0098]

[0099] In formula (1), A represents the size of the grid cell; l represents the minimum line width; s represents the safety factor, s ∈ [1.2, 1.5]; f represents the number of layers, i.e. the current routing layer number. For example, for a 6-layer board, the size of the grid cell of the 3rd layer with a minimum line width of 0.1 mm is calculated as 0.0325 mm.

[0100] Feature extraction is performed on each grid cell to obtain a plurality of feature parameters of each grid cell, including wire density, plating hole density, current density, and signal coupling strength, etc. The layout information of the to-be-routed PCB layout is extracted by a machine learning algorithm to obtain the implicit space features of the PCB layout, including but not limited to element topology features and electromagnetic distribution features. Two-dimensional information entropy calculation is performed on each feature parameter (such as wire density) to obtain the first routing area feature entropy of each feature parameter , and the specific calculation formula is as follows:

[0101]

[0102] In formula (2), H represents the first routing area feature entropy; m and n are the row and column numbers of the grid cell, respectively; is the ratio of the kth parameter value of the grid cell (i, j) to the total value of the kth parameter of the entire board.

[0103] Further, the second routing area feature entropy of the implicit space features is calculated, and the first routing area feature entropy of each feature parameter and the second routing area feature entropy are weighted and fused to construct a joint entropy model, and the joint entropy model ​The expression is as follows:

[0104]

[0105] In formula (3), represents the first wiring area feature entropy; represents the second wiring area feature entropy; and is a dynamic weight coefficient, which can be dynamically adjusted through reinforcement learning.

[0106] Through the embodiment, feature extraction is performed on each grid cell in each physical layer plane of the to-be-wired PCB layout, a plurality of feature parameters of each grid cell are obtained, corresponding implicit space features are determined based on layout information of the to-be-wired PCB layout, and the first wiring area feature entropy of each feature parameter and the second wiring area feature entropy of the implicit space features are weighted and fused to construct a dynamically weighted joint entropy model, which can adapt to complex and variable wiring scenarios, such as special-shaped boards, high-frequency signal layering and the like.

[0107] In some embodiments, the geometric shape of each grid cell is adapted to the PCB board contour in the to-be-wired PCB layout.

[0108] Specifically, when each physical layer plane in the to-be-wired PCB layout is modeled by grid, the geometric shape of each grid cell obtained by division is adapted to the PCB board contour in the to-be-wired PCB layout. When the PCB board contour is a rectangular contour, the geometric shape of each grid cell can adopt a rectangular grid; when the PCB board contour is a non-rectangular contour, the geometric shape of each grid cell can adopt a non-uniform grid, such as a triangular grid, a trapezoidal grid, a sector grid and the like, to ensure effective coverage of the special-shaped area.

[0109] For example, a hexagonal PCB board is a non-rectangular contour, which contains a plurality of hollow areas. The Delaunay triangulation algorithm is used to perform geometric self-adaptive division on the PCB area to generate irregular triangular grids. In this way, the edge area is automatically identified by setting a distance threshold (for example, less than 5 mm from the boundary), and the maximum side length of the triangle in this area is limited to 0.1 mm, while the center area is relaxed to 0.3 mm, to realize grid density control. At the same time, multi-layer (for example, 3 layers) ring encryption processing is implemented around the hollow area. Subsequently, the radial basis function interpolation algorithm is used to map the parameters (such as electrical characteristics, thermal distribution and the like) on the regular grid to the irregular grid nodes, and the interpolation error is always controlled within a preset threshold (for example, 5%) by dynamically adjusting the basis function parameters, to complete the generation of non-uniform grids considering geometric adaptability and parameter accuracy.

[0110] Through the embodiment, the geometric shape of each grid unit is matched with the PCB board profile in the to-be-routed PCB layout, so as to support the special-shaped board design, ensure the effective coverage of the routing area, and help to optimize the routing algorithm efficiency and the routing path quality.

[0111] In some of the embodiments, the implicit spatial features include element topology features and electromagnetic coupling features; the determining of the corresponding implicit spatial features based on the layout information of the to-be-routed PCB layout in step S222 includes the following steps:

[0112] The layout information of the to-be-routed PCB layout is used to determine the first input data and the second input data; the first input data includes node features and edge features of element connection relationships, and the second input data includes an electromagnetic field distribution matrix;

[0113] The first input data is subjected to feature extraction through a graph convolution network, to obtain element topology features.

[0114] The second input data is subjected to compression processing through an autoencoder, to obtain electromagnetic coupling features; the electromagnetic coupling features are electromagnetic distribution latent variables.

[0115] Specifically, as shown in Figure 3 the layout information of the to-be-routed PCB layout is used to determine the first input data and the second input data. The first input data includes node features (each element / network as a node in the graph) and edge features (connection relationships between nodes are represented by edges with weights) of element connection relationships, the node features include element coordinates, network types (power / ground / signal), impedance requirements, signal rise time, etc., and the edge features include network connection relationships, signal transmission directions, coupling capacitance values, etc. The second input data includes an electromagnetic field distribution matrix, and the electromagnetic field distribution matrix has a size of the product of the number of grids and the frequency sampling points.

[0116] Further, the first input data is subjected to feature extraction through a graph convolution network (GCN), to obtain element topology features. For example, a 3-layer stacked GCN architecture is adopted, and a graph attention mechanism is introduced in each layer to enhance the flexibility of information transmission between nodes. The specific calculation formula of the graph attention mechanism is as follows:

[0117]

[0118] In formula (4), represents the feature vector of node i in the lth layer; represents a trainable weight matrix; represents an attention weight; Represents the ReLU activation function. After processing by a 3-layer GCN architecture, a 256-dimensional feature vector, i.e., component topology feature, is output to represent the global topological relationship of the component layout.

[0119] Then, the second input data is compressed by the autoencoder to obtain the electromagnetic coupling feature; the electromagnetic coupling feature is an electromagnetic distribution hidden variable. For example, based on the layout information of the to-be-routed PCB layout, a corresponding electromagnetic field distribution matrix is generated by using an electromagnetic simulation software ANSYS HFSS, an encoder composed of a 4-layer convolutional network (the number of channels increases by 64, 128, 256, and 512 layer by layer) is used to process the electromagnetic field distribution matrix to obtain a 32-dimensional hidden variable, feature dimension reduction is realized, and a decoder is used to reconstruct the hidden variable by using a symmetric 4-layer deconvolutional network for upsampling, a mean square error is used as a loss function to optimize network parameters, and it is ensured that the compressed hidden variable can accurately restore the original electromagnetic field distribution, and the extracted hidden variable is used as an electromagnetic coupling strength index.

[0120] Through the embodiment, based on the layout information of the to-be-routed PCB layout, the first input data and the second input data are determined, the first input data includes node features and edge features of component connection relationships, and the second input data includes an electromagnetic field distribution matrix. Feature extraction is performed on the first input data by using a graph convolutional network to obtain component topology features, and compression processing is performed on the second input data by using an autoencoder to obtain electromagnetic coupling features, and the electromagnetic coupling features are electromagnetic distribution hidden variables, so that the spatial feature is accurately obtained.

[0121] In some embodiments, the second routing area feature entropy of the hidden space feature is determined, including the following steps:

[0122] Based on the clustering result of the component topology feature, the intra-class distribution entropy of the component topology feature is determined; the component topology feature is a first multi-dimensional feature vector;

[0123] Based on the principal component dimension reduction result of the electromagnetic coupling feature, the principal component variance entropy of the electromagnetic coupling feature is determined; the electromagnetic coupling feature is a second multi-dimensional feature vector;

[0124] According to the intra-class distribution entropy and the principal component variance entropy, the second routing area feature entropy of the hidden space feature is determined.

[0125] Specifically, the element topology features are subjected to clustering analysis, and the element topology features are usually multi-dimensional vectors. Based on the clustering results of the element topology features, the intra-class distribution entropy of the element topology features is calculated, and the electromagnetic coupling features are subjected to principal component dimension reduction. Based on the principal component (PCA) dimension reduction results of the electromagnetic coupling features, the principal component variance entropy of the electromagnetic coupling features is calculated. Then, the intra-class distribution entropy and the principal component variance entropy are added to obtain the second wiring area feature entropy of the latent space features. In other embodiments, independent component analysis or other dimension reduction algorithms can be used to reduce the dimension of the electromagnetic coupling features, and the intra-class distribution entropy and the principal component variance entropy can also be weighted to obtain the second wiring area feature entropy of the latent space features.

[0126] Specifically, the element topology features (256-dimensional vectors) extracted by the GCN are subjected to K-means clustering (K=16). Based on the clustering results, the intra-class distribution entropy of the element topology features is calculated. The electromagnetic distribution latent variables (32-dimensional vectors) are subjected to PCA dimension reduction. Based on the dimension reduction results, the principal component variance entropy is calculated. The intra-class distribution entropy and the principal component variance entropy are added to obtain the second wiring area feature entropy of the latent space features.

[0127] Through the embodiment, the intra-class distribution entropy of the element topology features is determined based on the clustering results of the element topology features, and the element topology features are first multi-dimensional feature vectors. The principal component variance entropy of the electromagnetic coupling features is determined based on the principal component dimension reduction results of the electromagnetic coupling features, and the electromagnetic coupling features are second multi-dimensional feature vectors. Then, the second wiring area feature entropy of the latent space features is determined according to the intra-class distribution entropy and the principal component variance entropy, so as to realize accurate calculation of the second wiring area feature entropy.

[0128] In some embodiments, the PCB board in the to-be-routed PCB layout is a flexible PCB board. After the corresponding latent space features are determined based on the layout information of the to-be-routed PCB layout, the above-mentioned PCB automatic routing method further includes the following steps:

[0129] Based on the finite element simulation strain data of the PCB board, the corresponding strain perception entropy is determined.

[0130] The first wiring area feature entropy of each feature parameter, the second wiring area feature entropy of the latent space features, and the strain perception entropy are weighted and fused to construct a joint entropy model.

[0131] Specifically, when the PCB board in the to-be-routed PCB layout is a flexible PCB board, the finite element simulation strain data of the PCB board is obtained. Based on the finite element simulation strain data of the PCB board, the corresponding strain perception entropy is calculated. The specific calculation formula is as follows:

[0132]

[0133] in formula (5), denotes a strain-aware entropy, is a strain value. The first wiring region feature entropy of each feature parameter, the second wiring region feature entropy of the implicit space feature, and the strain-aware entropy are weighted and fused to construct a joint entropy model, and at this time the joint entropy model The specific expression of the joint entropy model is as follows:

[0134]

[0135] in formula (6), denotes the first wiring region feature entropy; denotes the second wiring region feature entropy; , and are dynamic weight coefficients, which can be dynamically adjusted through reinforcement learning. The joint entropy model is used to determine the wiring region entropy value, and the weight coefficient corresponding to each entropy in the joint entropy model can be dynamically adjusted.

[0136] For example, for a flexible PCB of a smart watch, the ABQAQUS is used to simulate the bending process (the bending angle is 0~180°), the strain distribution cloud diagram is output, the high strain region (for example, the risk area with a strain value exceeding a threshold value of 1.5%) is marked, and the strain-aware entropy is calculated according to the above formula (5), and the joint entropy model is extended based on the strain-aware entropy.

[0137] Through the embodiment, when the PCB board in the to-be-wired PCB layout is a flexible PCB board, the corresponding strain-aware entropy is determined based on the finite element simulation strain data of the PCB board, the first wiring region feature entropy of each feature parameter, the second wiring region feature entropy of the implicit space feature, and the strain-aware entropy are weighted and fused to construct a joint entropy model, so that the joint entropy model is adaptively adjusted based on the type of the PCB board, to support the design of the flexible circuit board.

[0138] In some embodiments, the plurality of wiring optimization objectives based on the to-be-wired PCB layout in step S240 includes the following steps:

[0139] Step S241, determining a wiring decision space corresponding to the to-be-wired PCB layout; the wiring decision space includes a wiring state space and a wiring action space;

[0140] Step S242, constructing a corresponding multi-objective cost function and / or reward function based on the plurality of wiring optimization objectives of the to-be-wired PCB layout;

[0141] Step S243, based on the multi-objective cost function and / or reward function, and the routing decision space, an intelligent agent corresponding to reinforcement learning is established.

[0142] Specifically, as shown in Figure 4 , a routing decision space corresponding to the to-be-routed PCB layout is defined in advance, and the routing decision space includes a routing state space and a routing action space. The routing state space represents the real-time routing state of the to-be-routed PCB layout through structured information, i.e., represents the current routing environment, and the real-time routing state includes the current routing progress (expressed in percentage), the local entropy value (for example, the 5x5 grid cell entropy average centered on the current routing point), the un-routed network list (containing network priority, length constraint), etc. The routing action space is used to define the executable operations of the intelligent agent, including dynamically adjusting the weight coefficients of the joint entropy model (continuous action), and selecting the next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model (discrete action).

[0143] Further, a plurality of routing optimization objectives of the to-be-routed PCB layout are obtained, each routing optimization objective including a routing area entropy value, a routing path length, a rule violation penalty term based on routing rules, and an electromagnetic interference risk score, etc. Based on each routing optimization objective, a corresponding multi-objective cost function and / or reward function is constructed to provide an evaluation standard for policy learning. The specific expression of the multi-objective cost function is as follows:

[0144]

[0145] In formula (7), L represents the routing path length; represents the routing area entropy value; V represents the rule violation penalty term based on routing rules; E represents the electromagnetic interference risk score; is the weight coefficient. The electromagnetic interference (EMI) risk score is predicted by a historical simulation data regression model, and the model input is the wire parallel length and the signal frequency.

[0146] Based on the entropy drop reward, the routing progress reward, the rule violation penalty based on routing rules, and the routing path length penalty, a corresponding reward function is constructed, and the specific expression of the reward function is as follows:

[0147]

[0148] In formula (8), represents the entropy drop value; represents the routing progress; represents the rule violation penalty based on routing rules; represents the routing path length; ​are weight coefficients. For example, the reward function Based on the multi-objective cost function and / or the reward function and the wiring decision space, a corresponding reinforcement learning agent is built using a policy network, which generates an action probability distribution based on state input to guide wiring decisions.

[0149] Then, in a simulated PCB wiring environment, the reinforcement learning agent is trained to obtain a trained reinforcement learning agent. During the training process, the parameter optimization of the policy network needs to rely on the feedback of the multi-objective cost function and / or the reward function. For example, based on the PCB wiring environment defined by OpenAI Gym, the wiring optimization task of the printed circuit board is simulated. A parallel training architecture can be used, in which 16 workers perform actions and collect data in their respective environments in parallel. The central learner updates the policy network after aggregating the data and synchronizes it to each worker. The convergence condition is set to an average reward of more than 8.5 for 100 consecutive rounds. The multi-round average reward is used to eliminate the influence of random factors and ensure that the agent strategy stably reaches a wiring performance close to the optimal performance in most scenarios.

[0150] Through this embodiment, the wiring decision space corresponding to the PCB layout to be wired is determined, which includes a wiring state space and a wiring action space. Based on multiple wiring optimization objectives of the PCB to be wired, a corresponding multi-objective cost function and / or reward function is constructed. Then, based on the multi-objective cost function and / or reward function and the wiring decision space, a corresponding reinforcement learning agent is established. In subsequent path searching, the path length, entropy value, rule violation penalty term, and EMI risk score can be optimized simultaneously, which helps to improve the wiring quality.

[0151] In some embodiments, the training of the reinforcement learning agent in step S240 includes the following steps:

[0152] In step S244, a plurality of training scenarios in a simulated PCB wiring environment are determined; each training scenario corresponds to different PCB physical structures and wiring optimization objectives;

[0153] In step S245, based on each training scenario, a near-optimal policy optimization algorithm is used for multi-stage curriculum learning of the reinforcement learning agent to obtain a trained reinforcement learning agent.

[0154] Specifically, as shown in Figure 4 a plurality of training scenarios in a simulated PCB wiring environment are determined; each training scenario corresponds to different PCB physical structures and wiring optimization objectives; the training scenarios include simple scenarios, medium scenarios, and complex scenarios, etc. The number and categories of the training scenarios can be set according to actual applications.

[0155] Further, based on each training scene, a Proximal Policy Optimization (PPO) algorithm is used for multi-stage curriculum learning of the reinforcement learning agent, to obtain the trained reinforcement learning agent. It can be understood that the PPO algorithm is used to train the agent to adjust the entropy weight and the region selection strategy in real time, which helps to reduce the invalid search path. In other embodiments, a deep deterministic policy gradient, double-delay deep deterministic policy, or the like algorithm can also be used to train the reinforcement learning agent.

[0156] For example, the reinforcement learning agent is trained in three stages by curriculum learning. The first stage is a simple scene, a double panel is set, and a fixed weight of a joint entropy model is set. The second stage is a medium scene, a 4-layer panel is used, and the weight adjustment is opened. The third stage is a complex scene, an 8-layer panel and a high-frequency signal are used, and an electromagnetic coupling entropy item is introduced. The training process uses a proximal policy optimization algorithm to train the reinforcement learning agent. The training parameters are a learning rate of 3x10 -4 , a discount factor , a batch size of 512, and a training step of 1x10 6 .

[0157] Through the embodiment, a plurality of training scenes in a simulated PCB wiring environment are determined, each training scene corresponds to different PCB physical structures and wiring optimization objectives, based on each training scene, a proximal policy optimization algorithm is used for multi-stage curriculum learning of the reinforcement learning agent, to obtain the trained reinforcement learning agent, and the dynamic weight (continuous action) of the joint entropy model and the region selection (discrete action) are optimized in the policy network in an end-to-end manner, so that the reinforcement learning strategy and the physical design rule are deeply integrated, the trained reinforcement learning agent can adapt to the PCB wiring in a high-frequency and high-density scene, improve the wiring quality, and improve the coupling efficiency of real-time entropy calculation and wiring decision-making, to shorten the optimization time consumption and significantly improve the wiring efficiency.

[0158] In some embodiments, the above PCB automatic wiring method further includes the following steps:

[0159] In the training process of the reinforcement learning agent, in response to the region selection action output by the reinforcement learning agent, the wiring region selected by the region selection action is processed by a path planning algorithm to obtain a corresponding wiring path;

[0160] Based on the wiring path, the actual value of the multi-objective cost function and / or the reward function is determined;

[0161] Based on the actual value of the multi-objective cost function and / or the reward function, the reinforcement learning agent is dynamically adjusted.

[0162] Specifically, in the training process of the reinforcement learning agent, when the reinforcement learning agent outputs a region selection action, i.e., selects a next wiring region, the wiring region selected by the region selection action is processed by the path planning algorithm to generate a corresponding wiring path. Based on the currently generated wiring path, the actual value of the multi-objective cost function and / or the reward function is calculated to quantify the performance of the current wiring path on each objective, and the strategy of the reinforcement learning agent itself is dynamically adjusted according to the actual value of the multi-objective cost function and / or the reward function, such as updating the probability distribution of action selection or the value function estimate, so as to gradually optimize the region selection action in the training and make the agent continuously learn a better wiring strategy under multi-objective constraints.

[0163] wherein the A-star algorithm, the Steiner tree algorithm, etc. can be used for path generation. Preferably, an entropy gradient term is introduced into the path cost function of the A-star algorithm to improve the A-star algorithm, and the specific expression of the path cost function is as follows:

[0164]

[0165] In formula (9), represents the actual path cost from the starting point to the current node n; h(n) represents the heuristic estimated cost from the current node n to the target; represents the entropy gradient at node n; represents the adjustment coefficient of the entropy gradient term. At the same time, in the improved A-star algorithm, the simulated annealing algorithm is used for global optimal solution search, and the initial temperature T is preferably set to 1000 and the decay coefficient is 0.95.

[0166] Through the embodiment, in the training process of the reinforcement learning agent, in response to the output of the region selection action by the reinforcement learning agent, the wiring region selected by the region selection action is processed by the path planning algorithm to obtain a corresponding wiring path. Based on the wiring path, the actual value of the multi-objective cost function and / or the reward function is determined, and based on the actual value of the multi-objective cost function and / or the reward function, the reinforcement learning agent is dynamically adjusted to make the agent continuously learn a better wiring strategy under multi-objective constraints.

[0167] In some embodiments, the step of determining the next target wiring region in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model in step S260 includes the following steps:

[0168] determining the entropy value of each current candidate wiring region in the to-be-wired PCB layout according to the dynamically adjusted joint entropy model;

[0169] generating a corresponding candidate region list based on the preset number of current candidate wiring regions with the lowest entropy value;

[0170] Based on the real-time wiring state of the PCB layout to be wired, a next target wiring region is selected from each current candidate wiring region in the candidate region list by the policy network of the trained reinforcement learning agent.

[0171] Specifically, after adjusting the joint entropy model weight, the entropy value of each current candidate wiring region in the PCB layout to be wired is calculated according to the dynamically adjusted joint entropy model, and a preset number of current candidate wiring regions with the lowest entropy value, such as 5 current candidate wiring regions with the lowest entropy value, are selected.

[0172] Further, based on the preset number of current candidate wiring regions with the lowest entropy value, a corresponding candidate region list is generated, the real-time wiring state of the PCB layout to be wired is analyzed by the policy network of the trained reinforcement learning agent, the region selection probability distribution is output in combination with the joint entropy features of each current candidate wiring region in the candidate region list, and finally the next target wiring region is selected from the candidate region list.

[0173] Through the embodiment, the entropy value of each current candidate wiring region in the PCB layout to be wired is determined according to the dynamically adjusted joint entropy model, the corresponding candidate region list is generated based on the preset number of current candidate wiring regions with the lowest entropy value, and the next target wiring region is selected from each current candidate wiring region in the candidate region list based on the real-time wiring state of the PCB layout to be wired by the policy network of the trained reinforcement learning agent, so as to improve the coupling efficiency of real-time entropy calculation and wiring decision, shorten the optimization time consumption, and realize high-quality wiring decision at the same time.

[0174] In some embodiments thereof, the above-mentioned PCB automatic wiring method further comprises the following steps:

[0175] Based on the real-time wiring state of the PCB layout to be wired, third input data is determined; the third input data includes an element layout image, a power network distribution, and a historical wiring entropy value;

[0176] The third input data is processed by a pre-trained heat map prediction model to obtain a corresponding entropy heat map;

[0177] Based on the entropy heat map, the high-entropy region in the PCB layout to be wired is shielded to obtain an optimized PCB layout to be wired, and the optimized PCB layout to be wired is taken as the latest wiring search space of the reinforcement learning agent.

[0178] Specifically, as Figure 5As shown, based on the real-time routing status of the PCB layout to be routed, the third input data is determined. The third input data includes component layout images, power network distribution, and historical routing entropy values. Among them, the component layout images are usually RGB images, with each channel representing the power, signal, and ground networks, respectively; the power network distribution uses a binary mask; and the historical routing entropy values ​​are represented by grayscale images and normalized to the [0,1] interval.

[0179] Furthermore, a pre-trained heatmap prediction model is used to process the third input data to predict the corresponding entropy heatmap output. The heatmap prediction model can employ a fully convolutional network (U-net), a graph neural network, or similar techniques. For example, a pre-trained U-net heatmap prediction model includes an encoder and a decoder. The encoder is a ResNet-18 pre-trained model, outputting a 1024-dimensional feature vector. The decoder consists of five deconvolutional layers, each incorporating a spatial attention mechanism, and outputs an entropy probability map (with the same image size as the input image and a value range of 0 to 1). The attention mechanism... The specific expression is as follows:

[0180]

[0181] In equation (10), W1 and W2 are trainable weight matrices; `AvgPool()` represents Sigmoid activation; `AvgPool()` represents global average pooling; `ReLU` is a non-linear activation function. It should be further noted that the U-net heatmap prediction model described above is trained using a composite loss function combining Dice loss and cross-entropy loss. Furthermore, during model training, the input images are pre-processed with data augmentation techniques such as random rotation, scaling, and noise addition.

[0182] Next, high-entropy regions in the PCB layout to be routed are identified based on the entropy heatmap. These high-entropy regions are then masked to obtain an optimized PCB layout. This optimized PCB layout serves as the latest routing search space for the reinforcement learning agent. Specifically, routing regions with predicted entropy values ​​greater than the masking threshold can be selected as high-entropy regions, or clustering algorithms can be used to analyze each region and filter out high-entropy regions based on the clustering results.

[0183] By this embodiment, the third input data is determined based on the real-time wiring state of the to-be-wired PCB layout; the third input data includes the component layout image, the power network distribution, and the historical wiring entropy value; the third input data is processed by the pre-trained heat map prediction model to obtain the corresponding entropy heat map; and then based on the entropy heat map, the high-entropy region in the to-be-wired PCB layout is shielded to obtain the optimized to-be-wired PCB layout, so as to optimize the latest wiring search space of the reinforcement learning intelligent agent based on the optimized to-be-wired PCB layout, thereby accurately predicting the high-entropy region in the future wiring stage, effectively reducing the search space by shielding the high-risk region, and improving the search efficiency.

[0184] In some embodiments, shielding the high-entropy region in the to-be-wired PCB layout based on the entropy heat map includes the following steps:

[0185] Based on the entropy heat map, the predicted entropy value of different wiring regions in the to-be-wired PCB layout is determined.

[0186] The wiring region with a predicted entropy value greater than a shielding threshold is determined as a high-entropy region; the shielding threshold is dynamically adjusted based on the real-time wiring progress and the current number of wiring rule violations.

[0187] The high-entropy region in the to-be-wired PCB layout is shielded.

[0188] Specifically, according to the entropy heat map, the predicted entropy value of different wiring regions in the to-be-wired PCB layout is determined, the wiring region with a predicted entropy value greater than a shielding threshold is selected as a high-entropy region, and the high-entropy region in the to-be-wired PCB layout is shielded to reduce the wiring search space. In the PCB wiring process, the shielding threshold can be dynamically adjusted based on the real-time wiring progress, the wiring success rate, and the current number of wiring rule violations.

[0189] For example, in the initial stage, the shielding threshold is 0.7, the region with a predicted entropy value greater than 0.7 is shielded as a high-entropy region to limit the wiring search range. Then, every time 10% of the wiring task is completed, the entropy heat map is updated to achieve gradual release. In addition, if the current wiring success rate exceeds 90%, the shielding threshold is increased to 0.8; if the current number of wiring rule violations exceeds 5 times, the shielding threshold is reduced to 0.6.

[0190] Through the embodiment, the predicted entropy values of different wiring areas in the to-be-wired PCB layout are determined based on an entropy heat map, and a wiring area with a predicted entropy value greater than a shielding threshold is determined as a high-entropy area. The shielding threshold is dynamically adjusted based on a real-time wiring progress and a current number of wiring rule violations. The high-entropy areas in the to-be-wired PCB layout are shielded, so as to implement a dynamic shielding strategy, and balance and optimize the wiring efficiency and quality through adaptive entropy threshold adjustment and progressive space release.

[0191] In some embodiments, the step of generating, in the target action, a target wiring path corresponding to the next target wiring area based on the next target wiring area in the target action includes the following steps:

[0192] inputting the element layout graph of the next target wiring area in the target action into a pre-trained generative adversarial network to output a corresponding wiring path mask; the wiring path mask contains the target wiring path;

[0193] The generator of the generative adversarial network is configured to generate the wiring path mask based on the element layout graph; and the discriminator of the generative adversarial network is configured to evaluate the local authenticity of the target wiring path.

[0194] In the embodiment, as shown in Figure 6 , the element layout graph of the next target wiring area in the target action is input into a pre-trained generative adversarial network (GAN) to output a corresponding wiring path mask, and the wiring path mask contains the target wiring path. The generator (Generator) of the generative adversarial network is configured to generate the wiring path mask based on the element layout graph; and the discriminator (Discriminator) of the generative adversarial network is configured to evaluate the local authenticity of the target wiring path.

[0195] Specifically, the generator adopts a U-net variant, and the input is an element layout graph (such as 256x256 pixels). The structure contains 8 residual blocks, and the number of channels increases from 64 to 512 layer by layer. Finally, the wiring path mask (a binary image) is output to represent the wire direction; the discriminator structure is PatchGAN, the input is a generated wiring graph and a real wiring graph with the same size, and a 30x30 matrix is output. Each element in the matrix represents the authenticity probability of the corresponding local area. When training the generative adversarial network, the generator and the discriminator are alternately trained, the batch size is set to 32, the optimizer can be Adam (optimizer parameters ), the learning rate of the generator is , and the learning rate of the discriminator is , so as to realize the cooperative optimization of the generator and the discriminator.

[0196] By the embodiment, the element layout diagram of the next target wiring area in the target action is input into the pre-trained generative adversarial network to output a corresponding wiring path mask, and the wiring path mask contains a target wiring path, wherein the generator of the generative adversarial network is used to generate the wiring path mask based on the element layout diagram, and the discriminator of the generative adversarial network is used to evaluate the local authenticity of the target wiring path, so as to realize accurate generation of the wiring path and significantly improve the generation quality of the wiring path mask.

[0197] In some embodiments, the above-mentioned PCB automatic wiring method further comprises the following steps:

[0198] The physical rule checking layer integrated in the generator is used to perform physical rule checking on the target wiring path, and the physical rule checking includes one or more combinations of minimum line width checking, conductor width detection, via hole spacing checking, and microstrip line width error checking.

[0199] Specifically, a physical rule checking layer is added at the end of the generator to realize physical rule embedding. The physical rule checking layer is used to perform physical rule checking on the generated target wiring path, and the physical rule checking includes minimum line width checking, conductor width detection, via hole spacing checking, and microstrip line width error checking.

[0200] The minimum line width checking refers to detecting whether the conductor width meets the process requirements through a convolution kernel; the via hole spacing checking refers to calculating the Euclidean distance between the via holes, and if the calculated value is less than a preset threshold, the target wiring path is triggered to be regenerated. At the same time, different signals are assigned priority weights, and the path planning order is dynamically adjusted according to the network criticality (such as clock signals) during the generation process.

[0201] By the embodiment, the physical rule checking layer integrated in the generator is used to perform physical rule checking on the target wiring path, and the physical rule checking includes one or more combinations of minimum line width checking, conductor width detection, via hole spacing checking, and microstrip line width error checking, so as to accurately check the currently generated target wiring path based on physical rule deep embedding and improve the reliability of the wiring result.

[0202] The embodiment will be described and explained below through specific embodiments.

[0203] In one specific embodiment, the PCB to be routed is a high-frequency communication PCB, which has high requirements for impedance continuity of millimeter wave signals, and high-density routing can easily cause crosstalk. Therefore, the parallel length of adjacent signal lines needs to be controlled to be less than a first preset threshold, and strict thermal management is required, which requires that the local temperature gradient be less than a second preset threshold. Based on this, each step in the automatic routing process of the above PCB is adaptively optimized to support high-frequency communication PCB design, improve routing efficiency and reliability of routing results, effectively reduce the proportion of crosstalk exceeding areas and the maximum temperature gradient, and significantly improve the quality of routing.

[0204] Specifically, the PCB layout file (including element layout, network table) of the high-frequency communication PCB, historical electromagnetic simulation data (S parameter matrix) and thermal simulation data (temperature distribution map) are obtained, each physical layer plane in the PCB layout is grid divided, and the grid size is dynamically adjusted. For example, the high-frequency signal layer is divided into 50μm×50μm grid units, and the power layer is divided into 100μm×100μm, etc. At the same time, high-entropy areas are marked, including crosstalk areas, hot spot areas, etc.

[0205] In the graph convolution network topology modeling, the node features include element coordinates, network type (power / ground / radio frequency signal), impedance target value, signal frequency, etc., and the edge features include network connection relationship (direct connection / through-hole conversion), parallel wire length, adjacent network frequency difference, etc. During network training, based on a 500-case high-frequency PCB case data set, a contrastive learning loss function is used to enhance the model's ability to capture the similarity of the topology structure, and the feature interaction between nodes and edges is optimized, and finally a 256-dimensional feature vector is output. The vector can accurately represent the PCB network topology risk.

[0206] In addition, the S parameter matrix is preprocessed, including frequency slicing, grayscale conversion processing and normalization processing, etc. The preprocessed S parameter matrix is input into the electromagnetic feature autoencoder to obtain the corresponding latent variable. Among them, the encoder composed of a 4-layer convolutional network processes the S parameter matrix to obtain a 32-dimensional latent variable, realizing feature dimension reduction, and the decoder reconstructs the latent variable through a 4-layer deconvolutional network. The mean square error is used as the loss function to optimize the network parameters, ensuring that the compressed latent variable can accurately restore the original electromagnetic field distribution. The extracted latent variable is used as the electromagnetic coupling strength index.

[0207] Further, the entropy of each feature parameter extracted based on the grid division result is calculated to obtain the wire density entropy H wire , the thermal distribution entropy H thermal and the impedance mutation entropy H impThe element topology features extracted by the graph convolution network are clustered by K-means, the intra-class distribution entropy is calculated, and the 32-dimensional hidden variables are reduced by PCA, the principal component variance entropy is calculated, and the machine learning feature entropy H is calculated according to the intra-class distribution entropy and the principal component variance entropy ML . The wire density entropy H wire , the heat distribution entropy H thermal , the impedance mutation entropy H imp and H ML are weighted and fused to obtain the joint entropy model H 总 =0.4H wire +0.2H thermal +0.2H imp +0.2H ML , and the weight coefficients of each feature entropy can be dynamically adjusted based on different wiring stages.

[0208] The U-net heat map prediction model for predicting the entropy heat map is trained. The U-net heat map prediction model takes the element layout diagram, the current wiring progress diagram, and the historical entropy value distribution as input, and outputs the entropy probability diagram of the future 5% wiring stage. In actual application, the initial shielding threshold is 0.65, and every time 5% of the wiring task is completed, the heat map is updated and the threshold is recalculated. Among them, if the prediction error is less than 10% for 3 times in a row, the threshold is increased. It can be understood that the entropy heat map is used to determine the predicted entropy value of different wiring areas in the to-be-wired PCB layout, so as to screen out the wiring area with a predicted entropy value greater than the shielding threshold as a high-entropy area, and shield the high-entropy area in the to-be-wired PCB layout to reduce the wiring search space.

[0209] Then, the wiring state space and the wiring action space corresponding to the to-be-wired PCB layout are pre-configured. The wiring state space represents the real-time wiring state of the to-be-wired PCB layout through structured information, and the real-time wiring state includes the current wiring progress, the local entropy value, the un-wired network list, etc. The wiring action space is used to define the executable operations of the agent, including dynamically adjusting the weight coefficients of the joint entropy model (continuous action), the weight coefficient adjustment value , the constraint condition is ∑w k =1, and selecting the next target wiring area in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model (discrete action).

[0210] A plurality of wiring optimization objectives of a to-be-wired PCB layout are acquired, and a corresponding reward function is constructed based on each wiring optimization objective to provide an evaluation standard for strategy learning. In a PCB wiring environment defined based on OpenAI Gym, a wiring optimization task of a printed circuit board is simulated, a parallel training architecture can be used, 16 workers perform actions and collect data in their respective environments in parallel, a central learner updates the strategy network after aggregating the data and synchronizes it to each worker, and the convergence condition is set to an average reward of more than 8.5 for 100 consecutive rounds. By using the average reward of multiple rounds, the influence of random factors is eliminated, and it is ensured that the agent strategy stably reaches a wiring performance close to the optimal performance in most scenarios.

[0211] After the target wiring area is output by the reinforcement learning agent, the component layout diagram of the target wiring area is input into the pre-trained generative adversarial network to output a corresponding wiring path mask, and the wiring path mask includes the target wiring path. The generator of the generative adversarial network adopts a U-net variant, the input is the component layout diagram, the structure includes 8 residual blocks, the number of channels increases from 64 to 512 layer by layer, and finally outputs the wiring path mask to represent the wire direction, and an entropy heat map is injected as an attention gate at the decoder layer. Moreover, a physical rule checking layer is added at the end of the generator to realize physical rule embedding, which includes minimum line width checking, wire width detection, via spacing checking, microstrip width error checking, etc.

[0212] In one specific embodiment, the to-be-wired PCB is a flexible PCB, the wire in the bending area is prone to fatigue fracture, the special-shaped layout causes the traditional grid division to fail, and the dynamic deformation affects the signal integrity. Based on this, the strain perception entropy is introduced to extend the joint entropy model, and other PCB wiring steps are optimized accordingly to support the design of flexible circuit boards and improve the wiring efficiency and reliability of the wiring results.

[0213] The finite element simulation strain data of the PCB board are acquired in advance, that is, the bending process (bending angle of 0-180°) is simulated by using ABQAQUS to output a strain distribution cloud map, and a high-strain area is labeled, for example, an area with a strain value exceeding a threshold of 1.5% is defined as a risk area. Then, the strain perception entropy is calculated by using the above formula (5), the joint entropy model is extended based on the strain perception entropy, and the extended joint entropy model H 总 = 0.4H wire +0.2H strain +0.2H imp +0.3H ML , H wire is the wire density entropy, H strain is the strain perception entropy, H imp is the impedance mutation entropy, and H ML is the machine learning feature entropy.

[0214] Further, the fan-shaped grid is adopted for grid division in the bending area, combined with radial and circumferential segmentation, the rectangular grid division is maintained in the non-bending area, the grid size is adaptively expanded, and the grid transition area is divided based on the gradient interpolation to ensure the parameter continuity. Correspondingly, in the graph convolution network topology modeling, the node feature adds the bending direction attribute (X / Y axis direction), and in the input of the autoencoder, the strain distribution map channel is added to help predict the availability of the un-wired area.

[0215] Then, the reinforcement learning strategy is adjusted. Specifically, the reward function is improved, and the wiring path length term in the above formula (8) is optimized as the cumulative value of the path passing through the high strain area; at the same time, the wiring action space is expanded, and a new action is added to automatically arrange redundant wires on both sides of the bending area, and the wires at the bending are optimized by arc transition to support dynamic path smoothing.

[0216] In one specific embodiment, the PCB to be wired is a UAV flight control PCB, which has a hexagonal outline and contains multiple hollow areas, so that the traditional rectangular grid cannot effectively cover the irregular shape area, and the wiring around the hollow area needs to avoid stress concentration points and requires a space utilization rate greater than a preset threshold. Based on this, the steps of grid division, graph machine learning feature extraction, and construction of multi-objective cost function in the above PCB automatic wiring process are adaptively optimized to support irregular board design, while improving the wiring efficiency and reliability of the wiring result.

[0217] Specifically, the Delaunay triangulation algorithm is used to perform geometric adaptive division on the PCB area to generate irregular triangular grids. Among them, the edge region is automatically identified by setting a distance threshold, and the maximum side length of the triangle in this region and the center region are limited to realize grid density control, and at the same time, multi-layer ring encryption processing is implemented around the hollow area. Subsequently, the parameters on the regular grid are mapped to the irregular grid nodes through the radial basis function interpolation algorithm, and the interpolation error is always controlled within a preset threshold by dynamically adjusting the basis function parameters to complete the non-uniform grid generation considering geometric adaptability and parameter accuracy.

[0218] Further, in the graph convolution network topology modeling, the node feature adds the position attribute (normalized distance of the node from the geometric center), and the edge feature adds the connection mark across the hollow area, and the model output is a 512-dimensional feature vector. At the same time, the autoencoder is adaptively improved, and its input is a geometric mask identifying the effective wiring area, and the output is a space utilization rate heat map to help predict the availability of the un-wired area.

[0219] In addition, the space utilization rate is taken as the optimization target, and the multi-objective cost function is extended, and the extended multi-objective cost function is , wherein L represents the wiring path length, H总 represents a wiring area entropy value, V represents a violation penalty term based on a wiring rule, S represents a space utilization rate, and S=(wired area-redundant area) / total effective area.

[0220] The present embodiment will be described and explained below by preferred embodiments.

[0221] Figure 7 is a flowchart of the PCB automatic wiring method of the present preferred embodiment, as shown in Figure 7 The PCB automatic wiring method comprises the following steps:

[0222] Step S710, feature extraction is performed on each grid cell in each physical layer plane of the PCB layout to be wired to obtain a plurality of feature parameters of each grid cell;

[0223] Step S720, based on the layout information of the PCB layout to be wired, the corresponding implicit space feature is determined;

[0224] Step S730, the first wiring area feature entropy of each feature parameter and the second wiring area feature entropy of the implicit space feature are weighted and fused to construct a joint entropy model;

[0225] Step S740, a wiring decision space corresponding to the PCB layout to be wired is determined; the wiring decision space includes a wiring state space and a wiring action space;

[0226] Step S750, based on a plurality of wiring optimization objectives of the PCB layout to be wired, a corresponding multi-objective cost function and / or reward function is constructed;

[0227] Step S760, based on the multi-objective cost function and / or reward function and the wiring decision space, a corresponding reinforcement learning agent is established;

[0228] Step S770, the real-time wiring state of the PCB layout to be wired is input into the trained reinforcement learning agent to output a target action corresponding to the real-time wiring state; the target action includes dynamically adjusting the weight coefficients of the joint entropy model, and determining a next target wiring area in the PCB layout to be wired based on the dynamically adjusted joint entropy model.

[0229] Step S780, the component layout of the next target wiring area in the target action is input into the pre-trained generative adversarial network to output a corresponding wiring path mask; the wiring path mask contains a target wiring path.

[0230] By the embodiment, feature extraction is performed on each grid cell in each physical layer plane of the to-be-routed PCB layout to obtain a plurality of feature parameters of each grid cell, corresponding implicit space features are determined based on layout information of the to-be-routed PCB layout, and a first routing area feature entropy of each feature parameter and a second routing area feature entropy of the implicit space features are weighted and fused to construct a joint entropy model.

[0231] Further, a routing decision space corresponding to the to-be-routed PCB layout is determined, the routing decision space including a routing state space and a routing action space. Based on a plurality of routing optimization objectives of the to-be-routed PCB layout, a corresponding multi-objective cost function and / or reward function is constructed, and based on the multi-objective cost function and / or reward function and the routing decision space, a corresponding reinforcement learning agent is established. The real-time routing state of the to-be-routed PCB layout is input into the trained reinforcement learning agent to output a target action corresponding to the real-time routing state, the target action including dynamic adjustment of each weight coefficient of the joint entropy model, and based on the dynamically adjusted joint entropy model, determining a next target routing area in the to-be-routed PCB layout. Then, the element layout map of the next target routing area in the target action is input into the pre-trained generative adversarial network to output a corresponding routing path mask, the routing path mask containing a target routing path, solving the problem of lack of dynamic quantitative evaluation of spatial distribution complexity, inability to apply PCB routing in high-frequency and high-density scenarios, and low routing quality, achieving dynamic quantitative evaluation of spatial distribution complexity to apply PCB routing in high-frequency and high-density scenarios, and significantly improving routing quality.

[0232] It should be noted that the steps shown in the above flow or the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0233] In the embodiment, a PCB automatic routing device is also provided, which is used to implement the above embodiments and preferred embodiments, and has been described above and will not be repeated. The terms "module", "unit", "sub-unit" and the like used below can be a combination of software and / or hardware that implements a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware or a combination of software and hardware implementation is also possible and contemplated.

[0234] Figure 8 is a structural block diagram of the PCB automatic routing device of the embodiment, as Figure 8 shown, the device includes:

[0235] The construction module 10 is configured to construct a joint entropy model for determining an entropy value of a routing area, wherein each feature entropy of the routing area in the joint entropy model corresponds to a different weight coefficient.

[0236] The establishment module 20 is configured to establish a corresponding reinforcement learning agent based on a plurality of routing optimization objectives of the to-be-routed PCB layout, and train the reinforcement learning agent.

[0237] The decision module 30 is configured to input a real-time routing state of the to-be-routed PCB layout into the trained reinforcement learning agent to output a target action corresponding to the real-time routing state, wherein the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model.

[0238] The generation module 40 is configured to generate a target routing path corresponding to the next target routing area in the target action based on the next target routing area.

[0239] Through the device provided in the embodiment, by constructing a joint entropy model for determining an entropy value of a routing area, wherein each feature entropy of the routing area in the joint entropy model corresponds to a different weight coefficient; establishing a corresponding reinforcement learning agent based on a plurality of routing optimization objectives of the to-be-routed PCB layout; inputting a real-time routing state of the to-be-routed PCB layout into the trained reinforcement learning agent to output a target action corresponding to the real-time routing state; the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target routing area in the to-be-routed PCB layout based on the dynamically adjusted joint entropy model; generating a target routing path corresponding to the next target routing area in the target action based on the next target routing area, the problem of lacking dynamic quantitative evaluation of spatial distribution complexity, being unable to apply to PCB routing in high-frequency and high-density scenarios, and resulting in low routing quality is solved, and dynamic quantitative evaluation of spatial distribution complexity is achieved to apply to PCB routing in high-frequency and high-density scenarios, and routing quality is significantly improved.

[0240] In some embodiments, the construction module 10 is further configured to perform feature extraction on each grid cell in each physical layer plane in the to-be-routed PCB layout to obtain a plurality of feature parameters of each grid cell, determine a corresponding implicit space feature based on layout information of the to-be-routed PCB layout, and perform weighted fusion on a first routing area feature entropy of each feature parameter and a second routing area feature entropy of the implicit space feature to construct the joint entropy model.

[0241] In some embodiments, the construction module 10 is further configured to determine the first input data and the second input data based on layout information of the to-be-routed PCB layout; the first input data comprises node features and edge features of the component connection relationship, and the second input data comprises an electromagnetic field distribution matrix; the component topology features are obtained by performing feature extraction on the first input data through a graph convolution network; and the electromagnetic coupling features are obtained by performing compression processing on the second input data through a self-encoder; the electromagnetic coupling features are electromagnetic distribution latent variables.

[0242] In some embodiments, the construction module 10 is further configured to determine an intra-class distribution entropy of the component topology features based on a clustering result of the component topology features; the component topology features are first multi-dimensional feature vectors; determine a principal component variance entropy of the electromagnetic coupling features based on a principal component dimension reduction result of the electromagnetic coupling features; the electromagnetic coupling features are second multi-dimensional feature vectors; and determine the second routing area feature entropy of the latent space features according to the intra-class distribution entropy and the principal component variance entropy.

[0243] In some embodiments, the construction module 10 is further configured to determine a corresponding strain perception entropy based on finite element simulation strain data of the PCB board; and perform weighted fusion on the first routing area feature entropy of each feature parameter, the second routing area feature entropy of the latent space features, and the strain perception entropy to construct a joint entropy model.

[0244] In some embodiments, the establishment module 20 is further configured to determine a routing decision space corresponding to the to-be-routed PCB layout; the routing decision space comprises a routing state space and a routing action space; construct a corresponding multi-objective cost function and / or reward function based on a plurality of routing optimization objectives of the to-be-routed PCB layout; and establish a corresponding reinforcement learning agent based on the multi-objective cost function and / or reward function and the routing decision space.

[0245] In some embodiments, the establishment module 20 is further configured to determine a plurality of training scenarios in a simulation PCB routing environment; each training scenario corresponds to different PCB physical structures and routing optimization objectives; and perform multi-stage curriculum learning on the reinforcement learning agent based on each training scenario using a proximal policy optimization algorithm to obtain a trained reinforcement learning agent.

[0246] In some embodiments, the establishment module 20 is further configured to, in the training process of the reinforcement learning agent, in response to an area selection action output by the reinforcement learning agent, process a routing area selected by the area selection action through a path planning algorithm to obtain a corresponding routing path; determine an actual value of the multi-objective cost function and / or reward function based on the routing path; and dynamically adjust the reinforcement learning agent based on the actual value of the multi-objective cost function and / or reward function.

[0247] In some embodiments, the decision module 30 is further configured to determine an entropy value of each current candidate routing region in the to-be-routed PCB layout according to the dynamically adjusted joint entropy model; generate a corresponding candidate region list based on a preset number of current candidate routing regions with the lowest entropy value; and select a next target routing region from the current candidate routing regions in the candidate region list based on a real-time routing state of the to-be-routed PCB layout and a policy network of the trained reinforcement learning agent.

[0248] In some embodiments, the decision module 30 is further configured to determine third input data based on a real-time routing state of the to-be-routed PCB layout; the third input data includes an element layout image, a power network distribution, and a historical routing entropy value; process the third input data through a pre-trained heat map prediction model to obtain a corresponding entropy heat map; and perform shielding processing on a high-entropy region in the to-be-routed PCB layout based on the entropy heat map to obtain an optimized to-be-routed PCB layout, so as to optimize the latest routing search space of the reinforcement learning agent.

[0249] In some embodiments, the decision module 30 is further configured to determine a predicted entropy value of different routing regions in the to-be-routed PCB layout based on the entropy heat map; determine a routing region with a predicted entropy value greater than a shielding threshold as a high-entropy region; dynamically adjust the shielding threshold based on a real-time routing progress and a current number of routing rule violations; and perform shielding processing on the high-entropy region in the to-be-routed PCB layout.

[0250] In some embodiments, the generation module 40 is further configured to input an element layout image of the next target routing region in the target action into a pre-trained generative adversarial network to output a corresponding routing path mask; the routing path mask contains a target routing path; wherein a generator of the generative adversarial network is configured to generate the routing path mask based on the element layout image; and a discriminator of the generative adversarial network is configured to evaluate the local authenticity of the target routing path.

[0251] In some embodiments, on the basis of the above, Figure 8 the device further includes a verification module configured to perform physical rule verification on the target routing path through a physical rule verification layer integrated in the generator; the physical rule verification includes one or more combinations of minimum line width checking, conductor width detection, via spacing verification, and microstrip width error checking.

[0252] It should be noted that each of the above modules can be a functional module or a program module, and can be implemented by software or hardware. For the modules implemented by hardware, each of the above modules can be located in the same processor; or each of the above modules can also be located in different processors in any combination.

[0253] In the embodiment, a computer device is also provided, comprising a memory and a processor, the memory stores a computer program, and the processor is configured to execute the computer program to perform the steps in any of the above method embodiments.

[0254] Optionally, the computer device can further comprise a transmission device connected with the processor and an input and output device connected with the processor.

[0255] Optionally, in the embodiment, the processor can be configured to perform the following steps through the computer program:

[0256] S1, a joint entropy model for determining the entropy value of a wiring area is constructed; each wiring area feature entropy in the joint entropy model corresponds to a different weight coefficient;

[0257] S2, based on a plurality of wiring optimization objectives of a to-be-wired PCB layout, a corresponding reinforcement learning agent is established, and the reinforcement learning agent is trained;

[0258] S3, inputting a real-time wiring state of the to-be-wired PCB layout into the trained reinforcement learning agent to output a target action corresponding to the real-time wiring state; the target action comprises dynamically adjusting each weight coefficient of the joint entropy model, and determining a next target wiring area in the to-be-wired PCB layout based on the dynamically adjusted joint entropy model;

[0259] S4, based on the next target wiring area in the target action, a target wiring path corresponding to the next target wiring area is generated.

[0260] It should be noted that the specific examples in the embodiment can refer to the examples described in the above embodiments and optional implementation manners, which will not be described herein again.

[0261] In addition, in combination with the PCB automatic wiring method provided in the above embodiments, a storage medium can also be provided to implement the method in the embodiment. The storage medium stores a computer program; the computer program is executed by a processor to implement any of the PCB automatic wiring methods in the above embodiments.

[0262] It should be understood that the specific embodiments described herein are only used to explain this application, but not to limit it. According to the embodiments provided in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0263] It is apparent that the drawings depicted are only a few example embodiments of the present application and that a person of ordinary skill in the art would be able to adapt the present application to other similar situations without paying creative labor. In addition, it is understood that, although the work done in developing the present application can be complex and long, certain modifications, such as design, manufacture or production, made by a person of ordinary skill in the art based on the technical content disclosed in the present application, should not be considered as a lack of disclosure.

[0264] The word "embodiment" in the present application means that the specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The presence of this phrase in various places in the specification does not necessarily mean the same embodiment, nor does it mean independence or alternative to other embodiments. It is clear or implicitly understood by those of ordinary skill in the art that the embodiments described in the present application can be combined with other embodiments without conflict.

[0265] The above-described embodiments only express several implementation manners of the present application, which are described in detail and specifically, but should not be understood as a limitation on the scope of patent protection. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, which are within the scope of protection of the present application. Therefore, the scope of protection of the present application should be subject to the appended claims.

Claims

1. A method for automatic routing of PCBs, characterized in that, The method includes: A joint entropy model is constructed to determine the entropy value of the cabling area; each feature entropy of the cabling area in the joint entropy model corresponds to a different weight coefficient. Based on multiple routing optimization objectives of the PCB layout to be routed, a corresponding reinforcement learning agent is established, and the reinforcement learning agent is trained. The real-time routing state of the PCB layout to be routed is input into the trained reinforcement learning agent to output a target action corresponding to the real-time routing state; the target action includes dynamically adjusting each of the weight coefficients of the joint entropy model, and determining the next target routing area in the PCB layout to be routed based on the dynamically adjusted joint entropy model. Based on the next target wiring region in the target action, a target wiring path corresponding to the next target wiring region is generated.

2. The PCB automatic routing method according to claim 1, characterized in that, The construction of the joint entropy model for determining the entropy value of the wiring area includes: Feature extraction is performed on each grid cell in each physical layer plane of the PCB layout to be routed to obtain multiple feature parameters for each grid cell; Based on the layout information of the PCB layout to be routed, the corresponding hidden space features are determined; The first wiring region feature entropy of each of the aforementioned feature parameters and the second wiring region feature entropy of the implicit spatial features are weighted and fused to construct the joint entropy model.

3. The PCB automatic routing method according to claim 2, characterized in that, The geometry of each grid cell is adapted to the outline of the PCB board in the PCB layout to be routed.

4. The PCB automatic routing method according to claim 2, characterized in that, The implicit spatial features include element topological features and electromagnetic coupling features; The determination of corresponding implicit space features based on the layout information of the PCB layout to be routed includes: Based on the layout information of the PCB layout to be routed, a first input data and a second input data are determined; the first input data includes node features and edge features of component connection relationships, and the second input data includes an electromagnetic field distribution matrix; The topological features of the components are obtained by extracting features from the first input data using a graph convolutional network. The second input data is compressed using an autoencoder to obtain the electromagnetic coupling feature; the electromagnetic coupling feature is an electromagnetic distribution latent variable.

5. The PCB automatic routing method according to claim 4, characterized in that, Determining the second wiring region feature entropy of the hidden spatial features includes: Based on the clustering results of the component topological features, the intra-cluster distribution entropy of the component topological features is determined; the component topological features are a first multidimensional feature vector. Based on the principal component dimensionality reduction result of the electromagnetic coupling feature, the principal component variance entropy of the electromagnetic coupling feature is determined; the electromagnetic coupling feature is a second multidimensional feature vector. The second wiring region feature entropy of the latent spatial features is determined based on the intra-class distribution entropy and the principal component variance entropy.

6. The PCB automatic routing method according to any one of claims 2 to 5, characterized in that, The PCB board in the PCB layout to be wired is a flexible PCB board; After determining the corresponding implicit space features based on the layout information of the PCB layout to be routed, the method further includes: Based on the finite element simulation strain data of the PCB board, the corresponding strain sensing entropy is determined. The first wiring region feature entropy, the second wiring region feature entropy of the implicit spatial features, and the strain sensing entropy of each feature parameter are weighted and fused to construct the joint entropy model.

7. The PCB automatic routing method according to claim 1, characterized in that, The reinforcement learning agent is established based on multiple routing optimization objectives of the PCB layout to be routed, including: Determine the routing decision space corresponding to the PCB layout to be routed; the routing decision space includes the routing state space and the routing action space. Based on the multiple routing optimization objectives of the PCB layout to be routed, a corresponding multi-objective cost function and / or reward function is constructed; Based on the multi-objective cost function and / or the reward function, and the wiring decision space, a corresponding reinforcement learning agent is established.

8. The PCB automatic routing method according to claim 7, characterized in that, The training of the reinforcement learning agent includes: Multiple training scenarios are identified in the simulated PCB routing environment; each training scenario corresponds to a different PCB physical structure and the routing optimization objective; Based on the training scenarios described above, a proximal policy optimization algorithm is used to perform multi-stage course learning on the reinforcement learning agent to obtain the trained reinforcement learning agent.

9. The PCB automatic routing method according to claim 7 or 8, characterized in that, The method further includes: During the training process of the reinforcement learning agent, in response to the region selection action output by the reinforcement learning agent, the wiring region selected by the region selection action is processed by the path planning algorithm to obtain the corresponding wiring path; Based on the wiring path, determine the actual values ​​of the multi-objective cost function and / or the reward function; The reinforcement learning agent is dynamically adjusted based on the actual values ​​of the multi-objective cost function and / or the reward function.

10. The PCB automatic routing method according to claim 1, characterized in that, The determination of the next target routing area in the PCB layout to be routed, based on the dynamically adjusted joint entropy model, includes: Based on the dynamically adjusted joint entropy model, the entropy value of each current candidate routing region in the PCB layout to be routed is determined; A corresponding candidate region list is generated based on the current candidate wiring regions with the lowest entropy value (a preset number). Based on the real-time routing status of the PCB layout to be routed, the next target routing region is selected from each of the current candidate routing regions in the candidate region list through the policy network of the trained reinforcement learning agent.

11. The PCB automatic routing method according to claim 1, characterized in that, The method further includes: Based on the real-time routing status of the PCB layout to be routed, a third input data is determined; the third input data includes component layout image, power network distribution, and historical routing entropy value. The third input data is processed by a pre-trained heatmap prediction model to obtain the corresponding entropy heatmap. Based on the entropy heatmap, the high-entropy regions in the PCB layout to be routed are masked to obtain the optimized PCB layout to be routed, which serves as the latest routing search space for the reinforcement learning agent.

12. The PCB automatic routing method according to claim 11, characterized in that, The step of shielding high-entropy regions in the PCB layout to be routed based on the entropy heatmap includes: Based on the entropy heatmap, the predicted entropy values ​​of different routing areas in the PCB layout to be routed are determined; The cabling region whose predicted entropy value is greater than the shielding threshold is identified as the high entropy region; the shielding threshold is dynamically adjusted based on the real-time cabling progress and the current number of cabling rule violations. The high-entropy region in the PCB layout to be routed is shielded.

13. The PCB automatic routing method according to claim 1, characterized in that, The step of generating a target wiring path corresponding to the next target wiring region based on the target action includes: The component layout diagram of the next target wiring region in the target action is input into a pre-trained generative adversarial network to output a corresponding wiring path mask; the wiring path mask contains the target wiring path; The generator of the generative adversarial network is used to generate the wiring path mask based on the component layout diagram; the discriminator of the generative adversarial network is used to evaluate the local realism of the target wiring path.

14. The PCB automatic routing method according to claim 13, characterized in that, The method further includes: The target wiring path is physically verified by the physical rule verification layer integrated in the generator; the physical rule verification includes one or more combinations of minimum line width check, conductor width detection, via spacing verification and microstrip line width error verification.

15. An automatic PCB routing device, characterized in that, include: The building block is used to construct a joint entropy model for determining the entropy value of the wiring area; In the joint entropy model, the feature entropy of each wiring region corresponds to a different weight coefficient; A module is established to build a corresponding reinforcement learning agent based on multiple routing optimization objectives of the PCB layout to be routed, and to train the reinforcement learning agent. The decision module is used to input the real-time routing status of the PCB layout to be routed into the trained reinforcement learning agent, so as to output a target action corresponding to the real-time routing status; the target action includes dynamically adjusting each of the weight coefficients of the joint entropy model, and determining the next target routing area in the PCB layout to be routed based on the dynamically adjusted joint entropy model. The generation module is used to generate a target wiring path corresponding to the next target wiring area based on the next target wiring area in the target action.

16. A computer device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the steps of the PCB automatic routing method according to any one of claims 1 to 14.

17. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the PCB automatic routing method according to any one of claims 1 to 14.

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