A high-density interconnection circuit board and a method for manufacturing the same

Abstract

In order to overcome the problems of low space utilization, design limitation and open circuit risk of the existing interlayer connection mode of HDI circuit board, the application provides a high-density interconnection circuit board, which comprises a plurality of sub-boards and a plurality of prepreg layers, the plurality of sub-boards are sequentially stacked, and a single prepreg layer is arranged between two adjacent sub-boards, the sub-board comprises a substrate and circuit pattern layers located on both sides of the substrate, and the substrate is provided with an electrically conductive hole for electrically connecting the circuit pattern layers on both sides of the substrate; the circuit pattern layer is provided with a solder pad, the prepreg layer comprises a fiber cloth and a resin layer permeated on the fiber cloth, the fiber cloth comprises an insulating fiber area and a conductive fiber area, and the conductive fiber area is located between two oppositely arranged solder pads. Meanwhile, the application also discloses a preparation method of the high-density interconnection circuit board.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuit boards, and particularly relates to a high-density interconnection circuit board and a preparation method thereof. BACKGROUND

[0002] With the continuous rise of the demand for miniaturization and high integration of electronic devices in the fields of consumer electronics, aerospace, etc., high-density interconnection (HDI) circuit boards have become the core carriers for realizing high-performance operation of electronic systems due to their advantages of fine wiring and multi-layer structure. Inter-layer interconnection, as a key technology of HDI circuit boards, directly determines the efficiency of circuit signal transmission, the utilization rate of space, and the overall structural compactness. Optimization of the technical scheme is of great significance to promote the miniaturization and high density of electronic devices.

[0003] At present, the semi-cured sheets are usually used for insulation isolation between the sub-boards of the HDI circuit board, and the inter-layer interconnection mainly relies on the following three technical paths, but all have significant limitations:

[0004] Firstly, via interconnection. This method realizes the electrical connection between different sub-board layers by penetrating the via on the circuit board. However, in the scenario where the HDI circuit layout space is extremely tight, the via needs to penetrate multiple sub-board layers, resulting in that the via area of the non-interconnected layer cannot be laid out with circuit structures, causing a large amount of space waste, seriously restricting the improvement of the space utilization rate of the circuit board, and further limiting the size reduction of the HDI circuit, which is contrary to the development demand of the miniaturization of electronic devices.

[0005] Secondly, blind hole interconnection. To solve the problem of space waste in via interconnection, the industry gradually adopts the scheme of punching blind holes on the sub-boards, and realizes the interconnection between any specified layers through the process of "firstly laminating, then laser / plasma punching, and finally copper plating". However, this technology is limited by the inherent defects of the punching method: the depth of laser and plasma punching is strictly limited, and the depth-to-diameter ratio of the blind hole is difficult to break through 1:1 under conventional process, and the mechanical blind hole cannot realize accurate interconnection across different layers due to the limitation of processing precision. This makes this method only suitable for thin-laminated HDI circuit boards, and cannot meet the deep interconnection demand in the multi-layer and thick-laminated scenarios, seriously restricting the design flexibility and application range of the HDI circuit board.

[0006] Third, the prepreg windowed conductive interconnection mode. Some designs try to abandon the hole structure, by opening a window on the prepreg, filling conductive paste or embedded solder ball to realize interconnection between layers. But this scheme has multiple technical bottlenecks: the conductive performance of the conductive paste is limited, which leads to a large impedance at the interconnection site, affecting the stable transmission of high-frequency signals; at the same time, the shrinkage of the paste during curing and the uneven stress during lamination can easily cause poor contact between the conductive structure and the sub-plate, and then form an open circuit fault; while the solder ball method requires high-temperature melting treatment, which can easily adversely affect the circuit layer during high-temperature treatment, and there is inevitably a gap at the solder joint position, which is easy to corrode and has poor structural stability. In addition, the positioning accuracy of the window opening is extremely high, and the lamination compatibility of the conductive material and the prepreg is poor, which makes it difficult to ensure the flatness of the conductive material and the prepreg layer, resulting in interlayer gap or conductive material extrusion flow short circuit, significantly increasing the process complexity and production yield risk.

[0007] In summary, the existing HDI circuit board interconnection technology either has low space utilization, or is limited by the depth-to-diameter ratio, or faces the dual dilemma of electrical performance and process performance, and cannot fully meet the core needs of HDI circuit boards for high density, small size and high reliability. A new type of interlayer interconnection technology that takes into account space utilization, interconnection depth, electrical performance and process feasibility is urgently needed. SUMMARY

[0008] In view of the problems of low space utilization, design limitation and open circuit risk of the existing HDI circuit board interconnection mode, the present application provides a high-density interconnection circuit board and a preparation method thereof.

[0009] The technical solution adopted by the present application to solve the above technical problems is as follows:

[0010] On the one hand, the present application provides a high-density interconnection circuit board, comprising a plurality of sub-plates and a plurality of prepregs, the plurality of sub-plates are sequentially stacked, and a single prepreg is arranged between adjacent two sub-plates, the sub-plate comprises a substrate and circuit pattern layers located on both sides of the substrate, and the substrate is provided with an electrically conductive hole for electrically conducting the circuit pattern layers on both sides of the substrate; the circuit pattern layer is provided with a pad, the pads of the circuit pattern layers on both sides of the same prepreg are oppositely arranged, the prepreg comprises a fiber cloth and a resin layer permeated on the fiber cloth, the fiber cloth comprises an insulating fiber area and a conductive fiber area distributed in the insulating fiber area, and the conductive fiber area is located between the oppositely arranged two pads, and the oppositely arranged two pads are electrically conducted by the conductive fiber area.

[0011] Optionally, the insulating fiber region comprises a plurality of interwoven glass fibers, and the conductive fiber region comprises a plurality of interwoven conductive fibers, the conductive fibers comprising glass fibers and a copper layer deposited on the surface of the glass fibers.

[0012] Optionally, the resin layer comprises one or more of epoxy resin, cyanate ester resin, polyphenyl ether resin, and polyimide resin.

[0013] Optionally, the surface of the solder pad is provided with a conductive resin layer, and the conductive resin layer partially penetrates into the conductive fiber region of the prepreg.

[0014] Optionally, the conductive resin layer is obtained by curing a conductive paste, and the conductive paste comprises the following components by weight:

[0015] Metal powder 60-70 parts, bonding resin 15-25 parts, curing agent 0.1-5 parts, inorganic filler 1-10 parts, and solvent 10-30 parts, the metal powder being one or more of silver powder, copper powder, gold powder, aluminum powder, and nickel powder, and the bonding resin being selected from the same material as the resin layer in the prepreg.

[0016] Optionally, the electrically conductive vias on different substrates are misaligned with each other, and the electrically conductive vias comprise through-holes penetrating through the substrates and metal plating layers formed on the inner walls of the through-holes or filled in the through-holes.

[0017] Optionally, the substrate comprises one or more of a phenolic resin substrate, an epoxy resin substrate, a polyester resin substrate, a polyimide resin substrate, and a polyphenyl ether resin substrate.

[0018] In another aspect, the present application provides a method for manufacturing a high-density interconnection circuit board as described above, comprising the following steps:

[0019] S1, forming through-holes penetrating through the substrate on the substrate, and performing seed layer treatment on the two side surfaces of the substrate and the inner walls of the through-holes, and performing electroplating treatment to obtain metal layers on the two sides of the substrate and metal plating layers in the through-holes;

[0020] S2, performing exposure and development operations on the metal layers on the two sides of the substrate to obtain circuit pattern layers on the two sides of the substrate, the circuit pattern layers being provided with solder pads, and obtaining a sub-board;

[0021] S3, providing a fiber cloth formed by insulating material fibers, depositing metal on part of the fiber cloth to form a conductive fiber region and an insulating fiber region located at the periphery of the conductive fiber region, the position of the conductive fiber region corresponding to the position of the solder pad;

[0022] S4, permeating a resin layer into the fiber cloth and performing pre-curing to obtain a prepreg;

[0023] S5, sequentially stacking the plurality of sub-boards, and setting a semi-cured layer between adjacent sub-boards, the pads of the circuit pattern layers on both sides of the same semi-cured layer are oppositely arranged, the conductive fiber area of the semi-cured layer is located between the two oppositely arranged pads, and a hot pressing operation is performed on the stack to obtain a high-density interconnection circuit board.

[0024] Optionally, in step S2, the conductive paste is printed on the pad and pre-cured to obtain a conductive resin layer, and the conductive paste comprises the following components by weight:

[0025] Metal powder 60-70 parts, bonding resin 15-25 parts, curing agent 0.1-5 parts, inorganic filler 1-10 parts and solvent 10-30 parts, the metal powder is one or more of silver powder, copper powder, gold powder, aluminum powder and nickel powder, and the bonding resin is selected from the same material as the resin layer in the semi-cured layer.

[0026] Optionally, in step S4, the surface of the semi-cured layer is subjected to laser thinning treatment to expose the conductive fibers of the conductive fiber area.

[0027] According to the high-density interconnection circuit board provided by the application, in the same sub-board, the electrical connection between the circuit pattern layers on both sides is realized by using the electrical through hole, the interconnection between the layers is realized by the conductive fiber area in the semi-cured layer which is accurately aligned with the pad, the conductive fiber area is only distributed between the pads of adjacent sub-boards, does not affect the circuit layout of the non-interconnection area, significantly improves the space utilization, can effectively avoid the defects of space occupation of the existing through hole, and at the same time, the interconnection mode can meet the interconnection requirements of multi-layer, thick accumulation layer high-density interconnection circuit board, is beneficial to improve the design flexibility, and avoids the process limitation of the existing blind hole interconnection. Furthermore, compared with the interconnection mode of conductive paste, soldering ball, etc., the conductive fiber area is composed of interwoven conductive fibers, the conductive path is continuous and the contact area is large, the impedance of the interconnection part is effectively reduced, the stable transmission of high-frequency signals is ensured, at the same time, the conductive fiber area and the insulating fiber area are designed integrally, the area accuracy of the conductive area in the hot pressing process can be ensured, and the structure flatness of the semi-cured layer in the conductive fiber area and the insulating fiber area can be ensured, the stress is uniform during laminating, the open circuit failure and the interlayer gap caused by material shrinkage or poor contact are avoided, the interconnection reliability is improved, and the structure ensures the structural integration of the semi-cured layer, can be directly applied to the existing hot pressing process, does not need to be treated by windowing or embedding conductive material in the semi-cured layer during the hot pressing process, and is beneficial to reduce the process complexity. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 is a structural schematic diagram of the high-density interconnection circuit board provided by the application;

[0029] Figure 2is the flow chart of steps S1-S2 in the high-density interconnection circuit board preparation method provided by the present application;

[0030] Figure 3 is the flow chart of steps S3-S4 in the high-density interconnection circuit board preparation method provided by the present application;

[0031] Figure 4 is the flow chart of step S5 in the high-density interconnection circuit board preparation method provided by the present application.

[0032] The reference signs in the attached drawings of the specification are as follows:

[0033] 1, sub-board; 11, base plate; 111, electrically conductive via; 111a, via hole; 12, circuit pattern layer; 12a, metal layer; 121, solder pad; 122, conductive resin layer; 2, semi-cured layer; 21, fiber cloth; 211, conductive fiber region; 212, insulating fiber region; 3, solder resist layer. DETAILED DESCRIPTION

[0034] In order to make the technical problems solved by the present application, technical solutions and beneficial effects more clearly understood, the present application will be further described in detail below in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application, and are not used to limit the present application.

[0035] Referring to Figure 1 As shown in the figure, an embodiment of the present application provides a high-density interconnection circuit board, which comprises a plurality of sub-boards 1 and a plurality of semi-cured layers 2, the plurality of sub-boards 1 are sequentially stacked, and a single semi-cured layer 2 is arranged between two adjacent sub-boards 1, the sub-board 1 comprises a base plate 11 and circuit pattern layers 12 located on both sides of the base plate 11, and the base plate 11 is provided with electrically conductive vias 111 for electrically conducting the circuit pattern layers 12 on both sides of the base plate 11; the circuit pattern layer 12 is provided with a solder pad 121, the solder pads 121 of the circuit pattern layers 12 on both sides of the same semi-cured layer 2 are oppositely arranged, the semi-cured layer 2 comprises a fiber cloth 21 and a resin layer permeated on the fiber cloth 21, the fiber cloth 21 comprises an insulating fiber region 212 and a conductive fiber region 211 distributed in the insulating fiber region 212, and the conductive fiber region 211 is located between the oppositely arranged two solder pads 121, and the oppositely arranged two solder pads 121 are electrically conducted by the conductive fiber region 211.

[0036] The high-density interconnection circuit board adopts the electrically conductive via 111 to realize the electrical connection of the two-side circuit pattern layers 12 in the same sub-board 1, realizes the interlayer interconnection through the conductive fiber area 211 in the semi-cured layer 2 which is accurately aligned with the pad 121, and the conductive fiber area 211 is only distributed between the pads 121 of adjacent sub-boards 1, without affecting the circuit layout of the non-interconnection area, thereby significantly improving the space utilization, effectively avoiding the defects of space occupation of the existing through-hole 111a, and at the same time, the interconnection mode can meet the interconnection requirements of multi-layer, thick-layer high-density interconnection circuit boards, is beneficial to improving the design flexibility, and avoids the process limitation of the existing blind hole interconnection. Furthermore, compared with the interconnection mode of conductive paste and soldering ball, the conductive fiber area 211 is composed of interlaced conductive fibers, the conductive path is continuous and the contact area is large, which effectively reduces the impedance of the interconnection part and guarantees the stable transmission of high-frequency signals; at the same time, the conductive fiber area 211 and the insulating fiber area 212 are designed integrally, which can guarantee the area accuracy of the conductive area in the hot pressing process and the flatness of the semi-cured layer 2 in the conductive fiber area 211 and the insulating fiber area 212, realize uniform stress during laminating, avoid open circuit failure and interlayer gap caused by material shrinkage or poor contact, improve the interconnection reliability, and the structure can be directly applied to the existing hot pressing process without the need of windowing or embedding conductive material treatment for the semi-cured layer 2 during the hot pressing process, which is beneficial to reducing the process complexity.

[0037] In some embodiments, the number of layers of the sub-board 1 is 2-8 layers, the thickness of the semi-cured layer 2 between adjacent sub-boards 1 is 50-200 μm, and the area density of the fiber cloth 21 in the semi-cured layer 2 is 100-300 g / m 2 , which ensures that the semi-cured layer 2 has both insulation and mechanical support performance.

[0038] In some embodiments, the shape of the conductive fiber area 211 is adapted to the shape of the pad 121, which can be circular, square or irregular, and the area is 5%-10% larger than the area of the corresponding pad 121, so as to avoid the problem that the conductive fiber area 211 and the pad 121 cannot be effectively connected due to laminating misalignment; the distribution density of the conductive fiber area 211 in the fiber cloth 21 is 1-5 per square centimeter, which is adapted to the interconnection requirements of circuits with different densities.

[0039] In some embodiments, the diameter of the pad 121 is 0.1-0.5 mm, the thickness is 10-30 μm, the surface roughness Ra of the pad 121 is controlled to be 0.5-2 μm, and the contact effect with the conductive fiber area 211 or the conductive resin layer 122 is improved.

[0040] In some embodiments, the insulating fiber region 212 includes a plurality of mutually interwoven glass fibers, and the conductive fiber region 211 includes a plurality of mutually interwoven conductive fibers, the conductive fibers including glass fibers and a copper layer deposited on the surface of the glass fibers.

[0041] It should be noted that the conductive fibers are obtained by copper layer deposition on glass fibers, that is, the glass fibers of the conductive fiber region 211 and the glass fibers of the insulating fiber region 212 are continuous, and the resin layer flow in the hot pressing process will not cause the position of the conductive fiber region 211 to change, which can ensure the consistency of the relative positions of the insulating fiber region 212 and the conductive fiber region 211 before and after hot pressing, and avoid the electrical interference or open circuit problem caused by the position change of the conductive material during the hot pressing process. The conductive fibers use glass fibers as the substrate, which not only retains the mechanical strength of the glass fibers, but also ensures excellent conductivity through the surface-deposited copper layer. During the hot pressing process, the pads 121 on both sides extrude the conductive fibers in the middle, and the external pressure makes the pads 121 and the conductive fibers have a large contact area, ensuring that the conductive fiber region 211 is structurally stable and electrically reliable during lamination and use.

[0042] In some embodiments, the diameter of the glass fibers is 5-20 μm, and the length is 5-15 mm. Alkali-free glass fiber material is used to ensure the structural stability of the conductive fibers.

[0043] In some embodiments, the resin layer includes one or more of epoxy resin, cyanate ester resin, polyphenyl ether resin, and polyimide resin.

[0044] Epoxy resin, cyanate ester resin, and the like are commonly used resin materials for HDI circuit boards, and have excellent insulation, heat resistance, and chemical stability. They can be flexibly selected according to different use environments (such as polyimide for high-temperature aerospace scenarios and polyphenyl ether for high-frequency scenarios), thereby widening the application range of the circuit board.

[0045] In some embodiments, the surface of the pad 121 is provided with a conductive resin layer 122, and the conductive resin layer 122 partially penetrates into the conductive fiber region 211 of the prepreg layer 2.

[0046] The conductive resin layer 122 penetrates into the conductive fiber region 211 to form a three-dimensional interconnection structure of pad 121-conductive resin-conductive fiber, which greatly increases the contact area compared to simple surface contact, effectively reduces the contact resistance, and avoids poor contact caused by lamination misalignment or stress. The conductive resin layer 122 can fill the small gap between the pad 121 and the conductive fiber region 211, and at the same time, infiltrate and fuse with the resin layer of the prepreg layer 2, thereby improving the interfacial bonding strength of the pad 121, the conductive fiber region 211, and the prepreg layer 2, preventing delamination and falling off in high-low temperature cycling or vibration environments, and prolonging the service life.

[0047] In some embodiments, the conductive resin layer 122 is obtained by curing a conductive paste, which comprises the following components by weight:

[0048] 60-70 parts of metal powder, 15-25 parts of bonding resin, 0.1-5 parts of curing agent, 1-10 parts of inorganic filler, and 10-30 parts of solvent, wherein the metal powder is one or more of silver powder, copper powder, gold powder, aluminum powder, and nickel powder, and the bonding resin is selected from the same material as the resin layer in the prepreg layer 2.

[0049] The bonding resin of the conductive resin layer 122 is consistent with the material of the resin layer in the prepreg layer 2, which can avoid interface cracking caused by the difference in shrinkage rate of different resins, and enhance the bonding strength of the conductive resin layer 122 with the prepreg layer 2 and the solder pad 121.

[0050] In preferred embodiments, the bonding resin and the resin layer are both epoxy resins.

[0051] In some embodiments, the curing agent is selected from a dicyandiamide curing agent.

[0052] In some embodiments, the inorganic filler is selected from one or more of aluminum oxide, silicon dioxide, and boron nitride.

[0053] The inorganic filler can improve the heat resistance and mechanical strength of the conductive resin layer 122, reduce curing shrinkage, and further reduce the risk of open circuit.

[0054] In some embodiments, the metal powder is a 1:1 mass ratio mixture of flaky silver powder and spherical silver powder, the flaky silver powder forms a dense conductive network by mutual stacking, and the spherical silver powder fills the gaps and improves flowability.

[0055] In some embodiments, the surfaces of the flaky silver powder and the spherical silver powder are modified by a silane coupling agent to improve compatibility with the bonding resin.

[0056] In some embodiments, the solvent is propylene glycol methyl ether acetate or ethanol.

[0057] In some embodiments, different electrically conductive vias 111 on the substrate 11 are misaligned with each other, and the electrically conductive vias 111 include through-holes 111a penetrating through the substrate 11 and metal plating layers formed on the inner walls of the through-holes 111a or filled in the through-holes 111a.

[0058] The electrically conductive holes 111 of different substrates 11 are misaligned with each other, and each electrically conductive hole 111 only penetrates a single substrate 11 to realize the conduction of the circuit pattern layers 12 on both sides thereof, and does not penetrate multiple substrate 1 layers, thereby avoiding the occupation of the wiring space of other substrate 1 layers by the traditional penetrating through-hole 111a, and providing sufficient space for fine and dense wiring.

[0059] The electrically conductive holes 111 realize conduction through a metal plating layer (inner wall or filling), and compared with conductive paste, the metal plating layer has better conductivity and stronger stability, and can guarantee the efficient interconnection of the circuit pattern layers 12 on both sides of the substrate 11 and reduce signal loss.

[0060] In some embodiments, the aperture of the electrically conductive hole 111 is 0.05-0.2 mm, the metal plating layer is a copper plating layer, the thickness is 5-15 μm, and the plating layer uniformity error is not more than ±10%, which ensures stable conduction performance.

[0061] In some embodiments, the substrate 11 includes one or more of a phenolic resin substrate 11, an epoxy resin substrate 11, a polyester resin substrate 11, a polyimide resin substrate 11, and a polyphenyl ether resin substrate 11.

[0062] In some embodiments, a solder resist layer 3 is further included, and the solder resist layer 3 is located on the outer side surface of the outermost substrate 1.

[0063] As shown in Figures 2-4 Another embodiment of the present application provides a preparation method of the high-density interconnection circuit board as described above, which includes the following operation steps:

[0064] S1, a through-hole 111a is formed in the substrate 11 to penetrate the substrate 11, and a seed layer treatment is performed on the surfaces on both sides of the substrate 11 and the inner wall of the through-hole 111a, and a metal layer 12a on both sides of the substrate 11 and a metal plating layer in the through-hole 111a are obtained through electroplating treatment;

[0065] S2, an exposure and development operation is performed on the metal layer 12a on both sides of the substrate 11 to obtain a circuit pattern layer 12 on both sides of the substrate 11, and the circuit pattern layer 12 is provided with a solder pad 121 to obtain a substrate 1;

[0066] S3, a fiber cloth 21 formed of insulating material fibers is provided, metal deposition is performed on part of the fiber cloth 21 to form a conductive fiber region 211 and an insulating fiber region 212 located at the periphery of the conductive fiber region 211, and the position of the conductive fiber region 211 corresponds to the position of the solder pad 121;

[0067] S4, a resin layer is permeated into the fiber cloth 21 and is pre-cured to obtain a semi-cured layer 2;

[0068] S5, the plurality of sub-plates 1 are stacked in sequence, and a semi-cured layer 2 is arranged between adjacent sub-plates 1, the pads 121 of the circuit pattern layers 12 on both sides of the same semi-cured layer 2 are oppositely arranged, the conductive fiber area 211 of the semi-cured layer 2 is located between the two oppositely arranged pads 121, and the laminated body is subjected to hot pressing operation to obtain a high-density interconnection circuit board.

[0069] The preparation method provided by the application has the following characteristics: the sub-plate 1 and the semi-cured layer 2 can be prepared in parallel, and finally a plurality of sub-plates 1 and a plurality of semi-cured layers 2 are pressed and formed at one time through lamination, without using the blind hole process of pressing and forming first and then punching, and through the process of sub-plate 1 pre-preparation-semi-cured layer 2 pre-preparation-whole lamination, the interlayer interconnection of multiple sub-plates 1 can be realized at one time, without being limited by the depth-diameter ratio, and being suitable for the preparation of thick build-up circuit boards.

[0070] Secondly, by depositing metal on part of the fiber cloth 21 to form the conductive fiber area 211, the integration of the conductive fiber area 211 and the fiber cloth 21 itself can be ensured, the interlayer thickness uniformity can be ensured, the alignment accuracy and structural stability can be improved, the deviation caused by material flow during hot pressing can be avoided, and the stability of interlayer interconnection can be improved.

[0071] In some embodiments, in step S1, the seed layer is a chemical copper plating layer, the thickness is 0.1-0.5 μm, the current density of electroplating treatment is 1-3 A / dm 2 , and the electroplating time is 10-30 min, so as to ensure that the metal layer 12a is firmly combined with the substrate 11.

[0072] In some embodiments, in step S3, the metal deposition adopts vacuum sputtering or chemical plating, and when vacuum sputtering is adopted, a mask is used for shielding in the non-metal deposition area (insulating fiber area 212).

[0073] In some embodiments, in step S2, a conductive paste is printed on the pad 121 and pre-cured to obtain a conductive resin layer 122, and the conductive paste comprises the following components by weight:

[0074] Metal powder 60-70 parts, bonding resin 15-25 parts, curing agent 0.1-5 parts, inorganic filler 1-10 parts, and solvent 10-30 parts, the metal powder is one or more of silver powder, copper powder, gold powder, aluminum powder and nickel powder, and the bonding resin is selected from the same material as the resin layer in the semi-cured layer 2.

[0075] The conductive paste is printed and pre-cured on the pad 121 in advance (forming a conductive resin layer 122), which can complete the combination of the pad 121 and the conductive resin layer 122 before lamination. During the hot pressing process, the conductive resin layer 122 penetrates into the resin layer of the prepreg 2, which is beneficial to improve the electrical connection contact area of the pad 121 and the conductive fiber area 211, and ensure the reliable connection of the conductive resin layer 122 with the pad 121 and the conductive fiber area 211. The bonding resin of the conductive paste is consistent with the resin of the prepreg 2, and the pre-cured conductive resin layer 122 can be synchronized with the resin of the prepreg 2 in the subsequent hot pressing process, reducing the interfacial stress and avoiding cracking.

[0076] In some embodiments, the pre-curing temperature is 80-120°C, and the pre-curing time is 10-30 min, so that the solvent volatilization amount in the conductive paste is more than 80%, avoiding the generation of bubbles during lamination.

[0077] In some embodiments, the thixotropy index of the conductive paste is 1.5-3.0, which has good flowability during printing and is not prone to sagging when standing, and is suitable for precise coating requirements of the pad 121.

[0078] In some embodiments, in step S4, the surface of the prepreg 2 is subjected to laser thinning treatment to expose the conductive fibers of the conductive fiber area 211.

[0079] The laser thinning treatment can form a large amount of heat energy on the surface of the prepreg 2 instantaneously. The resin layer has a lower pyrolysis temperature than the glass fiber and the copper layer. By laser thinning, the resin layer on the surface of the conductive fiber area 211 can be accurately removed without damaging the conductive fibers themselves, exposing the conductive fibers, reducing the additional impedance in the conductive path, and improving the signal transmission efficiency.

[0080] In some embodiments, in step S4, the laser thinning uses ultraviolet laser with a wavelength of 355 nm, a laser power of 5-20 W, and a scanning speed of 100-500 mm / s, which ensures accurate removal of the resin layer without damaging the conductive fibers.

[0081] In some embodiments, the thinning thickness is 2-10 μm, and the exposed conductive fiber length is 1-5 μm, which not only guarantees the contact effect but also avoids excessive exposure of the conductive fibers leading to oxidation.

[0082] In some embodiments, after laser thinning, plasma cleaning treatment is used to remove the resin residues on the surface of the conductive fiber area 211, and the cleaning time is 1-5 min, which improves the conductivity of the conductive fibers.

[0083] In some embodiments, it further includes step S6 of coating a solder resist layer 3 on the outer surface of the outermost sub-board 1 to protect the circuit pattern layer 12 of the outermost layer.

[0084] In some embodiments, further comprising: performing windowing on the partial area of the solder resist layer 3 to expose the external pads 121.

[0085] The application is further described by the following examples.

[0086] Example 1

[0087] The present embodiment is used to illustrate the preparation method of the high-density interconnection circuit board disclosed by the application, comprising the following operation steps:

[0088] S1, a through hole penetrating through the substrate is formed on the substrate, a seed layer treatment is performed on the two side surfaces of the substrate and the inner wall of the through hole, and a metal layer located on the two sides of the substrate and a copper plating layer located in the through hole are obtained by electroplating treatment;

[0089] S2, the copper plating layer on the two sides of the substrate is subjected to exposure and development operation to obtain a circuit pattern layer located on the two sides of the substrate, the circuit pattern layer is provided with a pad, a sub-board is obtained, a conductive paste is printed on the pad and pre-cured to obtain a conductive resin layer, and the conductive paste comprises the following components by weight:

[0090] 65 parts of silver powder, 20 parts of epoxy resin, 0.1 part of dicyandiamide curing agent, 1-10 parts of aluminum oxide and 10-30 parts of ethanol;

[0091] S3, a fiber cloth woven by glass fibers is provided, a copper layer is deposited on a partial area of the fiber cloth by vacuum sputtering to form a conductive fiber area, a mask is used to protect the non-sputtering area, an insulating fiber area located at the periphery of the conductive fiber area is formed, and the position of the conductive fiber area corresponds to the position of the pad;

[0092] S4, the fiber cloth is immersed in an epoxy resin and pre-cured to obtain a semi-cured layer, the surface of the semi-cured layer is subjected to laser thinning treatment to expose the conductive fibers of the conductive fiber area, and after laser thinning, plasma cleaning treatment is performed to remove the resin residues on the surface of the conductive fiber area;

[0093] S5, a plurality of sub-boards are stacked in sequence, and a semi-cured layer is arranged between adjacent sub-boards, the pads of the circuit pattern layers located on the two sides of the same semi-cured layer are oppositely arranged, the conductive fiber area of the semi-cured layer is located between the two oppositely arranged pads, and the stacked body is subjected to hot pressing operation to obtain a high-density interconnection circuit board.

[0094] S6, a solder resist layer is coated on the outer surface of the outermost sub-board.

[0095] Example 2

[0096] The present embodiment is used to illustrate the preparation method of the high-density interconnection circuit board disclosed by the application, comprising most of the operation steps in Example 1, and the difference lies in that:

[0097] In step S2, after the pads are formed, no printing process of conductive paste is performed.

[0098] Example 3

[0099] This example is used to illustrate the preparation method of the high-density interconnection circuit board disclosed in the present application, which includes most of the operation steps in Example 1, and the difference lies in that:

[0100] In step S4, after pre-curing, no laser thinning process and plasma cleaning process are performed.

[0101] Comparative Example 1

[0102] This comparative example is used to illustrate the preparation method of the high-density interconnection circuit board disclosed in the present application, which includes the following operation steps:

[0103] S1, a through hole penetrating through the substrate is formed on the substrate, a seed layer treatment is performed on the two side surfaces of the substrate and the inner wall of the through hole, and a metal layer located on the two sides of the substrate and a copper plating layer located in the through hole are obtained by electroplating treatment;

[0104] S2, an exposure and development operation is performed on the copper plating layer on both sides of the substrate to obtain a circuit pattern layer located on both sides of the substrate, the circuit pattern layer is provided with a pad, and a sub-board is obtained;

[0105] S3, a fiber cloth formed by weaving glass fibers is provided;

[0106] S4, the fiber cloth is immersed in an epoxy resin and pre-cured to obtain a semi-cured layer, and a window is set at a position corresponding to the pad of the semi-cured layer;

[0107] S5, a conductive paste is printed at the pad position of the sub-board and pre-cured to obtain a conductive resin layer, the thickness of the conductive resin layer is half of the thickness of the semi-cured layer, and the conductive paste comprises the following components by weight:

[0108] 65 parts of silver powder, 20 parts of epoxy resin, 0.1 part of dicyandiamide curing agent, 1-10 parts of aluminum oxide, and 10-30 parts of ethanol;

[0109] A plurality of sub-boards are sequentially stacked, and the semi-cured layer is arranged between adjacent sub-boards, the pads of the circuit pattern layers located on both sides of the same semi-cured layer are oppositely arranged, the conductive resin layer is located between the two oppositely arranged pads, and a hot pressing operation is performed on the stacked body to obtain a high-density interconnection circuit board.

[0110] S6, a solder resist layer is coated on the outer side surface of the outermost sub-board.

[0111] Performance test

[0112] The high-density interconnection circuit board prepared above is subjected to the following performance tests:

[0113] 1. Interlayer interconnection impedance test

[0114] The four-probe impedance tester is used to test the interlayer interconnection point contact impedance of the high-density interconnection circuit board under normal temperature (25℃) and normal humidity (50% RH) (test voltage: 1V, test current: 1mA).

[0115] 2. Interlayer interconnection stability test

[0116] 2.1. After the high-density interconnection circuit board is placed in a high-temperature (85℃) and high-humidity (85% RH) environment for 48h, the impedance is repeatedly tested, and the high-temperature and high-humidity impedance change rate (change rate = (high-temperature and high-humidity impedance after - normal temperature and humidity impedance) / normal temperature and humidity impedance x 100%) is recorded.

[0117] 2.2. The high-density interconnection circuit board is placed in a cold and hot cycle box (model: ESPECSH-241), and the cycle conditions are set as follows: -40℃ (1h) → normal temperature transition (15min) → 85℃ (1h) → normal temperature transition (15min), a total of 100 cycles; after the cycle, the impedance is tested, and the cold and hot cycle impedance change rate (change rate = (cycle impedance - normal temperature and humidity impedance) / normal temperature and humidity impedance x 100%) is recorded.

[0118] The test results are filled in Table 1.

[0119] Table 1

[0120]

[0121] As can be seen from the test results in Table 1, the high-density interconnection circuit board (Examples 1-3) provided by the present application is significantly better than the circuit board (Comparative Example 1) using the traditional semi-solid sheet windowing conductive interconnection method in terms of interlayer interconnection performance and environmental stability. The high-density interconnection circuit board of the present application has better basic conductive performance, which is due to the continuous conductive path and large contact area design of the conductive fiber region in the semi-solid layer. In the environmental stability test, the impedance change rate of the circuit board of the present application is at a low level under high temperature and high humidity or cold and hot cycle conditions, and there is no open circuit phenomenon, which confirms the synergistic effect of the integrated structure of the conductive fiber region and the insulating fiber region, the penetration and combination of the conductive resin layer, and the laser thinning treatment, which can effectively avoid material shrinkage and poor contact, and improve environmental adaptability; the circuit board with the traditional windowing and grouting structure has serious performance degradation, and even accompanied by open circuit of the contact, which is easy to cause performance failure due to uneven lamination stress.

[0122] Further comparison of Examples 1-3 shows that the conductive resin layer and the laser thinning treatment are both positive to the performance improvement, and the combination of the two can maximize the interconnection reliability, and the impedance index and stability of the example lacking either of the two processes are both inferior to Example 1 which uses both processes.

[0123] The above merely describes the preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement and improvement within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A high density interconnect circuit board, characterized by, The system comprises multiple sub-boards and multiple pre-cured layers, with the sub-boards stacked sequentially. A single pre-cured layer is disposed between two adjacent sub-boards. Each sub-board includes a substrate and circuit pattern layers located on both sides of the substrate. The substrate has vias for electrically conducting the circuit pattern layers on both sides of the substrate. Each circuit pattern layer has pads, with the pads on both sides of the same pre-cured layer arranged opposite each other. The pre-cured layer includes a fiber cloth and a resin layer permeated into the fiber cloth. The fiber cloth includes insulating fiber regions and conductive fiber regions distributed within the insulating fiber regions. The conductive fiber regions are located between two oppositely arranged pads, providing electrical conductivity between the two oppositely arranged pads. Each insulating fiber region includes multiple interwoven glass fibers, and each conductive fiber region includes multiple interwoven conductive fibers. Each conductive fiber includes glass fibers and a copper layer deposited on the surface of the glass fibers. A conductive resin layer is disposed on the surface of each pad, and the conductive resin layer partially permeates into the conductive fiber regions of the pre-cured layer. The conductive resin layer is obtained by curing a conductive paste, which includes the following weight components: The mixture comprises 60-70 parts of metal powder, 15-25 parts of adhesive resin, 0.1-5 parts of curing agent, 1-10 parts of inorganic filler, and 10-30 parts of solvent. The metal powder is one or more of silver powder, copper powder, gold powder, aluminum powder, and nickel powder, and the adhesive resin is selected from the same material as the resin layer in the semi-cured layer.

2. The high-density interconnect circuit board according to claim 1, characterized in that, The resin layer includes one or more of epoxy resin, cyanate ester resin, polyphenylene ether resin, and polyimide resin.

3. The high-density interconnect circuit board according to claim 1, characterized in that, The electrically conductive vias on different substrates are staggered with each other. The electrically conductive vias include through holes that penetrate the substrate and metal plating formed on the inner wall of the through holes or filling the interior of the through holes.

4. The high-density interconnect circuit board according to claim 1, characterized in that, The substrate includes one or more of the following: phenolic resin substrate, epoxy resin substrate, polyester resin substrate, polyimide resin substrate, and polyphenylene ether resin substrate.

5. The method for fabricating a high-density interconnect circuit board according to any one of claims 1 to 4, characterized in that, The following steps are included: S1. A through hole is formed on the substrate, and a seed layer is treated on both sides of the substrate and the inner wall of the through hole. Electroplating is performed to obtain a metal layer on both sides of the substrate and a metal plating layer inside the through hole. S2. Expose and develop the metal layers on both sides of the substrate to obtain circuit pattern layers on both sides of the substrate. The circuit pattern layers are provided with pads to obtain a sub-board. S3. Provide a fiber cloth formed of insulating material fibers, perform metal deposition in a portion of the fiber cloth to form a conductive fiber area, and an insulating fiber area located on the periphery of the conductive fiber area, the position of the conductive fiber area corresponding to the position of the pad; S4. The resin layer is penetrated into the fiber cloth and pre-cured to obtain a semi-cured layer; S5. Multiple sub-boards are stacked sequentially, with a semi-cured layer between adjacent sub-boards. The pads of the circuit pattern layer located on both sides of the same semi-cured layer are arranged opposite each other. The conductive fiber area of ​​the semi-cured layer is located between the two oppositely arranged pads. The stacked body is subjected to a hot pressing operation to obtain a high-density interconnect circuit board.

6. The method for fabricating a high-density interconnect circuit board according to claim 5, characterized in that, In step S2, conductive paste is printed on the pads and pre-cured to obtain a conductive resin layer. The conductive paste comprises the following components by weight: The mixture comprises 60-70 parts of metal powder, 15-25 parts of adhesive resin, 0.1-5 parts of curing agent, 1-10 parts of inorganic filler, and 10-30 parts of solvent. The metal powder is one or more of silver powder, copper powder, gold powder, aluminum powder, and nickel powder, and the adhesive resin is selected from the same material as the resin layer in the semi-cured layer.

7. The method for fabricating a high-density interconnect circuit board according to claim 5, characterized in that, In step S4, the surface of the semi-cured layer is subjected to laser thinning treatment to expose the conductive fibers in the conductive fiber region.

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