A photovoltaic device and a method of manufacturing the same

Abstract

The application discloses a photovoltaic device and a preparation method thereof, and belongs to the technical field of photovoltaic devices. The photovoltaic device comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorption layer, a first interface layer and a back electrode conductive layer; wherein the first interface layer is a discontinuous film layer, the material of the first interface layer comprises a high-resistance oxide and / or a high-resistance nitride, and the thickness is 1 nm-100 nm. The discontinuous film layer is designed in a structure of local passivation and local contact, high-resistance material is used to passivate back interface defects in a covered area, and low-resistance contact is directly formed in an uncovered area, so that the overall energy barrier of a continuous passivation layer is avoided to be increased, thereby reducing carrier transport resistance, and finally solving the contradiction between back interface passivation and carrier transport.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of photovoltaic devices, and particularly relates to a photovoltaic device and a preparation method thereof. BACKGROUND

[0002] CdTe thin film solar cell, also known as CdTe cell, is a kind of thin film solar cell based on a heterojunction with p-type CdTe as an absorption layer. In the technical field of CdTe thin film solar cell, the low open circuit voltage has become a key bottleneck restricting the improvement of the cell efficiency. Studies have shown that the factors affecting the open circuit voltage of CdTe thin film solar cell mainly include two core aspects: first, the absorption layer has low hole concentration (about 10 14 cm -3 ) and short minority carrier lifetime (less than 10 ns); and second, the energy barrier of the back contact interface hinders the carrier transport, and the interface defects cause serious carrier recombination loss.

[0003] Taking a traditional copper-doped CdTe thin film cell as an example, the hole concentration thereof is usually only 10 14 cm -3 . Theoretical simulation calculation shows that, in order to improve the open circuit voltage of the CdTe cell, the hole concentration and the minority carrier lifetime of the CdTe absorption layer need to be further improved. In recent years, the industry has carried out many improvement attempts, such as adding selenium elements in the CdTe absorption layer, which can effectively improve the minority carrier lifetime of the cell; and doping V group elements into the CdTe absorption layer, which can also improve the hole concentration of the absorption layer to 10 15 cm -3 or even 10 16 cm -3 . However, even if the above measures are taken, the open circuit voltage of the CdTe thin film cell has not been significantly improved, and researches believe that the electrical loss caused by the back interface recombination is one of the important reasons.

[0004] At present, the back interface defect passivation technology of CdTe solar cell is concerned. However, the existing researches face significant difficulties. Those researches which have proved to have passivation effect and can improve the carrier lifetime at the material level cannot effectively improve the open circuit voltage of the cell or prepare high-efficiency cells at the device level. This is because the back interface passivation material often destroys the interface matching and introduces an additional energy barrier while inhibiting the defect recombination, and how to balance the two effects becomes the key to improving the open circuit voltage of the device and the efficiency of the cell. In addition, due to the complexity of the back interface system, the process window of the traditional preparation of the back contact interface material system and structure is narrow, which is difficult to be compatible with the production line technology, and seriously limits the industrialization development of the CdTe thin film cell technology. SUMMARY

[0005] In view of the defects in the prior art, the photovoltaic device and the preparation method thereof provided by the present application have an interface layer that can match the back interface characteristics and has a passivation effect, thereby solving the problem that the open circuit voltage of the existing cadmium telluride thin film battery is difficult to improve due to the back interface defects, and the problem that the traditional process window is small and difficult to adapt to the production line technology.

[0006] To achieve the above-mentioned purpose, the present application provides a photovoltaic device, comprising, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorption layer, a first interface layer, and a back electrode conductive layer.

[0007] The first interface layer is a discontinuous film layer, and the material of the first interface layer includes a high-resistance oxide and / or a high-resistance nitride, and the thickness is 1 nm-100 nm.

[0008] Further, a second interface layer is further included, and the second interface layer is arranged on the surface of the absorption layer.

[0009] The second interface layer is a continuous film layer or a discontinuous film layer, the material of the second interface layer includes a high-resistance oxide and / or a high-resistance nitride, and the thickness is 0.2 nm-20 nm.

[0010] Further, a back contact layer is further included, and the back contact layer is arranged between the absorption layer and the first interface layer.

[0011] Alternatively, the back contact layer is arranged between the second interface layer and the first interface layer.

[0012] The material of the back contact layer is at least one of ZnTe, Cd x Zn 1-x Te, Hg x Zn 1-x Te, HgTe, Cd x Hg 1-x Te, CuTe, and Te, and the value range of x is 0≤x≤0.3, or a dopant of any of the materials.

[0013] The doping element in the dopant includes at least one of copper, silver, nitrogen, and a group V element.

[0014] Further, the high-resistance oxide includes at least one of SiO x , AlO x , MgO x , CaO x , GaO x , NiO x , TiO x , ZnO x , and SnO x ; and the high-resistance nitride is SiNx x≥0.9. The high resistance oxides and high resistance nitrides in the present application have a resistance value of 10 -2 Ω·m~10 20 Ω·m.

[0015] Further, the material of the buffer layer comprises at least one of tin oxide, zinc oxide, aluminum oxide, aluminum nitride, zinc sulfide, magnesium zinc oxide, tin zinc oxide, zinc oxysulfide and zinc stannate.

[0016] Further, the material of the absorption layer comprises at least one of CdTe, CdSe x Te 1-x and CdSe, and x ranges from 0 to 40%.

[0017] In a second aspect, the present application further discloses a method for preparing a photovoltaic device, comprising: sequentially depositing or spraying the TCO layer, the buffer layer, the absorption layer, the first interface layer and the back electrode conductive layer on the substrate; wherein the deposition method comprises at least one of pulsed laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition and vapor transmission deposition.

[0018] Further, the method further comprises: after depositing the absorption layer, adding a chlorine-containing material into the absorption layer and performing annealing treatment.

[0019] Further, the method further comprises: depositing a second interface layer on the surface of the absorption layer; wherein the deposition method comprises at least one of pulsed laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition and vapor transmission deposition.

[0020] Further, the method further comprises: depositing a back contact layer between the absorption layer and the first interface layer.

[0021] Or, the method further comprises: depositing a back contact layer between the second interface layer and the first interface layer; wherein the deposition method comprises at least one of pulsed laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition and vapor transmission deposition.

[0022] Further, the method further comprises: doping a precursor on the surface of the absorption layer or the surface of the second interface layer by coating treatment, soaking treatment or deposition treatment, wherein the raw material of the precursor is a salt solution or a compound containing copper, silver or a group V element.

[0023] Further, the method further comprises: after the deposition of the absorption layer, cleaning the absorption layer using an acid solution, an alkali solution or a bromine solution.

[0024] Further, the acid solution comprises hydrochloric acid and citric acid, the alkali solution comprises sodium hydroxide and potassium hydroxide, and the bromine solution comprises bromine methanol solution.

[0025] In summary, the present application has the following advantages:

[0026] The photovoltaic device described in the present application realizes the back surface / interface passivation and carrier transport collaborative optimization by the innovative back contact double (full) interface passivation structure, the new type interface (passivation) layer material and structure and the new type local contact back electrode structure, and thus improves the open circuit voltage and the photoelectric conversion performance. Meanwhile, the process window is widened, the compatibility of the technology and the production line is enhanced, and the industrialization development of the cadmium telluride thin film battery technology is promoted. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1 FIG. 1 is a schematic diagram of a photovoltaic device structure according to an embodiment of the present application;

[0028] Figure 2 FIG. 2 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0029] Figure 3 FIG. 3 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0030] Figure 4 FIG. 4 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0031] Figure 5 FIG. 5 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0032] Figure 6 FIG. 6 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0033] Figure 7 FIG. 7 is a schematic diagram of a photovoltaic device structure according to another embodiment of the present application;

[0034] Figure 8 FIG. 8 is a cross-sectional SEM image of a photovoltaic device according to another embodiment of the present application;

[0035] Figure 9 FIG. 9 is a back surface SEM image of a photovoltaic device according to another embodiment of the present application;

[0036] Figure 10 FIG. 10 is a J-V curve diagram of photovoltaic devices according to embodiments 7, 8 and comparative examples 1, 2 and 3. DETAILED DESCRIPTION

[0037] The principles and features of the present application are described below in connection with embodiments, and the examples are only used to explain the present application and not intended to limit the scope of the present application. The specific conditions are not specified in the examples, and the conventional conditions or the conditions recommended by the manufacturer are used. The reagents or instruments used are not specified by the manufacturer, and are conventional products that can be purchased on the market.

[0038] A cadmium telluride thin film solar cell is a photovoltaic device composed of multiple thin films deposited on a glass or other flexible substrate. A general standard cadmium telluride thin film solar cell is composed of a five-layer structure: a glass substrate, a TCO layer, a window layer, a CdTe absorption layer, and a back contact layer (and a back electrode).

[0039] In the cadmium telluride thin film battery device of the present application, the construction of each film layer has high flexibility and diversity. From the composition, each film layer can be formed by depositing a single material in a single film layer according to actual needs; multiple film layers of a single material can be deposited to achieve specific performance optimization; and multiple film layers of multiple materials can be deposited to integrate the advantages of different materials. In terms of coverage, each film layer can selectively cover all or part of the area of the device, and can cover all or part of the area of the film layer or material below. The "layer" referred to here refers to any number of materials in contact with all or part of the surface.

[0040] During the formation of the film layer, the newly formed film layer is deposited on the outer surface (usually the top surface) of the substrate or substrate structure. The substrate structure not only includes the substrate layer introduced into the deposition process, but also covers other additional layers deposited on the substrate layer in the existing deposition process. In addition, the film layer can be deposited on the entire substrate first, and then the excess material is removed by laser ablation, etching or other material removal processes to meet the design requirements of the device.

[0041] Therefore, in a first aspect, the present application provides a photovoltaic device, which at least includes a substrate, a TCO layer, a buffer layer, an absorption layer, a first interface layer, and a back electrode conductive layer arranged from bottom to top; wherein the first interface layer is a non-continuous film layer, and the material of the first interface layer includes high-resistance oxide and / or high-resistance nitride, and the thickness is 1 nm-100 nm.

[0042] The ideal interface (passivation) layer needs to meet the dual requirements of "conductive passivation", that is, to achieve efficient charge transmission while effectively modifying the interface defects. The most ideal mode is "tunneling conduction + full coverage passivation", but in practical applications, due to the limitations of process and materials, more alternative solutions such as "resistive conduction + full coverage passivation" are adopted. The application proposes a "local contact + local passivation" technology, which cleverly balances the conduction and passivation functions by introducing a non-continuous high-resistance passivation layer (i.e. the first interface layer): the area covered by the first interface layer can achieve passivation effect by modifying the surface defects of the film layer; the area not covered is directly in contact and has the advantage of low-resistance electrical contact. This structure design is highly compatible with the interface structure, the first interface layer characteristics, and the process window is wide, making it easier to apply in actual production.

[0043] In some optional embodiments of the application, a second interface layer is further included, which is arranged on the surface of the absorption layer; wherein the second interface layer is a continuous film layer or a non-continuous film layer, and the material of the second interface layer includes high-resistance oxide and / or high-resistance nitride, and the thickness is 0.2 nm-20 nm. It can be understood that the second interface layer is also prepared by using high-resistance oxide and / or high-resistance nitride, and the difference from the first interface layer is that the first interface layer in the application is a non-continuous film layer, and the second interface layer can be a continuous film layer or a non-continuous film layer.

[0044] In some optional embodiments of the application, a back contact layer is further included, which is arranged between the absorption layer and the first interface layer; or, the back contact layer is arranged between the second interface layer and the first interface layer.

[0045] Wherein the material of the back contact layer is at least one of ZnTe, Cd x Zn 1-x Te, Hg x Zn 1-x Te, HgTe, Cd x Hg 1-x Te, CuTe and Te, and x is in the range of 0≤x≤0.3, or a dopant of any of the above materials; wherein the doping elements in the dopant include at least one of copper, silver, nitrogen and group V elements.

[0046] In some optional embodiments of the present application, the substrate can be made of glass, such as soda-lime glass or float glass. Alternatively, the substrate can be formed of polymer, ceramic or other materials. The substrate can have additional layers, such as an anti-reflective coating to reduce surface reflection of the substrate, a self-cleaning coating to reduce dust adhesion on the substrate or a functional layer to convert ultraviolet photons into visible photons. Among them, the glass substrate (such as soda-lime glass) has low cost and good thermal stability, and is suitable for rigid devices; the flexible substrate (polymer / ceramic) can be bent, suitable for portable or curved photovoltaic scenarios, and expand the application scenarios (such as drones, wearable devices).

[0047] In some optional embodiments of the present application, a barrier layer can be formed on the substrate, and the material of the barrier layer includes at least one of tin oxide, silicon dioxide, aluminum-doped silicon oxide, silicon oxide, silicon nitride and aluminum oxide. The barrier layer prevents the diffusion of easily diffusing elements (such as sodium) in the substrate into the TCO layer and the absorption layer through physical isolation, avoids Na + doping interference (Na + will introduce deep level defects and reduce carrier lifetime). At the same time, the barrier layer has high light transmittance (light transmittance > 90%), which can avoid losing too much light energy; has thermal stability (resists annealing above 450°C), which can withstand high temperatures in subsequent processes; the barrier layer can also adjust the incident solar spectrum to further optimize light absorption capability.

[0048] In some optional embodiments of the present application, the material of the TCO layer is a transparent conductive oxide.

[0049] In some preferred embodiments of the present application, the transparent conductive oxide includes at least one of indium gallium oxide, cadmium stannate, cadmium tin oxide, silicon oxide, tin oxide, cadmium indium oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide and indium tin oxide.

[0050] In some optional embodiments of the present application, a buffer layer is deposited on the TCO layer, and the material of the buffer layer is a high-resistance transparent oxide, including at least one of tin oxide, zinc oxide, aluminum oxide, aluminum nitride, zinc sulfide, zinc magnesium oxide and zinc stannate.

[0051] In some optional embodiments of the present application, a window layer can be selectively deposited between the TCO layer and the absorption layer of the photovoltaic device, which is composed of an n-type semiconductor material, including but not limited to CdS 1-x Se x (0≤x≤1), ZnS / CdS alloy or other wide band gap stable materials. The main function of the window layer is to optimize the carrier transport characteristics, and in actual application, the structure can be selected to be retained or omitted according to the performance requirements of the device. The principle is that the wide band gap of the window layer can avoid light absorption and form a heterojunction with the CdTe absorption layer to adjust the direction of the built-in electric field.

[0052] When the device contains a window layer, its thickness is designed in the range of 10nm-100nm, and the recommended optimization interval is 30nm-75nm. The material composition can be formed by adjusting the proportion of cadmium, sulfur and selenium elements. CdS 1-x Se x The compound, wherein x is in the range of 0 to 1, and the optimal performance interval is 5%-10%. This composition ratio can be determined by energy spectrum analysis, for example, when x=0.1, the number ratio of sulfur atoms to selenium atoms in the compound is 9:1. The window layer can be manufactured by various deposition processes, including but not limited to: vapor transport deposition (VTD), atomic layer deposition (ALD), chemical bath deposition (CBD), sputtering process, or close space sublimation (CSS). The specific process selection needs to be optimized considering the material properties, equipment conditions and mass production requirements.

[0053] In some optional embodiments of the present application, the material of the absorption layer includes at least one of CdTe, CdSe x Te 1-x and CdSe, and x is in the range of 0-40%. In the present application, the formation of the absorption layer has the characteristics of diversification, which can be mainly divided into different types based on the number of material layers. First, the absorption layer can be directly formed by depositing a single material layer on the photovoltaic device, for example, the absorption layer material is a single layer of CdTe, or a single layer of CdSe x Te 1-x In this case, the element distribution in the material layer can be uniform; or a specific material gradient can be formed in the material layer, i.e., the element concentration and other properties change regularly in the material layer, for example, when the absorption layer is a single layer of CdSe x Te 1-x , it can be a single layer of CdSe x Te 1-x with constant Se content, or a single layer of CdSe x Te 1-x layer with gradually changing Se content, which preferably changes gradually from the part close to the TCO layer (including gradually increasing, or gradually decreasing, or first increasing and then decreasing, or first decreasing and then increasing, or increasing, decreasing, increasing, decreasing, etc., or first decreasing, then increasing, then decreasing, then increasing, etc., all of which are included in the scope of the present application), for example, the Se content can be the highest near the TCO layer, and then gradually decreases upwards, and is the smallest (e.g., 0) near the interface layer. Second, the absorption layer can also be formed by depositing multiple material film layers on the photovoltaic device, for example, a mixture of CdSe x Te 1-x and CdTe, for example, a mixture of CdSe and CdTe, for example, a mixture of CdSe x Te1-x Mixtures, such as CdSe, CdSe x Te 1-x Mixing with CdTe, in this deposition mode, also includes the aforementioned cases of uniform elemental distribution and the formation of specific material gradients, such as when CdSe and CdTe are mixed. x Te 1-x When mixed with CdTe, the lower part of the absorber layer near the TCO layer can be CdSe, and then the Se content gradually decreases until it is 0 on the back surface. That is, the upper part of the absorber layer is CdTe, and the middle part of the absorber layer is CdSe with gradually varying Se content. x Te 1-x Materials. After these film layers (precursors) are deposited, they need to undergo subsequent processing, such as annealing, to further integrate them into an absorption layer. This processing can allow multiple material film layers to form a uniformly distributed absorption layer; or create a gradient distribution within the absorption layer to optimize its performance. Thirdly, multiple material film layers can also undergo subsequent processing (such as annealing) to promote full fusion and reaction between the layers before forming an absorption layer. Similarly, the absorption layer formed through this process can achieve a uniform distribution or create a specific gradient across the absorption layer to meet the different performance requirements of photovoltaic devices. Multilayer precursors (such as CdSe+CdTe) are annealed to form a gradient alloy (CdSe... x Te 1-x (x ranges from 0% to 40%), the lattice constant changes gradually, reducing the stress within the layer; then, through a multi-step activation process (such as segmented annealing at 400℃-450℃, see the following "Taking the annealing process after applying CdCl2 as an example, a feasible multi-step activation process"), Cl diffusion and grain growth are promoted, thereby improving crystallinity and light absorption efficiency.

[0054] In a specific implementation, where an absorber layer is formed by depositing multiple precursors, a first precursor (e.g., CdSe) may be deposited first, followed by a second precursor (e.g., CdTe). The material with the two first precursor layers deposited is then annealed to form the desired final absorber layer (e.g., CdSe). x Te 1-x The annealing step can promote the formation of Se throughout CdSe. x Te 1-x They diffuse into each other within the layers.

[0055] In a specific implementation, the absorbent layer requires an annealing step or heat treatment after deposition to form the absorbent layer and be activated.

[0056] In the photovoltaic device manufacturing process of this application, the activation step of the absorber layer is mainly achieved through chlorine doping and annealing treatment, specifically:

[0057] I. Material selection, CdCl2or other chlorine-doped materials can be used, including but not limited to MnCl2, MgCl2, NH4Cl, ZnCl2or TeCl4.

[0058] II. Material introduction method, 1) Solution method: CdCl2is taken as an example, which can be prepared into an aqueous solution and applied to the surface of the absorber layer. 2) Spray method: the chlorine-containing material is sprayed in the form of mist to the absorber layer. 3) Vapor flow method: during the annealing process, the vapor of the chlorine-containing material (such as CdCl2) continuously flows through the surface of the absorber layer to achieve uniform introduction of chlorine elements.

[0059] III. Annealing process parameters, 1) Temperature range: the typical annealing temperature is set between about 400℃-475℃. 2) Total time control: the entire annealing process lasts for 90min or less. 3) Holding time: the holding time of the material at the peak temperature is ≤60min. Through the synergistic effect of these process elements, the defect repair and crystal structure optimization in the absorber layer can be effectively promoted, thereby improving the photoelectric conversion performance of the photovoltaic device.

[0060] In order to optimize different activation mechanisms, each embodiment described in the present application can use a multi-step activation step. Due to different activation mechanisms such as semiconductor grain growth, chlorine diffusion, sulfur and / or selenium interdiffusion into the layer, there are differences in the required thermal activation energy, and the multi-step method can achieve the best effect for each mechanism. For example, taking the annealing process after applying CdCl2as an example, a feasible multi-step activation process is: first apply CdCl2in a single step, and then use a multi-step temperature distribution for annealing. Specifically, the annealing temperature is first raised to 425℃ and maintained at this temperature for 1-10min; then further heated to 450℃-560℃, again maintained for 1-10min; finally gradually cooled down. Compared with the single-step annealing activation step at 425℃ or 450℃-460℃, this temperature distribution can make the CdTe material exhibit different crystallinity characteristics. In addition, the above method can be extended or replaced, by applying CdCl2multiple times and pairing each application with annealing at different times and temperatures to achieve the required layer characteristics. After completing the activation step, the subsequent process is to form a discontinuous film layer on the activated p-type absorber layer, and then form a back electrode layer on the discontinuous film layer.

[0061] It can be understood that, in the specific embodiment of the back contact layer being provided as an option, the non-continuous film layer (i.e., the first interface layer) is necessarily provided above the back contact layer, and the following options are provided below: (1) a non-continuous film layer is provided below as the second interface layer, and the second interface layer is below the absorption layer; (2) a continuous film layer is provided below as the second interface layer, and the second interface layer is below the absorption layer; (3) no interface layer is provided below, and the absorption layer is directly connected. It can be understood that the continuous film layer or the non-continuous film layer in the present application is a passivation layer, and the non-continuous film layer in the present application refers to the layer of material that does not completely cover the absorption layer or the back contact layer. The non-continuous film layer can perform surface passivation on the back electrode conductive layer, and can also reduce the risk of carrier recombination caused by the direct contact of the back electrode conductive layer and the absorption layer.

[0062] The traditional continuous structure interface passivation layer usually adopts a high-resistance material, and the thickness variation has a significant impact on carrier transport. In particular, when dealing with complex interfaces with large surface undulations, it is difficult to balance the following two points in the process: 1) the uniform coverage of the passivation material requires sufficient thickness; 2) the realization of ideal tunneling / low resistance characteristics requires extremely small thickness. This contradiction leads to a very narrow process window and poor tolerance to parameter fluctuations. The present application proposes a non-continuous structure, which ingeniously separates the two functions in space through the design of "local contact + local passivation": the high-resistance passivation layer only covers the area that needs defect modification, while the electrical contact area is directly exposed. This structural innovation brings two advantages: 1) the contact performance is directly determined by the non-passivation layer area, and the thickness variation of the interface layer does not affect the carrier transport path; 2) the passivation effect is realized through the material properties of the covered area, and is not affected by the structure of the contact area. This structure can significantly expand the process window: the tolerance to interface microstructure complexity is enhanced, and global uniform coverage is not required; the thickness of the passivation layer can be selected in a wider range, only meeting the local passivation requirement; the resistance fluctuation of the material weakens the impact on the overall performance, and the fault tolerance is improved. Moreover, when the first interface layer and the second interface layer are included, the photovoltaic device of the present application has the advantages of full interface passivation or double interface passivation, and can realize the overall passivation advantage of the upper and lower back contact layers.

[0063] In some optional embodiments of the present application, the high-resistance oxide (including the first interface layer and the second interface layer) includes at least one of SiO x , AlO x , MgO x , CaO x , GaO x , NiO x , TiO x , ZnO x , and SnO x , and the high-resistance nitride is SiN x , x≥0.9.

[0064] In some alternative embodiments of the application, a precursor material is deposited on the surface of the absorber layer, doped by a coating process, a soaking process, or a deposition process using a solution or a compound containing copper, silver, or a Group V element, such as CuCl2, AgCl2, Cd3As2, AsH3, Bi2Te3, Sb2Te3, Cd3P2, Zn3P2, Bi(NO3)3, Bi2S3, PCl3, PH3, SbH3, and AsCl3, and combinations thereof. After doping, the photovoltaic device is annealed, and the doped element, such as copper or a Group V element, diffuses into the absorber layer, and then the non-continuous film layer and the back electrode conductive layer are deposited.

[0065] In some alternative embodiments of the application, the back contact layer is made of at least one of ZnTe, Cd x Zn 1-x Te, Hg x Zn 1- x Te, HgTe, Cd x Hg 1-x Te, CuTe, and Te, or a dopant of any of the aforementioned materials; wherein the dopant includes at least one of copper, silver, nitrogen, and a Group V element.

[0066] In some alternative embodiments of the application, the back electrode conductive layer provides lateral conduction of electrical energy to an external circuit. The back electrode conductive layer can be made of aluminum, copper, nickel, gold, silver, molybdenum nitride, molybdenum, titanium nitride, chromium, an oxide of a metal, a nitride of a remaining metal, a combination of the foregoing, an alloy of the foregoing, or any other metal known to be useful as a conductor in a photovoltaic device or a transparent oxide formed of Sn, Zn, In, Ga, O, and combinations of the foregoing.

[0067] In some alternative embodiments of the application, the photovoltaic device can also include intermediate layers, such as a barrier layer between the various film layers of the device, such as between the substrate and the transparent conductive oxide layer. The photovoltaic device can also include electrical connections to output the current generated by the photovoltaic device.

[0068] In some alternative embodiments of the application, the photovoltaic device can include other components, such as bus bars, external wiring, laser etching, and the like. For example, when the photovoltaic device forms a photovoltaic cell of a photovoltaic module, multiple photovoltaic cells can be connected in series to achieve a desired voltage, such as by electrical wiring. The ends of the series-connected cells can be connected to suitable conductors, such as wires or bus bars, to direct the generated current to a convenient location for connection to a device or other system that uses the generated current. In some embodiments, a laser can be used to etch the deposited layers of the photovoltaic device to separate the device into multiple series-connected cells.

[0069] Secondly, based on the same inventive concept, this application also discloses a method for fabricating a photovoltaic device, comprising: sequentially depositing or spraying the TCO layer, buffer layer, absorber layer, first interface layer, and back electrode conductive layer on the substrate; wherein the deposition method includes at least one of pulsed laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transport deposition, and vapor transport deposition. All deposition methods in this application are standardized fabrication methods within the industry, but the resulting structure is a specific structure for which protection is sought in this application.

[0070] In some optional embodiments of this application, the method further includes: after depositing the absorbent layer, adding a chlorine-containing material to the absorbent layer and performing an annealing treatment.

[0071] In some optional embodiments of this application, the method further includes: applying a precursor to the surface of the absorber layer or the surface of the second interface layer by coating, immersion or deposition, wherein the raw material of the precursor is a salt solution or compound containing copper or group V elements.

[0072] In some optional embodiments of this application, the method further includes: after the absorption layer has been deposited, cleaning the absorption layer with an acid solution, an alkaline solution, or a bromine solution.

[0073] The technical solutions described above in this application will be explained in detail below with reference to specific embodiments.

[0074] Example 1

[0075] This embodiment provides a photovoltaic device, such as... Figure 1 As shown, it includes, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorption layer, a first interface layer, and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer.

[0076] Example 2

[0077] This embodiment provides a photovoltaic device, such as... Figure 2 As shown, it includes, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorption layer, a second interface layer, a first interface layer, and a back electrode conductive layer, wherein the first interface layer and the second interface layer are both discontinuous film layers.

[0078] Example 3

[0079] This embodiment provides a photovoltaic device, such as... Figure 3As shown, it comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer.

[0080] Embodiment 4

[0081] The embodiment provides a photovoltaic device, which comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer. Figure 4 As shown, it comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer.

[0082] Embodiment 5

[0083] The embodiment provides a photovoltaic device, which comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer. Figure 5 As shown, it comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer.

[0084] Embodiment 6

[0085] The embodiment provides a photovoltaic device, which comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer. Figure 6 As shown, it comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer.

[0086] Embodiment 7

[0087] The embodiment provides a photovoltaic device, which comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a second interface layer, a back contact layer, a first interface layer and a back electrode conductive layer, wherein the first interface layer is a discontinuous film layer and the second interface layer is a continuous film layer. Figure 7 As shown, it comprises a glass substrate, a SiO2 barrier layer, an FTO transparent conductive layer, a SnO2 buffer layer, a CdS 0.9 Se 0.1 window layer, a Se content gradient CdSe x Te 1-x absorbing layer (Se gradient gradually reduces from the front surface x=0.2 to the back surface x=0, i.e., the back surface is CdTe), an Al2O3 second interface layer (continuous film layer), a ZnTe back contact layer, a SiO2 first interface layer (discontinuous film layer) and a MoN / Al / Cr back electrode conductive layer.

[0088] The embodiment further provides a preparation method of the photovoltaic device, comprising:

[0089] S101, forming a barrier layer, a TCO layer, a window layer and a buffer layer on a glass substrate;

[0090] The glass substrate / barrier layer / TCO layer adopts a commercial transparent conductive glass, and the specific structure is glass (3.2 mm) / SiO2 (20 nm) / FTO (600 nm).

[0091] The method for forming the buffer layer is a magnetron sputtering method, and the thickness of the buffer layer is 30 nm, including the following steps:

[0092] (1) The sample is placed in a sputtering cavity, and vacuumized to 5*10 -3 Pa;

[0093] (2) Argon and oxygen are introduced, wherein the volume ratio of oxygen to argon is 5%, the cavity gas pressure is stabilized at 0.2 Pa, and the substrate is heated to 300°C;

[0094] (3) The SnO2 target material is sputtered in a magnetron sputtering manner to deposit a SnO2 buffer layer with a thickness of 30 nm.

[0095] (4) The deposited SnO2 sample is heat-treated at 500°C for 10 minutes in an atmosphere with a volume ratio of oxygen to nitrogen of 1:10, and naturally cooled.

[0096] The method for forming the window layer is a magnetron sputtering method, and the thickness of the window layer is 50 nm, including the following steps:

[0097] (1) The sample is placed in a sputtering cavity, and vacuumized to 5*10 -3 Pa;

[0098] (2) Argon is introduced until the cavity gas pressure is stabilized at 0.3 Pa, and the substrate is heated to 200°C;

[0099] (3) The CdS 0.9 Se 0.1 target material is sputtered in a magnetron sputtering manner to deposit a CdS 0.9 Se 0.1 window layer with a thickness of 50 nm.

[0100] S102, depositing an absorption layer on the window layer, which can be obtained by annealing a plurality of precursor materials. First, depositing a first layer of CdSe, then depositing a second layer of CdTe on the CdSe, and then forming a CdSe x Te 1-x absorption layer with a final thickness of 3 microns through an annealing step, i.e., CdSe material above the window layer, then CdSe x Te 1-x material with gradually decreasing Se content, and then CdTe with 0 Se content. After depositing the absorption layer, the absorption layer is cleaned with a 1% hydrochloric acid solution.

[0101] The method for depositing the first layer of CdSe is vacuum thermal evaporation, including the following steps:

[0102] The above sample is placed in a thermal evaporation chamber, and the substrate and CdSe source are heated to 400°C and 600°C respectively, and a CdSe thin film with a thickness of 100 nm is deposited.

[0103] The method for depositing the second layer of CdTe is near-space sublimation, including the following steps:

[0104] The above sample is placed in a near-space sublimation chamber, the CdTe source temperature is 640°C, and the substrate temperature is 540°C, and a CdTe thin film with a thickness of 3 µm is deposited.

[0105] The CdSe / CdTe absorber layer precursor stack is inter-diffused and alloyed during subsequent high-temperature annealing to form a CdSe x Te 1-x During annealing, a CdCl2 atmosphere is introduced to the CdSe / CdTe absorber layer precursor stack, i.e., CdCl2 vapor continuously flows over the surface of the absorber layer to facilitate the formation of high-quality CdSe x Te 1-x The total annealing time is 60 min, the annealing temperature is 350°C, and the CdCl2 vapor continuously flows for 45 min.

[0106] S103, doping CuCl2 precursor on the annealed CdSe x Te 1-x absorber layer, obtained by immersing in a CuCl2 solution with a concentration of 1 g / L for 10 s.

[0107] S104, depositing a second interface layer on the absorber layer doped with the precursor, with a thickness of 5 nm, including the following steps:

[0108] (1) placing the product obtained in S103 in an ALD chamber and heating to 100°C;

[0109] (2) introducing a precursor trimethylaluminum into the chamber;

[0110] (3) purging the chamber with nitrogen;

[0111] (4) introducing a reactant H2O into the chamber to allow the oxidizing agent to react with the precursor;

[0112] (5) purging the chamber with nitrogen;

[0113] (6) repeating steps (2-5) for 10 cycles until the film thickness reaches 5 nm.

[0114] S105, depositing a back contact layer on the second interface layer, with a thickness of 30 nm, comprising the following steps:

[0115] (1) placing the product obtained in S104 in a sputtering cavity, and vacuumizing to 5x10 -3 Pa;

[0116] (2) introducing argon gas to stabilize the cavity gas pressure at 0.5 Pa;

[0117] (3) sputtering a ZnTe:Cu target material in a magnetron sputtering manner to deposit a back contact layer with a thickness of 30 nm.

[0118] S106, depositing a first interface layer on the surface of the back contact layer, with a thickness of 2 nm, comprising the following steps:

[0119] (1) placing the product obtained in S105 in a sputtering cavity, and vacuumizing to 5x10 -3 Pa;

[0120] (2) introducing argon gas to stabilize the cavity gas pressure at 0.3 Pa, and heating the substrate to 150℃;

[0121] (3) sputtering a SiO2 target material in a magnetron sputtering manner to deposit a back contact layer with a thickness of 2 nm, and the interface layer is a discontinuous thin film with a coverage of 50%-60%. The surface SEM characterization of the interface layer shows its discontinuous characteristics (see Figure 9 ).

[0122] S107, depositing a MoN / Al / Cr back electrode on the first interface layer using a magnetron sputtering method, with a thickness of 200 nm, to obtain a photovoltaic device, comprising the following steps:

[0123] (1) placing the product obtained in S106 in a sputtering cavity, and vacuumizing to 5x10 -3 Pa;

[0124] (2) sputtering a Mo target material in a reactive sputtering manner, and then sputtering Al and Cr target materials in a direct current sputtering manner to form a back electrode layer. The cross-sectional SEM morphology of the prepared battery device is shown in Figure 8 , which shows excellent functional layer crystallinity and interface microstructure characteristics.

[0125] The J-V performance curve of the photovoltaic device of Example 7 measured under standard test conditions of AM1.5, 100 mW / cm 2 light illumination and 25℃ is shown in Figure 10 . The open-circuit voltage of the battery is 890 mV, the fill factor is 79.7%, the short-circuit current density is 29.5 mA / cm 2 , and the photoelectric conversion efficiency is 20.9%.

[0126] Example 8

[0127] The difference between this example and Example 7 is that the precursor is not doped on the surface of the absorber layer, but is doped in the same way in the second interface layer, and the precursor also diffuses into the interior of the absorber layer during the doping process. The photovoltaic device of Example 8 benefits from the comprehensive improvement of the passivation of the back interface of the cell and the carrier transport performance, and the open circuit voltage of the cell is further improved, and the open circuit voltage and conversion efficiency of the cell reach the international advanced level. The cell has an open circuit voltage of 898 mV, a fill factor of 79.4%, a short circuit current density of 29.7 mA / cm 2 , and a photoelectric conversion efficiency of 21.2% under standard test conditions of AM1.5, 100 mW / cm 2 The J-V performance curve measured under standard test conditions of illumination and 25°C is shown in Figure 10 . The open circuit voltage of the cell is 898 mV, the fill factor is 79.4%, the short circuit current density is 29.7 mA / cm 2 , and the photoelectric conversion efficiency is 21.2%.

[0128] Comparative Example 1

[0129] The difference between this comparative example and Example 7 is that the first interface layer and the second interface layer are not provided. The photovoltaic device of Comparative Example 1 has a large electrical loss related to the open circuit voltage and the fill factor of the cell due to the lack of passivation of the front / back interface defects of the back contact layer and the regulation of the carrier transport. The cell has an open circuit voltage of 852 mV, a fill factor of 77.5%, a short circuit current density of 28.9 mA / cm 2 , and a photoelectric conversion efficiency of 19.1% under standard test conditions of AM1.5, 100 mW / cm 2 The J-V performance curve measured under standard test conditions of illumination and 25°C is shown in Figure 10 . The open circuit voltage of the cell is 852 mV, the fill factor is 77.5%, the short circuit current density is 28.9 mA / cm 2 , and the photoelectric conversion efficiency is 19.1%.

[0130] Comparative Example 2

[0131] The difference between this comparative example and Example 7 is that the first interface layer is not provided. The performance of the photovoltaic device of Comparative Example 2 is limited by the lack of passivation of the interface defects and regulation of the carrier transport of the back contact / electrode. The cell has an open circuit voltage of 881 mV, a fill factor of 78.6%, a short circuit current density of 29.6 mA / cm 2 , and a photoelectric conversion efficiency of 20.5% under standard test conditions of AM1.5, 100 mW / cm 2 The J-V performance curve measured under standard test conditions of illumination and 25°C is shown in Figure 10 . The open circuit voltage of the cell is 881 mV, the fill factor is 78.6%, the short circuit current density is 29.6 mA / cm 2 , and the photoelectric conversion efficiency is 20.5%.

[0132] Comparative Example 3

[0133] The difference between this comparative example and Example 7 is that the second interface layer is not provided. The performance of the photovoltaic device of Comparative Example 3 is limited by the lack of passivation of the interface defects of the absorber / back contact. The cell has an open circuit voltage of 881 mV, a fill factor of 78.6%, a short circuit current density of 29.6 mA / cm 2The JV performance curves measured under standard test conditions of illumination and 25°C are as follows: Figure 10 As shown. The battery's open-circuit voltage is 884mV, fill factor is 78.3%, and short-circuit current density is 29.3mA / cm². 2 The photoelectric conversion efficiency is 20.3%.

[0134] The photovoltaic device structure in Example 4 above employs a discontinuous film layer (high-resistivity oxide / nitride) covering the back contact layer. This "local passivation" modifies surface defects in the back contact layer, reducing carrier recombination. The uncovered area directly contacts the back electrode, forming a low-resistivity conductive channel through "local contact," thus avoiding the overall resistance increase caused by traditional continuous passivation layers. Furthermore, its discontinuous structure is insensitive to microstructural fluctuations on the back contact layer surface, eliminating the need for strict control of film uniformity and tolerating passivation layer thickness fluctuations within the range of 1nm to 100nm. This expands the process window (e.g., tolerance for parameters such as annealing temperature and deposition rate). Simultaneously, after annealing, the doped precursor (e.g., compounds containing Cu or Group V elements) allows the dopant to diffuse uniformly into the absorber layer. Combined with a multi-step activation process (e.g., CdCl2 vapor annealing), the crystallinity and electrical properties of the absorber layer material can be optimized, improving photoelectric conversion efficiency.

[0135] In the photovoltaic device structures of Examples 5 and 6 described above, the upper discontinuous film layer passivates the interface between the back contact layer and the back electrode, while the lower (discontinuous) film layer passivates the interface between the absorber layer and the back contact layer, forming a "sandwich" type double-interface passivation structure. This significantly reduces the interface recombination rate (by more than 30% compared to a single film layer structure). Specifically, in Example 6, the discontinuous regions of the upper and lower film layers form low-resistance contacts with the back contact layer and the back electrode, respectively, providing passivation. In the photovoltaic device structure of Example 6, the discontinuous film layer directly covers the interface between the absorber layer and the back contact layer, specifically passivating dangling bonds and lattice mismatch defects between them, thereby reducing carrier recombination losses at the interface. The areas not covered by the film layer can shorten the carrier transport distance from the absorber layer to the back electrode, reducing series resistance, and is particularly suitable for absorber layers with large surface undulations.

[0136] While specific embodiments of this application have been described in detail, this should not be construed as limiting the scope of protection of this application. Various modifications and variations that can be made by those skilled in the art without inventive effort within the scope described in the claims still fall within the scope of protection of this application.

Claims

1. A photovoltaic device, characterized by, The solar cell comprises, from bottom to top, a substrate, a TCO layer, a buffer layer, an absorbing layer, a first interface layer, and a back electrode conductive layer; The first interface layer is a discontinuous film layer, the material of the first interface layer comprises high-resistance oxide and / or high-resistance nitride, and the thickness is 1 nm-100 nm; wherein the high-resistivity oxide comprises at least one of SiO x , AlO x , MgO x , CaO x , GaO x , NiO x , TiO x , ZnO x , and SnO x , and the high-resistivity nitride is SiN x , x > 0.

9. The material of the absorption layer includes CdTe, CdSe x Te 1-x and at least one of CdTe and CdSe, x ranges from 0 to 40%.

2. The photovoltaic device of claim 1, wherein, The solar cell further comprises a second interface layer arranged on the surface of the absorbing layer; The second interface layer is a continuous film layer or a discontinuous film layer, the material of the second interface layer comprises high-resistance oxide and / or high-resistance nitride, and the thickness is 0.2 nm-20 nm.

3. The photovoltaic device of claim 2, wherein, The solar cell further comprises a back contact layer arranged between the second interface layer and the first interface layer; wherein the material of the back contact layer is at least one of ZnTe, Cd x Zn 1-x Te, Hg x Zn 1-x Te, HgTe, Cd x Hg 1-x Te, CuTe and Te, x ranges from 0≤x≤0.3, or a dopant of any of the materials; The doping elements in the dopant include at least one of copper, silver, nitrogen, and V-group elements.

4. The photovoltaic device of claim 1, wherein, The solar cell further comprises a back contact layer arranged between the absorbing layer and the first interface layer; wherein the material of the back contact layer is at least one of ZnTe, Cd x Zn 1-x Te, Hg x Zn 1-x Te, HgTe, Cd x Hg 1-x Te, CuTe and Te, x ranges from 0≤x≤0.3, or a dopant of any of the materials; The doping elements in the dopant include at least one of copper, silver, nitrogen, and V-group elements.

5. The photovoltaic device of claim 1, wherein, The material of the buffer layer comprises at least one of tin oxide, zinc oxide, aluminum oxide, aluminum nitride, zinc sulfide, magnesium zinc oxide, tin zinc oxide, zinc oxysulfide, and zinc stannate.

6. A method of producing a photovoltaic device according to any one of claims 1 to 5, characterized by, The solar cell comprises: The TCO layer, the buffer layer, the absorbing layer, the first interface layer, and the back electrode conductive layer are sequentially deposited or sprayed on the substrate; the deposition method comprises at least one of pulse laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition, and vapor transmission deposition.

7. The production method according to claim 6, characterized by, The solar cell further comprises: After the absorbing layer is deposited, a chlorine-containing material is added to the absorbing layer and annealing treatment is performed.

8. The preparation method according to claim 6, characterized in that, The solar cell further comprises a second interface layer deposited on the surface of the absorbing layer; the deposition method comprises at least one of pulse laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition, and vapor transmission deposition.

9. The production method according to claim 8, characterized by, The solar cell further comprises a back contact layer deposited between the second interface layer and the first interface layer; The deposition method comprises at least one of pulse laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition, and vapor transmission deposition.

10. The method of claim 6, wherein, The solar cell further comprises a back contact layer deposited between the absorbing layer and the first interface layer; The deposition method comprises at least one of pulse laser deposition, chemical vapor deposition, electrochemical deposition, atomic layer deposition, near-space sublimation deposition, magnetron sputtering deposition, solution spraying deposition, solution spin coating deposition, slot coating, screen printing, evaporation transmission deposition, and vapor transmission deposition.

11. The method of claim 6, wherein, The solar cell further comprises: A precursor is doped on the surface of the absorbing layer or the surface of the second interface layer through coating treatment, soaking treatment, or deposition treatment, wherein the raw material of the precursor is a salt solution or a compound containing copper, silver, or V-group elements.

12. The method of claim 6, wherein, The solar cell further comprises: After the deposition of the absorption layer is completed, the absorption layer is cleaned using an acid solution, an alkali solution, or a bromine solution.

Images