Packaging device

Abstract

The invention discloses a packaging device. The packaging device comprises a chip and a packaging layer, the packaging layer wraps the chip, and a strengthening layer is generated on the upper surface of the packaging layer. The packaging layer and the strengthening layer contain the same element, but the element composition proportions of the packaging layer and the strengthening layer are different. The manufacturing method of the packaging device comprises the following steps: arranging a chip; generating a packaging layer to wrap the chip; and performing a surface treatment process on the upper surface of the packaging layer to enable a part of the packaging layer to generate a strengthening layer. The arrangement of the reinforcing layer can overcome the reliability problem caused by overlarge internal stress of the conventional packaging device.

Description

TECHNICAL FIELD

[0001] The present application relates to a packaging device, in particular to a packaging device with a surface having a strengthening layer. BACKGROUND

[0002] A common LED packaging process is to set a chip and a lead on a circuit substrate (or a temporary substrate), then use a packaging material to mold, and then cut into a single packaging structure. In order to be applied to the molding and cutting process, the packaging material needs to have a certain hardness, but when the hardness of the packaging material is too high, the internal stress of the packaging structure is too large due to the environment and temperature of the customer in use and other factors, which is easy to generate reliability problems such as lead breakage or silicone cracking. If the hardness of the packaging material is too low, the hard chips generated by cutting the circuit substrate (or temporary substrate) are easy to pierce into the packaging material, which seriously affects the appearance and function of the product. Therefore, how to select the appropriate packaging material is very important.

[0003] A common solution includes coating an anti-adhesive layer on the packaging material to reduce the adhesion of the chips to the surface of the packaging material. However, the coating of the anti-adhesive layer increases the complexity of the process, also causes solvent treatment problems, and the effect is not significant. At the same time, under the trend of gradually reducing the size of the packaging body, the number of cutting in the process increases, and the amount of chips generated also increases. Therefore, the method of coating the anti-adhesive layer has gradually failed to solve the problem of chip piercing.

[0004] Therefore, how to improve the overall packaging quality of the packaging structure through the improvement of the structure and the material has become one of the important issues to be solved in this industry. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a packaging device and a manufacturing method thereof in view of the deficiencies of the prior art.

[0006] In order to solve the above technical problems, one of the technical solutions adopted by the present application is to provide a packaging device. The packaging device includes a chip and a packaging layer, the packaging layer covers the chip, and the upper surface of the packaging layer has a strengthening layer. The packaging layer and the strengthening layer contain the same elements, but the element composition ratio of the packaging layer and the strengthening layer is different.

[0007] One of the beneficial effects of the present application is that the packaging device provided by the present application can avoid the piercing of the chips into the packaging layer after cutting by means of the technical solutions of "the upper surface of the packaging layer has a strengthening layer" and "the packaging layer and the strengthening layer contain the same elements, but the element composition ratio of the packaging layer and the strengthening layer is different", and can overcome the reliability problems derived from the excessive internal stress of the packaging device.

[0008] For further understanding of the features and technical contents of the present application, please refer to the following detailed description and drawings of the present application. However, the drawings provided are only for reference and illustration, and are not intended to limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 A side sectional view of a packaged device according to a first embodiment of the present application.

[0010] Figures 2 to 4 A side sectional view of a packaged device according to a second embodiment of the present application.

[0011] Figure 5 A side sectional view of a packaged device according to a second embodiment of the present application.

[0012] Figure 6 X-ray photoelectron spectrograms of the surface of the packaged devices according to Examples 1 to 3 and Comparative Example 1.

[0013] Figure 7 Figure 6 An overlay of the Si signal peaks.

[0014] Figure 8 Figure 6 An overlay of the O signal peaks.

[0015] Figure 9 Figure 6 An overlay of the C signal peaks. DETAILED DESCRIPTION

[0016] The following is a detailed description of the embodiments of the present application disclosed herein, which will enable one skilled in the art to understand the advantages and effects of the present application. The present application can be implemented or applied in other different embodiments, and the details in the present description can be modified and changed based on different viewpoints and applications, without departing from the concept of the present application. In addition, the drawings of the present application are only simple schematic illustrations, and are not intended to depict actual dimensions. The following embodiments will further illustrate the technical contents of the present application in detail, but the disclosed contents are not intended to limit the scope of protection of the present application. In addition, the term "or" used herein can include a combination of any one or more of the associated listed items, as appropriate.

[0017] Referring to Figure 1 The packaged device according to the first embodiment of the present application has a circuit substrate 1, a chip 2, a lead 3, and a packaging layer 4, as shown in the drawing.

[0018] ​​​The chip 2 is disposed on the circuit substrate 1. The opposite ends of the lead 3 are electrically connected to the chip 2 and the conductive structure on the circuit substrate 1, respectively, so that the chip 2 can be electrically connected to the external circuit through the lead 3 and the conductive structure in turn. The encapsulation layer 4 is disposed on the circuit substrate 1 and completely covers the chip 2 and the lead 3, so that the protection effect can be achieved.

[0019] The upper surface (the surface away from the circuit substrate 1) of the encapsulation layer 4 generates a reinforcing layer 41. The hardness of the reinforcing layer 41 is higher than that of the encapsulation layer 4. Specifically, the hardness of the reinforcing layer 41 is at least 2H, and the hardness of the reinforcing layer 41 is preferably greater than or equal to 3H. Therefore, in the subsequent cutting process, the substrate debris is not easy to penetrate the reinforcing layer 41, and the protection effect of the chip 2 can be improved.

[0020] Since the reinforcing layer 41 is only generated on the upper surface of the encapsulation device, the chip 2 is still covered by the encapsulation layer 4, so that the reliability problem of lead breakage or gel cracking caused by excessive stress inside the encapsulation device can be avoided.

[0021] Since the encapsulation layer 4 and the reinforcing layer 41 are generated by the same encapsulation material, the encapsulation layer 4 and the reinforcing layer 41 contain the same elements. The difference between the encapsulation layer 4 and the reinforcing layer 41 is that the reinforcing layer 41 is subjected to a surface treatment process. When the surface treatment process is performed, the element composition ratio of the encapsulation material changes, thereby causing the generation of the reinforcing layer 41, and also giving the encapsulation device different surface characteristics. Compared with the way of additionally setting the reinforcing layer 41, the reinforcing layer 41 of the present application has lower cost and higher manufacturing yield.

[0022] In addition, the encapsulation layer 4 and the reinforcing layer 41 are generated by the same encapsulation material, so the encapsulation layer 4 and the reinforcing layer 41 are integrally formed. In terms of appearance, although no obvious interface between the encapsulation layer 4 and the reinforcing layer 41 can be observed, through instrument analysis, it can be found that the element composition ratio and the surface characteristics of the encapsulation layer 4 and the reinforcing layer 41 have significant differences. The element composition ratio and the surface characteristics of the encapsulation layer 4 and the reinforcing layer 41 will be described later.

[0023] The manufacturing method of the encapsulation device of the present application includes: disposing the chip 2 (step S1); generating the encapsulation layer 4 (step S2); and performing a surface treatment process (step S3), and optionally performing a cutting process (step S4) can be further selected.

[0024] In step S1, the chip 2 is disposed on the circuit substrate 1, such as Figure 2The circuit substrate 1 can be a ceramic substrate, an aluminum nitride substrate, an aluminum oxide substrate, a silicon substrate, or a printed circuit board, but the present application is not limited thereto. The number of chips 2 can be one or more. When the number of chips 2 is more than one, the chips 2 are arranged at intervals, and each chip 2 is electrically connected to a conductive circuit (not shown) on the circuit substrate 1 via a lead 3. In the present embodiment, the chip 2 is a vertical chip and is electrically connected to the circuit substrate 1 via the lead 3, but the present application is not limited thereto, and a flip chip can also be used, in which case the chip 2 is electrically connected to the circuit substrate 1 without the use of a lead 3.

[0025] In step S2, a resin is used to form the encapsulation layer 4 by a molding process, as shown in FIG. 2. Figure 3 For example, the resin is preferably a phenyl-containing silicone gel because it has preferable optical properties and an appropriate hardness, but the present application is not limited thereto, and other resin materials can also be used.

[0026] In step S3, the surface treatment process can be an ultraviolet ozone treatment process. In an ozone atmosphere, a high-energy ray (for example, ultraviolet light) is applied to the upper surface of the encapsulation layer 4 to form the strengthening layer 41, as shown in FIG. 3. Figure 4 It should be noted that the strengthening layer 41 in FIG. 3 is not drawn to scale, and the scale is merely for ease of explanation. Figure 4 It should be noted that the strengthening layer 41 in FIG. 3 is not drawn to scale, and the scale is merely for ease of explanation.

[0027] The high-energy ray causes a portion of the silicon-carbon bonds (Si-C) in the silicone gel to break and react with oxygen radicals in the environment to form silicon-oxygen bonds (Si-O). Thus, after the surface treatment process, the content of the silicon-oxygen bonds (Si-O) in the strengthening layer 41 is higher than the content of the silicon-oxygen bonds (Si-O) in the encapsulation layer 4, and the content of the silicon-carbon bonds (Si-C) in the strengthening layer 41 is lower than the content of the silicon-carbon bonds (Si-C) in the encapsulation layer 4. In addition, the formation of the silicon-oxygen bonds (Si-O) also increases the cross-linking degree of the silicone gel.

[0028] The breaking and formation of the bonds also causes the elemental composition ratio in the strengthening layer 41 to change. The formation of the silicon-oxygen bonds (Si-O) causes the content of the silicon element and the oxygen element in the strengthening layer 41 to increase. Thus, the content of the silicon element in the encapsulation layer 4 is lower than the content of the silicon element in the strengthening layer 41, the content of the oxygen element in the encapsulation layer 4 is lower than the content of the oxygen element in the strengthening layer 41, and the content of the carbon element in the encapsulation layer 4 is higher than the content of the carbon element in the strengthening layer 41.

[0029] Due to the change in the elemental composition ratio, the strengthening layer 41 has a higher hardness (greater than 2H), a higher surface hydrophilicity (a contact angle less than 80 degrees), and a lower powder adhesion (a powder adhesion rate equal to or less than 0.6%) than the encapsulation layer 4.

[0030] In some embodiments, the content of silicon in the reinforcement layer 41 is 15% to 33%, the content of oxygen in the reinforcement layer 41 is 28% to 60%, and the content of carbon in the reinforcement layer 41 is 18% to 55%, but the present application is not limited thereto. When the element composition ratio in the reinforcement layer 41 meets the above range, the upper surface of the packaged device can have good surface properties to cope with various conditions in the process.

[0031] The thickness of the reinforcement layer 41 can be 20 nm to 150 nm, for example, an integer between 20 nm and 150 nm. If the thickness of the reinforcement layer 41 is too thin, the desired protection effect cannot be achieved. If the thickness of the reinforcement layer 41 is too thick, the internal stress of the packaged device will increase, and the cost and the length of the surface treatment process will also increase.

[0032] The thickness of the reinforcement layer 41 can be controlled by adjusting the parameters of the surface treatment process. Specifically, in order to promote the formation of silicon-oxygen bonds (Si-O), the surface treatment process can be carried out in an atmosphere with a temperature of 75°C to 95°C and an ozone concentration greater than 50%, preferably greater than 60%, and more preferably greater than 70%. The high-energy rays can be ultraviolet light with a wavelength range of 150 nm to 260 nm. In an exemplary embodiment, a first ultraviolet light with a wavelength range of 150 nm to 200 nm and a second ultraviolet light with a wavelength range of 201 nm to 260 nm are simultaneously irradiated for a total processing time of 8 minutes to 20 minutes. In addition, the distance between the ultraviolet light source and the upper surface of the packaging layer 4 is 15 mm to 60 mm, which can improve the reaction efficiency of the surface treatment process and generate a reinforcement layer 41 with an appropriate thickness.

[0033] In addition to the ultraviolet ozone treatment process, the surface treatment process can also be a plasma treatment process or a high-energy ray treatment process, but the present application is not limited thereto.

[0034] In step S4, a dicing process is performed according to the number of chips 2 to obtain a plurality of packaged devices as shown in FIG. 1. Figure 1 After the dicing process, it is found that the generation of the reinforcement layer 41 can effectively reduce the amount of cutting chips generated during the dicing process, and the packaged device after dicing has a flat edge and does not generate burrs. Therefore, the manufacturing yield and reliability of the packaged device can be greatly improved.

[0035] The packaged device of the present application can also be applied to a chip scale package (CSP) without a support. Please refer to FIG. 2, which shows a packaged device of a second embodiment of the present application, which is similar to the first embodiment, and the difference is that the packaged device of the second embodiment does not include the circuit substrate 1 and the lead 3, and adopts a flip-chip type chip. Figure 5

[0036] ​In the second embodiment, the packaged device has a chip 2 and a packaged layer 4. The chip 2 has a conductive electrode 21 exposed from the packaged layer 4 for electrical connection with an external circuit. The packaged layer 4 covers the chip 2, and its upper surface also has a reinforcing layer 41. The difference in manufacturing process compared to the first embodiment is the use of a temporary substrate. After the chip 2 is placed on the temporary substrate and the packaged layer 4 is molded, surface treatment is performed to form the reinforcing layer 41 on the packaged layer 4. Finally, the temporary substrate is removed after cutting.

[0037] [Experimental Data]

[0038] Based on the structure of the first embodiment, Example 1 was manufactured using two types of silicone (Dow Corning). Silicone (as in Example 1) and Example 2 (using Dow Corning) Encapsulation devices (made of silicone). Also using The packaging device of control group 1 without a reinforced layer (without surface treatment) and its use The packaged device of control group 2, which did not have a reinforcement layer, was manufactured.

[0039] To compare the effects of parameter adjustment on the properties of the reinforced layer, a surface treatment process was performed under conditions of 85°C and 80% ozone concentration, simultaneously irradiated with ultraviolet light at wavelengths of 170 nm and 250 nm. In Examples 1-1 to 1-3, the distance (hereinafter referred to as distance in Table 1) and the irradiation time (hereinafter referred to as time in Table 1) of different ultraviolet light sources were adjusted. Similarly, in Examples 2-1 to 2-3, the distance (hereinafter referred to as distance in Table 1) and the irradiation time (hereinafter referred to as time in Table 1) of different ultraviolet light sources were also adjusted. Specific parameters are listed in Table 1.

[0040] X-ray photoelectron spectroscopy (XPS) was used to analyze the signal intensity at different binding energies on the surface of the packaged device in order to further analyze the elemental composition ratio of the surface of the packaged device. Figure 6 The X-ray photoelectron spectroscopy results of Examples 1-1 to 1-3 and Control Group 1 are shown. Figures 7 to 9 They are respectively Figure 6 Enlarged views of the peak values ​​of silicon, oxygen, and carbon signals. The contact angle of the packaged device surface was measured using a contact angle meter (brand: Huisheng Technology, model: NEMST-CAMI2008). The hardness of the packaged device was assessed by drawing lines on its surface with a Mitsubishi sketching pencil (model: 9800DX (10B~8H)) and observing whether the pencil lead broke. The results of these surface characteristics are listed in Table 1.

[0041] The surface of the packaged device was placed in the phosphor powder pile, and the weight before and after the packaged device was compared to calculate the surface powder sticking rate of the surface of the packaged device. According to whether the cutting procedure was evaluated by the cutting scraps penetrating the packaged device, the yield of the packaged device was calculated by dividing the number of qualified products by the total number of manufactured products. The evaluation results are shown in Table 1.

[0042] Table 1

[0043]

[0044]

[0045] According to the results in Table 1, the element composition ratio of the strengthening layer is indeed different from that of the packaging layer, and the content of silicon element in the strengthening layer can be 15% to 26%, the content of oxygen element can be 32% to 53%, and the content of carbon element can be 21% to 52%.

[0046] Further comparing the element composition ratio of the strengthening layer and the packaging layer, it is found that the content of silicon element in the strengthening layer is 1.5 to 7.7 times that of the packaging layer, the content of oxygen element in the strengthening layer is 3.0 to 4.4 times that of the packaging layer, and the content of carbon element in the strengthening layer is 0.30 to 0.58 times that of the packaging layer. In other embodiments, the ratio of the content of silicon element in the strengthening layer to that in the packaging layer can be a positive integer between 1.5 and 7.7, the ratio of the content of oxygen element in the strengthening layer to that in the packaging layer can be 3.2, 3.4, 3.6, 3.8, 4.0 or 4.2, and the ratio of the content of carbon element in the strengthening layer to that in the packaging layer can be 0.3, 0.4, 0.5 or 0.6.

[0047] According to the results in Table 1, it is found that when the distance between the ultraviolet light source and the surface of the packaging layer is 15 to 25 mm and the irradiation time is 12 to 20 min, the strengthening layer can have a harder hardness, a lower powder sticking rate and a higher yield (Example 1-1, Example 2-1).

[0048] [Advantages of the embodiments]

[0049] One of the advantages of the present application is that the packaged device provided by the present application can have appropriate surface hardness to avoid generating burrs after cutting, and can overcome the reliability problems derived from excessive internal stress of the packaged device, by means of the technical solutions of "generating a strengthening layer on the upper surface of the packaging layer" and "the packaging layer and the strengthening layer containing the same elements, but the element composition ratio of the packaging layer and the strengthening layer is different".

[0050] The above disclosed content is only the preferred feasible embodiment of the present application, and is not limited to the protection scope of the claims of the present application, so any equivalent technical change made according to the content of the present application and the drawings is included in the protection scope of the claims of the present application.

Claims

1. A packaged device, characterized in that, The packaging device includes: A circuit board; A chip; and An encapsulation layer covers the chip, and a reinforcement layer is formed on the upper surface of the encapsulation layer; The encapsulation layer and the reinforcement layer contain the same elements, but the element composition ratios of the encapsulation layer and the reinforcement layer are different.

2. The packaged device according to claim 1, characterized in that, The packaging device further includes: a circuit board, on which the chip is disposed and electrically connected to the circuit board.

3. The packaged device according to claim 1, characterized in that, The silicon content in the encapsulation layer is lower than the silicon content in the reinforcement layer.

4. The packaged device according to claim 1, characterized in that, The oxygen content in the encapsulation layer is lower than the oxygen content in the reinforcement layer.

5. The packaged device according to claim 1, characterized in that, The carbon content in the encapsulation layer is higher than that in the reinforcement layer.

6. The packaged device according to claim 1, characterized in that, The silicon content in the reinforcement layer is 15% to 26%.

7. The packaged device according to claim 1, characterized in that, The oxygen content in the reinforcement layer is 32% to 53%.

8. The packaged device according to claim 1, characterized in that, The carbon content in the reinforcing layer is 21% to 52%.

9. The packaged device according to claim 1, characterized in that, The contact angle of the encapsulation layer is greater than that of the reinforcement layer.

10. The packaged device according to claim 1, characterized in that, The contact angle of the reinforcing layer is less than or equal to 80 degrees.

11. The packaged device according to claim 1, characterized in that, The hardness of the encapsulation layer is lower than that of the reinforcement layer.

12. The packaged device according to claim 11, characterized in that, The hardness of the reinforcing layer is greater than or equal to 3H.

13. The packaged device according to claim 1, characterized in that, The encapsulation layer is formed from silicone containing phenyl groups.

14. The packaged device according to claim 1, characterized in that, The thickness of the reinforcement layer is 20 nanometers to 150 nanometers.

15. The packaged device according to claim 1, characterized in that, The encapsulation layer and the reinforcement layer are integrally formed.

16. The packaged device according to claim 1, characterized in that, The silicon content in the reinforcement layer is 1.5 to 7.7 times that in the encapsulation layer.

17. The packaged device according to claim 1, characterized in that, The oxygen content in the reinforcement layer is 3.0 to 4.4 times that in the encapsulation layer.

18. The packaged device according to claim 1, characterized in that, The carbon content in the reinforcing layer is 0.30 to 0.58 times that in the encapsulation layer.

19. The packaged device according to claim 1, characterized in that, The surface powder adhesion rate of the hardened layer is equal to or less than 0.6%.

Images