Discrete extension phase shift control method and device of converter

Abstract

The invention provides a discrete extension phase shift control method and device of a converter. The method comprises the steps of sampling Uin, Uo and io; pref is calculated; dividing two working modes according to d1 and d2, and representing p under the two working modes by d1 and d2; setting compensation transmission power per unit values delta pH and delta pL, and calculating p; obtaining the relationship between d1 and d2 according to the constraint conditions and expressions of per-unit values of inductance and current at t1 and t2 in the two working modes; according to the relationship between the d1 and the d2 and the p, obtaining the ranges of the d1, the d2 and the p in the two working modes of soft switching of the switching tube; a switching tube control signal is generated according to d1 and d2, and soft switching and rapid dynamic response of the switching tube are achieved; the converter is a DAB DC-DC converter. The device can realize the method. The DAB DC-DC converter has the beneficial effects that soft switching and rapid dynamic response of the DAB DC-DC converter are realized, the loss is reduced, and the efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of DC-DC converters, and specifically, to a discrete extended phase-shift control method and device for a converter. Background Art

[0002] Dual Active Bridge (DAB) DC-DC converters have the advantages of high power density, bi-directional energy flow, easy implementation of soft switching, electrical isolation, and easy implementation of cascading and parallel connection, and have received extensive attention and research. At present, DAB DC-DC converters have been widely used in fields such as electric vehicles, distributed power sources, and DC microgrids. In a DC microgrid system, renewable energy has problems of complexity, intermittency, and instability, so it is urgent to study control methods for improving the dynamic performance and efficiency of DAB DC-DC converters. Specifically, when a disturbance occurs in a renewable energy power generation system or a load, the slow dynamic response speed of the interface converter will cause DC bus voltage oscillation, thus affecting the stability of the DC microgrid system. Therefore, improving the dynamic performance of the converter can enhance the stability of the system. At the same time, most of the power sources in the DC microgrid system are new energy power generation systems, so optimizing the efficiency of the converter can improve the utilization rate of renewable energy. Therefore, it is of great significance to provide a discrete extended phase-shift control method and device for a converter. Summary of the Invention

[0003] The purpose of the present invention is to solve at least one of the above-mentioned deficiencies existing in the prior art. For example, one of the purposes of the present invention is to improve the efficiency of the DAB DC-DC converter and effectively reduce switching losses, and the second purpose is to improve the dynamic performance of the DAB DC-DC converter and increase the dynamic response speed.

[0004] To achieve the above purpose, on the one hand, the present invention provides a discrete extended phase-shift control method for a converter. The converter can be a DAB DC-DC converter, and the method may include: sampling the input voltage U of the converter at the start moment of a switching period in , output voltage U o and output current i o [[ID=2二十二]]; calculating the per-unit value p of the open-loop transmission power ref ; dividing two working modes of the converter according to the relationship between the external phase-shift ratio d1 and the internal phase-shift ratio d2 of the converter. When 1≥d1≥d2≥0, it is working mode one, and when 1≥d2≥d1≥0, it is working mode two; using d1 and d2 to represent the per-unit value p of the transmission power in the two working modes; 0<p<1; setting the first compensated per-unit value of transmission power Δp H and the second compensated per-unit value of transmission power Δp L for compensating p ref , calculating p; 0<ΔpH <1,-1<Δp L <0; Determine U o Is it less than the output voltage reference value U? ref If so, then Δp is selected. H p = p ref +Δp H If not, then select Δp. L p = p ref +Δp L Based on the operating waveforms of the converter in two operating modes, the inductor current constraint condition for soft switching of the switching transistor is obtained. Based on the inductor current constraint condition, the per-unit value constraint condition of the inductor current at times t1 and t2 in the two operating modes is obtained. Combining the per-unit value constraint condition of the inductor current at times t1 and t2 in the two operating modes, the relationship between d1 and d2 in the two operating modes is obtained. Based on the relationship between d1 and d2 in the two operating modes and using d1 and d2 to represent the per-unit value p of the transmission power in the two operating modes, the combination of the outer shift ratio and the inner shift ratio in the two operating modes, along with the range of p, are obtained to satisfy the soft switching of the converter switching transistor. The control signal for the switching transistor is generated based on the combination of the outer shift ratio and the inner shift ratio to realize the soft switching and fast dynamic response of the converter switching transistor.

[0005] According to an exemplary embodiment of one aspect of the present invention, the calculation of the open-loop transmission power per unit value p ref It may include:

[0006]

[0007] Among them, P N =nU in U o / 8L s f s ;P N P represents the maximum transmission power of the converter. ref For open-loop transmission power; p ref is the open-loop transmission power per unit; n is the transformer turns ratio of the converter; f s L is the switching frequency of the converter; s U is the auxiliary inductance value of the converter; in U is the input voltage of the converter; o i is the output voltage of the converter; o U is the output current of the converter; ref This is the reference value for the output voltage.

[0008] According to an exemplary embodiment of one aspect of the present invention, the per-unit value p of the transmission power, represented by d1 and d2, for the two operating modes may include:

[0009] The transmission power P of the converter is expressed as:

[0010]

[0011] Where P is the transmission power of the converter; T s U is the switching period; ab (t) represents the output voltage of the primary-side full-bridge H1; i L (t) represents the per-unit value of the inductor current at time t; t0 is the start time of the switching cycle; t6 is the end time of the switching cycle; n is the transformer turns ratio of the converter; f s L is the switching frequency of the converter; s U is the auxiliary inductance value of the converter; in U is the input voltage of the converter; o d1 is the output voltage of the converter; d2 is the outward shift ratio; d2 is the inward shift ratio.

[0012] Normalize the transmission power P to obtain the per-unit value p:

[0013]

[0014] Where p is the per-unit value of transmission power; d1 is the outward shift ratio; d2 is the inward shift ratio;

[0015] As shown in Equation 3, the range of p in working mode 1 is 0 to 1, and the range of p in working mode 2 is 0 to 0.5.

[0016] According to an exemplary embodiment of one aspect of the present invention, the setting of the first compensated transmission power per unit value Δp H Second compensated transmission power per unit value Δp L This may include: Δp corresponding to several errors within a predetermined percentage range of errors. H and Δp L Within the range of data values, and considering control margin, Δp is selected. H and Δp L The difference is small Δp H and Δp L .

[0017] According to an exemplary embodiment of one aspect of the present invention, the plurality of errors may include inductance error, input voltage sampling error, output voltage sampling error, and output current sampling error.

[0018] According to an exemplary embodiment of one aspect of the present invention, the Δp corresponding to the inductance error, input voltage sampling error, output voltage sampling error, and output current sampling error when the predetermined error percentage range is 10% is... H and Δp L Within the range of values, Δp can be selected.H =0.1, Δp L = -0.1.

[0019] According to an exemplary embodiment of one aspect of the present invention, the constraint condition for obtaining the per-unit value of the inductor current at times t1 and t2 of the converter under two operating modes based on the inductor current constraint condition may include:

[0020] Based on the inductor current constraint and the periodic symmetry of the inductor current, it is known that in operating mode one, if i... L (t1)<0、i L (t2)>0, i L (t0)<0、i L (t3)>0、i L (t4)>0 and i L (t5) < 0 always holds true; in working mode two, if i is satisfied L (t1)>0、i L (t2)<0, i L (t0)<0、i L (t3)>0、i L (t4)<0 and i L (t5)>0 always holds true; based on this, the per-unit values ​​of the inductor current at times t1 and t2 of the converter under the two operating modes are constrained as follows:

[0021]

[0022] Among them, i L (t1) is the per-unit value of the inductor current at time t1; i L (t2) is the per-unit value of the inductor current at time t2.

[0023] According to an exemplary embodiment of one aspect of the present invention, the per-unit expression of the inductor current at times t1 and t2 of the converter in two operating modes can be expressed using the voltage conversion ratio, the outward shift ratio, and the inward shift ratio as follows:

[0024]

[0025] Where, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o i is the output voltage of the converter; L (t1) is the per-unit value of the inductor current at time t1; i L (t2) is the per-unit value of the inductor current at time t2; d1 is the outward shift ratio; d2 is the inward shift ratio.

[0026] According to an exemplary embodiment of one aspect of the present invention, the relationship between d1 and d2 under the two working modes can be as follows:

[0027]

[0028] Where, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o d1 is the output voltage of the converter; d2 is the external shift ratio; d2 is the internal shift ratio.

[0029] According to an exemplary embodiment of one aspect of the present invention, the combination of the outward shift ratio and the inward shift ratio satisfying the two operating modes of soft switching of the converter switching transistor can be:

[0030]

[0031] Where, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o d1 is the output voltage of the converter; p is the per-unit value of the transmission power; d1 is the external shift ratio; d2 is the internal shift ratio.

[0032] According to an exemplary embodiment of one aspect of the present invention, the p-range constraint satisfying the two operating modes of soft switching of the converter switching transistor can be: when 2(k-1) / k 2 When 0 ≤ p ≤ 1, use working mode one; when 0 ≤ p ≤ 2(k-1) / k 2 At that time, work mode two is adopted.

[0033] According to an exemplary embodiment of one aspect of the present invention, the converter includes 8 to 16 switching transistors.

[0034] Another aspect of the present invention provides a discrete extended phase-shift control device for a converter. The device may include a sampling unit, an open-loop transfer power per-unit calculation unit, an output voltage comparison unit, a discrete compensation transfer power per-unit selection unit, a switching transistor soft-switching optimization unit, a control pulse generation unit, and a converter. The converter is a DAB DC-DC converter. The converter is connected to the sampling unit, which is connected to the open-loop transfer power per-unit calculation unit and the output voltage comparison unit. The output voltage comparison unit is connected to the discrete compensation transfer power per-unit selection unit. The discrete compensation transfer power per-unit selection unit and the open-loop power per-unit calculation unit are connected to the switching transistor soft-switching optimization unit. The switching transistor soft-switching optimization unit is connected to the control pulse generation unit, and the control pulse generation unit is connected to the converter. The sampling unit is configured to sample the input voltage U of the converter at the beginning of the switching cycle. in Output voltage U o and output current i o The open-loop transmission power per-unit calculation unit is configured to calculate the open-loop transmission power per-unit value p. ref The output voltage comparison unit is configured to determine U. o Is it less than the output voltage reference value U? ref If so, then Δp is selected. H p = p ref +Δp H If not, then select Δp. L p = p ref +Δp L The discrete compensation transmission power per-unit selection unit includes an interconnected transmission power per-unit calculation module and a compensation transmission power per-unit setting module. The transmission power per-unit calculation module is configured to divide the converter into two operating modes based on the relationship between the converter's outward shift ratio d1 and inward shift ratio d2: mode one is when 1 ≥ d1 ≥ d2 ≥ 0, and mode two is when 1 ≥ d2 ≥ d1 ≥ 0. d1 and d2 represent the transmission power per-unit value p for the two operating modes. The compensation transmission power per-unit setting module is configured to set the first compensation transmission power per-unit value Δp. H Second compensated transmission power per unit value Δp L Used to compensate p ref Calculate p; 0 < Δp H <1,-1<Δp L<0; The soft-switching optimization unit is configured to obtain the inductor current constraint condition for soft switching of the switching transistor based on the operating waveforms of the converter in two operating modes. Based on the inductor current constraint condition, the per-unit value constraint condition of the inductor current at times t1 and t2 in the two operating modes is obtained. The per-unit value constraint condition of the inductor current at times t1 and t2 in the two operating modes is combined with the per-unit value expression of the inductor current at times t1 and t2 in the two operating modes to obtain the relationship between d1 and d2 in the two operating modes. Based on the relationship between d1 and d2 in the two operating modes and the per-unit value p of the transmission power in the two operating modes represented by d1 and d2, the combination of the outer shift ratio and the inner shift ratio and the range constraint of p in the two operating modes of the converter switching transistor soft switching are obtained. The control pulse generation unit is configured to generate the control signal of the switching transistor based on the combination of the outer shift ratio and the inner shift ratio to realize the soft switching and fast dynamic response of the converter switching transistor.

[0035] According to an exemplary embodiment of one aspect of the present invention, the converter may include a transformer and a primary-side full bridge and a secondary-side full bridge respectively connected to the primary and secondary sides of the transformer. The primary-side full bridge and the secondary-side full bridge together include 8 to 16 switching transistors and can generate control signals for the corresponding 8 to 16 switching transistors.

[0036] Compared with the prior art, the beneficial effects of the present invention include at least one of the following:

[0037] (1) The discrete extended phase-shift control method for converters proposed in this invention is a control strategy that can effectively improve the dynamic performance and efficiency of DAB DC-DC converters.

[0038] (2) The discrete extended phase-shift control device for the converter proposed in this invention can realize soft switching of the switching transistor of the DAB DC-DC converter, effectively reduce switching losses, and is low in cost and easy to operate. Attached Figure Description

[0039] The above and other objects and features of the present invention will become clearer from the following description taken in conjunction with the accompanying drawings, in which:

[0040] Figure 1 The topology of the DAB DC-DC converter is shown;

[0041] Figure 2A A schematic diagram of the turn-on loss of the switching transistors in a DAB DC-DC converter is shown.

[0042] Figure 2B A schematic diagram of the turn-off loss of the switching transistors in a DAB DC-DC converter is shown.

[0043] Figure 3A A schematic diagram of a sudden load reduction controlled by a PI controller is shown.

[0044] Figure 3B A schematic diagram of a PI control for a sudden load increase is shown;

[0045] Figure 4 A flowchart illustrating the DCB-DEPS control method of the present invention is shown;

[0046] Figure 5A The waveform of the EPS-controlled DAB DC-DC converter in operating mode one is shown.

[0047] Figure 5B The waveform of the EPS-controlled DAB DC-DC converter in operating mode two is shown.

[0048] Figure 6A The per-unit power change curve is shown when the inductance value error is 10%.

[0049] Figure 6B The curve showing the per-unit value variation of the compensated transmission power with a 10% input voltage sampling error is illustrated.

[0050] Figure 6C The curve showing the per-unit value change of the compensated transmission power when the output voltage sampling error is 10% is shown.

[0051] Figure 6D The curve showing the per-unit value change of the compensated transmission power when the output current sampling error is 10% is shown.

[0052] Figure 7 A schematic diagram of the discrete extended phase-shift control device of the DAB DC-DC converter of the present invention is shown;

[0053] Figure 8 This diagram illustrates the control parameters for two switching cycles of a DCB-DEPS-controlled DAB DC-DC converter.

[0054] Figure 9A This demonstrates a DCB-DEPS control of a DAB DC-DC converter with an output power of 210W, selecting Δp. H Steady-state simulation waveform at time;

[0055] Figure 9B This demonstrates a DCB-DEPS control of a DAB DC-DC converter with an output power of 210W, selecting Δp. L Steady-state simulation waveform at time;

[0056] Figure 10A This illustrates the DCB-DEPS control of a DAB DC-DC converter with an output power of 80W, where the controller selects Δp. H Steady-state simulation waveform at time;

[0057] Figure 10BThis illustrates the DCB-DEPS control of a DAB DC-DC converter with an output power of 80W, where the controller selects Δp. L Steady-state simulation waveform at time;

[0058] Figure 11A The following is a dynamic simulation waveform showing the output power of the DAB DC-DC converter controlled by DCB-DEPS switching from 80W to 210W;

[0059] Figure 11B The following is a dynamic simulation waveform showing the output power of the DAB DC-DC converter controlled by DCB-DEPS switching from 210W to 80W;

[0060] Figure 12 The steady-state waveform of the PI-controlled DAB DC-DC converter is shown when the output power is 80W.

[0061] Figure 13A The dynamic simulation waveform of the PI-controlled DAB DC-DC converter when the output power switches from 80W to 210W is shown.

[0062] Figure 13B The dynamic simulation waveform of the PI-controlled DAB DC-DC converter is shown when the output power switches from 210W to 80W. Detailed Implementation

[0063] In the following, a discrete extended phase-shift control method and apparatus for a converter according to the present invention will be described in detail with reference to the accompanying drawings and exemplary embodiments.

[0064] In the description of this application, the terms "first," "second," etc., are used merely for convenience of description and distinction, and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature.

[0065] Exemplary Example 1

[0066] This exemplary embodiment provides a discrete extended phase-shift control method for a converter.

[0067] The topology of the DAB DC-DC converter is as follows: Figure 1 The image shows a conventional converter. The losses in a DAB DC-DC converter mainly include switching losses, inductor losses, and transformer losses. For high-frequency converters, switching losses account for a larger proportion of the total losses. The fundamental reason for switching losses is that the turning on and off of the switching transistors is not instantaneous; there is an overlap between voltage and current, such as... Figure 2A and Figure 2BAs shown in the image. To address this issue, common methods for reducing switching losses mainly include: ① implementing soft switching of the switching transistor; ② reducing current stress; ③ replacing with a high-performance switching transistor. Among these, implementing soft switching of the switching transistor can effectively reduce switching losses.

[0068] The dynamic response speed of a DAB DC-DC converter is related to the adjustment of the shift ratio. The DAB DC-DC converter controls the magnitude and direction of the transmitted power by adjusting the shift ratio. When the load and input voltage change abruptly, traditional PI (Proportional-Integral) control requires a period of time for the transmitted power to reach the power required by the load. During this process, the transmitted power does not match the power required by the load, causing overshoot or voltage drop in the output voltage. Figure 3A and Figure 3B As shown in the diagram, voltage fluctuations generated by the converter will affect the normal operation of the DC bus and the load. Common methods for improving dynamic performance are mainly divided into linear control and nonlinear control. Among them, nonlinear discrete control methods can achieve better dynamic performance optimization results.

[0069] Based on the current analysis of losses and response, this invention proposes a discrete extended phase-shift control method for converters. This method is a disturbance compensation-based discrete extended phase-shift (DCB-DEPS) control method, which achieves fast dynamic response while realizing soft switching of the converter's (the converter referred to in this invention's DCB-DEPS control method refers to a DAB DC-DC converter) switching transistors. This invention is designed for DAB converters (including multi-level DAB converters).

[0070] The main design concept of the DCB-DEPS control method can be summarized as follows: At the beginning of the switching cycle, the input voltage, output voltage, and output current of the converter are sampled to calculate the open-loop transfer power per unit value. Two sets of compensated transfer power per unit values ​​are set to compensate for the open-loop transfer power per unit value, enabling the converter to quickly adjust the transfer power when the load and input voltage change abruptly, suppressing output voltage overshoot and sag, and improving dynamic response speed. Simultaneously, the inductor current condition for soft switching of the DAB DC-DC converter is combined with the power transfer characteristics to design a shift ratio combination that satisfies the full range of soft switching. This achieves both soft switching and fast dynamic response of the converter.

[0071] like Figure 4 As shown, the DCB-DEPS control method mainly includes: sampling the input voltage U in Output voltage U o Output current i o; Calculate the per-unit value p of the open-loop transmission power ref ; Judge U o Whether it is less than the output voltage reference value U ref , if so, select the per-unit value Δp of the compensation transmission power H , if not, select the per-unit value Δp of the compensation transmission power L ; After the selection is completed, calculate the per-unit value p of the transmission power = p ref +Δp H / Δp L ; Calculate the external / internal phase shift ratio combination d1 / d2 that meets the soft-switching constraint; generate the control PWM (Pulse Width Modulation) pulse, that is, the control signal of the switching tube. Regarding parameter design, the present invention considers the errors caused by non-ideal parasitic parameters and the interference of the source, load and controller in practice to the per-unit value p ref of the open-loop transmission power, and designs two discrete compensation per-unit values of the compensation transmission power p ref (compensate p H with Δp L or Δp ref ), to achieve the regulation of the output voltage of the converter. After compensation, calculate the per-unit value p of the transmission power and output the per-unit value p of the transmission power. It is impossible to directly control the DAB DC-DC converter, so it is necessary to consider the soft-switching optimization of the switching tube / soft-switching constraint of the switching tube, design the soft-switching algorithm (Equation 7), and obtain the phase shift ratio combination d1 / d2 from the per-unit value p of the transmission power.

[0072] Specifically, the DCB-DEPS control method of this exemplary embodiment may include the following steps:

[0073] Sample the input voltage U in , output voltage U o and output current i o of the converter at the beginning of the switching period.

[0074] Substitute the sampled values into the calculation of the per-unit value p ref of the open-loop transmission power.

[0075] Divide the two working modes of the converter according to the relationship between the external phase shift ratio d1 and the internal phase shift ratio d2 of the converter. When 1≥d1≥d2≥0, it is working mode one, and when 1≥d2≥d1≥0, it is working mode two; use d1 and d2 to represent the per-unit value p of the transmission power in the two working modes. 0<p<1. Here, there is an overlapping situation in the two expressions 1≥d1≥d2≥0 and 1≥d2≥d1≥0, which can be divided into working mode one or working mode two.

[0076] Set the first compensation per-unit value Δp H of the transmission power and the second compensation per-unit value ΔpL Used to compensate p ref Calculate p; 0 < Δp H <1,-1<Δp L <0.

[0077] Determine U o Is it less than the output voltage reference value U? ref If so, then Δp is selected. H More transmission power is transferred to the load, making U o Ascend, calculate p = p ref +Δp H If not, then select Δp. L Less transmission power is delivered to the load, making U o Decrease, calculate p = p ref +Δp L .

[0078] Based on the operating waveforms of the converter in two operating modes, the inductor current constraint condition when the switching transistor achieves ZVS (Zero Voltage Switch, also known as soft switching) is obtained; based on the inductor current constraint condition, the per-unit value constraint condition of the inductor current at times t1 and t2 in the two operating modes is obtained; combined with the per-unit value expression of the inductor current at times t1 and t2 in the two operating modes, the relationship between d1 and d2 in the two operating modes is obtained.

[0079] Based on the relationship between d1 and d2 under the two operating modes and using d1 and d2 to represent the per-unit value p of the transmission power under the two operating modes, the range constraints of the combination d1 / d2 and p under the two operating modes that satisfy the soft switching of the converter switch tube are obtained.

[0080] The control signal for the switching transistor is generated based on d1 / d2, enabling soft switching and fast dynamic response of the converter switching transistor.

[0081] In this exemplary embodiment, the open-loop transmission power per unit value p ref The expression can be represented as:

[0082]

[0083] In Equation 1, P N =nU in U o / 8L s f s ;P N P represents the maximum transmission power of the converter. ref For open-loop transmission power; p ref is the open-loop transmission power per unit; n is the transformer turns ratio of the converter; fs L is the switching frequency of the converter; s U is the auxiliary inductance value of the converter; in U is the input voltage of the converter; o i is the output voltage of the converter; o U is the output current of the converter; ref This is the reference value for the output voltage.

[0084] In this exemplary embodiment, the operating mode of the DAB DC-DC converter is controlled by EPS (Extended Phase Shift), such as... Figure 5A and Figure 5B The diagram shows the operating waveforms of the EPS-controlled DAB DC-DC converter in two operating modes. Based on the relationship between the external / internal shift ratio d1 / d2, the converter can be divided into two operating modes: Mode 1, 1 ≥ d1 ≥ d2 ≥ 0; and Mode 2, 1 ≥ d2 ≥ d1 ≥ 0.

[0085] In this exemplary embodiment, considering power transmission characteristics, d1 and d2 represent the per-unit values ​​p of the transmission power for the two operating modes. The specific process may include:

[0086] The transmission power of the EPS-controlled DAB DC-DC converter is:

[0087]

[0088] In Equation 2, P is the transmission power of the converter; T s U is the switching period; ab (t) represents the output voltage of the primary-side full-bridge H1; i L (t) represents the per-unit value of the inductor current at time t; t0 is the start time of the switching cycle; t6 is the end time of the switching cycle; n is the transformer turns ratio of the converter; f s L is the switching frequency of the converter; s U is the auxiliary inductance value of the converter; in U is the input voltage of the converter; o d1 is the output voltage of the converter; d2 is the external shift ratio; d2 is the internal shift ratio.

[0089] Normalizing the transmission power yields the per-unit value of the transmission power:

[0090]

[0091] In Equation 3, p is the per-unit value of transmission power; d1 is the outward shift ratio; and d2 is the inward shift ratio.

[0092] As can be seen from Equation 3, the range of p in working mode 1 is 0 to 1, and the range of p in working mode 2 is 0 to 0.5.

[0093] In this exemplary embodiment, in practical applications, some unavoidable errors in the converter and controller can affect the performance and stability of the converter system. Errors in the inductance value and sampling circuit can lead to erroneous in-slip ratios, causing the converter to become uncontrollable or experience performance degradation. Therefore, a certain degree of robustness needs to be considered when designing control parameters.

[0094] This invention sets a first compensated transmission power per unit value Δp H Second compensated transmission power per unit value Δp L This includes: Δp corresponding to several error conditions within a predetermined percentage range of error. H and Δp L Within the range of data values, Δp is selected. H and Δp L The smallest difference Δp H and Δp L .

[0095] For example, Figures 6A to 6D The per-unit values ​​of compensated transmission power (Δp) under four different errors are shown. H and Δp L The variation curves, as shown in Table 1, reflect... Figures 6A to 6D The data in the document refers to the range of per-unit values ​​for compensated transmission power under different error conditions (inductance value error, input voltage sampling error, output voltage sampling error, and output current sampling error, all with an error percentage of 10%). Here, 10% represents the robustness designed for the DAB DC-DC converter in this invention based on errors encountered in practical applications; this value can be adjusted according to actual conditions. Inductance value error, input voltage sampling error, output voltage sampling error, and output current sampling error have a significant impact on the DCB-DEPS control converter system; therefore, at least these four types of errors must be considered in parameter design. In addition, there may be deviations between the actual and nominal values ​​of components such as resistors and capacitors, power supply fluctuations or noise, non-ideal characteristics of switching devices, electromagnetic interference, etc.

[0096] Output voltage ripple is positively correlated with the per-unit value of the compensated transmission power. To reduce output voltage ripple, Δp H and Δp L The difference should be as small as possible, while a control margin needs to be considered.

[0097] Table 1. Range of per-unit values ​​of compensated transmission power under different error conditions.

[0098]

[0099] Furthermore, within the data range of Table 1 above, design / select Δp H and ΔpL Satisfying Δp H and Δp L To minimize the difference while considering a certain control margin, Δp can be... H and Δp L Designed as: Δp H =0.1, Δp L = -0.1.

[0100] In this exemplary embodiment, the inductor current condition for achieving soft switching is combined with the power transfer characteristics to design a shift ratio combination that satisfies the full range of soft switching. Specific processes may include (a) to (e):

[0101] (a) Taking a converter with 8 switching transistors as an example, considering the inductor current condition for achieving soft switching, based on the operating waveforms of the converter in two operating modes, the inductor current constraint condition for achieving ZVS of the switching transistors can be obtained, as shown in Table 2 below:

[0102] Table 2 Inductor current constraints for ZVS implementation of the switching transistor

[0103]

[0104] (b) According to Table 2, when the DCB-EPS controls the DAB DC-DC converter to operate in operating mode one, if i L (t1)<0、i L (t2)>0, and based on the periodic symmetry of the inductor current, we can obtain i L (t0)<0、i L (t3)>0、i L (t4)>0 and i L (t5) < 0 always holds true; when the DCB-DEPS controls the DAB DC-DC converter to operate in working mode two, if i L (t1)>0、i L (t2)<0, based on the periodic symmetry of the inductor current, we can obtain i L (t0)<0、i L (t3)>0、i L (t4)<0 and i L (t5)>0 always holds true. Therefore, the constraint condition for achieving ZVS of the switching transistor (the per-unit value constraint condition of the inductor current at times t1 and t2 of the converter in two operating modes) is:

[0105]

[0106] In Equation 4, i L (t1) is the per-unit value of the inductor current at time t1; i L (t2) is the per-unit value of the inductor current at time t2.

[0107] (c) The per-unit expressions for the inductor current at times t1 and t2 of the DCB-EPS controlled DAB DC-DC converter operating in two modes (expressed using voltage conversion ratio, outward shift ratio, and inward shift ratio) are as follows:

[0108]

[0109] In Equation 5, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o i is the output voltage of the converter; L (t1) is the per-unit value of the inductor current at time t1; i L (t2) is the per-unit value of the inductor current at time t2; d1 is the outward shift ratio; d2 is the inward shift ratio.

[0110] (d) Combining the per-unit constraint condition of inductor current (Equation 4) with the per-unit expression of inductor current at times t1 and t2 of the converter in the two operating modes (Equation 5), the relationship between d1 / d2 of the outward / inward shift ratio in the two operating modes is obtained:

[0111]

[0112] In Equation 6, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o d1 is the output voltage of the converter; d2 is the external shift ratio; d2 is the internal shift ratio.

[0113] (e) Design of the outer / inner shift ratio for full-range soft switching: Based on the relationship between d1 and d2 under the two operating modes (Equation 6) and the per-unit value p of the transmission power under the two operating modes represented by d1 and d2 (Equation 3), design the outer / inner shift ratio combination of DCB-DEPS control to satisfy the soft switching of the converter switching transistor under the two operating modes:

[0114]

[0115] In Equation 7, k = U in / nU o k is the voltage conversion ratio; n is the transformer turns ratio of the converter; U in U is the input voltage of the converter; o d1 is the output voltage of the converter; p is the per-unit value of the transmission power; d1 is the external shift ratio; d2 is the internal shift ratio.

[0116] Furthermore, combining Equations 6 and 3, it can be seen that the per-unit range (p-range constraint) of the transfer power that can achieve soft switching in the DCB-EPS controlled DAB DC-DC converter under both operating modes is:

[0117] Working mode 1: p∈2(k-1) / k 2 ~1; Working mode two: p∈0~2(k-1) / k 2 .

[0118] Therefore, when designing a full-range soft switch with an outward / inward shift ratio combination (Equation 7), the per-unit transmission power value satisfies 2(k-1) / k 2 When ≤p≤1, operating mode one is adopted; when the per-unit value of transmission power satisfies 0≤p≤2(k-1) / k 2 When this occurs, operating mode two is used. Here, "full range" refers to the full power range, i.e., p∈0~1. Operating mode one: p∈2(k-1) / k 2 ~1; Working mode two: p∈0~2(k-1) / k 2 The union of the two working modes is p∈0~1.

[0119] In this exemplary embodiment, the converter may be a converter having 8 to 16 switching transistors. For example, a converter with 8 switching transistors generates control signals v for eight switching transistors S1 to S8 based on the outer shift ratio d1 and the inner shift ratio d2. p1 ~v p8 This enables soft switching and fast dynamic response of the converter's switching transistors. Based on the converter with 8 switching transistors in step (a) above, switching transistors can be added to each bridge arm. As long as the newly added switching transistors are turned on and off at the same time as the original bridge arm's switching transistors, the specific process of designing a shift ratio combination that satisfies the full range of soft switching is still applicable, as shown in equations 4 to 7 in (a) to (e).

[0120] To better understand the exemplary embodiments of the present invention described above, further explanation is provided below with reference to specific examples.

[0121] Example 1

[0122] This example can verify the control effect of the DCB-DEPS control method of Exemplary Example 1.

[0123] A DCB-DEPS control method for an exemplary embodiment 1 of a DAB DC-DC converter with 8 switching transistors.

[0124] (1) During operation, Δp is alternately selected according to the magnitude of the output voltage. L and Δp H ,like Figure 8 As shown, at the start time t of the switching cycle n Sampled input voltage Uin =96V, output voltage U o =47.989V, output current i o = 4.362A. At the start of the switching cycle, t n+1 Sampled input voltage U in =96V, output voltage U o =48.012V, output current i o = 4.364A. Where, t n+2 -t n+1 =t n+1 -t n =T s This indicates that the time is two switching cycles.

[0125] (2) The per-unit value of open-loop transmission power p is obtained according to Equation 1. ref =0.7272.

[0126] (3) After dividing the two working modes according to the corresponding working waveforms, the per-unit value of the compensation transmission power is determined according to different error conditions. Here, Δp is designed within the range of values ​​corresponding to the inductance error, input voltage sampling error, output voltage sampling error, and output current sampling error when the error percentage range is 10%. H and Δp L This example design uses Δp. H =0.1, Δp L = -0.1.

[0127] (4) At the start time t of the switching cycle n Determine U o Less than the output voltage reference value U ref Therefore: p = 0.7272 + 0.1 = 0.8272. At the start time t of the switching cycle... n+1 Determine U o Greater than the output voltage reference value U ref Therefore: p = 0.7272 + (-0.1) = 0.6272.

[0128] (5) Based on the ratio combination that satisfies the full range of soft switching (Equation 7) and the p range constraint, design the switching cycle start time t n The shift ratios are d1 = 0.5 and d2 = 0.294; at the start of the switching cycle t n+1 The ratios of the shifts are d1 = 0.5 and d2 = 0.431.

[0129] (6) Obtain the steady-state simulation waveforms of the converter's output power under heavy load and light load, as well as the dynamic simulation waveforms of the converter's output power switching between heavy load and light load, to verify the soft-switching effect and dynamic performance of the switching transistor.

[0130] The DCB-DEPS controlled DAB DC-DC converter achieves ZVS with four more switches compared to the PI-controlled DAB DC-DC converter under light load conditions. When the load changes abruptly, DCB-DEPS control reduces the response time by 99.9% and output voltage overshoot / sag by 98% compared to PI control. Under heavy load conditions, both DCB-DEPS and PI control use eight switches, so no comparison was made under heavy load. A detailed comparison of the specific effects of DCB-DEPS control and PI control is as follows:

[0131] 1) Soft switching effect of the switching transistor.

[0132] Depend on Figure 9A and Figure 9B It can be seen that when the output power is under heavy load, it operates in operating mode one, and the inductor current i L (t1)<0、i L (t2)>0、i L (t0)<0、i L (t3)>0、i L (t4)>0 and i L (t5) < 0, satisfying the ZVS constraint conditions in Table 1, thus enabling ZVS for switching transistors S1 to S8. Figure 10A and Figure 10B It can be seen that when the output power is under light load, it operates in operating mode two, and the inductor current i L (t1)>0、i L (t2)<0、i L (t0)<0、i L (t3)>0、i L (t4)<0 and i L (t5)>0 satisfies the ZVS constraint in Table 1, enabling ZVS for switches S1 to S8. Therefore, regardless of heavy or light load, the DCB-DEPS-controlled DAB DC-DC converter can achieve ZVS for switches S1 to S8, reducing switching losses.

[0133] Depend on Figure 12 It can be seen that when the output power of the PI control converter is under light load, the inductor current i L (t0)<0、i L (t1)<0、i L (t2)<0、i L (t3)>0、i L (t4)>0 and i L (t5)>0, which does not satisfy the ZVS constraint condition for switching transistors S5 to S8, and can only achieve ZVS for the four switching transistors S1 to S4.

[0134] 2) Dynamic performance effect.

[0135] like Figure 11A As shown, when the output power switches from 80W to 210W, the DCB-DEPS controls the DAB DC-DC converter output voltage to drop by 110mV, requiring 20μs (one switching cycle) to recover to steady state. Figure 11B As shown, when the output power switches from 210W to 80W, the overshoot of the output voltage of the DCB-DEPS-controlled DAB DC-DC converter is 95mV, and it takes 20μs (one switching cycle) to recover to steady state.

[0136] like Figure 13A As shown, when the output power switches from 80W to 210W, the output voltage of the PI-controlled DAB DC-DC converter drops by 5V, and it takes 22ms to recover to steady state. Figure 13B As shown, when the output power switches from 210W to 80W, the overshoot of the output voltage of the PI-controlled DABDC-DC converter is 6V, and it takes 22ms to recover to steady state.

[0137] In summary, the ZVS and dynamic performance of the DCB-DEPS control method and the existing PI control method are shown in Table 3 below:

[0138] Table 3. Effects of DCB-DEPS Control and PI Control

[0139]

[0140] Exemplary Example 2

[0141] This exemplary embodiment provides a discrete extended phase-shift control device for a converter. The discrete extended phase-shift control device for the converter can implement the discrete extended phase-shift control method for the converter described in Exemplary Embodiment 1 above.

[0142] like Figure 7 As shown, the discrete extended phase-shift control device of the converter mainly includes: a sampling unit, an open-loop transmission power per-unit calculation unit, an output voltage comparison unit, a discrete compensation transmission power per-unit selection unit, a switching transistor soft-switching optimization unit, a control pulse generation unit, and the converter (i.e., a DAB DC-DC converter).

[0143] The converter is connected to the sampling unit, the sampling unit is connected to the open-loop transmission power per-unit calculation unit and the output voltage comparison unit, the output voltage comparison unit is connected to the discrete compensation transmission power per-unit selection unit, the discrete compensation transmission power per-unit selection unit and the open-loop transmission power per-unit calculation unit are connected to the switching transistor soft-switching optimization unit, the switching transistor soft-switching optimization unit is connected to the control pulse generation unit, and the control pulse generation unit is connected to the converter.

[0144] The sampling unit is configured to sample the input voltage U of the converter at the start moment of the switching cycle in , the output voltage U o and the output current i o .

[0145] The open-loop transmission power per-unit value calculation unit is configured to calculate the open-loop transmission power per-unit value p ref .

[0146] The output voltage comparison unit is configured to determine whether U o is less than the output voltage reference value U ref . If so, select Δp H , and p = p ref +Δp H ; if not, select Δp L , and p = p ref +Δp L .

[0147] The discrete compensation transmission power per-unit value selection unit includes a transmission power per-unit value calculation module and a compensation transmission power per-unit value setting module connected to each other; the transmission power per-unit value calculation module is configured to divide the two working modes of the converter according to the relationship between the external shift ratio d1 and the internal shift ratio d of the converter. When 1≥d1≥d2≥0, it is the first working mode, and when 1≥d2≥d1≥0, it is the second working mode. The transmission power per-unit values p of the two working modes are represented by d1 and d2, and 0<p<1; the compensation transmission power per-unit value setting module is configured to set the first compensation transmission power per-unit value Δp H and the second compensation transmission power per-unit value Δp L for compensating p ref and calculating p; 0<Δp H <1, -1<Δp L <0.

[0148] The soft-switching optimization unit of the switching tube is configured to obtain the inductor current constraint condition when the switching tube realizes ZVS according to the working waveforms of the converter in the two working modes, obtain the per-unit value constraint condition of the inductor current at the t1 and t2 moments of the converter in the two working modes according to the inductor current constraint condition, combine the per-unit value constraint condition of the inductor current with the per-unit value expressions of the inductor current at the t1 and t2 moments of the converter in the two working modes to obtain the relationship between d1 and d2 in the two working modes, and obtain the external / internal shift ratio combination and p range constraint in the two working modes that satisfy the soft switching of the converter switching tube according to the relationship between d1 and d2 in the two working modes and the transmission power per-unit values p represented by d1 and d2.

[0149] The control pulse generation unit is configured to generate control signals for the switching transistors based on the external / internal shift ratio combination, thereby enabling soft switching and fast dynamic response of the converter switching transistors.

[0150] In this exemplary embodiment, the converter may include a transformer and a primary-side full bridge H1 and a secondary-side full bridge H2 connected to the primary and secondary sides of the transformer, respectively. The primary-side full bridge and the secondary-side full bridge together include 8 to 16 switching transistors, namely S1 to S8 to S1 to S2. 16 It can generate the corresponding control signal v for the switching transistor. p1 ~v p8 to v p1 ~v p16 For example, such as Figure 7 As shown, the control pulse generation unit can generate the control signal v for the switching transistor. p1 ~v p8 .

[0151] In summary, the advantages proposed by this invention include at least one of the following:

[0152] (1) The discrete extended phase-shift control method of the converter proposed in this invention enables the DAB DC-DC converter to quickly adjust the transmission power when the load and input voltage change, suppress the output voltage overshoot and drop, and improve the dynamic response speed.

[0153] (2) Regardless of whether the output power is under heavy load or light load, the discrete extended phase shift control method of the converter proposed in this invention can control the DAB DC-DC converter to achieve ZVS of the switching transistor and reduce the switching loss of the switching transistor.

[0154] Although a discrete extended phase-shift control method and apparatus for a converter according to the present invention has been described above in conjunction with exemplary embodiments, those skilled in the art should understand that various modifications and changes can be made to the exemplary embodiments of the present invention without departing from the spirit and scope defined by the claims.

Claims

1. A discrete spread phase-shift control method of a converter, characterized by, The converter is a DAB DC-DC converter, and the method comprises: The input voltage U of the converter is sampled at the beginning of the switching cycle in , the output voltage U o , and the output current i o ; Computing open loop transmission power scale p ref ; Two working modes of the converter are divided according to the relationship between the outer shift phase ratio d1 and the inner shift phase ratio d2, 1 >= d1 >= d2 >= 0 is working mode one, and 1 >= d2 >= d1 >= 0 is working mode two; the transmission power unit value p of the two working modes is represented by d1 and d2; 0 < p < 1; setting a first compensation transmission power scale value Δp H and a second compensation transmission power scale value Δp L , for compensating p ref , calculating p; 0 < Δp H < 1, -1 < Δp L < 0; Judge U o whether less than the output voltage reference value U ref , if yes, select Δp H , p = p ref + Δp H ; if not, select Δp L , p = p ref + Δp L ; The inductor current constraint condition when the switch realizes soft switching is obtained according to the working waveform of the converter in the two working modes; the inductor current unit value constraint condition at t1 and t2 time points in the two working modes of the converter is obtained according to the inductor current constraint condition; the inductor current unit value constraint condition is combined with the inductor current unit value expression at t1 and t2 time points in the two working modes of the converter to obtain the relationship between d1 and d2 in the two working modes; According to the relationship between d1 and d2 in the two working modes and the transmission power unit value p of the two working modes represented by d1 and d2, the combination of the outer shift phase ratio and the inner shift phase ratio in the two working modes that satisfy the soft switching of the switch of the converter and the p range are obtained; The control signal of the switch is generated according to the combination of the outer shift phase ratio and the inner shift phase ratio, so as to realize the soft switching and fast dynamic response of the switch of the converter.

2. The discrete extended phase-displacement control method of a converter according to claim 1, characterized by, The computing open loop transmission power scale p ref Comprising: where P N = nU in f o L s f s P N is the maximum transmission power of the transformer; P ref is the open-loop transmission power; p ref is the open-loop transmission power unit; n is the transformer ratio of the transformer; f s is the switching frequency of the transformer; L s is the auxiliary inductance value of the transformer; U in is the input voltage of the transformer; U o is the output voltage of the transformer; i o is the output current of the transformer; U ref is the output voltage reference value.

3. The discrete extended phase-displacement control method of a converter according to claim 1, characterized by, The transmission power unit value p of the two working modes represented by d1 and d2 comprises: The transmission power P of the converter is represented as: Wherein, P is the transmission power of the converter; T s is the switching period; U ab (t) is the output voltage of the primary full-bridge H1; i L (t) is the inductance current unit value at time t; t0 is the starting time of the switching period; t6 is the ending time of the switching period; n is the transformer ratio of the converter; f s is the switching frequency of the converter; L s is the auxiliary inductance value of the converter; U in is the input voltage of the converter; U o is the output voltage of the converter; d1 is the outer phase shift ratio; d2 is the inner phase shift ratio; The transmission power P is normalized to obtain the transmission power unit value p: Wherein, p is the transmission power unit value; d1 is the outer shift phase ratio; d2 is the inner shift phase ratio; It is known from formula 3 that the p range in working mode one is 0-1, and the p range in working mode two is 0-0.

5.

4. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The setting first compensation transmission power unit Δp H And second compensation transmission power unit Δp L Corresponding to several errors in a predetermined error percentage range H And Δp L The value data range of Δp H And Δp L The difference between Δp H And Δp L .

5. The discrete extended phase-displacement control method of a converter according to claim 4, characterized by, The errors comprise inductor errors, input voltage sampling errors, output voltage sampling errors and output current sampling errors.

6. The discrete extended phase-displacement control method of a converter according to claim 4, characterized by, The Δp corresponding to the inductance error, input voltage sampling error, output voltage sampling error, and output current sampling error when the predetermined error percentage range is 10%. H and Δp L Within the range of data values, Δp is selected. H =0.1, Δp L = -0.

1.

7. The discrete extended phase-displacement control method of a converter according to claim 1, characterized by, The inductor current unit value constraint condition at t1 and t2 time points in the two working modes of the converter is obtained according to the inductor current constraint condition. According to the inductance current constraint condition and the inductance current periodic symmetry, it is known that in the working mode one, if i L (t1)<0, i L (t2)>0, i L (t0)<0, i L (t3)>0, i L (t4)>0 and i L (t5)<0 are always true; in the working mode two, if i L (t1)>0, i L (t2)<0, i L (t0)<0, i L (t3)>0, i L (t4)<0 and i L (t5)>0 are always true; based on this, the inductance current unit value constraint conditions of the converter at t1 and t2 moments in the two working modes are obtained: wherein, i L (t1) is the inductance current norm value at time t1; i L (t2) is the inductance current norm value at time t2.

8. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The inductor current unit value expression at t1 and t2 time points in the two working modes of the converter is represented by the voltage conversion ratio, the outer shift phase ratio and the inner shift phase ratio as: where k = U in / nU o ; k is the voltage conversion ratio; n is the transformer ratio of the converter; U in is the input voltage of the converter; U o is the output voltage of the converter; i L (t1) is the inductance current unit value at t1; i L (t2) is the inductance current unit value at t2; d1 is the outer shift phase ratio; d2 is the inner shift phase ratio.

9. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The relationship between d1 and d2 in the two working modes is: where k = U in / nU o ; k is the voltage conversion ratio; n is the transformer ratio of the converter; U in is the input voltage of the converter; U o is the output voltage of the converter; d1 is the outer shift phase ratio; d2 is the inner shift phase ratio.

10. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The combination of the outer shift phase ratio and the inner shift phase ratio in the two working modes that satisfy the soft switching of the switch of the converter is: where k = U in / nU o ; k is the voltage conversion ratio; n is the transformer ratio of the converter; U in is the input voltage of the converter; U o is the output voltage of the converter; p is the transmission power per unit; d1 is the outer shift phase ratio; d2 is the inner shift phase ratio.

11. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The p range constraint in the two working modes to meet the soft switch of the converter switch tube is: when 2(k-1) / k 2 ≤p≤1, working mode one is adopted; when 0≤p≤2(k-1) / k 2 , working mode two is adopted.

12. The discrete extended phase-shift control method of a converter according to claim 1, characterized by, The converter comprises 8-16 switches.

13. A discrete spread phase control apparatus for a converter, characterized by The device comprises a sampling unit, an open-loop transmission power unit value calculation unit, an output voltage comparison unit, a discrete compensation transmission power unit value selection unit, a switch soft switching optimization unit, a control pulse generation unit and a converter, wherein the converter is a DAB DC-DC converter, and the converter comprises 8-16 switches. The converter is connected with the sampling unit, the sampling unit is connected with the open-loop transmission power unit value calculation unit and the output voltage comparison unit, the output voltage comparison unit is connected with the discrete compensation transmission power unit value selection unit, the discrete compensation transmission power unit value selection unit and the open-loop transmission power unit value calculation unit are connected with the switch soft switching optimization unit, the switch soft switching optimization unit is connected with the control pulse generation unit, and the control pulse generation unit is connected with the converter. The sampling unit is configured to sample the input voltage U of the converter at a switching cycle start instant in , the output voltage U o , and the output current i o ; The open loop transmission power reference value calculating unit is configured to calculate an open loop transmission power reference value p ref ; The output voltage comparison unit is configured to determine whether U o is less than an output voltage reference value U ref , and if so, to select Δp H , p = p ref + Δp H , and if not, to select Δp L , p = p ref + Δp L . The discrete compensation transmission power unit includes a transmission power unit calculation module and a compensation transmission power unit setting module connected with each other; the transmission power unit calculation module is configured to divide two working modes of the transformer according to the relationship between the outer displacement ratio d1 and the inner displacement ratio d2, and the transmission power unit p of the two working modes is represented by d1 and d2; the compensation transmission power unit setting module is configured to set a first compensation transmission power unit Δp H and a second compensation transmission power unit Δp L , for compensating p ref , calculating p; 0<Δp H <1, -1<Δp L <0; The switch tube soft switching optimization unit is configured to obtain an inductor current constraint condition when the switch tube realizes soft switching according to working waveforms of the converter in the two working modes, obtain inductor current normalized value constraint conditions of the converter at the t1 and t2 moments in the two working modes according to the inductor current constraint condition, obtain a relationship between d1 and d2 in the two working modes by combining the inductor current normalized value constraint conditions with inductor current normalized value expressions of the converter at the t1 and t2 moments in the two working modes, and obtain a combination of the outer shift phase ratio and the inner shift phase ratio in the two working modes satisfying the converter switch tube soft switching according to the relationship between d1 and d2 in the two working modes and a transmission power normalized value p expressed by d1 and d2 in the two working modes, and a p range constraint; The control pulse generation unit is configured to generate a control signal of the switch tube according to the combination of the outer shift phase ratio and the inner shift phase ratio, so as to realize soft switching and fast dynamic response of the switch tube of the converter.

14. A discrete spread phase control apparatus for a converter as claimed in claim 13, characterised in that, The converter includes a transformer and a primary full-bridge and a secondary full-bridge connected to the primary side and the secondary side of the transformer respectively, the primary full-bridge and the secondary full-bridge together include 8 to 16 switch tubes, and control signals of the corresponding 8 to 16 switch tubes are generated.

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