Power conversion device

Abstract

According to the present invention, a control device performs soft switching more reliably without directly controlling a plurality of switches for zero-voltage soft switching. A control device (51) sets a second dead time period. A signal generation circuit (52) generates, for each of a plurality of switches (8), a control signal that has a high-level period corresponding to the second dead time period. The control device (51) carries out a first operation and further carries out a second operation if the duty cycle command value of one phase among the duty cycle command values of three phases in a two-phase modulation system is fixed to a constant value, or the duty cycle command value of one phase among the duty cycle command values of three phases in a three-phase modulation system is fixed to a constant value, and it has been determined that resonant currents corresponding to two respective switching circuits (10) among a plurality of switching circuits (10) are simultaneously flowing through a resonance inductor (L1).

Description

Power conversion device

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device capable of converting DC power into AC power.

[0002] Patent Document 1 discloses a power conversion system.

[0003] The power conversion system (power conversion device) disclosed in Patent Document 1 includes switching means having a pair of main switch elements (first switching element and second switching element) connected in series with each other, an auxiliary circuit for performing soft switching of each main switch element, and a controller. The auxiliary circuit includes two capacitors, a coil (resonance inductor), and a plurality of auxiliary switch elements. The controller generates control signals (a plurality of first PWM signals and a plurality of second PWM signals) for PWM-controlling each main switch element and outputs them to the gates of each main switch element. Further, the controller generates control signals for controlling the on / off of each auxiliary switch element and outputs them to the gates of each auxiliary switch element. When the controller determines that a plurality of phase currents flow through the coil, the controller controls the plurality of auxiliary switch elements so that the current flowing through at least one phase becomes smaller than a preset magnitude.

[0004] In the power conversion system (power conversion device) disclosed in Patent Document 1, in the controller, it is necessary to generate and output a plurality of first PWM signals, a plurality of second PWM signals, and a plurality of control signals, which causes the controller to become large-sized. Further, in the power conversion device disclosed in Patent Document 1, when the controller determines that a plurality of phase currents flow through the coil, the controller controls the plurality of auxiliary switch elements so that the current flowing through at least one phase becomes smaller than a preset magnitude. Therefore, soft switching of the main switch element corresponding to the at least one phase is not performed.

[0005] Japanese Unexamined Patent Application Publication No. 2010-233306

[0006] An object of the present disclosure is to provide a power conversion device capable of more reliably performing soft switching without directly controlling a plurality of switches for zero voltage soft switching in a control device.

[0007] A power conversion device according to one aspect of the present disclosure comprises a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a regenerative capacitor, a control device, and a signal generation circuit. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which the plurality of first switching elements and the plurality of second switching elements are connected in series in a one-to-one relationship, are connected in parallel to one another. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal. In the power conversion circuit, the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits, and load current flows through it. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits. The plurality of resonant capacitors correspond one-to-one with the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch among the plurality of switches. The resonant inductor has a third end and a fourth end. In the resonant inductor, the third end is connected to the second end of the plurality of switches. The regenerative capacitor has a fifth end and a sixth end. In the regenerative capacitor, the fifth end is connected to the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control device generates a plurality of first PWM signals to control the plurality of first switching elements and a plurality of second PWM signals to control the plurality of second switching elements. The signal generation circuit provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level.The control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value for a two-phase modulation scheme or a three-phase duty cycle command value for a three-phase modulation scheme. For each of the plurality of switching circuits, the control device sets a second dead time period by adding a predetermined time to a first dead time period, which is set in advance so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element. The predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor and the voltage value of the regenerative capacitor. For each of the plurality of switches, the signal generation circuit generates a control signal having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits. When the control device determines that a resonant current corresponding to two of the multiple switching circuits flows simultaneously through the resonant inductor when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of the three-phase modulation scheme is fixed to a constant value, the control device performs a first operation, and then a second operation, when one of the two switching circuits is designated as the first switching circuit and the other as the second switching circuit. The first operation is an operation that shortens the second dead time period for the first switching circuit by the shortening period. The second operation is to shift the high-level periods of the first PWM signal to the first switching element and the second PWM signal to the second switching element of at least one of the first and second switching circuits, such that the ON period of the switch corresponding to the first switching circuit among the plurality of switches starts after a waiting period from the point in time when the current value of the resonant current corresponding to the second switching circuit reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit.

[0008] A power conversion device according to one aspect of the present disclosure comprises a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a regenerative capacitor, a control device, and a signal generation circuit. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which the plurality of first switching elements and the plurality of second switching elements are connected in series in a one-to-one relationship, are connected in parallel to one another. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal. In the power conversion circuit, the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits, and load current flows through it. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits. The plurality of resonant capacitors correspond one-to-one with the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch among the plurality of switches. The resonant inductor has a third end and a fourth end. In the resonant inductor, the third end is connected to the second end of the plurality of switches. The regenerative capacitor has a fifth end and a sixth end. In the regenerative capacitor, the fifth end is connected to the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control device generates a plurality of first PWM signals to control the plurality of first switching elements and a plurality of second PWM signals to control the plurality of second switching elements. The signal generation circuit provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level.The control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value for a two-phase modulation scheme or a three-phase duty cycle command value for a three-phase modulation scheme. For each of the plurality of switching circuits, the control device sets a second dead time period by adding a predetermined time to a first dead time period, which is set in advance so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element. The predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor and the voltage value of the regenerative capacitor. For each of the plurality of switches, the signal generation circuit generates a control signal having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits. When the control device determines that a resonant current corresponding to two or more of the multiple switching circuits flows simultaneously through the resonant inductor when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of the three-phase modulation scheme is fixed to a constant value, the control device performs shift control to shift the high-level period of the first PWM signal to the first switching element and the second PWM signal to the second switching element in at least one of the two or more switching circuits so that the resonant current corresponding to two or more of the multiple switching circuits does not flow simultaneously through the resonant inductor.

[0009] A power conversion device according to one embodiment of the present disclosure comprises a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a regenerative capacitor, and a control system. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which the plurality of first switching elements and the plurality of second switching elements are connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal, and the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, and load current flows through it. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, and its second end connected to a common connection point. The plurality of resonant capacitors correspond one-to-one with the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch among the plurality of switches. The resonant inductor has a third end and a fourth end. In the resonant inductor, the third end is connected to the common connection point. The regenerative capacitor has a fifth end and a sixth end. In the regenerative capacitor, the fifth end is connected to the first DC terminal or the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control system includes a control device and a signal generation circuit. The control device generates a plurality of first PWM signals to control the plurality of first switching elements and a plurality of second PWM signals to control the plurality of second switching elements. The signal generation circuit provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level.The control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value for a two-phase modulation scheme or a three-phase duty cycle command value for a three-phase modulation scheme. For each of the plurality of switching circuits, the control device sets a second dead time period by adding a variable time to a preset first dead time period, which is set so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element. The variable time is determined according to the current value of the load current, the inductance of the resonant inductor and the potential of the sixth terminal of the regenerative capacitor. For each of the plurality of switches, the signal generation circuit generates the control signal having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits. The control system can perform a first control operation and a second control operation when it determines that a resonant current flows simultaneously through two or more of the switches in the plurality of switches when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of the three-phase modulation scheme is fixed to a constant value. In the first control operation, the control system overlaps the high-level period of the control signal to each of the two or more switches with a predetermined period of time with the second dead time period corresponding to each of the two or more switching circuits connected to the two or more switches in the plurality of switching circuits. In the second control operation, the control system determines the start time of the high-level period of the control signal to at least one of the plurality of switches according to the load current of at least one phase flowing through the AC load connected to the plurality of AC terminals.

[0010] A power conversion device according to one embodiment of the present disclosure comprises a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, a resonant inductor, a regenerative capacitor, and a control system. The power conversion circuit has a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits, each in which the plurality of first switching elements and the plurality of second switching elements are connected in series in a one-to-one relationship, are connected in parallel to one another. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal. In the power conversion circuit, the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals correspond one-to-one to the plurality of switching circuits. Each of the plurality of AC terminals is connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits, and load current flows through it. The plurality of switches correspond one-to-one to the plurality of switching circuits. Each of the plurality of switches has its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit among the plurality of switching circuits, and its second end connected to a common connection point. The plurality of resonant capacitors correspond one-to-one with the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of the corresponding switch among the plurality of switches. The resonant inductor has a third end and a fourth end. In the resonant inductor, the third end is connected to the common connection point. The regenerative capacitor has a fifth end and a sixth end. In the regenerative capacitor, the fifth end is connected to the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control system comprises a control device and a signal generation circuit. The control device generates a plurality of first PWM signals to control the plurality of first switching elements and a plurality of second PWM signals to control the plurality of second switching elements. The signal generation circuit provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level.The control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value for a two-phase modulation scheme or a three-phase duty cycle command value for a three-phase modulation scheme. For each of the plurality of switching circuits, the control device sets a second dead time period by adding a variable time to a preset first dead time period, which is set so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element. The variable time is determined according to the current value of the load current, the inductance of the resonant inductor and the potential of the sixth terminal of the regenerative capacitor. For each of the plurality of switches, the signal generation circuit generates the control signal having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits. The control system can perform a first control operation and a second control operation when changing the first PWM signal or the second PWM signal to the target switching element among the first and second switching elements to be turned on in each of the plurality of switching circuits from a low level to a high level. In the first control operation, the control system overlaps at least a portion of the high-level period of the control signal to the switch corresponding to each of the plurality of switching circuits among the plurality of switches with the second dead time period set between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element for each of the plurality of switching circuits. In the second control operation, the control system shifts the high-level period of the control signal to shorten the overlap period between the high-level period of the control signal given to each of the plurality of switches and the second dead time period compared to the first control operation, so that at least a portion of the high-level period of the control signal overlaps with the high-level period of the first PWM signal or the second PWM signal to the target switching element.When the control system determines that a resonant current flows simultaneously through two or more of the switches in the resonant inductor when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of the three-phase modulation scheme is fixed to a constant value, the control system executes a second control operation for the first switch, which is one of the two or more switches.

[0011] Figure 1 is a circuit diagram of a system equipped with a power converter according to Embodiment 1. Figure 2 is an explanatory diagram illustrating the relationship between the duty cycle command value and the carrier signal generated by the top-stick two-phase modulation method in the control device of the power converter. Figure 3 is a circuit block diagram of the signal generation circuit in the power converter. Figure 4 is a timing chart for illustrating the operation of the power converter. Figure 5 is a timing chart for illustrating the operation of the power converter. Figure 6 is a timing chart for illustrating the operation of the power converter. Figure 7 is an explanatory diagram of the operation of the power converter when the U-phase load current is positive. Figure 8 is an explanatory diagram of the operation of the power converter when the polarity of the U-phase load current is negative. Figure 9 is a timing chart for illustrating an example of boundary conditions for the power converter when the V-phase resonant current and the W-phase resonant current do not overlap (do not flow simultaneously) and when they overlap (flow simultaneously). Figure 10 is an explanatory diagram of the three-phase duty cycle command value generated by the top-stick two-phase modulation method in the control device of the power converter. Figure 11 is a timing chart illustrating the operation of the control device in the power converter described above when it performs the first and second operations. Figure 12 is a circuit diagram of a system equipped with the power converter according to Embodiment 2. Figure 13 is a timing chart illustrating the operation of the control device in the power converter described above. Figure 14 is a circuit diagram of a system equipped with the power converter according to Embodiment 3. Figure 15 is an explanatory diagram of the operation of the power converter described above. Figure 16 is an explanatory diagram of the operation of a power converter of a comparative example. Figure 17 is a circuit diagram of a system equipped with the power converter according to Embodiment 4. Figure 18 is a circuit diagram of the signal generation circuit in the power converter described above. Figure 19 is a timing chart illustrating the operation of the power converter described above. Figure 20 is a circuit diagram of a system equipped with the power converter according to Embodiment 5. Figure 21 is a circuit diagram of a system equipped with the power converter according to Embodiment 6. Figure 22 is an explanatory diagram of the duty cycle command value generated by a bottom-stick two-phase modulation method in the control device of the power converter described above.Figure 23 is a timing chart illustrating an example of boundary conditions for the power converter described above, specifically for cases where the resonant current of the V-phase and the resonant current of the W-phase do not overlap (do not flow simultaneously) and cases where they overlap (flow simultaneously). Figure 24 is a timing chart illustrating the operation of the control device in the power converter described above when it performs the first and second operations. Figure 25 is a circuit diagram of a system equipped with the power converter according to Embodiment 7. Figure 26 is an explanatory diagram of the duty cycle command value generated by the upper and lower fixed two-phase modulation method in the control device of the power converter described above. Figure 27 is a timing chart illustrating the operation of the power converter according to Embodiment 8 when it performs the first and second operations. Figure 28 is a timing chart illustrating the operation of the power converter according to Embodiment 8 when it performs the first and second operations. Figure 29 is a circuit diagram of a system equipped with the power converter according to Embodiment 8. Figure 30 is an explanatory diagram illustrating the relationship between the duty cycle command value generated by the three-phase modulation method and the carrier signal in the control device of the power converter described above. Figure 31 is an explanatory diagram of the duty cycle command value generated by a three-phase modulation method in the control device of the power converter described above. Figure 32 is a timing chart for explaining the operation of the control device in the power converter described above when it performs the first and second operations. Figure 33 is a timing chart for explaining the operation of the control device in the power converter described above when it performs the first and second operations. Figure 34 is a circuit diagram of a system equipped with a power converter according to Embodiment 9. Figure 35 is an explanatory diagram of the operation of the power converter described above when the load current of the U phase is positive. Figure 36 is an explanatory diagram of the operation of the power converter described above when the polarity of the load current of the U phase is negative. Figure 37 is a timing chart for explaining the operation of the power converter described above when the control device performs the first and second operations. Figure 38 is a circuit diagram of a system equipped with a power converter according to Embodiment 10. Figure 39 is an explanatory diagram of the operation of the power converter described above when the load current of the U phase is positive. Figure 40 is an explanatory diagram of the operation of the power converter described above when the polarity of the load current of the U phase is negative.Figure 41 is a timing chart illustrating the operation of the control device in the power converter described above when it performs the first and second operations.

[0012] (Embodiment 1) Below, the power conversion device 100 according to Embodiment 1 will be described with reference to Figures 1 to 11.

[0013] (1) Overall configuration of the power converter The power converter 100 includes, for example, a first DC terminal 31 and a second DC terminal 32, and a plurality (for example, three) AC terminals 41, as shown in Figure 1. A DC power supply E1 is connected between the first DC terminal 31 and the second DC terminal 32, and an AC load RA1 is connected to the plurality of AC terminals 41. The AC load RA1 is, for example, a three-phase servo motor. The power converter 100 converts the DC output from the DC power supply E1 into AC power and outputs it to the AC load RA1. The DC power supply E1 includes, for example, an AC-DC converter, a DC-DC converter, a solar cell, or a fuel cell. In the power converter 100, if the plurality of AC terminals 41 are three AC terminals 41, the AC power is, for example, three-phase AC power having U-phase, V-phase, and W-phase.

[0014] The power converter 100 comprises a power conversion circuit 11, a plurality (for example, three) of switches 8, a plurality (for example, three) of resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, a control device 51, and a signal generation circuit 52. Each of the plurality of switches 8 is, for example, a bidirectional switch. The power converter 100 further comprises a protection circuit 17 including a first clamp diode 13 and a second clamp diode 14. The power converter 100 further comprises a capacitor C10.

[0015] The power conversion circuit 11 has a plurality (for example, three) of first switching elements 1 and a plurality (for example, three) of second switching elements 2. In the power conversion circuit 11, a plurality (for example, three) of switching circuits 10, each consisting of a plurality of first switching elements 1 and a plurality of second switching elements 2 connected in a one-to-one series relationship, are connected in parallel to each other. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to a first DC terminal 31, and the plurality of second switching elements 2 are connected to a second DC terminal 32.

[0016] The multiple AC terminals 41 correspond one-to-one with the multiple switching circuits 10. Each of the multiple AC terminals 41 is connected to the connection point 3 of the first switching element 1 and the second switching element 2 in the corresponding switching circuit 10.

[0017] The multiple switches 8 correspond one-to-one with the multiple switching circuits 10. Each of the multiple switches 8 has a first end 81 and a second end 82. The first end 81 of each of the multiple switches 8 is connected to the connection point 3 of the first switching element 1 and the second switching element 2 in the corresponding switching circuit 10 among the multiple switching circuits 10.

[0018] Multiple resonant capacitors 9 correspond one-to-one with multiple switches 8. Each of the multiple resonant capacitors 9 is connected between the first terminal 81 and the second DC terminal 32 of the corresponding switch 8 among the multiple switches 8.

[0019] The resonant inductor L1 has a third terminal and a fourth terminal. In the resonant inductor L1, the third terminal is connected to the second terminal 82 of a plurality (for example, three) switches 8.

[0020] The regenerative capacitor 15 has a fifth terminal 153 and a sixth terminal 154. In the regenerative capacitor 15, the fifth terminal 153 is connected to the second DC terminal 32, and the sixth terminal 154 is connected to the fourth terminal of the resonant inductor L1.

[0021] The control device 51 generates a plurality of first PWM (Pulse Width Modulation) signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1, and a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2.

[0022] The signal generation circuit 52 generates multiple control signals to control multiple switches 8.

[0023] (2) Details of the power converter In the following description, for the sake of convenience, the switching circuits 10 corresponding to the U-phase, V-phase, and W-phase may be referred to as switching circuit 10U, switching circuit 10V, and switching circuit 10W, respectively. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10U may be referred to as the first switching element 1U and the second switching element 2U. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10V may be referred to as the first switching element 1V and the second switching element 2V. Also, in the following description, the first switching element 1 and the second switching element 2 of switching circuit 10W may be referred to as the first switching element 1W and the second switching element 2W. Furthermore, in the following, the connection point 3 between the first switching element 1U and the second switching element 2U may be referred to as connection point 3U, the connection point 3 between the first switching element 1V and the second switching element 2V may be referred to as connection point 3V, and the connection point 3 between the first switching element 1W and the second switching element 2W may be referred to as connection point 3W. Furthermore, in the following, the AC terminal 41 connected to connection point 3U may be referred to as AC terminal 41U, the AC terminal 41 connected to connection point 3V may be referred to as AC terminal 41V, and the AC terminal 41 connected to connection point 3W may be referred to as AC terminal 41W. Furthermore, in the following, the resonant capacitor 9 connected in parallel to the second switching element 2U may be referred to as resonant capacitor 9U, the resonant capacitor 9 connected in parallel to the second switching element 2V may be referred to as resonant capacitor 9V, and the resonant capacitor 9 connected in parallel to the second switching element 2W may be referred to as resonant capacitor 9W. Furthermore, in the following, the switch 8 connected to connection point 3U may be referred to as switch 8U, the switch 8 connected to connection point 3V as switch 8V, and the switch 8 connected to connection point 3W as switch 8W.

[0024] In the power converter 100, for example, the high-potential output terminal (positive terminal) of the DC power supply E1 is connected to the first DC terminal 31, and the low-potential output terminal (negative terminal) of the DC power supply E1 is connected to the second DC terminal 32. In addition, in the power converter 100, for example, the U-phase terminal, V-phase terminal, and W-phase terminal of the AC load RA1 are connected to the three AC terminals 41U, 41V, and 41W, respectively.

[0025] In the power conversion circuit 11, each of the multiple (three in the example of Figure 1) first switching elements 1 and each of the multiple (three in the example of Figure 1) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the multiple first switching elements 1 and the multiple second switching elements 2 are connected to the control device 51. In each of the multiple switching circuits 10 of the power conversion device 100, the first main terminal of the first switching element 1 is connected to the first DC terminal 31, the second main terminal of the first switching element 1 is connected to the first main terminal of the second switching element 2, and the second main terminal of the second switching element 2 is connected to the second DC terminal 32. In each of the multiple switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the multiple first switching elements 1 and the multiple second switching elements 2 is, for example, an IGBT (Insulated Gate Bipolar Transistor). Therefore, the control terminal, first main terminal, and second main terminal of each of the multiple first switching elements 1 and the multiple second switching elements 2 are the gate terminal, collector terminal, and emitter terminal, respectively.

[0026] The power conversion circuit 11 further includes a plurality of first diodes 4 connected in antiparallel in a one-to-one relationship to a plurality of first switching elements 1 (three), and a plurality of second diodes 5 connected in antiparallel in a one-to-one relationship to a plurality of second switching elements 2 (three). In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0027] At the connection point 3U between the first switching element 1U and the second switching element 2U, the U-phase terminal of the AC load RA1 is connected via the AC terminal 41U. At the connection point 3V between the first switching element 1V and the second switching element 2V, the V-phase terminal of the AC load RA1 is connected via the AC terminal 41V. At the connection point 3W between the first switching element 1W and the second switching element 2W, the W-phase terminal of the AC load RA1 is connected via the AC terminal 41W.

[0028] Multiple resonant capacitors 9 correspond one-to-one with multiple switches 8. Each of the multiple resonant capacitors 9 is connected between the first terminal 81 and the second DC terminal 32 of the corresponding switch 8 among the multiple switches 8. The power converter 100 has multiple (three in the example of Figure 1) resonant circuits. Each of the multiple resonant circuits includes a resonant capacitor 9 and a resonant inductor L1. In this embodiment, the resonant inductor L1 is common to the multiple resonant circuits.

[0029] Each of the multiple switches 8 has a third switching element 6 and a fourth switching element 7. Each of the multiple (three in the example of Figure 1) third switching elements 6 and each of the multiple (three in the example of Figure 1) fourth switching elements 7 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the multiple third switching elements 6 and the multiple fourth switching elements 7 are connected to the signal generation circuit 52. Each of the multiple third switching elements 6 and the multiple fourth switching elements 7 is, for example, an IGBT. Therefore, the control terminal, first main terminal, and second main terminal of each of the multiple third switching elements 6 and the multiple fourth switching elements 7 are the gate terminal, collector terminal, and emitter terminal, respectively. In each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are connected in reverse series. In each of the multiple switches 8, the first main terminal (collector terminal) of the third switching element 6 is connected to the first main terminal (collector terminal) of the fourth switching element 7. In each of the multiple switches 8, the second main terminal (emitter terminal) of the third switching element 6 is connected to the connection point 3 of the corresponding switching circuit 10 among the multiple switching circuits 10, and the second main terminal (emitter terminal) of the fourth switching element 7 is connected to the resonant inductor L1. Furthermore, each of the multiple switches 8 has a diode 61 connected in antiparallel to the third switching element 6 and a diode 71 connected in antiparallel to the fourth switching element 7.

[0030] In the power converter 100, switch 8U is connected to the connection point 3U between the first switching element 1U and the second switching element 2U. Switch 8V is connected to the connection point 3V between the first switching element 1V and the second switching element 2V. Switch 8W is connected to the connection point 3W between the first switching element 1W and the second switching element 2W. For convenience of explanation, the third switching element 6 and the fourth switching element 7 of switch 8U may be referred to as the third switching element 6U and the fourth switching element 7U, respectively; the third switching element 6 and the fourth switching element 7 of switch 8V may be referred to as the third switching element 6V and the fourth switching element 7V, respectively; and the third switching element 6 and the fourth switching element 7 of switch 8W may be referred to as the third switching element 6W and the fourth switching element 7W, respectively.

[0031] Multiple switches 8 are controlled by a signal generation circuit 52. In other words, the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W are controlled by the signal generation circuit 52.

[0032] The resonant inductor L1 has a third terminal and a fourth terminal. In the resonant inductor L1, the third terminal is connected to the second terminal 82 of the plurality of switches 8. More specifically, the third terminal of the resonant inductor L1 is connected to a common connection point 25 to which the second terminals 82 of the plurality of switches 8 are connected. The fourth terminal of the resonant inductor L1 is connected to the sixth terminal 154 of the regenerative capacitor 15.

[0033] The regenerative capacitor 15 is connected between the fourth terminal of the resonant inductor L1 and the second DC terminal 32. The regenerative capacitor 15 is, for example, a film capacitor.

[0034] Capacitor C10 is connected between the first DC terminal 31 and the second DC terminal 32, and is connected in parallel to the power conversion circuit 11. Capacitor C10 is, for example, an electrolytic capacitor.

[0035] The control device 51 controls a plurality of first switching elements 1 and a plurality of second switching elements 2. The control device 51 includes a computer system. The computer system mainly consists of a processor and memory as hardware. The processor executes a program recorded in the memory of the computer system, thereby realizing the function of the control device 51 in this disclosure. The processor of the computer system is composed of one or more electronic circuits including semiconductor integrated circuits (ICs) or large-scale integrated circuits (LSIs). The integrated circuits such as ICs and LSIs referred to here are named differently depending on the degree of integration, and include integrated circuits called system LSIs, VLSIs (Very Large Scale Integrations), or ULSIs (Ultra Large Scale Integrations). Furthermore, FPGAs (Field-Programmable Gate Arrays) that are programmed after the manufacture of the LSI, or logic devices that allow for the reconstruction of junction relationships or circuit compartments within the LSI, can also be used as processors. The plurality of electronic circuits may be aggregated on a single chip or distributed across multiple chips. Multiple chips may be integrated into a single device or distributed across multiple devices. The computer system referred to here includes a microcontroller having one or more processors and one or more memories. Therefore, the microcontroller also consists of one or more electronic circuits, including semiconductor integrated circuits or large-scale integrated circuits.

[0036] The control device 51 outputs multiple first PWM signals SU1, SV1, and SW1 to control the on / off state of each of the multiple first switching elements 1U, 1V, and 1W. Each of the multiple first PWM signals SU1, SV1, and SW1 is a PWM signal whose potential level changes between, for example, a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The first switching elements 1U, 1V, and 1W are turned on when the first PWM signals SU1, SV1, and SW1 are at a high level and turned off when they are at a low level, respectively. The control device 51 also outputs multiple second PWM signals SU2, SV2, and SW2 to control the on / off state of each of the multiple second switching elements 2U, 2V, and 2W. Each of the multiple second PWM signals SU2, SV2, and SW2 is a PWM signal whose potential level changes between, for example, a first potential level (hereinafter also referred to as the low level) and a second potential level (hereinafter also referred to as the high level) that is higher than the first potential level. The second switching elements 2U, 2V, and 2W are turned on when the second PWM signals SU2, SV2, and SW2 are at a high level and turned off when they are at a low level, respectively.

[0037] The control device 51 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the two-phase modulation scheme (see Figure 2). In this embodiment, the two-phase modulation scheme is an over-stick two-phase modulation scheme. The middle section of Figure 2 shows the waveforms (modulated waves) of the three-phase duty command values ​​du, dv, dw of the two-phase modulation scheme, and the lower section of Figure 2 shows an enlarged view of a part of the modulated wave.

[0038] The control device 51 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 using three-phase duty cycle command values ​​du, dv, dw (see Figure 2) and a triangular wave carrier signal CA1 (see Figure 2). More specifically, the control device 51 generates the first PWM signal SU1 and the second PWM signal SU2 to be supplied to the first switching element 1U and the second switching element 2U, respectively, based on the carrier signal CA1 and the duty cycle command value du. The control device 51 also generates the first PWM signal SV1 and the second PWM signal SV2 to be supplied to the first switching element 1V and the second switching element 2V, respectively, based on the carrier signal CA1 and the V-phase duty cycle command value dv. Furthermore, the control device 51 generates a first PWM signal SW1 and a second PWM signal SW2 to be supplied to the first switching element 1W and the second switching element 2W, respectively, based on the carrier signal CA1 and the W-phase duty command value dw. In this embodiment, the control device 51 sets the maximum value of the carrier signal CA1 to 0.5 and the minimum value to -0.5. The control device 51 also sets the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 0.5 and the minimum value to -0.5. Alternatively, the control device 51 may set the maximum value of the carrier signal CA1 to 1 and the minimum value to 0, and the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 1 and the minimum value to 0. Alternatively, the control device 51 may set the maximum and minimum values ​​of the carrier signal CA1 to values ​​other than 1 and 0, respectively, and the maximum and minimum values ​​of each of the three-phase duty command values ​​du, dv, and dw to values ​​other than 1 and 0, respectively. Furthermore, the waveform of the carrier signal CA1 is not limited to a triangular wave; for example, it may be a sawtooth wave.

[0039] The duty cycles of the first PWM signal SU1 and the second PWM signal SU2, generated by the control device 51, change based on the duty cycle command value du. The control device 51 generates the first PWM signal SU1 by comparing the duty cycle command value du with the carrier signal CA1. More specifically, the control device 51 compares the duty cycle command value du with the carrier signal CA1 and generates the first PWM signal SU1 which is high level when the duty cycle command value du is greater than the carrier signal CA1 and low level when the duty cycle command value du is less than or equal to the carrier signal CA1. The control device 51 also generates the second PWM signal SU2 by inverting the first PWM signal SU1. Furthermore, the control device 51 sets a first dead time period Td1 (see Figure 4) between the high-level period of the first PWM signal SU1 and the high-level period of the second PWM signal SU2 so that the ON period of the first switching element 1U and the ON period of the second switching element 2U do not overlap.

[0040] The duty cycles of the first PWM signal SV1 and the second PWM signal SV2, both generated by the control device 51, change based on the duty cycle command value dv. The control device 51 generates the first PWM signal SV1 by comparing the duty cycle command value dv with the carrier signal CA1. More specifically, the control device 51 compares the duty cycle command value dv with the carrier signal CA1 and generates the first PWM signal SV1 which is high level when the duty cycle command value dv is greater than the carrier signal CA1 and low level when the duty cycle command value dv is less than or equal to the carrier signal CA1. The control device 51 also generates the second PWM signal SV2 by inverting the first PWM signal SV1. Furthermore, the control device 51 sets a first dead time period Td1 (see Figure 5) between the high-level period of the first PWM signal SV1 and the high-level period of the second PWM signal SV2 so that the ON period of the first switching element 1V and the ON period of the second switching element 2V do not overlap.

[0041] The duty cycles of the first PWM signal SW1 and the second PWM signal SW2, both generated by the control device 51, change based on the duty cycle command value dw. The control device 51 generates the first PWM signal SW1 by comparing the duty cycle command value dw with the carrier signal CA1. More specifically, the control device 51 compares the duty cycle command value dw with the carrier signal CA1 and generates the first PWM signal SW1 which is high level when the duty cycle command value dw is greater than the carrier signal CA1 and low level when the duty cycle command value dw is less than or equal to the carrier signal CA1. The control device 51 also generates the second PWM signal SW2 by inverting the first PWM signal SW1. Furthermore, the control device 51 sets a first dead time period Td1 (see Figure 6) between the high-level period of the first PWM signal SW1 and the high-level period of the second PWM signal SW2 so that the ON period of the first switching element 1W and the ON period of the second switching element 2W do not overlap.

[0042] The control device 51, for example, uses the three-phase duty cycle reference values ​​du0, dv0, and dw0 (see Figure 2) of the three-phase modulation scheme to determine the three-phase duty cycle command values ​​du, dv, and dw of the two-phase modulation scheme. The U-phase modulated wave with the duty cycle reference value du0 as the instantaneous value, the V-phase modulated wave with the duty cycle reference value dv0 as the instantaneous value, and the W-phase modulated wave with the duty cycle reference value dw0 as the instantaneous value are sinusoidal waves with a phase difference of 120° from each other. The control device 51 determines the three-phase duty cycle command values ​​du, dv, and dw at each time by adding dcom to the three-phase duty cycle reference values ​​du0, dv0, and dw0 at each time. In this embodiment, as described above, the maximum value of the three-phase duty command values ​​du, dv, and dw is set to 0.5 and the minimum value to -0.5, and dcom is -max{du0, dv0, dw0} + 0.5. In other words, the control device 51 calculates the duty command value du for the two-phase modulation scheme by calculating du = du0 - max{du0, dv0, dw0} + 0.5. The control device 51 also calculates the duty command value dv for the two-phase modulation scheme by calculating dv = dv0 - max{du0, dv0, dw0} + 0.5. The control device 51 also calculates the duty command value dw for the two-phase modulation scheme by calculating dw = dw0 - max{du0, dv0, dw0} + 0.5.

[0043] The length of one cycle of each of the above-mentioned U-phase modulation wave, V-phase modulation wave, and W-phase modulation wave is the same. Also, the length of one cycle of each of the U-phase modulation wave, V-phase modulation wave, and W-phase modulation wave is longer than the length of one cycle of the carrier signal CA1.

[0044] The control device 51 generates, for example, duty reference values du0, dv0, and dw0 of a three-phase modulation method based on information regarding the state of the AC load RA1. When the AC load RA1 is a three-phase servo motor, the information regarding the state of the AC load RA1 includes, for example, detection values from a plurality of current sensors that detect output currents (hereinafter also referred to as load currents) iU, iV, and iW flowing through the U-phase terminal, V-phase terminal, and W-phase terminal of the AC load RA1, respectively.

[0045] Therefore, the control device 51 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on the carrier signal CA1, the duty command values du, dv, dw, and information regarding the state of the AC load RA1.

[0046] The plurality of switches 8, the resonance inductor L1, the plurality of resonance capacitors 9, and the regeneration capacitor 15 are provided for performing zero-voltage soft switching of the plurality of first switching elements 1 and the plurality of second switching elements 2.

[0047] When the third switching element 6U is in the on state and the fourth switching element 7U is in the off state, the switch 8U can allow a charging current flowing through the path of the regeneration capacitor 15 - resonance inductor L1 - switch 8U - resonance capacitor 9U to pass. The charging current is a current that charges the resonance capacitor 9U. When the third switching element 6U is in the off state and the fourth switching element 7U is in the on state, the switch 8U can allow a discharge current flowing through the path of the resonance capacitor 9U - switch 8U - resonance inductor L1 - regeneration capacitor 15 to pass. The discharge current is a current that discharges the charge of the resonance capacitor 9U.

[0048] Switch 8V allows the charging current flowing through the path of regenerative capacitor 15 - resonant inductor L1 - switch 8V - resonant capacitor 9V to pass through when the third switching element 6V is ON and the fourth switching element 7V is OFF. The charging current is the current that charges the resonant capacitor 9V. Switch 8V allows the discharge current flowing through the path of resonant capacitor 9V - switch 8V - resonant inductor L1 - regenerative capacitor 15 to pass through when the third switching element 6V is OFF and the fourth switching element 7V is ON. The discharge current is the current that discharges the charge from the resonant capacitor 9V.

[0049] Switch 8W can pass the charging current flowing through the path of regenerative capacitor 15 - resonant inductor L1 - switch 8W - resonant capacitor 9W when the third switching element 6W is ON and the fourth switching element 7W is OFF. The charging current is the current that charges the resonant capacitor 9W. Switch 8W can pass the discharge current flowing through the path of resonant capacitor 9W - switch 8W - resonant inductor L1 - regenerative capacitor 15 when the third switching element 6W is OFF and the fourth switching element 7W is ON. The discharge current is the current that discharges the charge from the resonant capacitor 9W.

[0050] In this embodiment, the control device 51 sets the dead time period between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the plurality of switching circuits 10 to a second dead time period Td2, which is determined by the first dead time period Td1 and a predetermined time (additional time). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length equal to the length of the first dead time period Td1 plus a predetermined time (the sum of the length of the first dead time period Td1 and the length of the predetermined time). In other words, the control device 51 uses the second dead time period Td2, which is the first dead time period Td1 extended by a predetermined time, as the dead time period.

[0051] The first dead time period Td1 is a period set for each of the multiple switching circuits 10 between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2, during which both the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 are set to a low level so that the on periods of the first switching element 1 and the second switching element 2 do not overlap (there is no period in which both the first switching element 1 and the second switching element 2 are on). In this embodiment, for example, the length of the resonant half-period corresponding to each of the multiple switches 8 is designed according to the length of the first dead time period Td1 for each of the multiple switching circuits 10. The resonant half-period is half of the resonant period, which is the reciprocal of the resonant frequency of the resonant circuit including the switch 8, the resonant inductor L1, and one resonant capacitor 9. Therefore, if the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, then the resonant half-period is π × (L・C) １／２ The length of the resonant half-period is set to be the same as, for example, the length of the first dead time period Td1.

[0052] The length of the resonant half-period of a resonant circuit including a resonant inductor L1 and a resonant capacitor 9U is set to the length of a first dead time period Td1 (see Figure 4) set between the high-level period of the first PWM signal SU1 and the high-level period of the second PWM signal SU2. The length of the resonant half-period of a resonant circuit including a resonant inductor L1 and a resonant capacitor 9V is set to the length of a first dead time period Td1 (see Figure 5) set between the high-level period of the first PWM signal SV1 and the high-level period of the second PWM signal SV2. The length of the resonant half-period of a resonant circuit including a resonant inductor L1 and a resonant capacitor 9W is set to the length of a first dead time period Td1 (see Figure 6) set between the high-level period of the first PWM signal SW1 and the high-level period of the second PWM signal SW2.

[0053] If the resonant period is Tres, then Tres / 2, which is the resonant half-period, is the length of the first dead time period Td1. It is desirable that the end of the resonant half-period coincides with the end of the first dead time period Td1 for the switching circuit 10 corresponding to the switch 8. Figure 4 illustrates the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the control signal SU7, the first dead time period Td1, the additional time Tadu, and the second dead time period Td2. In the example in Figure 4, the start and end times of the first dead time period Td1 are time t12 and time t13, respectively. Also, Figure 5 illustrates the first PWM signal SV1, the second PWM signal SV2, the control signal SV6, the control signal SV7, the first dead time period Td1, the additional time Tadv, and the second dead time period Td2. In the example in Figure 5, the start and end times of the first dead time period Td1 are time points t22 and t23, respectively. Figure 6 illustrates the first PWM signal SW1, the second PWM signal SW2, the control signal SW6, the control signal SW7, the first dead time period Td1, the additional time Tadw, and the second dead time period Td2. In the example in Figure 6, the start and end times of the first dead time period Td1 are time points t32 and t33, respectively.

[0054] The length of the resonant half-period described above is an ideal design example, and may be 90% to 110% of the length of the first dead time period Td1. The resonant half-period and the first dead time period Td1 may also be different lengths.

[0055] The second dead time period Td2 is the first dead time period Td1 plus a predetermined time determined by the load current value and the voltage value of the regenerative capacitor 15. The predetermined time is, for example, an additional time determined by the load current value, the voltage value of the regenerative capacitor 15, and the inductance L of the resonant inductor L1. The load current value is, for example, the detection result of the load current by a current sensor or its signal processing value, or an estimated value of the load current iU. The detection result of the load current or its signal processing value at this time is the detection value at the carrier cycle in which the additional time Tad is added to the first dead time period Td1, or at the timing closest to that carrier cycle. The estimated value of the load current at this time is the value obtained by estimating the load current at the carrier cycle in which the additional time is added to the first dead time period Td1. The inductance L of the resonant inductor L1 is a value that is stored in advance in the control device 51. The voltage value of the regenerative capacitor 15 is the detected value of the voltage V15 of the regenerative capacitor 15 (the potential V15 at the sixth terminal 154 of the regenerative capacitor 15). In the example in Figure 4, the additional time Tadu is the value obtained by the calculation Tadu = iU × (L / V15). In the example in Figure 5, the additional time Tadv is the value obtained by the calculation Tadv = iV × (L / V15). In the example in Figure 6, the additional time Tadw is the value obtained by the calculation Tadw = iW × (L / V15).

[0056] The specified time is an ideal design example, and may be between 90% and 110% of the additional time.

[0057] In the power converter 100, a signal generation circuit 52, separate from the control device 51, controls a plurality of switches 8.

[0058] The signal generation circuit 52 generates control signals SU6, SU7, SV6, SV7, SW6, and SW7 to control the on / off state of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs them to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W.

[0059] The signal generation circuit 52 generates a control signal for each of the multiple switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10.

[0060] In the signal generation circuit 52, the start time of the high-level period of the control signal generated for each of the multiple switches 8 is synchronized with the start timing of the second dead time period Td2. In this disclosure, "synchronizing the start time of the high-level period of the control signal with the start timing of the second dead time period Td2" means that the start time of the high-level period of the control signal (start time) is between the start time (start time) and the end time (end time) of the second dead time period Td2, and the time length between the start time (start time) of the high-level period of the control signal (start time) and the end time (end time) of the second dead time period Td2 is greater than or equal to the length of the first dead time period Td1. In this embodiment, the signal generation circuit 52 synchronizes the start time of the high-level period of the control signal for each of the multiple switches 8 with the start time of the second dead time period Td2. In this embodiment, the length of the high-level period of the control signal for each of the multiple switches 8 is longer than the length of the second dead time period Td2.

[0061] The signal generation circuit 52 generates a control signal for each of the multiple switches 8 using a first PWM signal to the first switching element 1 and a second PWM signal to the second switching element 2 of the corresponding switching circuit 10 among the multiple switching circuits 10. In this embodiment, as shown in Figure 3, the signal generation circuit 52 has multiple logic circuits 521 to 526 and multiple gate drive circuits 531 to 536. In the signal generation circuit 52, the multiple logic circuits 521 to 526 correspond one-to-one with the multiple gate drive circuits 531 to 536.

[0062] The logic circuit 521 is configured to generate a control signal SU6 using a first PWM signal SU1 and a second PWM signal SU2. The logic circuit 521 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SU1 and the second PWM signal SU2 output from the control device 51 and outputs the control signal SU6. The control signal SU6 is supplied to the third switching element 6U via the gate drive circuit 531.

[0063] The logic circuit 522 is configured to generate a control signal SU7 using a first PWM signal SU1 and a second PWM signal SU2. The logic circuit 522 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SU1 and the second PWM signal SU2 output from the control device 51 and outputs the control signal SU7. The control signal SU7 is supplied to the fourth switching element 7U via the gate drive circuit 532.

[0064] The logic circuit 523 is configured to generate a control signal SV6 using the first PWM signal SV1 and the second PWM signal SV2. The logic circuit 523 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SV1 and the second PWM signal SV2 output from the control device 51 and outputs the control signal SV6. The control signal SV6 is supplied to the third switching element 6V via the gate drive circuit 533.

[0065] The logic circuit 524 is configured to generate a control signal SV7 using the first PWM signal SV1 and the second PWM signal SV2. The logic circuit 524 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SV1 and the second PWM signal SV2 output from the control device 51 and outputs the control signal SV7. The control signal SV7 is supplied to the fourth switching element 7V via the gate drive circuit 534.

[0066] The logic circuit 525 is configured to generate a control signal SW6 using a first PWM signal SW1 and a second PWM signal SW2. The logic circuit 525 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SW1 and the second PWM signal SW2 output from the control device 51 and outputs the control signal SW6. The control signal SW6 is supplied to the third switching element 6W via the gate drive circuit 535.

[0067] The logic circuit 526 is configured to generate a control signal SW7 using a first PWM signal SW1 and a second PWM signal SW2. The logic circuit 526 is, for example, a two-input, one-output logic circuit, which receives the first PWM signal SW1 and the second PWM signal SW2 output from the control device 51 and outputs the control signal SW7. The control signal SW7 is supplied to the fourth switching element 7W via the gate drive circuit 536.

[0068] The first clamp diode 13 has its anode connected to the third terminal of the resonant inductor L1 and its cathode connected to the first DC terminal 31. The second clamp diode 14 has its cathode connected to the third terminal of the resonant inductor L1 and its anode connected to the second DC terminal 32.

[0069] (3) Operation of the power converter In the following, the current iL1 flowing through the resonant inductor L1 will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Furthermore, the load currents iU, iV, and iW flowing through the U, V, and W phases of the AC load RA1 will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Furthermore, the currents i9U, i9V, and i9W flowing through the resonant capacitors 9U, 9V, and 9W will be described as positive when flowing in the direction of the arrow in Figure 1, and negative when flowing in the opposite direction to the arrow in Figure 1. Therefore, in the discharge operation where the resonant capacitors 9U, 9V, and 9W are discharged, the polarity of the currents i9U, i9V, and i9W becomes positive, and in the charging operation where the resonant capacitors 9U, 9V, and 9W are charged, the polarity of the currents i9U, i9V, and i9W becomes negative.

[0070] Furthermore, in the following, the switching element targeted for zero-voltage soft switching (first switching element 1 or second switching element 2) will also be referred to as the target switching element.

[0071] The basic operation of zero-voltage soft switching for each of the multiple first switching elements 1 and the multiple second switching elements 2 will be explained below with reference to Figures 1 to 8. The basic operation is the operation when the resonant current corresponding to two of the multiple switching circuits 10 does not flow simultaneously through the resonant inductor L1. After explaining the basic operation, the operation when the control device 51 determines that the resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously will be explained.

[0072] (3.1) Basic Operation In the power converter 100, when the target switching element is the first switching element 1 (hereinafter also referred to as the target first switching element 1), and the polarity of the load current flowing to the AC terminal 41 connected to the target first switching element 1 is positive, the signal generation circuit 52 turns on the third switching element 6 corresponding to the target first switching element 1. As a result, the power converter 100 causes the resonant inductor L1 and the resonant capacitor 9 connected to the target first switching element 1 to resonate, charging the resonant capacitor 9 from the regenerative capacitor 15, and setting the voltage across the target first switching element 1 to zero. As a result, the power converter 100 can achieve zero-voltage soft switching of the target first switching element 1.

[0073] Furthermore, in the power converter 100, if the target switching element is the second switching element 2 (hereinafter also referred to as the target second switching element 2), and the polarity of the load current flowing to the AC terminal 41 connected to the target second switching element 2 is negative, the signal generation circuit 52 turns on the fourth switching element 7 corresponding to the target second switching element 2. As a result, the power converter 100 causes the resonant capacitor 9 and the resonant inductor L1 connected to the target second switching element 2 to resonate, causing the resonant capacitor 9 to discharge and reducing the voltage across the target second switching element 2 to zero. As a result, the power converter 100 can achieve zero-voltage soft switching of the target second switching element 2.

[0074] When the control device 51 sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time) to the first dead time period Td1 by shortening the high-level period of the second PWM signal to the second switching element 2.

[0075] For example, when the control device 51 sets a second dead time period Td2 for the switching circuit 10U, as shown in Figure 7, if the polarity of the load current iU is positive, it shortens a predetermined time (additional time Tadu) of the high-level period of the second PWM signal SU2 to the second switching element 2U, thereby adding a predetermined time (additional time Tadu) to the first dead time period Td1.

[0076] Figure 7 shows the case where the target switching element is the first switching element 1U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the current iL1 flowing through the resonant inductor L1, and the voltage V1u across the first switching element 1U. In Figure 7, the voltage value of the DC power supply E1 is shown as Vd.

[0077] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends. Therefore, when the first PWM signal SU1 changes from a low level to a high level at time t13, the first switching element 1U is soft-switched to zero voltage. In the example shown in Figure 7, the current iL1 flowing through the resonant inductor L1 begins to flow from time t11, when the high-level period of the control signal SU6 starts, reaches the same value as the load current iU at time t12, after a predetermined time (additional time Tadu) has elapsed from time t11, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, after a second predetermined time Tad2, which is the same length as the first predetermined time (additional time Tadu), has elapsed from time t13. In the signal generation circuit 52, at time t11, when the second PWM signal SU2 changes from a high level to a low level, the control signal SU6 changes from a low level to a high level, and when the total time of the second dead time period Td2 and a specified time shorter than the second predetermined time Tad2 has elapsed, the control signal SU6 changes from a high level to a low level. The current iL1 flowing between time point t12 and time point t13 is the resonant current (charging current of the resonant capacitor 9U) flowing from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0078] In the following, the period T01 in which the absolute value of the current iL1 increases from zero to the absolute value of the load current (load current iU in the example of Figure 7) will be referred to as the first period T01, the period T02 in which the absolute value of the current iL1 is greater than the load current (load current iU in the example of Figure 7) will be referred to as the second period T02, and the period T03 in which the absolute value of the current iL1 decreases from the absolute value of the load current (load current iU in the example of Figure 7) to zero will be referred to as the third period T03. In the power converter 100, when the current iL1 increases from zero to iL1 = iU in the first period T01, the system transitions from the first period T01 to the second period T02. In the second period T02, a resonant current flows and the PWM signal to the target switching element changes from a low level to a high level, and the system transitions from the second period T02 to the third period T03.

[0079] In Figure 7, the first period T01 is the period from time t11 to t12. The length of the first period T01 is the same as the first predetermined time (additional time Tadu). During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, and the third switching element 6U is in the on state. During the first period T01, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - AC terminal 41U. Also during the first period T01, the load current iU flows through the path from the second diode 5, which is antiparallel connected to the second switching element 2U - AC terminal 41U - AC load RA1.

[0080] In Figure 7, the second period T02 is the period from time t12 to t13. The length of the second period T02 is the same as the length of the resonant half-period. During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, and the third switching element 6U is in the on state. During the second period T02, the current iL1 flows through the path of regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9.

[0081] In Figure 7, the third period T03 is the period from time t13 to t14. The length of the third period T03 is the same as the second predetermined time Tad2. During the third period T03, until the predetermined time has elapsed, the first switching element 1U and the third switching element 6U are each in the ON state, and the second switching element 2U and the fourth switching element 7U are each in the OFF state. After the predetermined time has elapsed, the first switching element 1U is in the ON state, and the second switching element 2U, the third switching element 6U, and the fourth switching element 7U are each in the OFF state. Therefore, during the third period T03, until the control signal SU6 changes from a high level to a low level, the current iL1 flows through the path of regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - connection point 3U - AC terminal 41U. Furthermore, during the third period T03, after the control signal SU6 changes to a low level, the current iL1 flows through the path of the regenerative capacitor 15 - resonant inductor L1 - first clamp diode 13. This reduces the current iL1 to zero. Also during the third period T03, the load current iU flows through the path of the first DC terminal 31 - first switching element 1U - AC terminal 41U - AC load RA1.

[0082] When the control device 51 sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tadu) to the first dead time period Td1 by shortening the high-level period of the first PWM signal to the first switching element 1.

[0083] For example, when the control device 51 sets a second dead time period Td2 for the switching circuit 10U, as shown in Figure 8, if the polarity of the load current iU is negative, it adds a predetermined time (additional time Tadu) to the first dead time period Td1 by shortening a predetermined time (additional time Tadu) of the high-level period of the first PWM signal SU1 to the first switching element 1U.

[0084] Figure 8 shows the case where the target switching element is the second switching element 2U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U.

[0085] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43, when the second dead time period Td2 ends immediately before the high-level period of the second PWM signal SU2, and the voltage V2u across the second switching element 2U becomes zero at time t43, when the second dead time period Td2 ends. Therefore, when the second PWM signal SU2 changes from a low level to a high level at time t43, the second switching element 2U is soft-switched to zero voltage. In the example shown in Figure 8, the current iL1 flowing through the resonant inductor L1 begins to flow from time t41, when the high-level period of the control signal SU7 begins, becomes equal to the load current iU at time t42, when the additional time Tadu has elapsed, becomes equal to the load current iU at time t43, when the second dead time period Td2 ends, and becomes zero at time t44, when the second predetermined time Tad2, which is the same length as the first predetermined time, has elapsed from time t43. In the signal generation circuit 52, the control signal SU7 changes from a low level to a high level when the first PWM signal SU1 changes from a high level to a low level. The current iL1 flowing between time t42 and time t43 is the resonant current (discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0086] In Figure 8, the first period T01 is the period from time t41 to t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in the off state, and the fourth switching element 7U is in the on state. During the first period T01, the current iL1 flows through the path from the AC terminal 41U - diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15. Also during the first period T01, the load current iU flows through the path from the AC load RA1 - AC terminal 41U - first diode 4 which is connected in antiparallel to the first switching element 1U.

[0087] In Figure 8, the second period T02 is the period from time t42 to t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in the off state, and the fourth switching element 7U is in the on state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is the combined current of the current flowing from the AC terminal 41U through the diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15 and the current flowing from the resonant capacitor 9U through the diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15 (resonant current). During the second period T02, the resonant capacitor 9 is discharged.

[0088] In Figure 8, the third period T03 is the period from time t43 to t44. During the third period T03, until the specified time has elapsed, the second switching element 2U and the fourth switching element 7U are each in the ON state, and the first switching element 1U and the third switching element 6U are each in the OFF state. After the specified time has elapsed, the second switching element 2U is turned ON, and the first switching element 1U, the third switching element 6U, and the fourth switching element 7U are each turned OFF. Therefore, during the third period T03, until the control signal SU7 changes from a high level to a low level, the current iL1 flows through the path of AC terminal 41U - connection point 3U - diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15. Also, during the third period T03, after the control signal SU7 changes to a low level, the current iL1 flows through the path of second clamp diode 14 - resonant inductor L1 - regenerative capacitor 15. As a result, the absolute value of the current iL1 is reduced to zero. Also, during the third period T03, the load current iU flows through the path from the AC load RA1 - AC terminal 41U - second switching element 2U - second DC terminal 32.

[0089] The above describes an example of setting the second dead time period Td2 for switching circuit 10U, but the same applies when setting the second dead time period Td2 for switching circuit 10V and switching circuit 10W.

[0090] (3.2) When the first and second operation control device 51 determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme, du, dv, and dw, is fixed to a constant value, the device performs the first operation and then the second operation when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10. In this embodiment, "when the duty cycle command value of one of the three phases of the two-phase modulation scheme, du, dv, and dw, is fixed to a constant value" means when the duty cycle command value of one of the three phases of the top-stick two-phase modulation scheme, du, dv, and dw, is fixed to a constant value (maximum value), and in the example of Figure 2, it means when the duty cycle command value of one phase is fixed to 0.5. "When it is determined that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously" means when it is presumed that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1. For the sake of explanation, below, "the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1" may also be referred to as "two-phase resonant currents flowing simultaneously through the resonant inductor L1."

[0091] The first operation is to shorten the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 in the first switching circuit 10 by a shortening period called Tred (see Figure 11).

[0092] The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of at least one of the first switching circuit 10 and the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts after a standby period Tdef (see Figure 11) from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The standby period Tdef is calculated by the formula Tdef = L × (absolute value of the difference between the load current corresponding to the first switching circuit 10 and the load current corresponding to the second switching circuit 10) / V15, where L is the inductance of the resonant inductor L1 and V15 is the voltage of the regenerative capacitor 15.

[0093] (3.2.1) Determination of whether two-phase resonant currents flow simultaneously in the resonant inductor The power converter 100 is configured such that the control device 51 generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the top-stick two-phase modulation method, so that the two-phase duty command values ​​approach each other every 60° of electrical angle (see regions A11, A12, and A13 in Figure 10), and the duty cycles of the two-phase control signals become the same or close to each other. In region A11 of Figure 10, the duty command values ​​dv and dw are each -0.25 or close to -0.25. In region A12 of Figure 10, the duty command values ​​du and dw are each -0.25 or close to -0.25. In region A13 of Figure 10, the duty cycle command values ​​du and dv are both -0.25 or close to -0.25. The polarity of the resonant current is the same as the polarity of the current iL1, and in each of regions A11, A12, and A13, the polarity of the resonant current is negative. For example, in region A11, during one period of the carrier signal CA1 (see Figure 2), the time difference between the start of the high-level period of the control signal SW7 applied to the fourth switching element 7W and the start of the high-level period of the control signal SV7 applied to the fourth switching element 7V becomes shorter, and it is possible that the W-phase resonant current and the V-phase resonant current flow simultaneously through the resonant inductor L1. Similarly, in region A12, it is possible that the U-phase resonant current and the W-phase resonant current flow simultaneously through the resonant inductor L1. Similarly, in region A13, it is possible that the U-phase resonant current and the V-phase resonant current flow simultaneously through the resonant inductor L1.

[0094] If we assume that the capacitance of each of the multiple resonant capacitors 9U, 9V, and 9W is C, then if the V-phase current and the W-phase current flow simultaneously through the resonant inductor L1, the equivalent circuit will have a capacitor with a combined capacitance of resonant capacitor 9V and resonant capacitor 9W (= 2 × C) connected in series with the resonant inductor L1. Therefore, in the power converter 100, if two-phase current flows simultaneously through the resonant inductor L1, the resonant frequency of the resonant circuit including the resonant inductor L1 will change compared to the case where one-phase current flows through the resonant inductor L1, and zero-voltage soft switching may not be achievable.

[0095] In the following explanation, as shown in Figure 9, with respect to the high-level period of the control signal SW7, the length of the period corresponding to the first period T01 will be denoted as Taw, the length of the period corresponding to the second period T02 will be denoted as Tres / 2, and the length of the period corresponding to the third period T03 will be denoted as Taw. Taw is a value obtained in the control device 51 by the calculation Taw = iW × (L / V15) using, for example, the detection result of the load current iW by the current sensor or its signal processing value, or an estimated value of the load current iW, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15 (potential V15 at the sixth terminal 154 of the regenerative capacitor 15). Taw is the same as the additional time Tadw described above.

[0096] Furthermore, as shown in Figure 9, in the following explanation, with respect to the high-level period of the control signal SV7, the length of the period corresponding to the first period T01 will be denoted as Tav, the length of the period corresponding to the second period T02 will be denoted as Tres / 2, and the length of the period corresponding to the third period T03 will be denoted as Tav. Tav is a value obtained in the control device 51 by the calculation Tav = iV × (L / V15) using, for example, the detection result of the load current iV by the current sensor or its signal processing value, or an estimated value of the load current iV, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15. Tav is the same as the additional time Tadv described above.

[0097] Furthermore, in the following explanation, with respect to the high-level period of the control signal SU7, the length of the period corresponding to the first period T01 will be denoted as Tau, the length of the period corresponding to the second period T02 as Tres / 2, and the length of the period corresponding to the third period T03 as Tau. Tau is a value obtained in the control device 51 by the calculation Tau = iU × (L / V15), using, for example, the detection result of the load current iU by the current sensor or its signal processing value, or an estimated value of the load current iW, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15. Tau is the same as the additional time Tadu described above.

[0098] Furthermore, the ON period of the first switching element 1U corresponds one-to-one with the high-level period of the first PWM signal SU1. The ON period of the first switching element 1V corresponds one-to-one with the high-level period of the first PWM signal SV1. The ON period of the first switching element 1W corresponds one-to-one with the high-level period of the first PWM signal SW1. Also, the ON period of the second switching element 2U corresponds one-to-one with the high-level period of the second PWM signal SU2. The ON period of the second switching element 2V corresponds one-to-one with the high-level period of the second PWM signal SV2. The ON period of the second switching element 2W corresponds one-to-one with the high-level period of the second PWM signal SW2.

[0099] For example, the control device 51 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 for each cycle of the carrier signal CA1, and then determines whether or not there is an overlap in resonant currents before controlling the plurality of first switching elements 1U, 1V, 1W and the plurality of second switching elements 2U, 2V, 2W.

[0100] Figure 9 shows an example of boundary conditions for the cases where the resonant currents of the W phase and the V phase do not overlap (do not flow simultaneously) and overlap (flow simultaneously). These boundary conditions will be explained with reference to Figure 9.

[0101] In the power converter 100, if the time difference ΔTvw is Tres / 2 or greater, the resonant current of the W phase and the resonant current of the V phase do not overlap, and if the time difference ΔTvw is less than Tres / 2, the resonant current of the W phase and the resonant current of the V phase overlap. The time difference ΔTvw is the time difference between the start of the high-level period of the second PWM signal SW2 and the start of the high-level period of the second PWM signal SV2.

[0102] The control device 51 has a threshold value set to Tres / 2 for the time difference ΔTvw. The control device 51 estimates (determines) that if the time difference ΔTvw is less than Tres / 2, the W-phase resonant current and the V-phase resonant current will flow simultaneously in the resonant inductor L1. The above threshold setting is just an example, and it may be set to other values. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Also, the threshold may be set to Tav + Taw + Td1. Furthermore, the method for calculating the time difference ΔTvw used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and other calculation methods are acceptable as long as they can calculate a time difference equivalent to the time difference ΔTvw. For example, the time difference ΔTvw used to determine whether or not two-phase resonant currents flow simultaneously may be the time difference between the end of the high-level period of the first PWM signal SW1 and the end of the high-level period of the first PWM signal SV1.

[0103] In the power converter 100, if the time difference ΔTuw is Tres / 2 or greater, the resonant current of the U phase and the resonant current of the W phase do not overlap in the resonant inductor L1, and if the time difference ΔTuw is less than Tres / 2, the resonant current of the U phase and the resonant current of the W phase overlap. The time difference ΔTuw is the time difference between the start of the high-level period of the second PWM signal SU2 and the start of the high-level period of the second PWM signal SW2.

[0104] The control device 51 has a threshold value set to Tres / 2 for the time difference ΔTuw. The time difference ΔTuw is the time difference between the start of the high-level period of the second PWM signal SW2 and the start of the high-level period of the second PWM signal SU2 at time t43 (see Figure 8). The control device 51 estimates (determines) that the U-phase resonant current and the W-phase resonant current flow simultaneously in the resonant inductor L1 if the time difference ΔTuw is less than Tres / 2. The above threshold setting is just an example, and it may be set to a different value. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Also, the threshold may be set to Tau + Taw + Td1. Furthermore, the method for calculating the time difference ΔTuw used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and other calculation methods are acceptable as long as they can calculate a time difference equivalent to the time difference ΔTuw. For example, the time difference ΔTuw used to determine whether or not two-phase resonant currents flow simultaneously may be the time difference between the end of the high-level period of the first PWM signal SU1 (see Figure 8) and the end of the high-level period of the first PWM signal SW1.

[0105] In the power converter 100, if the time difference ΔTuv is Tres / 2 or greater, the resonant current of the U-phase and the resonant current of the V-phase do not overlap in the resonant inductor L1, and if the time difference ΔTuv is less than Tres / 2, the resonant current of the U-phase and the resonant current of the V-phase overlap. The time difference ΔTuv is the time difference between the start of the high-level period of the second PWM signal SU2 at time t43 (see Figure 8) and the start of the high-level period of the second PWM signal SV2.

[0106] The control device 51 has a threshold value for the time difference ΔTuv set to Tres / 2. The time difference ΔTuv is the time difference between the start of the high-level period of the second PWM signal SU2 at time t43 (see Figure 8) and the start of the high-level period of the second PWM signal SV2. The control device 51 estimates (determines) that the resonant current of the U-phase and the resonant current of the V-phase flow simultaneously in the resonant inductor L1 if the time difference ΔTuv is less than Tres / 2. The above threshold setting is just an example, and it may be set to a different value. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Also, the threshold may be set to Tau + Tav + Td1. Furthermore, the method for calculating the time difference ΔTuv used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and other calculation methods are acceptable as long as they can calculate a time difference equivalent to the time difference ΔTuv. For example, the time difference ΔTuv used to determine whether or not two-phase resonant currents flow simultaneously may be the time difference between the end of the high-level period of the first PWM signal SU1 (see Figure 8) and the end of the high-level period of the first PWM signal SV1.

[0107] (3.2.2) When the first and second operation control device 51 determines that two-phase resonant currents are flowing simultaneously, for example, when it determines that the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1, it performs the first and second operations to shorten the period during which the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1.

[0108] When the control device 51 performs the first and second operations, it performs the first and second operations in such a way that the length of the first dead time period Td1 between the high-level period of the first PWM signal supplied to the first switching element 1 of the two switching circuits 10 and the high-level period of the second PWM signal supplied to the second switching element 2 does not change. Furthermore, for example, in the second operation, when the control device 51 shifts the high-level period of the first PWM signal SU1 supplied to the first switching element 1U of the switching circuit 10U or the high-level period of the second PWM signal SU2 supplied to the second switching element 2U, it shifts the high-level periods of the first PWM signal SU1 and the second PWM signal SU2, respectively, but does not change the duty cycles of the first PWM signal SU1 and the second PWM signal SU2 in one cycle of the carrier signal CA1. Furthermore, when the control device 51 shifts the high-level period of the first PWM signal SV1 supplied to the first switching element 1V of the switching circuit 10V or the high-level period of the second PWM signal SV2 supplied to the second switching element 2V, it shifts the high-level periods of the first PWM signal SV1 and the second PWM signal SV2, respectively, but does not change the duty cycles of the first PWM signal SV1 and the second PWM signal SV2 in one cycle of the carrier signal CA1. Furthermore, when the control device 51 shifts the high-level period of the first PWM signal SW1 supplied to the first switching element 1W of the switching circuit 10W or the high-level period of the second PWM signal SW2 supplied to the second switching element 2, it shifts the high-level periods of the first PWM signal SW1 and the second PWM signal SW2, respectively, but does not change the duty cycles of the first PWM signal SW1 and the second PWM signal SW2 in one cycle of the carrier signal CA1. For the sake of explanation, in the following, the shift time of the high-level period of the first PWM signal SU1 or the second PWM signal SU2 when the high-level period of the first PWM signal SU1 or the second PWM signal SU2 is shifted will be denoted as Tsu. Furthermore, when shifting the high-level period of the first PWM signal SV1 or the second PWM signal SV2, the shift time of the high-level period of the first PWM signal SV1 or the second PWM signal SV2 is denoted as Tsv.Furthermore, when shifting the high-level period of the first PWM signal SW1 or the second PWM signal SW2, the shift time of the high-level period of the first PWM signal SW1 or the second PWM signal SW2 is defined as Tws.

[0109] The upper part of Figure 11 shows a timing chart when the control device 51 has determined in advance that the resonant currents of the two phases, the V phase and the W phase, will flow simultaneously during the period corresponding to region A11 in Figure 10. Here, the upper part of Figure 11 shows the timing charts of the first PWM signal SU1, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signal SV7, the control signal SW7, the load current iV, the load current iW, and the current iL1 before the shift. The lower part of Figure 11 shows a timing chart when the control device 51 has performed both the first and second operations (hereinafter also referred to as "after the shift") during the period corresponding to region A11 in Figure 10. In the lower part of Figure 11, the timing charts for the shifted first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV7, control signal SW7, load current iv, load current iW, and current iL1 are shown. In the example of Figure 11, the polarity of the load currents iv and iW flowing through the two AC terminals 41V and 41W connected to the two switching circuits 10V and 10W is negative, and the absolute value of the load current iW is greater than the absolute value of the load current iv. Note that Figure 11 shows the timing chart for a portion of the period within one cycle of the carrier signal CA1.

[0110] In the example shown in Figure 11, when the control device 51 performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the first PWM signal SV1 to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 11, the control device 51 sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0111] Furthermore, when the control device 51 performs the second operation, it shifts the high-level period of the first PWM signal SV1 in the direction of delaying by a shift time Tsv. At this time, the control device 51 takes time ta as the point in time when the high-level period of the control signal SW7 to the switch 8W begins, and shifts the high-level period of the control signal SV7 to the switch 8V to time tc, which is a delay Tdef from time tb, the point in time when the current value of the resonant current (current iL1) passing through the switch 8W reaches an extreme value (minimum value in the example of Figure 11) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W, by a shift time Tsv, so that the high-level period of the control signal SV7 to the switch 8V begins at time tc, which is a delay Tdef from time tb. The control device 51 determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51 determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 11, ΔT is the value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the second PWM signal SW2 to the second switching element 2W and the end of the high-level period of the first PWM signal SV1 to the first switching element 1V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100, zero-voltage soft switching of the second switching element 2V is possible even if the high-level period of the control signal SV7 to the switch 8V does not include the additional time Tadv, as long as it is equal to or greater than the resonant half-period (Tres / 2).

[0112] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 11, in the power converter 100, if the control device 51 determines in advance that two-phase resonant currents of the V-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and the W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100, if the control device 51 determines in advance that two-phase resonant currents of the U-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and the W-phase by performing the first and second operations, thereby achieving soft switching.

[0113] In the power converter 100, if the control device 51 does not perform the first and second operations, the voltages V2u and V2v across the second switching elements 2V and 2W do not decrease to zero at the point when the second PWM signals SV2 and SW2 change from a low-level period to a high-level period (the point at which the dead time periods corresponding to the V-phase and W-phase, respectively, end). As a result, the switching of the second switching elements 2V and 2W becomes hard switching.

[0114] In contrast, when the control device 51 performs the first and second operations, the voltages V2v and V2w across the second switching elements 2V and 2W decrease to zero at the point when the second PWM signals SV2 and SW2 change from a low-level period to a high-level period (the point at which the dead time periods corresponding to the V-phase and W-phase, respectively, end. Therefore, in the power converter 100, when the control device 51 performs the first and second operations, the switching of the second switching elements 2V and 2W becomes zero-voltage soft switching.

[0115] Figure 11 above shows an example in which the control device 51 executes the first and second operations when it has previously determined that the V-phase resonant current and the W-phase resonant current flow simultaneously through the resonant inductor L1, but it is not limited to this. For example, if the control device 51 has previously determined that the U-phase resonant current and the W-phase resonant current flow simultaneously through the resonant inductor L1, or if it has previously determined that the U-phase resonant current and the V-phase resonant current flow simultaneously through the resonant inductor L1, the control device 51 will execute the first and second operations, thereby enabling zero-voltage soft switching.

[0116] The first and second operations of the control device 51 can be generalized as follows.

[0117] When the control device 51 performs the first operation, it shortens the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51 performs the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51 sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 to time tc, which is time Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10, so that the ON period of the switch 8 corresponding to the first switching circuit 10 among the multiple switches 8 begins at time t. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0118] (4) Advantages The power conversion device 100 according to Embodiment 1 includes a first DC terminal 31 and a second DC terminal 32, a power conversion circuit 11, a plurality of AC terminals 41, a plurality of switches 8, a plurality of resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, a control device 51, and a signal generation circuit 52. The power conversion circuit 11 has a plurality of first switching elements 1 and a plurality of second switching elements 2. In the power conversion circuit 11, a plurality of switching circuits 10, each in which a plurality of first switching elements 1 and a plurality of second switching elements 2 are connected in series in a one-to-one relationship, are connected in parallel with each other. The control device 51 generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on three-phase duty command values ​​du, dv, dw of a two-phase modulation scheme. The control device 51 sets a second dead time period Td2 for each of the plurality of switching circuits 10, which is a predetermined first dead time period Td1 plus a predetermined time (additional time) so that the ON periods of the first switching element 1 and the second switching element 2 do not overlap between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2. The predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor L1 and the voltage value of the regenerative capacitor 15. The signal generation circuit 52 generates a control signal for each of the plurality of switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the plurality of switching circuits 10. When the control device 51 determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme (du, dv, dw) is fixed to a constant value, the control device 51 performs a first operation, and then a second operation, when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10. The first operation is to shorten the second dead time period Td2 for the first switching circuit 10 by a shortening period Tred.The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of either the first switching circuit 10 or the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts after a standby period Tdef from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10.

[0119] With the above configuration, zero-voltage soft switching can be achieved without the control device 51 directly controlling the multiple switches 8 for zero-voltage soft switching. More specifically, the control device 51 does not need to generate control signals to directly control the multiple switches 8 for zero-voltage soft switching, and zero-voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 can be achieved without the control device 51 directly controlling the multiple switches 8. Furthermore, with the above configuration, the control device 51 does not need to generate and output multiple control signals SU6, SU7, SV6, SV7, SW6, SW7, so the control device 51 can be simplified, for example, it is possible to suppress an increase in the number of control ports of the microcomputer included in the control device 51 and suppress the size increase of the control device 51. In the power conversion device 100 according to Embodiment 1, when the control device 51 determines that resonant currents corresponding to two of the multiple switching circuits 10 are flowing simultaneously through the resonant inductor L1, it performs a first operation and then a second operation, so that soft switching can be achieved more reliably. Furthermore, in the power converter 100, the control device 51 generates multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the two-phase modulation method, thereby reducing switching losses.

[0120] Furthermore, in the power conversion device 100 according to Embodiment 1, when the control device 51 sets a second dead time period Td2 for each of the plurality of switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the second PWM signal to the second switching element 2. Also, when the control device 51 sets a second dead time period Td2 for each of the plurality of switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first PWM signal to the first switching element 1.

[0121] With the above configuration, it becomes possible to achieve zero-voltage soft switching while further reducing dead time loss and dead time error.

[0122] In the power converter 100, the length of the shortening period Tred only needs to be less than or equal to the length of a predetermined time (additional time). This allows the power converter 100 to perform soft switching even if the length of the shortening period Tred varies.

[0123] (5) Modifications (5.1) Modification 1 In Modification 1, the signal generation circuit 52 synchronizes the start time of the high-level period of the control signal to each of the multiple switches 8 with the start time of the second dead time period Td2, and delays the end time of the high-level period of the control signal to each of the multiple switches 8 by the clamp period (the length of the clamp period is the length of the second predetermined time Tad2) from the end time of the second dead time period Td2. Therefore, in Modification 1, the high-level period of the control signal is longer compared to Embodiment 1.

[0124] In the first modified example, since the high-level period of the control signal generated by the signal generation circuit 52 includes a clamping period, the configuration may not include the first clamp diode 13 and the second clamp diode 14.

[0125] (5.2) Modification 2 In Modification 2, the shift time in the shift control performed by the control device 51 when it determines that the two-phase resonant currents overlap in the resonant inductor L1 is different from the shift time when the control device 51 of Embodiment 1 performs shift control.

[0126] In the modified example 2, if the control device 51 determines that two-phase resonant currents are flowing simultaneously through the resonant inductor L1, in the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 in each of the two switching circuits 10 in different directions.

[0127] In modified example 2, when the control device 51 performs the first operation, it shortens the second dead time period Td2 for the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. Also, when the control device 51 performs the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the first switching circuit 10 toward the late direction, and shifts the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the second switching circuit 10 toward the early direction. At this time, the control device 51 sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level periods of the first PWM signal to the first switching circuit 10 and the first PWM signal to the second switching circuit 10 in opposite directions so that the high-level period of the control signal to the switch 8 corresponding to the first switching circuit 10 starts at time tc, which is a delay Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current flowing through the AC terminal 41 corresponding to the first switch. If the length of the delay Tdef is set to be the same as the length of the additional time, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10. This makes it possible for the power converter 100 to more reliably achieve soft switching.

[0128] In the modified example 2, it becomes possible to achieve a higher frequency than in embodiment 1, and to accommodate a shorter carrier period.

[0129] (Embodiment 2) Hereinafter, a power converter 100A according to Embodiment 2 will be described with reference to Figure 12.

[0130] (1) Configuration of the power converter The power converter 100A according to Embodiment 2 differs from the power converter 100 according to Embodiment 1 in that, as shown in Figure 12, it is equipped with a control device 51A instead of the control device 51 of the power converter 100 according to Embodiment 1. With respect to the power converter 100A according to Embodiment 2, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0131] The control device 51A differs from the control device 51 of Embodiment 1 in its operation when it determines that two-phase resonant currents are flowing simultaneously.

[0132] (2) Operation of the power converter (2.1) Basic operation The basic operation of the control device 51A is the same as the basic operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0133] (2.2) When the shift control operation control device 51A determines that a resonant current corresponding to each of two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme, du, dv, and dw, is fixed to a constant value, the control device shifts the ON period of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10. "When it is determined that a resonant current corresponding to each of the two switching circuits 10 flows simultaneously" means when it is estimated in advance that a resonant current corresponding to each of the two switching circuits 10 flows simultaneously through the resonant inductor L1. For convenience of explanation below, "a resonant current corresponding to each of the two switching circuits 10 flows simultaneously through the resonant inductor L1" may also be referred to as "a two-phase resonant current flows simultaneously through the resonant inductor L1".

[0134] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously through the resonant inductor The power converter 100A determines whether two-phase resonant currents flow simultaneously. The control device 51A generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the top-stick two-phase modulation method. As shown in Figure 10, the two-phase duty command values ​​approach each other at electrical angles of 60° (see regions A11, A12, and A13 in Figure 10), and the duty cycles of the two-phase control signals become the same or close to each other.

[0135] The operation in control device 51A to "determine whether or not two-phase resonant currents flow simultaneously" is the same as the operation in control device 51 to "determine whether or not two-phase resonant currents flow simultaneously," so the explanation is omitted.

[0136] Furthermore, in this embodiment, the overlap time is calculated when the V-phase current and the W-phase current overlap with respect to the current iL1 flowing through the resonant inductor L1. The method for calculating the overlap time will be explained below based on Figure 9 described in Embodiment 1.

[0137] In the power converter 100A, if the time difference ΔTvw is greater than or equal to Tav + Taw + (Tres / 2), the U-phase current and the V-phase current do not overlap. If the time difference ΔTvw is less than Tav + Taw + (Tres / 2), the V-phase current and the W-phase current overlap. The time difference ΔTvw is the time difference between the start of the high-level period of the second PWM signal SV2 supplied to the second switching element 2V of the switching circuit 10V and the start of the high-level period of the second PWM signal SW2 supplied to the second switching element 2W of the switching circuit 10W. The control device 51A determines the overlap time Tov_vw (see Figure 13) by calculating Tov_vw = Tav + Taw + (Tres / 2) - ΔTvw. The control device 51A estimates that if Tov_vw > 0, the V-phase current and the W-phase current overlap.

[0138] Furthermore, in the power converter 100A, if the time difference ΔTuw is greater than or equal to Tau + Taw + (Tres / 2), the U-phase current and the W-phase current do not overlap, and if the time difference ΔTuw is less than Tau + Taw + (Tres / 2), the U-phase current and the W-phase current overlap. The time difference ΔTuw is the time difference between the start of the high-level period of the second PWM signal SU2 and the start of the high-level period of the second PWM signal SW2. The control device 51A determines the overlap time Tov_uw, where the U-phase current and the W-phase resonant current overlap, by calculating Tov_uw = Tau + Taw + (Tres / 2) - ΔTuw. The control device 51A estimates that if Tov_uw > 0, the U-phase current and the W-phase current overlap with respect to the current iL1 flowing through the resonant inductor L1.

[0139] Furthermore, in the power converter 100A, if the time difference ΔTuv is greater than or equal to Tau + Tav + (Tres / 2), the U-phase current and the V-phase current do not overlap with respect to the current iL1 flowing through the resonant inductor L1. If the time difference ΔTuv is less than Tau + Tav + (Tres / 2), the U-phase resonant current and the V-phase resonant current overlap. The time difference ΔTuv is the time difference between the start of the high-level period of the second PWM signal SU2 supplied to the second switching element 2U of the switching circuit 10U and the start of the high-level period of the second PWM signal SW2 supplied to the second switching element 2W of the switching circuit 10V. The control device 51A calculates the overlap time Tov_uv by calculating Tov_uv = Tau + Tav + (Tres / 2) - ΔTuv, where Tov_uv is the overlap time during which the U-phase current and the V-phase current overlap. The control device 51A estimates that if Tov_uv > 0, the current of the U phase and the current of the V phase overlap.

[0140] (2.2.2) When the shift control device 51A determines that two-phase resonant currents are flowing simultaneously, it shifts the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the two switching circuits 10 so that the length of the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the two switching circuits 10 does not change. For example, when the control device 51A shifts the high-level periods of the first PWM signal SU1 and the second PWM signal SU2, it shifts the high-level periods of the first PWM signal SU1 and the second PWM signal SU2, but does not change the duty cycles of the first PWM signal SU1 and the second PWM signal SU2 in one period of the carrier signal CA1 (see Figure 2). Furthermore, when the control device 51A shifts the high-level periods of the first PWM signal SV1 and the second PWM signal SV2, it shifts the high-level periods of the first PWM signal SV1 and the second PWM signal SV2, but does not change the duty cycles of the first PWM signal SV1 and the second PWM signal SV2 in one cycle of the carrier signal CA1. Similarly, when the control device 51A shifts the high-level periods of the first PWM signal SW1 and the second PWM signal SW2, it shifts the high-level periods of the first PWM signal SW1 and the second PWM signal SW2, but does not change the duty cycles of the first PWM signal SW1 and the second PWM signal SW2 in one cycle of the carrier signal CA1. For the sake of explanation, in the following, the shift time when the high-level periods of the first PWM signal SU1 and the second PWM signal SU2 are shifted will be denoted as Tsu. Furthermore, let Tsv be the shift time when the high-level periods of the first PWM signal SV1 and the second PWM signal SV2 are shifted. Also, let Tsw be the shift time when the high-level periods of the first PWM signal SW1 and the second PWM signal SW2 are shifted.

[0141] In this embodiment, when the control device 51A determines that the resonant currents of the V-phase and W-phase flow simultaneously, it sets the shift time Tsv and shift time Tsw such that the sum of the shift time Tsv and shift time Tsw equals the overlap time Tov_vw.

[0142] When the control device 51A performs shift control, it shifts the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 in each of the two switching circuits 10 in different directions. The control device 51A compares the duty cycles of the two second PWM signals SV2 and SW2, and shifts the high-level period of the second PWM signal with the relatively larger duty cycle to be advanced, and shifts the high-level period of the second PWM signal with the relatively smaller duty cycle to be delayed.

[0143] The upper part of Figure 13 shows an example of a timing chart before the control device 51A performs shift control, and the lower part of Figure 13 shows an example of a timing chart when the control device 51A performs shift control. More specifically, the upper part of Figure 13 shows the first PWM signal SU1, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signals SV6, SV7, SW6, SW7, and the current iL1 (in the upper part of Figure 13, the current passing through switch 8V and resonant inductor L1 and the current passing through switch 8W and resonant inductor L1 are shown separately) before the control device 51A determines that the resonant currents of the two phases, V phase and W phase, are flowing simultaneously. Furthermore, the lower part of Figure 13 shows the first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signals SV6, SV7, SW6, SW7, and current iL1 when the control device 51A shifts the high-level period of the shorter of the first PWM signals SV1 and SW1 in a predetermined direction (in this embodiment, in the direction of advancing on the time axis) by a shift time Tsv, and shifts the high-level period of the longer of the first PWM signals SV1 and SW1 in the opposite direction (in the direction of delaying on the time axis) by a shift time Tsw. Figure 13 also shows the timing chart of the carrier signal CA1 over one cycle.

[0144] In this embodiment, when the control device 51A determines that the resonant currents of the V-phase and W-phase flow simultaneously, it sets the shift time Tsv and shift time Tsw such that the sum of the shift time Tsv and shift time Tsw equals the overlap time Tov_vw.

[0145] When the control device 51A performs shift control, it shifts the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 in each of the two switching circuits 10 in different directions. The control device 51A compares the duty cycles of the two first PWM signals SV1 and SW1, and shifts the high-level period of the first PWM signal with the relatively larger duty cycle toward a slower time, and shifts the high-level period of the first PWM signal with the relatively smaller duty cycle toward an earlier time.

[0146] As can be seen from the waveform of current iL1 in the lower part of Figure 13, the power converter 100A can suppress the overlap between the resonant current of the V phase and the resonant current of the W phase. As a result, the power converter 100A can perform zero-voltage soft switching of both the second switching element 2V and the second switching element 2W.

[0147] The above example illustrates shift control when the control device 51A determines that the resonant currents of the V-phase and W-phase flow simultaneously. However, in cases where the resonant currents of the U-phase and W-phase flow simultaneously, or when the resonant currents of the U-phase and V-phase flow simultaneously, the same approach (algorithm) as when the resonant currents of the V-phase and W-phase flow simultaneously is used for shift control.

[0148] (3) Advantages The power conversion device 100A according to Embodiment 2 includes a first DC terminal 31 and a second DC terminal 32, a power conversion circuit 11, a plurality of AC terminals 41, a plurality of switches 8, a plurality of resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, a control device 51A, and a signal generation circuit 52. The power conversion circuit 11 has a plurality of first switching elements 1 and a plurality of second switching elements 2. In the power conversion circuit 11, a plurality of switching circuits 10, each of which a plurality of first switching elements 1 and a plurality of second switching elements 2 are connected in series in a one-to-one relationship, are connected in parallel with each other. For each of the plurality of switching circuits 10, the control device 51A sets a second dead time period Td2 by adding a predetermined time (additional time Tad) to a first dead time period Td1 which is set in advance so that the on periods of the first switching element 1 and the second switching element 2 do not overlap between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2. The predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor L1, and the voltage value of the regenerative capacitor 15. The signal generation circuit 52 generates a control signal for each of the multiple switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. When the control device 51A determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, the control device 51A performs shift control to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 in each of the two switching circuits 10 so that the resonant current corresponding to each of the two switching circuits 10 flows simultaneously through the resonant inductor L1.

[0149] With the above configuration, zero-voltage soft switching can be achieved in the control device 51A without directly controlling the multiple switches 8 for zero-voltage soft switching. More specifically, the control device 51A does not need to generate control signals to directly control the multiple switches 8 for zero-voltage soft switching, and zero-voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 can be achieved in the control device 51A without directly controlling the multiple switches 8. Furthermore, with the above configuration, the control device 51A does not need to generate and output multiple control signals SU6, SU7, SV6, SV7, SW6, SW7, so the control device 51A can be simplified, for example, it is possible to suppress an increase in the number of control ports of the microcomputer included in the control device 51A and suppress the size increase of the control device 51A. Furthermore, with the above configuration, when the control device 51A determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme (du, dv, dw) is fixed to a constant value, it performs shift control, thereby enabling more reliable soft switching.

[0150] Furthermore, in the power converter 100A according to Embodiment 2, when the control device 51A sets a second dead time period Td2 for each of the plurality of switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the second PWM signal to the second switching element 2. Also, when the control device 51A sets a second dead time period Td2 for each of the plurality of switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first PWM signal to the first switching element 1.

[0151] With the above configuration, it becomes possible to achieve zero-voltage soft switching while further reducing dead time loss and dead time error.

[0152] Furthermore, in the power conversion device 100A according to Embodiment 2, the signal generation circuit 52 generates a control signal for each of the multiple switches 8 using both the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the corresponding switching circuit 10 among the multiple switching circuits 10.

[0153] According to the above configuration, it becomes possible to easily generate a control signal having a high-level period corresponding to the second dead time period Td2, and to simplify the signal generation circuit 52.

[0154] Furthermore, in the power converter 100A according to Embodiment 2, when the control device 51A performs shift control, it shifts the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the two switching circuits 10 so that the length of the high-level period of each of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of the two switching circuits 10 does not change.

[0155] The above configuration makes it possible to suppress changes in line voltage.

[0156] Furthermore, in the power conversion device 100A according to Embodiment 2, when the control device 51A performs shift control, it shifts the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 in each of the two switching circuits 10 in different directions.

[0157] With the above configuration, it becomes possible to increase the frequency compared to the case where the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 of one of the two switching circuits 10 are shifted to avoid overlapping resonant currents.

[0158] Furthermore, in the power conversion device 100A according to Embodiment 2, when the control device 51A determines that resonant currents corresponding to two of the multiple switching circuits 10 are simultaneously flowing through the resonant inductor L1, it compares the duty cycles of the two first PWM signals for the two first switching elements 1 of the two switching circuits 10. The control device 51A then shifts the high-level period of the first PWM signal with a relatively large duty cycle toward a slower time, and shifts the high-level period of the first PWM signal with a relatively small duty cycle toward an earlier time.

[0159] With the above configuration, it becomes possible to increase the frequency compared to the case where the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 of one of the two switching circuits 10 are shifted to avoid overlapping resonant currents.

[0160] (Embodiment 3) Hereinafter, a power converter 100B according to Embodiment 3 will be described with reference to Figure 14.

[0161] (1) Configuration of the power converter The power converter 100B according to Embodiment 3 differs from the power converter 100 according to Embodiment 1 in that, as shown in Figure 14, it is equipped with a control device 51B instead of the control device 51 of the power converter 100 according to Embodiment 1. With respect to the power converter 100B according to Embodiment 3, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0162] The power converter 100B of this embodiment includes a control system 50B having a control device 51B and a signal generation circuit 52. In this embodiment, the operation of the control device 51B of the control system 50B when it is determined that two-phase resonant currents are flowing simultaneously differs from that of the control device 51 of Embodiment 1.

[0163] (2) Operation of the power converter (2.1) Basic operation The basic operation of the control device 51B is the same as the basic operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0164] (2.2) The shift control operation control system 50B can perform a first control operation and a second control operation when the control device 51B determines that when the duty command value of one phase among the three phase duty command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1, or when it determines that a resonant current flows simultaneously through two of the multiple switches 8. In the first control operation, the control system 50B overlaps the high-level period of the control signal to each of the two switches 8 with the second dead time period Td2 corresponding to each of the two switching circuits 10 connected to the two switches 8 of the multiple switching circuits 10 for a predetermined period. In the second control operation, the control system 50B determines the start time of the high-level period of the control signal to at least one of the multiple switches 8 according to the load current of at least one phase flowing through the AC load RA1 connected to the multiple AC terminals 41.

[0165] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously through the resonant inductor The power converter 100B determines whether two-phase resonant currents flow simultaneously. The control device 51B generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the top-stick two-phase modulation method. As shown in Figure 10, the two-phase duty command values ​​approach each other at electrical angles of 60° (see regions A11, A12, and A13 in Figure 10), and the duty cycles of the two-phase control signals become the same or close to each other.

[0166] The operation in control device 51B to "determine whether or not two-phase resonant currents flow simultaneously" is the same as the operation in control device 51 to "determine whether or not two-phase resonant currents flow simultaneously," so the explanation is omitted.

[0167] (2.2.2) In the first control operation, the control system 50B overlaps the high-level period of the control signal to each of the two switches 8 with a predetermined period of time with the second dead time period Td2 corresponding to each of the two switching circuits 10 connected to the two switches 8 from among the plurality of switching circuits 10.

[0168] In the second control operation, the control system 50B determines the start time of the high-level period of the control signal to at least one of the multiple switches 8 according to the load current of at least one phase flowing through the AC load RA1 connected to the multiple AC terminals 41. Here, in the second control operation of the control system 50B, the start time of the high-level period of the control signal to two of the multiple switches 8 is changed according to the absolute value of the sum of the two phase load currents flowing through each of the two AC terminals 41 connected to those two switches 8.

[0169] In the example shown in Figure 15, the start time of the high-level period for the control signals to the two switches 8 (control signals SV7 and SW7 to the fourth switching elements 7V and 7W) is changed according to the absolute value of the sum of the V-phase load current iV flowing through AC terminal 41V and the W-phase load current iW flowing through AC terminal 41W.

[0170] If the control device 51B determines that the two-phase resonant currents overlap, the control system 50B executes the first step and the second step in the order of the first step and the second step. In the following example, we will describe the case where it is estimated that the resonant current flowing through the V-phase switch 8V and the resonant current flowing through the W-phase switch 8W in the resonant inductor L1 overlap, but the same applies to the cases of U-phase and W-phase, and U-phase and V-phase.

[0171] In the first step, the first PWM signals SV1 and SV2 of the V phase are synchronized with the first PWM signals SW1 and SW2 of the W phase. In the example in Figure 15, the start time of the high-level period of the second PWM signal SW2 of the W phase and the end time of the high-level period of the first PWM signal SW1 of the W phase are shifted forward by ΔT, thereby synchronizing the first PWM signals SV1 and SV2 of the V phase with the first PWM signals SW1 and SW2 of the W phase. In the power converter 100B according to Embodiment 3, the first step corresponds to the first control operation of the control system 50B. In the example in Figure 15, ΔT is the time difference between the start of the high-level period of the second PWM signal SV2 and the start of the high-level period of the second PWM signal SW2, or the time difference between the end of the high-level period of the first PWM signal SV1 and the end of the first PWM signal SW1. In the first step, the first PWM signals SV1 and SV2 of the V phase may be synchronized with the first PWM signals SW1 and SW2 of the W phase by shifting the high-level periods of the first PWM signals SV1 and SV2 of the V phase by ΔT. Alternatively, in the first step, the first PWM signals SV1 and SV2 of the V phase may be synchronized by shifting them in a total of ΔT from each other with the first PWM signals SW1 and SW2 of the W phase.

[0172] In the second step, the length of the second dead time period Td2 for each of the two switching circuits 10V and 10W, and the high-level period of each of the control signals SV7 and SW7 are changed. For each of the multiple switching circuits 10, the control device 51B sets a second dead time period Td2 by adding a variable time Tp1 to a preset first dead time period Td1, so that the on periods of the first switching element 1 and the second switching element 2 do not overlap between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2. The variable time Tp1 is determined according to the current value of the load current, the inductance of the resonant inductor L1, and the potential V15 of the sixth terminal 154 of the regenerative capacitor 15. More specifically, in the control system 50B, the control device 51B determines the variable time Tp1 as the sum of two or more additional time Tad corresponding one-to-one to two or more switches 8, and the difference (1 / 2) × ΔTres between the first resonant half-period when the resonant current does not flow simultaneously and the second resonant half-period when the resonant current flows simultaneously.

[0173] Each of the two or more additional time Tads is determined using the current value of the load current flowing through the corresponding switch 8 among the two or more switches 8, the inductance L of the resonant inductor L1, and the potential V15 at the sixth terminal 154 of the regenerative capacitor 15. In the example in Figure 15, if the sum of the two or more additional time Tads is taken as additional time Tad2, then additional time Tad2 is obtained by the calculation L × |iV + iW| / V15. That is, additional time Tad2 = Tav + Taw. The calculation of additional time Tad2 uses the detection results of the load currents iv and iW from the current sensor, or their signal processing values, or estimated values ​​of the load currents iv and iW, the inductance L of the resonant inductor L1 which is stored in advance, and the detection result of the potential V15 at the sixth terminal 154 of the regenerative capacitor 15.

[0174] In the control system 50B, the control device 51B lengthens the second dead time period Td2, thereby extending the high-level periods of the control signals SV7 and SW7. The end points of the control signals SV7 and SW7 can be anytime after the end of the second resonant half-cycle.

[0175] In the power converter 100B according to Embodiment 3, the second step corresponds to the second control operation of the control system 50B.

[0176] Figure 15 shows the timing chart of the power converter 100B when the control system 50B performs the first and second control operations. As described above, in the first control operation of the control system 50B, the high-level period of the control signals to the two switches 8V and 8W (control signals SV7 and SW7 to the fourth switching elements 7V and 7W, respectively) is superimposed for a predetermined period on the second dead time period Td2 corresponding to the two switching circuits 10V and 10W connected to the two switches 8V and 8W among the multiple switching circuits 10. In the example of Figure 15, the predetermined period is a part of the second resonant half-period (1 / 2 of Tres2). The length of the predetermined period may be 100% of the length of the second resonant half-period.

[0177] Figure 16 shows the timing chart of the comparative example power converter. The comparative example power converter includes a single microcomputer that directly controls a plurality of first switching elements 1, a plurality of second switching elements 2, and a plurality of switches 8, instead of the control device 51B and signal generation circuit 52 of the control system 50B of Embodiment 3. In the comparative example power converter, there is some overlap between the high-level period of the control signal SV7, which is longer than the dead time period Td (= Tres / 2) corresponding to the V-phase switching circuit, and the high-level period of the control signal SW7, which is longer than the dead time period Td (= Tres / 2) corresponding to the W-phase switching circuit. In the comparative example, at the point when the second PWM signals SV2 and SW2 change from the low-level period to the high-level period (the end of the dead time period Td corresponding to the V-phase and W-phase, respectively), the voltages V1v and V1w across the first switching elements 1V and 1W have not risen to Vd. In other words, in the comparative example, the discharge of the resonant capacitors 9V and 9W has not finished at the end of the dead time period Td corresponding to the V phase and W phase, respectively. Therefore, in the comparative example, the voltages across the second switching elements 2V and 2W do not decrease to zero at the end of the dead time period Td corresponding to the V phase and W phase, respectively. As a result, in the comparative example, the switching of the second switching elements 2V and 2W becomes hard switching.

[0178] In contrast, in this embodiment, the hard switching of the second switching element 2 is mitigated. Mitigation of the hard switching of the second switching element 2 means that the voltage across the second switching element 2 when it is turned on is reduced to less than Vd.

[0179] Figure 15 above shows the relationship between the first PWM signal SU1, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signal SV7, and the control signal SW7 in an example where the high-level period of the control signal SV7 for the V-phase switch 8V overlaps with the high-level period of the control signal SW7 for the W-phase switch 8W, but it is not limited to this example. For example, when the high-level period of the control signal SU7 for the U-phase switch 8U overlaps with the high-level period of the control signal SW7 for the W-phase switch 8W, or when the high-level period of the control signal SU7 for the U-phase switch 8U overlaps with the high-level period of the control signal SV7 for the V-phase switch 8V, the control system 50B performs the first and second control operations, thereby mitigating the hard switching of the second switching element 2.

[0180] (3) Advantages In the power converter 100B according to Embodiment 3, the control system 50B includes a control device 51B and a signal generation circuit 52. The control device 51B outputs a plurality of first PWM signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1 and a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2. The signal generation circuit 52 provides a control signal to each of the plurality of switches 8 that changes potential between high level and low level. The control device 51B generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on three-phase duty command values ​​for a two-phase modulation scheme or three-phase duty command values ​​du, dv, dw for a three-phase modulation scheme. The control device 51B sets a second dead time period Td2 for each of the plurality of switching circuits 10, which is a first dead time period Td1 that is set in advance, and adds a variable time Tp1 to it, so that the on periods of the first switching element 1 and the second switching element 2 do not overlap between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2. The variable time Tp1 is determined according to the current value of the load current, the inductance of the resonant inductor L1 and the potential V15 of the sixth terminal 154 of the regenerative capacitor 15. The signal generation circuit 52 generates a control signal for each of the plurality of switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the plurality of switching circuits 10. The control system 50B can perform a first control operation and a second control operation when it determines that a resonant current flows simultaneously through two of the multiple switches 8 to the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value. In the first control operation, the control system 50B overlaps the high-level period of the control signal to each of the two switches 8 with the second dead time period Td2 corresponding to each of the two switching circuits 10 connected to the two switches 8 of the multiple switching circuits 10 for a predetermined period.In the second control operation, the control system 50B determines the start time of the high-level period of the control signal to at least one of the multiple switches 8 according to the load current of at least one phase flowing through the AC load RA1 connected to the multiple AC terminals 41.

[0181] With the above configuration, switching losses can be reduced without the control device 51B directly controlling the multiple switches 8 for zero-voltage soft switching. More specifically, since the control device 51B does not need to generate control signals to directly control the multiple switches 8 for zero-voltage soft switching, zero-voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 can be realized without the control device 51B directly controlling the multiple switches 8. Furthermore, with the above configuration, even while employing a configuration in which a common resonant inductor L1 is connected to multiple switching circuits 10, it is possible to suppress the simultaneous flow of two-phase resonant currents through the resonant inductor L1, thereby reducing switching losses and noise. In addition, with the above configuration, by suppressing the simultaneous flow of two-phase resonant currents through the resonant inductor L1, it is possible to suppress heat generation and losses due to an increase in the maximum value of the resonant current. Furthermore, with the above configuration, the control device 51B does not need to generate and output multiple control signals SU6, SU7, SV6, SV7, SW6, SW7, so the control device 51B can be simplified. For example, it is possible to suppress an increase in the number of control ports of the microcomputer included in the control device 51B and thus suppress the size increase of the control device 51B. In addition, with the above configuration, when the control device 51B determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation scheme (du, dv, dw) is fixed to a constant value, it is possible to perform shift control, thereby enabling more reliable soft switching.

[0182] (4) Modified Version In the modified version, for example, the end of the high-level period of the control signal (control signal SV7, SW7) may be later than the start of the high-level period of the second PWM signal (SV2, SW2) to the target switching element (second switching element 2V, 2W).

[0183] (Embodiment 4) The power converter 100C according to Embodiment 4 will be described below with reference to Figures 17 to 19.

[0184] (1) Configuration of the power converter The power converter 100C according to Embodiment 4 differs from the power converter 100 according to Embodiment 1 in that, as shown in Figure 17, it is equipped with a control device 51C and a signal generation circuit 52C instead of the control device 51 and signal generation circuit 52 of the power converter 100 according to Embodiment 1. With respect to the power converter 100C according to Embodiment 4, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0185] The power converter 100C of this embodiment includes a control system 50C having a control device 51C and a signal generation circuit 52C. In this embodiment, the operation of the control device 51C of the control system 50C when it determines that two-phase resonant currents are flowing simultaneously differs from that of the control device 51 of Embodiment 1. Also, in this embodiment, the configuration and operation of the signal generation circuit 52C differ from those of the signal generation circuit 52.

[0186] The control device 51C generates a plurality of first PWM signals and a plurality of second PWM signals based on the duty cycle command values ​​du, dv, and dw of the three phases of the two-phase modulation scheme, similar to the control device 51 of Embodiment 1. For each of the plurality of switching circuits 10, the control device 51 sets a second dead time period Td2 by adding a variable time Tp1 to a preset first dead time period Td1, which is set so that the on periods of the first switching element 1 and the second switching element 2 do not overlap between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2. The variable time Tp1 is determined according to the current value of the load current, the inductance of the resonant inductor L1, and the potential V15 of the sixth terminal 154 of the regenerative capacitor 15.

[0187] The signal generation circuit 52C generates a control signal for each of the multiple switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. The signal generation circuit 52C delays the start of the high-level period of the control signal for each of the multiple switches 8 by a specified time T1 (see Figure 19) from the start of the second dead time period Td2, and delays the end of the high-level period of the control signal for each of the multiple switches 8 from the end of the second dead time period Td2. The length of the high-level period of the control signal for each of the multiple switches 8 (fixed length T2) is longer than the length of the first dead time period Td1.

[0188] The signal generation circuit 52C generates a control signal for each of the multiple switches 8 using either a first PWM signal to the first switching element 1 of the corresponding switching circuit 10 and a second PWM signal to the second switching element 2 of the multiple switching circuits 10. The signal generation circuit 52C sets the length of the high-level period of the control signal generated for each of the multiple switches 8 to a fixed length T2 (see Figure 19), and sets the start timing of the high-level period of fixed length T2 to follow the start timing of the second dead time period Td2 for the corresponding switching circuit 10 of the multiple switching circuits 10 for each of the multiple switches 8. In this embodiment, the signal generation circuit 52C has, for example, a plurality (e.g., six) of logic circuits 521C to 526C and a plurality (e.g., six) of gate drive circuits 531 to 536, as shown in Figure 18. In the signal generation circuit 52C, the plurality of logic circuits 521C to 526C correspond one-to-one with the plurality of gate drive circuits 531 to 536.

[0189] The logic circuit 521C is configured to generate a control signal SU6 using a second PWM signal SU2. The logic circuit 521C detects the falling edge of the second PWM signal SU2 to the second switching element 2U and generates a control signal SU6 having a high-level period of fixed length T2.

[0190] The logic circuit 522C is configured to generate a control signal SU7 using a first PWM signal SU1. The logic circuit 522C detects the falling edge of the first PWM signal SU1 to the first switching element 1U and generates a control signal SU7 having a high-level period of fixed length T2.

[0191] The logic circuit 523C is configured to generate a control signal SV6 using the second PWM signal SV2. The logic circuit 523C detects the falling edge of the second PWM signal SV2 to the second switching element 2V and generates a control signal SV6 having a high-level period of fixed length T2.

[0192] The logic circuit 524C is configured to generate a control signal SV7 using a first PWM signal SV1. The logic circuit 524C detects the falling edge of the first PWM signal SV1 to the first switching element 1V and generates a control signal SV7 having a high-level period of fixed length T2.

[0193] The logic circuit 525C is configured to generate a control signal SW6 using a second PWM signal SW2. The logic circuit 525C detects the falling edge of the second PWM signal SW2 to the second switching element 2W and generates a control signal SW6 having a high-level period of fixed length T2.

[0194] The logic circuit 526C is configured to generate a control signal SW7 using a first PWM signal SW1. The logic circuit 526C detects the falling edge of the first PWM signal SW1 to the first switching element 1W and generates a control signal SW7 having a high-level period of fixed length T2.

[0195] Each of the logic circuits 521C to 526C includes, for example, two multivibrators M11 and M12 connected in series. Each of the two multivibrators M11 and M12 is an edge-triggered monostable multivibrator. In each of the logic circuits 521C to 526C, the inverting output terminal of the preceding multivibrator M11 (represented by Q with an overline in Figure 18) is connected to the inverting trigger terminal of the following multivibrator M12. In each of the logic circuits 521C to 526C, the specified time T1 is the length of the CR time constant, which is determined by the capacitance of the capacitor C11 connected to the preceding multivibrator M11 and the resistance of the resistor R11. Furthermore, in each of the multiple logic circuits 521C to 526C, the fixed length T2 is the length of the CR time constant, which is determined by the capacitance of the capacitor C12 connected to the subsequent multivibrator M12 and the resistance of the resistor R12.

[0196] The logic circuit 521C receives the first PWM signal SU2 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SU6 from the output terminal Q of the subsequent multivibrator M12. The control signal SU6 is supplied to the third switching element 6U via the gate drive circuit 531.

[0197] The logic circuit 522C receives the first PWM signal SU1 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SU7 from the output terminal Q of the subsequent multivibrator M12. The control signal SU7 is supplied to the fourth switching element 7U via the gate drive circuit 532.

[0198] The logic circuit 523C receives the second PWM signal SV2 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SV6 from the output terminal Q of the subsequent multivibrator M12. The control signal SV6 is supplied to the third switching element 6V via the gate drive circuit 533.

[0199] The logic circuit 524C receives the first PWM signal SV1 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SV7 from the output terminal Q of the subsequent multivibrator M12. The control signal SV7 is supplied to the fourth switching element 7V via the gate drive circuit 534.

[0200] The logic circuit 525C receives the second PWM signal SW2 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SW6 from the output terminal of the subsequent multivibrator M12. The control signal SW6 is supplied to the third switching element 6W via the gate drive circuit 535.

[0201] The logic circuit 526C receives the first PWM signal SW1 output from the control device 51C as input to the inverting trigger terminal of the preceding multivibrator M11, and outputs a control signal SW7 from the output terminal of the subsequent multivibrator M12. The control signal SW7 is supplied to the fourth switching element 7W via the gate drive circuit 536.

[0202] (2) Operation of the power converter In the following, in each of the multiple switching circuits 10, the switching element that is turned on among the first switching element 1 and the second switching element 2 is also called the target switching element.

[0203] (2.1) The first control operation and the second control operation control system 50C can perform the first control operation and the second control operation when changing the PWM signal to the target switching element to be turned on from a low level to a high level among the first switching element 1 and the second switching element 2 in each of the plurality of switching circuits 10.

[0204] In the first control operation, the control system 50C overlaps at least a portion of the high-level period of the control signal to each of the multiple switches 8 corresponding to each of the multiple switching circuits 10 with the dead time period (second dead time period Td2) set between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the multiple switching circuits 10. In the second control operation, the control system 50C shifts the high-level period of the control signal to each of the multiple switches 8 so that the overlap period between the high-level period of the control signal and the dead time period (second dead time period Td2) is shorter than in the first control operation, so that the entire high-level period of the control signal overlaps with a portion of the high-level period of the PWM signal to the target switching element. As a result, the control system 50C stops the zero-voltage soft switching of the target switching element.

[0205] (2.2) Determination of whether resonant current flows simultaneously through each of the two switches In this embodiment, when the control system 50C applies a control signal for a preset high-level period to each of the multiple switches 8, it determines whether resonant current flows simultaneously through two of the multiple switches 8 in the resonant inductor L1.

[0206] The control system 50C performs a second control operation for the first switch, which is one of the two switches 8, when the control device 51C determines that a resonant current flows simultaneously through the resonant inductor L1, passing through two of the multiple switches 8, when the duty cycle command value of one of the three phases of the two-phase modulation scheme (du, dv, dw) is fixed to a constant value.

[0207] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously in the resonant inductor The power converter 100C, in the same way as the control device 51C, generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the top-stick two-phase modulation method. As shown in Figure 10, the two-phase duty command values ​​approach each other every 60° of electrical angle (see regions A11, A12, and A13 in Figure 10), and the duty cycles of the two-phase control signals become the same or close to each other.

[0208] The operation in control device 51C to "determine whether or not two-phase resonant currents flow simultaneously" is the same as the operation in control device 51 to "determine whether or not two-phase resonant currents flow simultaneously," so the explanation is omitted.

[0209] (2.2.2) When the control device 51C determines that two-phase resonant currents are flowing simultaneously, it performs a second control operation on the first switch, which is one of the two switches 8. The control device 51C performs a first control operation on the second switch, which is different from the first switch among the two switches 8. When the control device 51C performs a second control operation, the first switch is the switch 8 among the two switches 8 that corresponds to the switching circuit 10 in the plurality of switching circuits 10, where the absolute value of the load current flowing through each of the two switching circuits 10 corresponding to the two switches 8 is the largest.

[0210] The control system 50C shifts the high-level period of the control signal to the fourth switching element 7 in the direction of delaying it on the time axis, thereby shortening the overlap period between the high-level period of the control signal to the fourth switching element and the second dead time period Td2 immediately preceding the high-level period of the second PWM signal to the second switching element 2.

[0211] In the power converter 100C, the control device 51C can shorten the overlap period of the two-phase resonant currents by performing a second control operation on the first switch when it has determined in advance that two-phase resonant currents will flow simultaneously. In the power converter 100C, since the control device 51C performs a second control operation on the first switch, the hard switching of the second switching element 2 corresponding to the first switch of the two switches 8 is mitigated, and the second switching element 2 corresponding to a switch 8 other than the first switch is soft-switched at zero voltage.

[0212] Furthermore, the upper part of Figure 19 shows a timing chart of the first PWM signal SU1, first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV7, control signal SW7, load current iV, load current iW, and current iL1 before the second control operation is performed when the control system 50C determines that the V-phase resonant current and the W-phase resonant current are flowing simultaneously. In the upper part of Figure 19, the currents passing through switch 8V and resonant inductor L1 and the currents passing through switch 8W and resonant inductor L1 are shown separately. In the example of Figure 19, the absolute value of the load current iV is greater than the absolute value of the load current iW. Therefore, the first switch is switch 8V. In the upper section of Figure 19, the fourth item from the top shows the output signal of the inverting output terminal of the preceding multivibrator M11 in logic circuit 524C (see Figure 18) (represented by Q with an overline in Figure 18), and the eighth item shows the output signal of the inverting output terminal of the preceding multivibrator M11 in logic circuit 526C (represented by Q with an overline in Figure 18).

[0213] Furthermore, the lower section of Figure 19 shows the timing chart for the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signal SV7, the control signal SW7, the load current iV, the load current iW, and the current iL1 when the control system 50C performs a shift due to the second control operation. In the lower section of Figure 19, the third item from the top shows the output signal of the inverted output terminal of the preceding multivibrator M11 in logic circuit 524C (see Figure 18) (represented by Q with an overline in Figure 18), and the seventh item shows the output signal of the inverted output terminal of the preceding multivibrator M11 in logic circuit 526C (represented by Q with an overline in Figure 18). Figure 19 also shows the timing chart for a portion of the period within one cycle of the carrier signal CA1 (see Figure 2).

[0214] When the control system 50C determines that the resonant current of the V phase and the resonant current of the W phase are flowing simultaneously, it shifts the high-level period of the control signal SV7 to the fourth switching element 7V of the V phase by a shift time Ts in the direction of delaying it on the time axis, so that the entire high-level period of the control signal SV7 overlaps with the high-level period of the second PWM signal SV2. The shift time Ts set by the control device 51C of the control system 50C is Ts = Tav + (Tres / 2). As the control system 50C performs the second control operation, the power converter 100C stops the zero-voltage soft switching of the second switching element 2V without pulse width modulation of the control signals to each of the multiple switches 8 for zero-voltage soft switching, and the second switching element 2W is subjected to zero-voltage soft switching.

[0215] Furthermore, the control system 50C may shift the high-level period of the control signal SW7, rather than the high-level period of the control signal SV7, by a shift time Ts in the direction of delaying it on the time axis, so that the entire high-level period of the control signal SW7 overlaps with the high-level period of the second PWM signal SW2. In this case, the shift time Ts set by the control device 51C is Ts = Taw + (Tres / 2). When the control system 50C performs the second control operation, the second switching element 2V in the power converter 100C is soft-switched at zero voltage, and the hard switching of the second switching element 2W is mitigated.

[0216] The above examples illustrate the shift by the second control operation when the control system 50C determines that the resonant currents of the V-phase and W-phase flow simultaneously (overlap). However, in both cases, whether the resonant currents of the U-phase and W-phase flow simultaneously or the resonant currents of the U-phase and V-phase flow simultaneously, the shift by the second control operation is performed using the same approach (algorithm) as when the system determines that the resonant currents of the U-phase and V-phase flow simultaneously.

[0217] (3) Advantages In the power converter 100C according to Embodiment 4, the control system 50C includes a control device 51C and a signal generation circuit 52C. The control device 51C outputs a plurality of first PWM signals SU1, SV1, SW1 for controlling a plurality of first switching elements 1 and a plurality of second PWM signals SU2, SV2, SW2 for controlling a plurality of second switching elements 2. The signal generation circuit 52C provides a control signal to each of the plurality of switches 8. The control device 51C sets a second dead time period Td2 as a dead time period, which is obtained by adding a variable time Tp1 (additional time Tad) to a first dead time period Td1 that is set in advance so that the ON periods of the first switching elements 1 and the second switching elements 2 do not overlap. The variable time Tp1 (additional time Tad) is determined according to the current value of the load current, the inductance of the resonant inductor L1 and the voltage value of the regenerative capacitor 15. The signal generation circuit 52C generates a control signal for each of the multiple switches 8 that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10.

[0218] With the above configuration, it is possible to stop zero-voltage soft switching without pulse width modulation of the control signals to each of the multiple switches 8 for zero-voltage soft switching. Furthermore, with the above configuration, since the control system 50C has a control device 51C and a signal generation circuit 52C, zero-voltage soft switching can be realized more reliably without the control device 51C directly controlling the multiple switches 8 for zero-voltage soft switching. More specifically, there is no need for the control device 51C to generate control signals for directly controlling the multiple switches 8 for zero-voltage soft switching, and zero-voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 can be realized without the control device 51C directly controlling the multiple switches 8. Furthermore, with the above configuration, when the control system 50C determines that a resonant current flows simultaneously through two of the multiple switches 8 to the resonant inductor L1 when the duty cycle command value of one of the three phases of the two-phase modulation method (du, dv, dw) is fixed to a constant value, the control system 50C can achieve zero-voltage soft switching of the target switching element corresponding to the switch 8 that performs the first control operation. This allows the control system 50C to stop the zero-voltage soft switching of the target switching element corresponding to the first switch that performs the second control operation without pulse width modulation of the control signals to each of the multiple switches 8 used for zero-voltage soft switching.

[0219] Furthermore, in the power converter 100C, the signal generation circuit 52C generates a control signal for each of the multiple switches 8 using either the first PWM signal to the first switching element 1 of the corresponding switching circuit 10 or the second PWM signal to the second switching element 2.

[0220] The above configuration makes it possible to simplify the signal generation circuit 52.

[0221] Furthermore, in the power converter 100C, the signal generation circuit 52C includes multiple logic circuits 521C to 526C, but does not include a microcontroller.

[0222] The above configuration makes it possible to simplify the signal generation circuit 52C.

[0223] In the power converter 100C, for example, the control device 51C may have a function to detect a fault in the power conversion circuit 11, and may be configured to stop zero-voltage soft switching when a fault is detected. Furthermore, the power converter 100C may be configured to perform a second control operation to improve efficiency.

[0224] (4) Modified Control System 50C, in the first control operation, overlaps at least a portion of the high-level period of the control signal to each of the multiple switches 8 corresponding to each of the multiple switching circuits 10 with the second dead time period Td2 set between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the multiple switching circuits 10. In the second control operation, the control system 50C shifts the high-level period of the control signal to shorten the overlap period between the high-level period of the control signal given to each of the multiple switches 8 and the second dead time period Td2 compared to the first control operation, so that a portion of the high-level period of the control signal overlaps with the high-level period of the first PWM signal or the second PWM signal to the target switching element.

[0225] (Embodiment 5) Hereinafter, the power converter 100D according to Embodiment 5 will be described with reference to Figure 20.

[0226] (1) Configuration of the power converter The power converter 100D according to Embodiment 5 differs from the power converter 100 according to Embodiment 1 in that, as shown in Figure 20, it is equipped with a signal generation circuit 52D instead of the signal generation circuit 52 of the power converter 100 according to Embodiment 1. With respect to the power converter 100D according to Embodiment 5, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0227] In this embodiment, the signal generation circuit 52D includes a PLD (Programmable Logic Device) 520 and a plurality of gate drive circuits 531 to 536 (see Figure 2). The signal generation circuit 52D is equipped with the PLD 520 instead of the plurality of logic circuits 521 to 526 (see Figure 2) of the signal generation circuit 52.

[0228] The signal generation circuit 52D, like the signal generation circuit 52, provides each of the multiple switches 8 with a control signal whose potential changes between a high level and a low level. For each of the multiple switches 8, the signal generation circuit 52D generates a control signal that has a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10.

[0229] The signal generation circuit 52D, like the signal generation circuit 52, makes the start time of the high-level period of the control signal generated for each of the multiple switches 8 follow the start timing of the second dead time period Td2. In this embodiment, the signal generation circuit 52D synchronizes the start time of the high-level period of the control signal for each of the multiple switches 8 with the start time of the second dead time period Td2. In this embodiment, the length of the high-level period of the control signal for each of the multiple switches 8 is longer than the length of the second dead time period Td2.

[0230] In the signal generation circuit 52D, the PLD 520 generates a control signal for each of the multiple switches 8 using a first PWM signal to the first switching element 1 and a second PWM signal to the second switching element 2 of the corresponding switching circuit 10 among the multiple switching circuits 10. For each of the multiple switches 8, the PLD 520 generates a control signal having a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10.

[0231] In the signal generation circuit 52D, the PLD 520 causes the start time of the high-level period of the control signal generated for each of the multiple switches 8 to follow the start timing of the second dead time period Td2. In this embodiment, the signal generation circuit 52D is configured such that the PLD 520 synchronizes the start time of the high-level period of the control signal to each of the multiple switches 8 with the start time of the second dead time period Td2. In this embodiment, the length of the high-level period of the control signal to each of the multiple switches 8 is longer than the length of the second dead time period Td2.

[0232] (2) The operation of the power converter's control device 51 is the same as the operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0233] Furthermore, the operation of the signal generation circuit 52D is the same as the relationship between the input and output of the signal generation circuit 52 described in Embodiment 1, so the explanation will be omitted.

[0234] (3) Advantages The power converter 100D according to Embodiment 5 has the same advantages as the power converter 100 according to Embodiment 1.

[0235] (Embodiment 6) The power converter 100E according to Embodiment 6 will be described below with reference to Figures 21 to 24.

[0236] (1) Configuration of the power converter The power converter 100E according to Embodiment 6 differs from the power converter 100 according to Embodiment 1 in that, as shown in Figure 21, it is equipped with a control device 51E instead of the control device 51 of the power converter 100 according to Embodiment 1. With respect to the power converter 100E according to Embodiment 6, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0237] In this embodiment, the control device 51E generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on three-phase duty command values ​​du, dv, dw (see Figure 22) of a two-phase modulation scheme. This embodiment differs from Embodiment 1 in that the two-phase modulation scheme is a bottom-tagged two-phase modulation scheme.

[0238] The control device 51E generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 using three-phase duty cycle command values ​​du, dv, dw (see Figure 22) and a triangular wave carrier signal CA1 (see Figure 2). More specifically, the control device 51E generates the first PWM signal SU1 and the second PWM signal SU2 to be supplied to the first switching element 1U and the second switching element 2U, respectively, based on the carrier signal CA1 and the duty cycle command value du. The control device 51E also generates the first PWM signal SV1 and the second PWM signal SV2 to be supplied to the first switching element 1V and the second switching element 2V, respectively, based on the carrier signal CA1 and the V-phase duty cycle command value dv. Furthermore, the control device 51E generates a first PWM signal SW1 and a second PWM signal SW2 to be supplied to the first switching element 1W and the second switching element 2W, respectively, based on the carrier signal CA1 and the W-phase duty command value dw. In this embodiment, the control device 51E, like the control device 51, sets the maximum value of the carrier signal CA1 (see Figure 2) to 0.5 and the minimum value to -0.5. Also, like the control device 51, the control device 51E sets the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 0.5 and the minimum value to -0.5. Alternatively, the control device 51E may set the maximum value of the carrier signal CA1 to 1 and the minimum value to 0, and the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 1 and the minimum value to 0. Furthermore, the control device 51E may set the maximum and minimum values ​​of the carrier signal CA1 to values ​​other than 1 and 0, respectively, and the maximum and minimum values ​​of the three-phase duty cycle command values ​​du, dv, and dw to values ​​other than 1 and 0, respectively. Also, the waveform of the carrier signal CA1 is not limited to a triangular wave, but may be a sawtooth wave, for example.

[0239] The control device 51E, like the control device 51, uses the three-phase duty cycle reference values ​​du0, dv0, and dw0 (see Figure 2) for the three-phase modulation scheme to determine the three-phase duty cycle command values ​​du, dv, and dw for the two-phase modulation scheme.

[0240] The control device 51E, like the control device 51, sets the dead time period between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the plurality of switching circuits 10 to a second dead time period Td2, which is determined by the first dead time period Td1 and a predetermined time (additional time). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length equal to the length of the first dead time period Td1 plus a predetermined time (the sum of the length of the first dead time period Td1 and the length of the predetermined time). In other words, the control device 51E uses the second dead time period Td2, which is the first dead time period Td1 extended by a predetermined time, as the dead time period.

[0241] (2) Operation of the power converter (2.1) Basic operation The basic operation of the control device 51E is the same as the basic operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0242] (2.2) When the operation control device 51E determines that two-phase resonant currents are flowing simultaneously, if it determines that the duty cycle command value of one of the three-phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, and that resonant currents corresponding to two of the multiple switching circuits 10 are flowing simultaneously through the resonant inductor L1, then it performs a first operation, and then a second operation, when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10. "When the duty cycle command value of one of the three-phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value" in this embodiment means when the duty cycle command value of one of the three-phase duty cycle command values ​​du, dv, and dw of the bottom-tacked two-phase modulation method is fixed to a constant value (minimum value), and in the example of Figure 22, it means when the duty cycle command value of one phase is fixed to -0.5. "When it is determined that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously" means when it is presumed that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1. For the sake of explanation, below, "the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1" may also be referred to as "two-phase resonant currents flowing simultaneously through the resonant inductor L1."

[0243] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously The power converter 100E generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the bottom-stick two-phase modulation method, as shown in Figure 22, the two-phase duty command values ​​approach each other every 60° of electrical angle (see regions A21, A22, and A23 in Figure 22), and the duty cycles of the two-phase control signals become the same or close to each other.

[0244] Figure 23 shows an example of boundary conditions for the cases where the resonant currents of the V-phase and W-phase do not overlap (do not flow simultaneously) and overlap (flow simultaneously). These boundary conditions will be explained with reference to Figure 23.

[0245] In the power converter 100E, if the time difference ΔTvw is Tres / 2 or greater, the resonant current of the V phase and the resonant current of the W phase do not overlap, and if the time difference ΔTvw is less than Tres / 2, the resonant current of the V phase and the resonant current of the W phase overlap. The time difference ΔTvw is the time difference between the start of the high-level period of the first PWM signal SW1 and the start of the high-level period of the first PWM signal SV1.

[0246] The control device 51E has set a threshold value for the time difference ΔTvw to Tres / 2 (in this embodiment, the first dead time period Td1 = Tres / 2). The control device 51E estimates (determines) that if the time difference ΔTvw is less than Tres / 2, the resonant current of the W phase and the resonant current of the V phase flow simultaneously in the resonant inductor L1. The above threshold setting is just an example, and it may be set to a different value. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Also, the method for calculating the time difference ΔTvw used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and any other calculation method that can calculate a time difference equivalent to the time difference ΔTvw may be used. For example, the time difference ΔTvw used to determine whether or not two-phase resonant currents flow simultaneously may be the time difference between the end of the high-level period of the second PWM signal SW2 and the end of the high-level period of the second PWM signal SV2.

[0247] In the power converter 100E, if the time difference ΔTuw is Tres / 2 or greater, the resonant current of the U phase and the resonant current of the W phase do not overlap in the resonant inductor L1, and if the time difference ΔTuw is less than Tres / 2, the resonant current of the U phase and the resonant current of the W phase overlap. The time difference ΔTuw is the time difference between the start of the high-level period of the first PWM signal SU1 and the start of the high-level period of the first PWM signal SW1.

[0248] The control device 51E has set a threshold value for the time difference ΔTuw to Tres / 2. The control device 51E estimates (determines) that the U-phase resonant current and the W-phase resonant current flow simultaneously in the resonant inductor L1 if the time difference ΔTuw is less than Tres / 2. The above threshold setting is just an example, and it may be set to a different value. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Furthermore, the method for calculating the time difference ΔTuw used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and any other calculation method that can calculate a time difference equivalent to the time difference ΔTuw may be used. For example, as the time difference ΔTuw used to determine whether the two-phase resonant currents flow simultaneously, the time difference between the end of the high-level period of the second PWM signal SU2 and the end of the high-level period of the second PWM signal SW2 may be used.

[0249] In the power converter 100E, if the time difference ΔTuv is Tres / 2 or greater, the resonant current of the U-phase and the resonant current of the V-phase do not overlap in the resonant inductor L1, and if the time difference ΔTuv is less than Tres / 2, the resonant current of the U-phase and the resonant current of the V-phase overlap. The time difference ΔTuv is the time difference between the start of the high-level period of the first PWM signal SU1 and the start of the high-level period of the first PWM signal SV1.

[0250] The control device 51E has set a threshold value for the time difference ΔTuv to Tres / 2. The control device 51E estimates (determines) that the U-phase resonant current and the V-phase resonant current flow simultaneously in the resonant inductor L1 if the time difference ΔTuv is less than Tres / 2. The above threshold setting is just an example, and it may be set to a different value. For example, considering errors in the value of Tres / 2, the threshold may be set to a value even larger than Tres / 2. Furthermore, the method for calculating the time difference ΔTuv used to determine whether the two-phase resonant currents flow simultaneously is not limited to the above example, and any other calculation method that can calculate a time difference equivalent to the time difference ΔTuv may be used. For example, as the time difference ΔTuv used to determine whether the two-phase resonant currents flow simultaneously, the time difference between the end of the high-level period of the second PWM signal SU2 and the end of the high-level period of the second PWM signal SV2 may be used.

[0251] (2.2.2) When the first and second operation control device 51E determines that two-phase resonant currents are flowing simultaneously, for example, when it determines that the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1, it performs the first and second operations to shorten the period during which the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1.

[0252] When the control device 51E performs the first and second operations, it performs the first and second operations in such a way that the length of the first dead time period Td1 between the high-level period of the first PWM signal supplied to the first switching element 1 of the two switching circuits 10 and the high-level period of the second PWM signal supplied to the second switching element 2 does not change. Furthermore, for example, in the second operation, when the control device 51E shifts the high-level period of the first PWM signal SU1 supplied to the first switching element 1U of the switching circuit 10U or the high-level period of the second PWM signal SU2 supplied to the second switching element 2U, it shifts the high-level periods of the first PWM signal SU1 and the second PWM signal SU2 respectively, but does not change the duty cycles of the first PWM signal SU1 and the second PWM signal SU2 in one cycle of the carrier signal CA1. Furthermore, when the control device 51E shifts the high-level period of the first PWM signal SV1 supplied to the first switching element 1V of the switching circuit 10V or the high-level period of the second PWM signal SV2 supplied to the second switching element 2V, it shifts the high-level periods of the first PWM signal SV1 and the second PWM signal SV2, respectively, but does not change the duty cycles of the first PWM signal SV1 and the second PWM signal SV2 in one cycle of the carrier signal CA1. Furthermore, when the control device 51E shifts the high-level period of the first PWM signal SW1 supplied to the first switching element 1W of the switching circuit 10W or the high-level period of the second PWM signal SW2 supplied to the second switching element 2, it shifts the high-level periods of both the first PWM signal SW1 and the second PWM signal SW2, but does not change the duty cycles of the first PWM signal SW1 and the second PWM signal SW2 in one cycle of the carrier signal CA1. For the sake of explanation, in the following, the shift time of the high-level period of the first PWM signal SU1 or the second PWM signal SU2 when the high-level period of the first PWM signal SU1 or the second PWM signal SU2 is shifted will be denoted as Tsu. Furthermore, when shifting the high-level period of the first PWM signal SV1 or the second PWM signal SV2, the shift time of the high-level period of the first PWM signal SV1 or the second PWM signal SV2 is denoted as Tsv.Furthermore, when shifting the high-level period of the first PWM signal SW1 or the second PWM signal SW2, the shift time of the high-level period of the first PWM signal SW1 or the second PWM signal SW2 is defined as Tws.

[0253] The upper part of Figure 24 shows the timing chart when the control device 51E has determined in advance that the resonant currents of the V-phase and W-phase flow simultaneously during the period corresponding to region A23 in Figure 22. Here, the upper part of Figure 24 shows the timing chart of the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signal SV6, the control signal SW6, the load current iV, the load current iW, and the current iL1 before the shift. The lower part of Figure 24 shows the timing chart when the control device 51E has performed both the first and second operations (hereinafter also referred to as "after the shift") during the period corresponding to region A23 in Figure 22. In the lower section of Figure 24, the timing charts for the shifted first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV6, control signal SW6, load current iv, load current iW, and current iL1 are shown. In the example of Figure 24, the polarity of the load currents iv and iW flowing through the two AC terminals 41V and 41W connected to the two switching circuits 10V and 10W is positive, and the absolute value of the load current iW is greater than the absolute value of the load current iv. Note that Figure 24 shows the timing chart for a portion of the period within one cycle of the carrier signal CA1.

[0254] In the example shown in Figure 24, when the control device 51E performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the second PWM signal SV2 to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 24, the control device 51E sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0255] Furthermore, when the control device 51E performs the second operation, it shifts the high-level period of the second PWM signal SV2 in the direction of delaying by a shift time Tsv. At this time, the control device 51E sets time ta as the start of the high-level period of the control signal SW6 to the switch 8W, and shifts the high-level period of the control signal SV6 to the switch 8V to each of the high-level periods of the first PWM signal SV1 to the first switching element 1V and the high-level period of the second PWM signal SV2 to the second switching element 2V in the direction of delaying by a shift time Tsv, so that the high-level period of the control signal SV6 to the switch 8V starts at time tc, which is a time Tdef after time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches an extreme value (maximum value in the example of Figure 24) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W. The control device 51E determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51E determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 24, ΔT is the value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the first PWM signal SW1 to the first switching element 1W and the end of the high-level period of the second PWM signal SV2 to the second switching element 2V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100E, zero-voltage soft switching of the first switching element 1V becomes possible if the high-level period of the control signal SV6 to the switch 8V is equal to or greater than the resonant half-period (Tres / 2), even if it does not include the additional time Tadv.

[0256] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 24, in the power converter 100E, if the control device 51E determines in advance that two-phase resonant currents of the V-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100E, if the control device 51E determines in advance that two-phase resonant currents of the U-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and W-phase by performing the first and second operations, thereby achieving soft switching.

[0257] In the power converter 100E, if the control device 51E does not perform the first and second operations, the voltages V1v and V1w across the first switching elements 1V and 1W do not decrease to zero at the point when the first PWM signals SV1 and SW1 change from a low-level period to a high-level period (the point at which the dead time periods corresponding to the V-phase and W-phase, respectively, end). As a result, the switching of the first switching elements 1V and 1W becomes hard switching.

[0258] In contrast, when the control device 51E performs the first and second operations, the voltages V1v and V1w across the first switching elements 1V and 1W decrease to zero at the point when the first PWM signals SV1 and SW1 change from a low-level period to a high-level period (the point at which the dead time periods corresponding to the V-phase and W-phase, respectively, end. Therefore, in the power converter 100E, when the control device 51E performs the first and second operations, the switching of the first switching elements 1V and 1W becomes zero-voltage soft switching.

[0259] Figure 24 above shows an example in which the control device 51E executes the first and second operations when it has previously determined that the V-phase resonant current and the W-phase resonant current flow simultaneously through the resonant inductor L1, but it is not limited to this. For example, if the control device 51E has previously determined that the U-phase resonant current and the W-phase resonant current flow simultaneously through the resonant inductor L1, or if it has previously determined that the U-phase resonant current and the V-phase resonant current flow simultaneously through the resonant inductor L1, the control device 51E can also execute the first and second operations, thereby enabling zero-voltage soft switching.

[0260] The first and second operations of the control device 51E can be generalized as follows:

[0261] When the control device 51E performs the first operation, it shortens the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51E performs the second operation, it shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51E sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 to time tc, which is timed by a standby period Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0262] (3) Advantages In the power converter 100E according to Embodiment 6, when the control device 51E determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, the control device 51E performs a first operation when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10, and then performs a second operation. The first operation is an operation to shorten the second dead time period Td2 for the first switching circuit 10 by a shortening period Tred. The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of either the first switching circuit 10 or the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts after a standby period Tdef from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10.

[0263] With the above configuration, when the control device 51E determines that resonant currents corresponding to two of the multiple switching circuits 10 are simultaneously flowing through the resonant inductor L1, it performs a first operation and then a second operation, thereby enabling more reliable soft switching. Furthermore, in the power converter 100E, the control device 51E generates multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the two-phase modulation method, thereby reducing switching losses.

[0264] Furthermore, in the power converter 100E according to Embodiment 6, when the control device 51E sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the second PWM signal to the second switching element 2. Also, when the control device 51E sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first PWM signal to the first switching element 1.

[0265] With the above configuration, it becomes possible to achieve zero-voltage soft switching while further reducing dead time loss and dead time error.

[0266] (Embodiment 7) The power converter 100F according to Embodiment 7 will be described below with reference to Figures 25 to 28.

[0267] (1) Configuration of the power converter The power converter 100F according to Embodiment 7 differs from the power converter 100 according to Embodiment 1 (see Figure 1) in that it is equipped with a control device 51F instead of the control device 51, as shown in Figure 25. With respect to the power converter 100F according to Embodiment 7, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0268] In this embodiment, the control device 51F generates a plurality of first PWM signals and a plurality of second PWM signals based on the three-phase duty command values ​​du, dv, and dw of the two-phase modulation scheme (see Figure 26). This embodiment differs from Embodiment 1 in that the two-phase modulation scheme is an upper and lower fixed two-phase modulation scheme.

[0269] The control device 51F generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 using three-phase duty cycle command values ​​du, dv, dw (see Figure 26) and a triangular wave carrier signal CA1 (see Figure 2). More specifically, the control device 51F generates the first PWM signal SU1 and the second PWM signal SU2 to be supplied to the first switching element 1U and the second switching element 2U, respectively, based on the carrier signal CA1 and the duty cycle command value du. The control device 51F also generates the first PWM signal SV1 and the second PWM signal SV2 to be supplied to the first switching element 1V and the second switching element 2V, respectively, based on the carrier signal CA1 and the V-phase duty cycle command value dv. Furthermore, the control device 51F generates a first PWM signal SW1 and a second PWM signal SW2 to be supplied to the first switching element 1W and the second switching element 2W, respectively, based on the carrier signal CA1 and the W-phase duty command value dw. In this embodiment, the control device 51F sets the maximum value of the carrier signal CA1 (see Figure 2) to 0.5 and the minimum value to -0.5, similar to the control device 51 of Embodiment 1 (see Figure 1). Also, the control device 51F sets the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 0.5 and the minimum value to -0.5, similar to the control device 51. Alternatively, the control device 51F may set the maximum value of the carrier signal CA1 to 1 and the minimum value to 0, and the maximum value of each of the three-phase duty command values ​​du, dv, and dw to 1 and the minimum value to 0. Furthermore, the control device 51F may set the maximum and minimum values ​​of the carrier signal CA1 to values ​​other than 1 and 0, respectively, and the maximum and minimum values ​​of the three-phase duty cycle command values ​​du, dv, and dw to values ​​other than 1 and 0, respectively. Also, the waveform of the carrier signal CA1 is not limited to a triangular wave, but may be a sawtooth wave, for example.

[0270] The control device 51F, like the control device 51 of Embodiment 1 and the control device 51E of Embodiment 6 (see Figure 21), uses the three-phase duty reference values ​​du0, dv0, and dw0 of the three-phase modulation method (see Figure 2) to determine the three-phase duty command values ​​du, dv, and dw of the two-phase modulation method.

[0271] The control device 51F, similar to the control device 51 of Embodiment 1, sets the dead time period between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the plurality of switching circuits 10 to a second dead time period Td2, which is determined by the first dead time period Td1 and a predetermined time (additional time). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length equal to the length of the first dead time period Td1 plus a predetermined time (the sum of the length of the first dead time period Td1 and the length of the predetermined time).

[0272] (2) Operation of the power converter (2.1) Basic operation The basic operation of the control device 51F is the same as the basic operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0273] (2.2) When the operation control device 51F determines that two-phase resonant currents are flowing simultaneously, for example, when the duty cycle command value of one of the three-phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, and the operation control device 51F determines that resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1, the operation control device 51F determines that one of the two switching circuits 10 is the first switching circuit 10 and the other is the second switching circuit 10, and then performs the first operation, and further performs the second operation. "When the duty cycle command value of one of the three phases of duty cycle command values ​​du, dv, and dw in a two-phase modulation scheme is fixed to a constant value" means, in this embodiment, when the duty cycle command value of one of the three phases of duty cycle command values ​​du, dv, and dw in an upper-lower fixed two-phase modulation scheme is fixed to a constant value (maximum or minimum value). In the example of Figure 26, this includes the case where the duty cycle command value of one phase is fixed to 0.5 and the case where the duty cycle command value of one phase is fixed to -0.5. "When it is determined that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously" means when it is estimated in advance that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1. Hereafter, for the sake of convenience in explanation, "the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1" may be referred to as "two phases of resonant current flowing simultaneously through the resonant inductor L1".

[0274] The first operation is to shorten the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 in the first switching circuit 10 by a shortening period called Tred (see Figures 27 and 28).

[0275] The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of at least one of the first switching circuit 10 and the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts a delay of a standby period Tdef (see Figures 27 and 28) from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The standby period Tdef is calculated by the formula Tdef = L × (absolute value of the difference between the load current corresponding to the first switching circuit 10 and the load current corresponding to the second switching circuit 10) / V15, where L is the inductance of the resonant inductor L1 and V15 is the voltage of the regenerative capacitor 15.

[0276] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously The power converter 100F determines whether two-phase resonant currents flow simultaneously. The control device 51F generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the upper and lower fixed two-phase modulation method. As shown in Figure 26, the two-phase duty command values ​​approach each other at electrical angles of 60° (see regions A31, A32, A33, A34, A35, and A36 in Figure 26), and the duty cycles of the two-phase control signals become the same or close to each other. Each waveform (modulated wave) of the three-phase duty command values ​​du, dv, dw of the upper and lower fixed two-phase modulation method has a first linear portion that is constant at the maximum value and a second linear portion that is constant at the minimum value.

[0277] The boundary conditions for whether the two-phase (V-phase and W-phase) resonant currents overlap in region A32 can be determined in the same way as for region A11 in Embodiment 1 (see Figure 10). The diagram illustrating an example of the boundary conditions for the cases where the V-phase resonant current and the W-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) is the same as Figure 9 explained in Embodiment 1, so the explanation is omitted. The boundary conditions for whether the two-phase (U-phase and W-phase) resonant currents overlap in region A34 can be determined in the same way as for region A12 in Embodiment 1 (see Figure 10). Similarly, the boundary conditions for whether the two-phase (U-phase and V-phase) resonant currents overlap in region A36 can be determined in the same way as for region A13 in Embodiment 1 (see Figure 10).

[0278] The boundary conditions for whether the two-phase (V-phase and W-phase) resonant currents overlap in region A35 can be determined in the same way as for region A23 in Embodiment 6 (see Figure 22). The diagram illustrating an example of the boundary conditions for the cases where the W-phase resonant current and the V-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) is the same as Figure 23 explained in Embodiment 6, so the explanation is omitted. The boundary conditions for whether the two-phase (U-phase and W-phase) resonant currents overlap in region A31 can be determined in the same way as for region A21 in Embodiment 6 (see Figure 22). Similarly, the boundary conditions for whether the two-phase (U-phase and V-phase) resonant currents overlap in region A33 can be determined in the same way as for region A22 in Embodiment 6 (see Figure 22).

[0279] (2.2.2) First and second operations when it is determined that two-phase resonant currents flow simultaneously (2.2.2.1) When the polarity of the current flowing through the resonant inductor L1 is negative The upper part of Figure 27 shows the timing chart when the control device 51F has determined in advance that two-phase resonant currents of the V-phase and W-phase flow simultaneously during the period corresponding to region A32 in Figure 26. Here, the upper part of Figure 27 shows the timing chart of the first PWM signal SU1, first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV7, control signal SW7, load current iV, load current iW, and current iL1 before the shift. The lower part of Figure 27 shows the timing chart when the control device 51F has performed both the first and second operations (hereinafter also referred to as after the shift) during the period corresponding to region A32 in Figure 26. In the lower part of Figure 27, the timing charts of the shifted first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV7, control signal SW7, load current iV, load current iW, current iL1, voltage V2v across the second switching element 2V, and voltage V2w across the second switching element 2W are shown. In the example of Figure 27, the polarity of the load currents iV and iW flowing through the two AC terminals 41V and 41W connected to the two switches 8V and 8W is negative, and the absolute value of the load current iV is smaller than the absolute value of the load current iW.

[0280] In the example shown in Figure 27, when the control device 51F performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the first PWM signal SV1 to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 27, the control device 51F sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0281] Furthermore, when the control device 51F performs the second operation, it shifts the high-level period of the first PWM signal SV1 in the direction of delaying by a shift time Tsv. At this time, the control device 51F takes time ta as the point at which the high-level period of the control signal SW7 to the switch 8W begins, and shifts the high-level period of the control signal SV7 to the switch 8V to each of the high-level periods of the first PWM signal SV1 to the first switching element 1V and the high-level period of the second PWM signal SV2 to the second switching element 2V in the direction of delaying by a shift time Tsv, so that the high-level period of the control signal SV7 to the switch 8V begins at time tc, which is a time Tdef after time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches its extreme value (minimum value in the example of Figure 27) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W. The control device 51F determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51F determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 27, ΔT is the value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the second PWM signal SW2 to the second switching element 2W and the end of the high-level period of the first PWM signal SV1 to the first switching element 1V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100F, zero-voltage soft switching of the second switching element 2V becomes possible if the high-level period of the control signal SV7 to the switch 8V is equal to or greater than the resonant half-period (Tres / 2), even if it does not include the additional time Tadv.

[0282] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 27, in the power converter 100F, if the control device 51F determines in advance that two-phase resonant currents of the V-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100F, if the control device 51F determines in advance that two-phase resonant currents of the U-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and W-phase by performing the first and second operations, thereby achieving soft switching.

[0283] The first and second operations of the control device 51F can be generalized as follows.

[0284] When the control device 51F performs the first operation, it shortens the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51F performs the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51F sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 to time tc, which is time Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10, so that the ON period of the switch 8 corresponding to the first switching circuit 10 among the multiple switches 8 begins at time t. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0285] (2.2.2.2) When the polarity of the current flowing through the resonant inductor L1 is positive, the upper part of Figure 28 shows the timing chart when the control device 51F has determined in advance that the resonant currents of the two phases, the V phase and the W phase, will flow simultaneously during the period corresponding to region A35 in Figure 26. Here, the upper part of Figure 28 shows the timing chart of the second PWM signal SU2, the first PWM signal SV1, the second PWM signal SV2, the first PWM signal SW1, the second PWM signal SW2, the control signal SV6, the control signal SW6, the load current iV, the load current iW, and the current iL1 before the shift. The lower part of Figure 28 shows the timing chart when the control device 51F has performed both the first and second operations during the period corresponding to region A35 in Figure 26 (hereinafter also referred to as "after the shift"). In the lower section of Figure 28, the timing charts for the shifted first PWM signal SV1, second PWM signal SV2, first PWM signal SW1, second PWM signal SW2, control signal SV6, control signal SW6, load current iv, load current iW, and current iL1 are shown. In the example of Figure 28, the polarity of the load currents iv and iW flowing through the two AC terminals 41V and 41W connected to the two switching circuits 10V and 10W is positive, and the absolute value of the load current iW is greater than the absolute value of the load current iv. Note that Figure 28 shows the timing chart for a portion of the period within one cycle of the carrier signal CA1.

[0286] In the example shown in Figure 28, when the control device 51F performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the second PWM signal SV2 to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 28, the control device 51F sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0287] Furthermore, when the control device 51F performs the second operation, it shifts the high-level period of the second PWM signal SV2 in the direction of delaying by a shift time Tsv. At this time, the control device 51F takes time ta as the point in time when the high-level period of the control signal SW6 to the switch 8W begins, and shifts the high-level period of the control signal SV6 to the switch 8V to time tc, which is a delay Tdef from time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches an extreme value (maximum value in the example of Figure 28) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W, by a shift time Tsv, so that the high-level period of the control signal SV6 to the switch 8V begins at time tc, which is a delay Tdef from time tb. The control device 51F determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51F determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 28, ΔT is the value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the first PWM signal SW1 to the first switching element 1W and the end of the high-level period of the first PWM signal SV1 to the first switching element 1V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100F, zero-voltage soft switching of the first switching element 1V becomes possible if the high-level period of the control signal SV6 to the switch 8V is equal to or greater than the resonant half-period (Tres / 2), even if it does not include the additional time Tadv.

[0288] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 28, in the power converter 100F, if the control device 51F determines in advance that two-phase resonant currents of the V-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100F, if the control device 51F determines in advance that two-phase resonant currents of the U-phase and W-phase will flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and W-phase by performing the first and second operations, thereby achieving soft switching.

[0289] The first and second operations of the control device 51F can be generalized as follows.

[0290] When the control device 51F performs the first operation, it shortens the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51F performs the second operation, it shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51F sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 to time tc, which is time Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10, so that the ON period of the switch 8 corresponding to the first switching circuit 10 among the multiple switches 8 begins. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0291] (3) Advantages In the power converter 100F according to Embodiment 7, when the control device 51F determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phase duty cycle command values ​​du, dv, and dw of the two-phase modulation method is fixed to a constant value, the control device 51F performs a first operation when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10, and then performs a second operation. The first operation is an operation to shorten the second dead time period Td2 for the first switching circuit 10 by a shortening period Tred. The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of either the first switching circuit 10 or the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts after a standby period Tdef from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10.

[0292] With the above configuration, the control device 51F performs a first operation and then a second operation when it determines that resonant currents corresponding to two of the multiple switching circuits 10 are simultaneously flowing through the resonant inductor L1, thereby enabling more reliable soft switching. Furthermore, in the power converter 100F, the control device 51F generates multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2 based on the three-phase duty command values ​​du, dv, dw of the two-phase modulation method, thereby reducing switching losses.

[0293] (Embodiment 8) The power conversion device 100G according to Embodiment 8 will be described below with reference to Figures 29 to 33.

[0294] (1) Configuration of the power converter The power converter 100G according to Embodiment 8 differs from the power converter 100 according to Embodiment 1 (see Figure 1) in that it is equipped with a control device 51G instead of the control device 51, as shown in Figure 29. With respect to the power converter 100G according to Embodiment 8, the same reference numerals are used for components that are the same as those in the power converter 100 according to Embodiment 1, and their descriptions are omitted.

[0295] In this embodiment, the control device 51G generates a plurality of first PWM signals SU1, SV1, SW1 and a plurality of second PWM signals SU2, SV2, SW2 based on three-phase duty command values ​​du, dv, dw of a three-phase modulation scheme as shown in Figure 30.

[0296] The control device 51G, similar to the control device 51, generates a first PWM signal SU1 and a second PWM signal SU2 to be supplied to the first switching element 1U and the second switching element 2U, respectively, based on the carrier signal CA1 and the duty cycle command value du. The control device 51G also generates a first PWM signal SV1 and a second PWM signal SV2 to be supplied to the first switching element 1V and the second switching element 2V, respectively, based on the carrier signal CA1 and the duty cycle command value dv of the V phase. The control device 51G also generates a first PWM signal SW1 and a second PWM signal SW2 to be supplied to the first switching element 1W and the second switching element 2W, respectively, based on the carrier signal CA1 and the duty cycle command value dw of the W phase.

[0297] The control device 51G compares the duty cycle command value du with the carrier signal CA1 and generates a first PWM signal SU1 that is high level when the duty cycle command value du is greater than the carrier signal CA1 and low level when the duty cycle command value du is less than or equal to the carrier signal CA1. The control device 51G also inverts the first PWM signal SU1 to generate a second PWM signal SU2. Furthermore, the control device 51G sets a dead time period between the high-level period of the first PWM signal SU1 and the high-level period of the second PWM signal SU2 so that the on-periods of the first switching element 1U and the on-periods of the second switching element 2U do not overlap.

[0298] The control device 51G compares the duty cycle command value dv with the carrier signal CA1 and generates a first PWM signal SV1 that is high level when the duty cycle command value dv is greater than the carrier signal CA1 and low level when the duty cycle command value dv is less than or equal to the carrier signal CA1. The control device 51G also inverts the first PWM signal SV1 to generate a second PWM signal SV2. Furthermore, the control device 51G sets a dead time period between the high-level period of the first PWM signal SV1 and the high-level period of the second PWM signal SV2 so that the on-period of the first switching element 1V and the on-period of the second switching element 2V do not overlap.

[0299] The control device 51G compares the duty cycle command value dw with the carrier signal CA1 and generates a first PWM signal SW1 that is high level when the duty cycle command value dw is greater than the carrier signal CA1 and low level when the duty cycle command value dw is less than or equal to the carrier signal CA1. The control device 51G also inverts the first PWM signal SW1 to generate a second PWM signal SW2. Furthermore, the control device 51G sets a dead time period between the high-level period of the first PWM signal SW1 and the high-level period of the second PWM signal SW2 so that the on-periods of the first switching element 1W and the on-periods of the second switching element 2W do not overlap.

[0300] The control device 51G, like the control device 51, sets the dead time period between the high-level period of the first PWM signal to the first switching element 1 and the high-level period of the second PWM signal to the second switching element 2 for each of the plurality of switching circuits 10 to a second dead time period Td2, which is determined by the first dead time period Td1 and a predetermined time (additional time). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length equal to the length of the first dead time period Td1 plus a predetermined time (the sum of the length of the first dead time period Td1 and the length of the predetermined time). In other words, the control device 51 uses the second dead time period Td2, which is the first dead time period Td1 extended by a predetermined time, as the dead time period.

[0301] (2.1) The basic operation of the basic operation control device 51G is the same as the basic operation of the control device 51 described in Embodiment 1, so the explanation is omitted.

[0302] (2.2) When the operation control device 51G determines that two-phase resonant currents are flowing simultaneously, for example, when the duty cycle command value of one of the three-phase duty cycle command values ​​du, dv, and dw of the three-phase modulation method is fixed to a constant value due to a change in the state of the AC load RA1 (hereinafter also referred to as overmodulation), if the operation control device 51G determines that resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1, the operation control device 51G determines that one of the two switching circuits 10 is the first switching circuit 10 and the other is the second switching circuit 10, performs the first operation, and then performs the second operation. "When the duty cycle command value of one of the three phases of the three-phase modulation scheme's duty cycle command values ​​du, dv, and dw is fixed to a constant value" means, in this embodiment, when the duty cycle command value of one of the three phases of the three-phase modulation scheme's duty cycle command values ​​du, dv, and dw is fixed to a constant value (maximum or minimum value). In the example of Figure 31, this includes the case where the duty cycle command value of one phase is fixed to 0.5 and the case where the duty cycle command value of one phase is fixed to -0.5. "When it is determined that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously" means when it is estimated in advance that the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1. Hereafter, for the sake of convenience in explanation, "the resonant currents corresponding to each of the two switching circuits 10 flow simultaneously through the resonant inductor L1" may be referred to as "two phases of resonant current flowing simultaneously through the resonant inductor L1".

[0303] The first operation is to shorten the high-level period of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 in the first switching circuit 10 by a shortening period called Tred (see Figures 32 and 33).

[0304] The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of at least one of the first switching circuit 10 and the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts a delay of a standby period Tdef (see Figures 32 and 33) from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The standby period Tdef is calculated by the formula Tdef = L × (absolute value of the difference between the load current corresponding to the first switching circuit 10 and the load current corresponding to the second switching circuit 10) / V15, where L is the inductance of the resonant inductor L1 and V15 is the voltage of the regenerative capacitor 15.

[0305] (2.2.1) Determination of whether two-phase resonant currents flow simultaneously In the power converter 100G, during overmodulation, as shown in Figure 31, each waveform (modulated wave) of the three-phase duty command values ​​du, dv, and dw has a first linear section where it is constant at the maximum value and a second linear section where it is constant at the minimum value, and the two-phase duty command values ​​approach each other at electrical angles of 60° (see regions A31, A32, A33, A34, A35, and A36 in Figure 31), and the duty cycles of the two-phase control signals become the same or close to each other. Therefore, during overmodulation, each waveform (modulated wave) of the three-phase duty command values ​​du, dv, and dw becomes similar to the waveforms (modulated waves) of the three-phase duty command values ​​du, dv, and dw in the upper and lower fixed two-phase modulation method (see Figure 26).

[0306] The boundary conditions for whether the two-phase (V-phase and W-phase) resonant currents overlap in region A32 can be determined in the same way as for region A11 in Embodiment 1 (see Figure 10). The diagram illustrating an example of the boundary conditions for the cases where the W-phase resonant current and the V-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) is the same as Figure 9 explained in Embodiment 1, so the explanation is omitted. The boundary conditions for whether the two-phase (U-phase and W-phase) resonant currents overlap in region A34 can be determined in the same way as for region A12 in Embodiment 1 (see Figure 10). Similarly, the boundary conditions for whether the two-phase (U-phase and V-phase) resonant currents overlap in region A36 can be determined in the same way as for region A13 in Embodiment 1 (see Figure 10).

[0307] The boundary conditions for whether the two-phase (V-phase and W-phase) resonant currents overlap in region A35 can be determined in the same way as for region A23 in Embodiment 6 (see Figure 22). The diagram illustrating an example of the boundary conditions for the cases where the W-phase resonant current and the V-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) is the same as Figure 23 explained in Embodiment 6, so the explanation is omitted. The boundary conditions for whether the two-phase (U-phase and W-phase) resonant currents overlap in region A31 can be determined in the same way as for region A21 in Embodiment 6 (see Figure 22). Similarly, the boundary conditions for whether the two-phase (U-phase and V-phase) resonant currents overlap in region A33 can be determined in the same way as for region A22 in Embodiment 6 (see Figure 22).

[0308] (2.2.2) When the first and second operation control device 51G determines that two-phase resonant currents are flowing simultaneously, for example, when it determines that the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1, it performs the first and second operations to shorten the period during which the resonant currents corresponding to each of the two switching circuits 10 are flowing simultaneously through the resonant inductor L1.

[0309] When the control device 51G performs the first and second operations, it performs the first and second operations in such a way that the length of the first dead time period Td1 between the high-level period of the first PWM signal supplied to the first switching element 1 of the two switching circuits 10 and the high-level period of the second PWM signal supplied to the second switching element 2 does not change. Furthermore, for example, in the second operation, when the control device 51G shifts the high-level period of the first PWM signal SU1 supplied to the first switching element 1U of the switching circuit 10U or the high-level period of the second PWM signal SU2 supplied to the second switching element 2U, it shifts the high-level periods of the first PWM signal SU1 and the second PWM signal SU2 respectively, but does not change the duty cycles of the first PWM signal SU1 and the second PWM signal SU2 in one cycle of the carrier signal CA1 (see Figure 2). Furthermore, when the control device 51G shifts the high-level period of the first PWM signal SV1 supplied to the first switching element 1V of the switching circuit 10V or the high-level period of the second PWM signal SV2 supplied to the second switching element 2V, it shifts the high-level periods of the first PWM signal SV1 and the second PWM signal SV2, respectively, but does not change the duty cycles of the first PWM signal SV1 and the second PWM signal SV2 in one cycle of the carrier signal CA1. Furthermore, when the control device 51G shifts the high-level period of the first PWM signal SW1 supplied to the first switching element 1W of the switching circuit 10W or the high-level period of the second PWM signal SW2 supplied to the second switching element 2, it shifts the high-level periods of the first PWM signal SW1 and the second PWM signal SW2, respectively, but does not change the duty cycles of the first PWM signal SW1 and the second PWM signal SW2 in one cycle of the carrier signal CA1.

[0310] (2.2.2.1) When the polarity of the current flowing through the resonant inductor L1 is negative, the upper part of Figure 32 shows the timing chart when the control device 51G has determined in advance that the resonant currents of the two phases, the V phase and the W phase, will flow simultaneously during the period corresponding to region A32 in Figure 31. The lower part of Figure 32 shows the timing chart when the control device 51G has performed both the first operation and the second operation (hereinafter also referred to as "after shift") during the period corresponding to region A32 in Figure 31. The way to read Figure 32 is the same as Figure 27, so the explanation will be omitted.

[0311] In the example shown in Figure 32, when the control device 51G performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the first PWM signal SV1 to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 32, the control device 51G sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0312] Furthermore, when the control device 51G performs the second operation, it shifts the high-level period of the first PWM signal SV1 in the direction of delaying by a shift time Tsv. At this time, the control device 51G takes time ta as the point at which the high-level period of the control signal SW7 to the switch 8W begins, and shifts the high-level period of the control signal SV7 to the switch 8V to each of the high-level periods of the first PWM signal SV1 to the first switching element 1V and the high-level period of the second PWM signal SV2 to the second switching element 2V in the direction of delaying by a shift time Tsv, so that the high-level period of the control signal SV7 to the switch 8V begins at time tc, which is a time Tdef after time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches its extreme value (minimum value in the example of Figure 32) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W. The control device 51G determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51G determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 32, ΔT is the value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the second PWM signal SW2 to the second switching element 2W and the end of the high-level period of the first PWM signal SV1 to the first switching element 1V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100G, even if the high-level period of the control signal SV7 to the switch 8V does not include the additional time Tadv, if it is equal to or greater than the resonant half-period (Tres / 2), zero-voltage soft switching of the second switching element 2V becomes possible.

[0313] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 32, in the power converter 100G, if the control device 51G determines in advance that two-phase resonant currents of the V-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100G, if the control device 51G determines in advance that two-phase resonant currents of the U-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and W-phase by performing the first and second operations, thereby achieving soft switching.

[0314] The first and second operations of the control device 51G can be generalized as follows.

[0315] When the control device 51G performs the first operation, it shortens the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51G performs the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51G sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 to time tc, which is time Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10, so that the ON period of the switch 8 corresponding to the first switching circuit 10 among the multiple switches 8 begins at time t. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0316] (2.2.2.2) When the polarity of the current flowing through the resonant inductor L1 is positive, the upper part of Figure 33 shows the timing chart when the control device 51G has determined in advance that the resonant currents of the V phase and W phase will flow simultaneously during the period corresponding to region A35 in Figure 31. The lower part of Figure 33 shows the timing chart when the control device 51G has performed both the first operation and the second operation (hereinafter also referred to as "after shift") during the period corresponding to region A35 in Figure 31. The way to read Figure 33 is the same as Figure 28, so the explanation will be omitted.

[0317] In the example shown in Figure 33, when the control device 51G performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the second PWM signal SV2 to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 33, the control device 51G sets the length of the shortening period Tred to be the same as the length of the additional time Tadv.

[0318] Furthermore, when the control device 51G performs the second operation, it shifts the high-level period of the second PWM signal SV2 in the direction of delaying by a shift time Tsv. At this time, the control device 51G takes time ta as the point at which the high-level period of the control signal SW6 to the switch 8W begins, and shifts the high-level period of the control signal SV6 to the switch 8V to time tc, which is a delay Tdef from time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches an extreme value (maximum value in the example of Figure 33) and then coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W, by a shift time Tsv, so that the high-level period of the control signal SV6 to the switch 8V begins at time tc, which is a delay Tdef from time tb. The control device 51G determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51G determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 33, ΔT is a value obtained by subtracting the additional time Tadv from the time difference between the start of the high-level period of the first PWM signal SW1 to the first switching element 1W and the end of the high-level period of the second PWM signal SV2 to the second switching element 2V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100G, zero-voltage soft switching of the first switching element 1V becomes possible if the high-level period of the control signal SV6 to the switch 8V is equal to or greater than the resonant half-period (Tres / 2), even if it does not include the additional time Tadv.

[0319] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 33, in the power converter 100G, if the control device 51G determines in advance that two-phase resonant currents of the V-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the V-phase and the W-phase by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100G, if the control device 51G determines in advance that two-phase resonant currents of the U-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the resonant currents of the U-phase and the W-phase by performing the first and second operations, thereby achieving soft switching.

[0320] The first and second operations of the control device 51G can be generalized as follows.

[0321] When the control device 51G performs the first operation, it shortens the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51G performs the second operation, it shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51G sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the second PWM signal to the second switching element 2 of the first switching circuit 10 to time tc, which is time Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10, so that the ON period of the switch 8 corresponding to the first switching circuit 10 among the multiple switches 8 begins. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc will be equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0322] (3) Advantages In the power converter 100G according to Embodiment 8, when the control device 51G determines that a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1 when the duty cycle command value of one of the three phases of the three-phase modulation scheme, du, dv, and dw, is fixed to a constant value, the control device 51G performs a first operation and then a second operation when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10. The first operation is to shorten the second dead time period Td2 for the first switching circuit 10 by a shortening period Tred. The second operation is to shift the high-level periods of the first PWM signal to the first switching element 1 and the second PWM signal to the second switching element 2 of either the first switching circuit 10 or the second switching circuit 10, such that the ON period of the switch 8 corresponding to the first switching circuit 10 starts after a standby period Tdef from the point when the current value of the resonant current corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10.

[0323] With the above configuration, the control device 51G performs a first operation and then a second operation when it determines that resonant currents corresponding to two of the multiple switching circuits 10 are simultaneously flowing through the resonant inductor L1, thereby enabling more reliable soft switching.

[0324] (Embodiment 9) The power converter 100H according to Embodiment 9 will be described with reference to Figures 34 to 37. With respect to the power converter 100H according to Embodiment 9, components that are the same as those in the power converter 100 according to Embodiment 1 (see Figure 1) are denoted by the same reference numerals and their description is omitted.

[0325] (1) The configured power converter 100H differs from the power converter 100 in that, as shown in Figure 34, it is equipped with a control device 51H instead of the control device 51 of the power converter 100 of Embodiment 1 (see Figure 1).

[0326] In the power converter 100H, the control device 51H generates multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2, similar to the control device 51, to control multiple first switching elements 1 and multiple second switching elements 2.

[0327] When the control device 51H sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it lengthens the first dead time period Td1 by a predetermined time (additional time Tadu in the example of Figure 35) by advancing the end time of the high-level period of the second PWM signal to the second switching element 2 and delaying the start time of the high-level period of the first PWM signal to the first switching element 1. If the time for advancing the end time of the high-level period of the second PWM signal to the second switching element 2 is Ta21 (see Figure 35), and the time for delaying the start time of the high-level period of the first PWM signal to the first switching element 1 is Ta11 (see Figure 35), then the predetermined time (additional time) is Ta11 + Ta21. In the example of Figure 35, Ta11 = Ta21 = Tadu / 2.

[0328] When the control device 51H sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it lengthens the first dead time period Td1 by a predetermined time (additional time Tadu in the example of Figure 36) by advancing the end time of the high-level period of the first PWM signal to the first switching element 1 and delaying the start time of the high-level period of the second PWM signal to the second switching element 2. If the time for advancing the end time of the high-level period of the first PWM signal to the first switching element 1 is Ta12 (see Figure 36), and the time for delaying the start time of the high-level period of the second PWM signal to the second switching element 2 is Ta22 (see Figure 36), then the predetermined time (additional time) is Ta12 + Ta22. In the example of Figure 36, Ta12 = Ta22 = Tadu / 2.

[0329] The signal generation circuit 52, similar to the signal generation circuit 52 of Embodiment 1 (see Figures 1 and 3), generates a control signal for each of the multiple switches 8 using a first PWM signal to the first switching element 1 and a second PWM signal to the second switching element 2 of the corresponding switching circuit 10 among the multiple switching circuits 10.

[0330] (2) Operation (2.1) Basic Operation Figure 35 shows the case where the target switching element is the first switching element 1U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U. Also in Figure 35, the voltage value of the DC power supply E1 is shown as Vd.

[0331] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends. Therefore, when the first PWM signal SU1 changes from a low level to a high level at time t13, the first switching element 1U is soft-switched to zero voltage. In the example shown in Figure 35, the current iL1 flowing through the resonant inductor L1 begins to flow from time t11, when the high-level period of the control signal SU6 starts, reaches the same value as the load current iU at time t12, when a time equal to the length of the additional time has elapsed, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, when the third period T03 has elapsed from time t13. In the signal generation circuit 52, at time t11, when the second PWM signal SU2 changes from a high level to a low level, the control signal SU6 changes from a low level to a high level. The current iL1 flowing between time t12 and time t13 is the resonant current (charging current of the resonant capacitor 9U) flowing from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0332] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, and the third switching element 6U is in the on state. During the first period T01, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - AC terminal 41U. Also during the first period T01, the load current iU flows through the path from the second diode 5, which is antiparallel connected to the second switching element 2U - AC terminal 41U - AC load RA1.

[0333] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, while the third switching element 6U is in the on state. During the second period T02, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9.

[0334] During the third period T03, the first switching element 1U and the third switching element 6U are both in the ON state, while the second switching element 2U and the fourth switching element 7U are both in the OFF state. During the third period T03, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - AC terminal 41U. This reduces the current iL1 to zero. Also during the third period T03, the load current iU flows through the path from the first DC terminal 31 - first switching element 1U - AC terminal 41U - AC load RA1.

[0335] Figure 36 shows the case where the target switching element is the second switching element 2U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU7, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V2u across the second switching element 2U. In Figure 36, the voltage value of the DC power supply E1 is shown as Vd.

[0336] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43, when the second dead time period Td2 ends immediately before the high-level period of the second PWM signal SU2, and the voltage V2u across the second switching element 2U becomes zero at time t43, when the second dead time period Td2 ends. Therefore, when the second PWM signal SU2 changes from a low level to a high level at time t43, the second switching element 2U is soft-switched to zero voltage.

[0337] In the example shown in Figure 36, the current iL1 flowing through the resonant inductor L1 begins to flow from time t41, when the high-level period of the control signal SU7 starts, reaches the same value as the load current iU at time t42, when a predetermined time (additional time) has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and becomes zero at time t44, when a predetermined time (additional time) has elapsed from time t43. In the signal generation circuit 52, the control signal SU7 changes from a low level to a high level at the same time that the first PWM signal SU1 changes from a high level to a low level. The current iL1 flowing between time t42 and time t43 is the resonant current (discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0338] In Figure 36, the first period T01 is the period from time t41 to t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in the off state, and the fourth switching element 7U is in the on state. During the first period T01, the current iL1 flows through the path from the AC terminal 41U - diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15. Also during the first period T01, the load current iU flows through the path from the AC load RA1 - AC terminal 41U - first diode 4 which is connected in antiparallel to the first switching element 1U.

[0339] In Figure 36, the second period T02 is the period from time t42 to t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in the off state, and the fourth switching element 7U is in the on state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is the combined current of the current flowing from the AC terminal 41U through the diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15 and the current flowing from the resonant capacitor 9U through the diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15 (resonant current). During the second period T02, the resonant capacitor 9 is discharged.

[0340] In Figure 36, the third period T03 is the period from time t43 to t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are both in the ON state, and the first switching element 1U and the third switching element 6U are both in the OFF state. During the third period T03, the current iL1 flows through the path from the AC terminal 41U - connection point 3U - diode 61 - fourth switching element 7U - resonant inductor L1 - regenerative capacitor 15. As a result, the absolute value of the current iL1 is reduced to zero. Also during the third period T03, the load current iU flows through the path from the AC load RA1 - AC terminal 41U - second switching element 2U - second DC terminal 32.

[0341] The above describes an example of setting the second dead time period Td2 for switching circuit 10U, but the same applies when setting the second dead time period Td2 for switching circuit 10V and switching circuit 10W.

[0342] (2.2) The first and second operation control device 51H, similar to the control device 51, determines that when the duty cycle command value of one of the three phase duty cycle command values ​​du, dv, and dw (see Figure 2) of the two-phase modulation scheme is fixed to a constant value, a resonant current corresponding to two of the multiple switching circuits 10 flows simultaneously through the resonant inductor L1, and when one of the two switching circuits 10 is designated as the first switching circuit 10 and the other as the second switching circuit 10, it performs the first operation and then the second operation.

[0343] (2.2.1) Determining whether two-phase resonant currents flow simultaneously in the resonant inductor The power converter 100H, like the power converter 100, has a control device 51H that generates three first PWM signals SU1, SV1, SW1 and three second PWM signals SU2, SV2, SW2 based on three-phase duty command values ​​du, dv, dw of the top-stick two-phase modulation method. As a result, the two-phase duty command values ​​approach each other at electrical angles of 60° (see regions A11, A12, and A13 in Figure 10), and the duty cycles of the two-phase control signals become the same or close to each other. In region A11 of Figure 10, the duty command value dv and the duty command value dw are each -0.25 or close to -0.25. In region A12 of Figure 10, the duty cycle command values ​​du and dw are each -0.25 or close to -0.25. In region A13 of Figure 10, the duty cycle command values ​​du and dv are each -0.25 or close to -0.25. The polarity of the resonant current is the same as the polarity of the current iL1, and in regions A11, A12, and A13, the polarity of the resonant current is negative. For example, in region A11, during one period of the carrier signal CA1 (see Figure 2), the time difference between the start of the high-level period of the control signal SW7 applied to the fourth switching element 7W and the start of the high-level period of the control signal SV7 applied to the fourth switching element 7V becomes shorter, and the W-phase resonant current and the V-phase resonant current may flow simultaneously through the resonant inductor L1. Similarly, in region A12, the resonant current of the U-phase and the resonant current of the W-phase may flow simultaneously through the resonant inductor L1. Similarly, in region A13, the resonant current of the U-phase and the resonant current of the V-phase may flow simultaneously through the resonant inductor L1.

[0344] The boundary conditions for the cases where the V-phase resonant current and the W-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) are the same as in Embodiment 1, so the explanation is omitted. Similarly, the boundary conditions for the cases where the U-phase resonant current and the W-phase resonant current do not overlap (do not flow simultaneously) and overlap (flow simultaneously) are the same as in Embodiment 1, so the explanation is omitted. Similarly, the boundary conditions for the cases where the U-phase resonant current and the V-phase resonant current do not overlap (flow simultaneously) and overlap (flow simultaneously) are the same as in Embodiment 1, so the explanation is omitted.

[0345] (2.2.2) First and Second Operations When It is Determined that Two-Phase Resonant Currents Flow Simultaneously The upper part of Figure 37 shows the timing chart when the control device 51H has previously determined that two-phase resonant currents of the V-phase and W-phase flow simultaneously during the period corresponding to region A11 in Figure 10. The lower part of Figure 37 shows the timing chart when the control device 51H has performed both the first and second operations (hereinafter also referred to as "after shift") during the period corresponding to region A11 in Figure 10. The way to read Figure 37 is the same as Figure 11, so the explanation is omitted.

[0346] In the example shown in Figure 37, when the control device 51H performs the first operation, it compares the absolute value of the load current iV with the absolute value of the load current iW, and shortens the high-level period of the first PWM signal SV1 to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of load current, by the shortening period Tred. In the example shown in Figure 37, the control device 51H sets the length of the shortening period Tred to (Tadv / 2) + (Tadv / 2).

[0347] Furthermore, when the control device 51H performs the second operation, it shifts the high-level period of the first PWM signal SV1 in the direction of delaying by a shift time Tsv. At this time, the control device 51H takes time ta as the point at which the high-level period of the control signal SW7 to the switch 8W begins, and shifts the high-level period of the control signal SV7 to the switch 8V to each of the high-level periods of the first PWM signal SV1 to the first switching element 1V and the high-level period of the second PWM signal SV2 to the second switching element 2V in the direction of delaying by a shift time Tsv, so that the high-level period of the control signal SV7 to the switch 8V begins at time tc, which is a time Tdef after time tb, when the current value of the resonant current (current iL1) passing through the switch 8W reaches its extreme value (minimum value in the example of Figure 37) and coincides with the current value of the load current iW flowing through the AC terminal 41W corresponding to the switch 8W. The control device 51H determines the standby period Tdef by the calculation Tdef = L × |iW - iV| / V15. The control device 51H determines the shift time Tsv by the calculation Tsv = ΔT + Tdef. In the example in Figure 37, ΔT is the value obtained by subtracting the additional time Tadv / 2 from the time difference between the start of the high-level period of the second PWM signal SW2 to the second switching element 2W and the end of the high-level period of the first PWM signal SV1 to the first switching element 1V. As a result, the current value of the resonant current (current iL1) at the time tc when the standby period Tdef ends becomes equal to the absolute value of the load current iV. Therefore, in the power converter 100H, zero-voltage soft switching of the second switching element 2V becomes possible if the high-level period of the control signal SV7 to the switch 8V is equal to or greater than the resonant half-period (Tres / 2), even if it does not include the additional time Tadv.

[0348] As can be seen from the waveforms of current iL1 in the upper and lower parts of Figure 37, in the power converter 100H, if the control device 51H determines in advance that two-phase resonant currents of the V-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the V-phase and W-phase resonant currents by performing the first and second operations, thereby achieving soft switching. Similarly, in the power converter 100H, if the control device 51H determines in advance that two-phase resonant currents of the U-phase and W-phase flow simultaneously through the resonant inductor L1, it can shorten the overlap period between the U-phase and W-phase resonant currents by performing the first and second operations, thereby achieving soft switching.

[0349] The first and second operations of the control device 51H can be generalized as follows.

[0350] When the control device 51H performs the first operation, it shortens the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10, which has a smaller absolute value of the corresponding load current, by a shortening period Tred. When the control device 51H performs the second operation, it shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 by a shift time in the direction of delaying it. At this time, the control device 51H sets time ta as the start of the high-level period of the control signal to the switch 8 corresponding to the second switching circuit 10, and shifts the high-level period of the first PWM signal to the first switching element 1 of the first switching circuit 10 to time tc, which is timed by a standby period Tdef after time tb, when the current value of the resonant current (current iL1) corresponding to the second switching circuit 10 reaches an extreme value and then matches the current value of the load current corresponding to the second switching circuit 10. The absolute value of the resonant current (current iL1) at time tb is greater than the absolute value of the load current corresponding to the first switching circuit 10. If the length of the standby period Tdef is set to be the same as half the length of the additional time corresponding to the first switching circuit 10, the current value of the resonant current (current iL1) at time tc becomes equal to the absolute value of the load current corresponding to the first switching circuit 10.

[0351] (3) Advantages The power converter 100H according to Embodiment 9, like the power converter 100 according to Embodiment 1, can more reliably achieve zero voltage soft switching without the control device 51H directly controlling the multiple switches 8 for zero voltage soft switching.

[0352] Furthermore, in the power converter 100H, when the control device 51H sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time) to the first dead time period Td1 by advancing the end time of the high-level period of the second PWM signal to the second switching element 2 and delaying the start time of the high-level period of the first PWM signal to the first switching element 1. If the polarity of the load current is negative, it adds a predetermined time (additional time) to the first dead time period Td1 by advancing the end time of the high-level period of the first PWM signal to the first switching element 1 and delaying the start time of the high-level period of the second PWM signal to the second switching element 2.

[0353] With the above configuration, it is possible to achieve zero-voltage soft switching while reducing dead-time loss and dead-time error.

[0354] (Embodiment 10) The power converter 100I according to Embodiment 10 will be described with reference to Figures 38 to 41. With respect to the power converter 100I according to Embodiment 10, components that are the same as those in the power converter 100 according to Embodiment 1 (see Figure 1) are denoted by the same reference numerals and their description is omitted.

[0355] (1) The configured power converter 100I differs from the power converter 100 (see Figure 1) in that, as shown in Figure 38, it is equipped with a control device 51I instead of the control device 51 of the power converter 100.

[0356] In the power converter 100I, the control device 51I generates multiple first PWM signals SU1, SV1, SW1 and multiple second PWM signals SU2, SV2, SW2, similar to the control device 51, to control multiple first switching elements 1 and multiple second switching elements 2.

[0357] When the control device 51I sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it shortens the high-level period of the first PWM signal to the first switching element 1 to add a predetermined time (additional time) to the first dead time period Td1.

[0358] When the control device 51I sets a second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it shortens the high-level period of the second PWM signal to the second switching element 2 to add a predetermined time (additional time) to the first dead time period Td1.

[0359] The signal generation circuit 52, similar to the signal generation circuit 52 of Embodiment 1 (see Figures 1 and 3), generates a control signal for each of the multiple switches 8 using a first PWM signal to the first switching element 1 and a second PWM signal to the second switching element 2 of the corresponding switching circuit 10 among the multiple switching circuits 10.

[0360] (2) Operation (2.1) Basic Operation Figure 39 shows the case where the target switching element is the first switching element 1U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU6, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V1u across the first switching element 1U. Also in Figure 39, the voltage value of the DC power supply E1 is shown as Vd.

[0361] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13, when the second dead time period Td2 immediately preceding the high-level period of the first PWM signal SU1 ends. Therefore, when the first PWM signal SU1 changes from a low level to a high level at time t13, the first switching element 1U is soft-switched to zero voltage. In the example shown in Figure 39, the current iL1 flowing through the resonant inductor L1 begins to flow from time t11, when the high-level period of the control signal SU6 starts, reaches the same value as the load current iU at time t12, when the first period T01 has elapsed from time t11, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, when the third period has elapsed from time t13. In the signal generation circuit 52, at time t11, when the second PWM signal SU2 changes from a high level to a low level, the control signal SU6 changes from a low level to a high level. The current iL1 flowing between time t12 and time t13 is the resonant current (charging current of the resonant capacitor 9U) flowing from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0362] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, and the third switching element 6U is in the on state. During the first period T01, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - AC terminal 41U. Also during the first period T01, the load current iU flows through the path from the second diode 5, which is antiparallel connected to the second switching element 2U - AC terminal 41U - AC load RA1.

[0363] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the off state, while the third switching element 6U is in the on state. During the second period T02, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9.

[0364] During the third period T03, the first switching element 1U and the third switching element 6U are both in the ON state, while the second switching element 2U and the fourth switching element 7U are both in the OFF state. During the third period T03, the current iL1 flows through the path from the regenerative capacitor 15 - resonant inductor L1 - diode 71 - third switching element 6U - AC terminal 41U. This reduces the current iL1 to zero. Also during the third period T03, the load current iU flows through the path from the first DC terminal 31 - first switching element 1U - AC terminal 41U - AC load RA1.

[0365] Figure 40 shows the case where the target switching element is the second switching element 2U of the switching circuit 10U, illustrating the first PWM signal SU1, the second PWM signal SU2, the control signal SU7, the current iL1 flowing through the resonant inductor L1, the load current iU, and the voltage V2u across the second switching element 2U. In Figure 40, the voltage value of the DC power supply E1 is shown as Vd.

[0366] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43, when the second dead time period Td2 ends immediately before the high-level period of the second PWM signal SU2, and the voltage V2u across the second switching element 2U becomes zero at time t43, when the second dead time period Td2 ends. Therefore, when the second PWM signal SU2 changes from a low level to a high level at time t43, the second switching element 2U is soft-switched to zero voltage. In the example shown in Figure 40, the current iL1 flowing through the resonant inductor L1 begins to flow from time t41, when the high-level period of the control signal SU7 starts, reaches the same value as the load current iU at time t42, after a predetermined time (additional time Tadu) has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and becomes zero at time t44, after a second predetermined time Tad2, which is the same length as the predetermined time (additional time Tadu), has elapsed from time t43. In the signal generation circuit 52, the control signal SU7 changes from a low level to a high level at the same time that the first PWM signal SU1 changes from a high level to a low level. The current iL1 flowing between time t42 and time t43 is the resonant current (discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0367] In Figure 40, the first period T01 is the period from time t41 to t...

Claims

1. A power conversion circuit having a first DC terminal and a second DC terminal, a plurality of first switching elements and a plurality of second switching elements, wherein a plurality of switching circuits are connected in parallel to each other, with the plurality of first switching elements and the plurality of second switching elements connected in one-to-one series, the plurality of first switching elements connected to the first DC terminal and the plurality of second switching elements connected to the second DC terminal, a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, through which load current flows, a plurality of switches corresponding one-to-one to the plurality of switching circuits, each with its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch, and a resonant inductor having a third end and a fourth end, the third end of which is connected to the second end of the plurality of switches, The regenerative capacitor has a fifth and a sixth terminal, the fifth terminal of which is connected to the second DC terminal, and the sixth terminal of which is connected to the fourth terminal of the resonant inductor; a control device that generates a plurality of first PWM signals for controlling the plurality of first switching elements and a plurality of second PWM signals for controlling the plurality of second switching elements; and a signal generation circuit that provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level, wherein the control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value of a two-phase modulation scheme or a three-phase duty cycle command value of a three-phase modulation scheme.For each of the plurality of switching circuits, a second dead time period is set by adding a predetermined time to a first dead time period, which is set in advance so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element, the predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor and the voltage value of the regenerative capacitor, the signal generation circuit generates the control signal for each of the plurality of switches, which has a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits, and the control device determines that when the duty cycle command value of one phase among the three phase duty cycle command values ​​of the two-phase modulation method is fixed to a constant value, or when the duty cycle command value of one phase among the three phase duty cycle command values ​​of the three-phase modulation method is fixed to a constant value, a resonant current corresponding to two of the plurality of switching circuits flows simultaneously through the resonant inductor, A power converter comprising: when one of the two switching circuits is designated as a first switching circuit and the other as a second switching circuit, a first operation is performed to shorten the second dead time period for the first switching circuit by a shortening period; and a second operation is performed to shift the high-level periods of the first PWM signal to the first switching element and the second PWM signal to the second switching element of at least one of the first switching element and the second switching element of the first switching circuit, such that the ON period of the switch corresponding to the first switching circuit among the plurality of switches starts after a standby period from the point in time when the current value of the resonant current corresponding to the second switching circuit matches the current value of the load current corresponding to the second switching circuit after the current value of the resonant current corresponding to the second switching circuit reaches an extreme value.

2. A power conversion circuit having a first DC terminal and a second DC terminal, a plurality of first switching elements and a plurality of second switching elements, wherein a plurality of switching circuits are connected in parallel to each other, with the plurality of first switching elements and the plurality of second switching elements connected in one-to-one series, the plurality of first switching elements connected to the first DC terminal and the plurality of second switching elements connected to the second DC terminal, a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, through which load current flows, a plurality of switches corresponding one-to-one to the plurality of switching circuits, each with its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch, and a resonant inductor having a third end and a fourth end, the third end of which is connected to the second end of the plurality of switches, The regenerative capacitor has a fifth and a sixth terminal, the fifth terminal of which is connected to the second DC terminal, and the sixth terminal of which is connected to the fourth terminal of the resonant inductor; a control device that generates a plurality of first PWM signals for controlling the plurality of first switching elements and a plurality of second PWM signals for controlling the plurality of second switching elements; and a signal generation circuit that provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level, wherein the control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value of a two-phase modulation scheme or a three-phase duty cycle command value of a three-phase modulation scheme.For each of the plurality of switching circuits, a second dead time period is set by adding a predetermined time to a first dead time period, which is set so that the on periods of the first and second switching elements do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element, the predetermined time is determined according to the current value of the load current, the inductance of the resonant inductor and the voltage value of the regenerative capacitor, the signal generation circuit generates the control signal for each of the plurality of switches, which has a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits, and the control device, A power converter that, when the duty cycle command value of one of the three phases of duty cycle command values ​​in the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of duty cycle command values ​​in the three-phase modulation scheme is fixed to a constant value, and it is determined that a resonant current corresponding to two or more of the multiple switching circuits flows simultaneously through the resonant inductor, performs shift control to shift the high-level period of the first PWM signal to the first switching element and the second PWM signal to the second switching element in at least one of the two or more switching circuits so that the resonant current corresponding to two or more of the multiple switching circuits does not flow simultaneously through the resonant inductor.

3. A power conversion circuit having a first DC terminal and a second DC terminal, a plurality of first switching elements and a plurality of second switching elements, wherein a plurality of switching circuits are connected in parallel to each other, with the plurality of first switching elements and the plurality of second switching elements connected in one-to-one series, the plurality of first switching elements being connected to the first DC terminal and the plurality of second switching elements being connected to the second DC terminal, a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, through which load current flows, a plurality of switches corresponding one-to-one to the plurality of switching circuits, each with its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit and its second end connected to a common connection point, a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch, and a resonant inductor having a third end and a fourth end, the third end being connected to the common connection point, A regenerative capacitor having a fifth and a sixth terminal, the fifth terminal of which is connected to the first DC terminal or the second DC terminal, and the sixth terminal of which is connected to the fourth terminal of the resonant inductor; and a control system, the control system comprising: a control device that generates a plurality of first PWM signals for controlling the plurality of first switching elements and a plurality of second PWM signals for controlling the plurality of second switching elements; and a signal generation circuit that provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level; the control device generates the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value of a two-phase modulation scheme or a three-phase duty cycle command value of a three-phase modulation scheme;For each of the plurality of switching circuits, a second dead time period is set by adding a variable time to a first dead time period that is set in advance so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element, the variable time is determined according to the current value of the load current, the inductance of the resonant inductor and the potential of the sixth terminal of the regenerative capacitor, the signal generation circuit generates the control signal for each of the plurality of switches, having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits, and the control system determines that a resonant current flows simultaneously through two or more of the plurality of switches through the resonant inductor when the duty cycle command value of one phase among the three phase duty cycle command values ​​of the two-phase modulation method is fixed to a constant value or when the duty cycle command value of one phase among the three phase duty cycle command values ​​of the three-phase modulation method is fixed to a constant value. A power converter capable of performing a first control operation that overlaps the high-level period of the control signal to each of the two or more switches with a second dead-time period corresponding to each of the two or more switching circuits connected to the two or more switches among the plurality of switching circuits for a predetermined period of time, and a second control operation that determines the start time of the high-level period of the control signal to at least one of the plurality of switches according to the load current of at least one phase flowing through the AC load connected to the plurality of AC terminals.

4. A power conversion circuit having a first DC terminal and a second DC terminal, a plurality of first switching elements and a plurality of second switching elements, wherein a plurality of switching circuits are connected in parallel to each other, with the plurality of first switching elements and the plurality of second switching elements connected in one-to-one series, the plurality of first switching elements being connected to the first DC terminal and the plurality of second switching elements being connected to the second DC terminal, a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit, through which load current flows, a plurality of switches corresponding one-to-one to the plurality of switching circuits, each with its first end connected to the connection point of the first switching element and the second switching element in the corresponding switching circuit and its second end connected to a common connection point, a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch, and a resonant inductor having a third end and a fourth end, the third end being connected to the common connection point, A regenerative capacitor having a fifth and a sixth terminal, the fifth terminal of which is connected to the second DC terminal, and the sixth terminal of which is connected to the fourth terminal of the resonant inductor; and a control system, the control system comprising: a control device that generates a plurality of first PWM signals for controlling the plurality of first switching elements and a plurality of second PWM signals for controlling the plurality of second switching elements; and a signal generation circuit that provides each of the plurality of switches with a control signal whose potential changes between a high level and a low level, the control device generating the plurality of first PWM signals and the plurality of second PWM signals based on a three-phase duty cycle command value of a two-phase modulation scheme or a three-phase duty cycle command value of a three-phase modulation scheme,For each of the plurality of switching circuits, a second dead time period is set by adding a variable time to a first dead time period that is set in advance so that the on periods of the first switching element and the second switching element do not overlap between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element, the variable time is determined according to the current value of the load current, the inductance of the resonant inductor and the potential of the sixth terminal of the regenerative capacitor, the signal generation circuit generates the control signal for each of the plurality of switches, having a high-level period corresponding to the second dead time period for the corresponding switching circuit among the plurality of switching circuits, and the control system is capable of performing a first control operation and a second control operation when changing the first PWM signal or the second PWM signal to the target switching element to be turned on from a low level to a high level in each of the plurality of switching circuits, the first switching element and the second switching element respectively. In the first control operation, for each of the plurality of switching circuits, at least a portion of the high-level period of the control signal to the switch corresponding to each of the plurality of switching circuits among the plurality of switches is overlapped with the second dead time period set between the high-level period of the first PWM signal to the first switching element and the high-level period of the second PWM signal to the second switching element. In the second control operation, the high-level period of the control signal is shifted so that the overlap period between the high-level period of the control signal given to each of the plurality of switches and the second dead time period is shorter than in the first control operation, and at least a portion of the high-level period of the control signal is overlapped with the high-level period of the first PWM signal or the second PWM signal to the target switching element.The control system, when it determines that a resonant current flows simultaneously through two or more of the multiple switches in the resonant inductor when the duty cycle command value of one of the three phases of the two-phase modulation scheme is fixed to a constant value, or when the duty cycle command value of one of the three phases of the three-phase modulation scheme is fixed to a constant value, performs a second control operation on a first switch, which is one of the two or more switches.

5. The power conversion device according to claim 1 or 2, wherein when the control device sets the second dead time period for each of the plurality of switching circuits, if the polarity of the load current is positive, the predetermined time is added to the first dead time period by shortening the high-level period of the second PWM signal to the second switching element, and if the polarity of the load current is negative, the predetermined time is added to the first dead time period by shortening the high-level period of the first PWM signal to the first switching element.

6. The power conversion device according to claim 1 or 2, wherein when the control device sets the second dead time period for each of the plurality of switching circuits, if the polarity of the load current is positive, it adds the predetermined time to the first dead time period by advancing the end time of the high-level period of the second PWM signal to the second switching element and delaying the start time of the high-level period of the first PWM signal to the first switching element; and if the polarity of the load current is negative, it adds the predetermined time to the first dead time period by advancing the end time of the high-level period of the first PWM signal to the first switching element and delaying the start time of the high-level period of the second PWM signal to the second switching element.

7. The power conversion device according to claim 1 or 2, wherein when the control device sets the second dead time period for each of the plurality of switching circuits, if the polarity of the load current is positive, the predetermined time is added to the first dead time period by shortening the high-level period of the first PWM signal to the first switching element, and if the polarity of the load current is negative, the predetermined time is added to the first dead time period by shortening the high-level period of the second PWM signal to the second switching element.

8. The power conversion device according to any one of claims 1 to 7, wherein the control device shortens the high-level period of the control signal for a switch among the plurality of switches that corresponds to a switching circuit of a phase in which the duty cycle command value is fixed in the two-phase modulation scheme or the three-phase modulation scheme.

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