Current acquisition circuit and current acquisition device

Abstract

This application provides a current acquisition circuit and a current acquisition device, belonging to the field of current measurement technology. The current acquisition circuit includes a controller and a first current acquisition module and a second current acquisition module connected in series. The first current acquisition module includes a first current acquisition element and a first processing circuit connected in parallel. The second current acquisition module includes a second current acquisition element, a second processing circuit, and a first control circuit connected in parallel. The first processing circuit is used to acquire and process a first voltage signal from the first current acquisition element and output the first voltage signal to the first control circuit and the controller. The second processing circuit is used to acquire and process a second voltage signal from the second current acquisition element and output the second voltage signal to the controller. The first control circuit is used to turn on when the current corresponding to the first voltage signal exceeds a second current range and to turn off when the current corresponding to the first voltage signal is within the second current range. This current acquisition circuit can solve the interference of switching current ranges on current measurement.

Description

Technical Field

[0001] This application relates to the field of current measurement technology, specifically to a current acquisition circuit and a current acquisition device. Background Technology

[0002] There are two main methods for current acquisition: one is a simple and low-cost series current acquisition resistor, and the other is to use electromagnetic induction or Hall effect. The current with a wide range of variation has different requirements for the current acquisition resistor. In order to achieve the highest possible accuracy in measuring current at all levels, it is usually necessary to switch different current acquisition resistors to achieve multi-range switching.

[0003] There are several ways to switch current-sensing resistors. For example, different resistance values ​​can be controlled by using relays or semiconductor switches, which can be connected or disconnected in series or parallel to change the effective current-sensing resistor value. To ensure that the voltage difference across the current-sensing resistor is accurately read, the relays and semiconductor switches must be fully connected or disconnected to avoid affecting the accuracy of the entire current-sensing resistor module.

[0004] However, when switching the current range by manually or automatically switching the current sampling resistor, the impedance of the current sampling resistor module connected in series with the entire system will change abruptly. The abrupt change in the current sampling resistor will interfere with the continuously changing current, introducing additional pulse noise of an interfering nature into the system, thereby affecting the accuracy of current measurement. Summary of the Invention

[0005] The main technical problem addressed in this application is how to avoid or reduce the interference caused by switching current ranges on current measurement.

[0006] Firstly, the following technical solution is provided through an embodiment:

[0007] A current acquisition circuit includes a controller and a first current acquisition module and a second current acquisition module connected in series. The first current acquisition module has a first current range, and the second current acquisition module has a second current range, wherein the first current range is greater than the second current range. The first current acquisition module includes a first current acquisition element and a first processing circuit connected in parallel, and the second current acquisition module includes a second current acquisition element, a second processing circuit, and a first control circuit connected in parallel. The input terminal of the first current acquisition element is connected to the input terminal of the current acquisition circuit, the output terminal of the first current acquisition element is connected to the input terminal of the second current acquisition element, the output terminal of the second current acquisition element is connected to a reference ground terminal, and the output terminal of the first processing circuit is connected to the controller and the input terminal of the first control circuit. The first processing circuit is used to acquire the differential voltage signal of the first current acquisition element. The first voltage signal is processed into a first voltage signal and output to the first control circuit and the controller. The second processing circuit is used to acquire the differential voltage signal of the second current sampling device and process it into a second voltage signal, and output the second voltage signal to the controller. The first control circuit is used to turn on when the current corresponding to the first voltage signal exceeds the second current range to reduce the current of the second current sampling device, and to turn off when the current corresponding to the first voltage signal is within the second current range. The controller is used to determine the current value corresponding to the first voltage signal as a confidence current value when the current value corresponding to the first voltage signal exceeds the second current range, and to determine the current value corresponding to the second voltage signal as a confidence current value when the current value corresponding to the first voltage signal is within the second current range.

[0008] In some embodiments, the first current sampling device includes a first current sampling resistor and a second current sampling resistor connected in parallel, and the first processing circuit includes a first operational amplifier; the positive voltage sampling terminal of the first current sampling resistor is connected to the non-inverting input terminal of the first operational amplifier through a first resistor, and the negative voltage sampling terminal of the first current sampling resistor is connected to the inverting input terminal of the first operational amplifier through a fourth resistor; the positive voltage sampling terminal of the second current sampling resistor is connected to the non-inverting input terminal of the first operational amplifier through a second resistor, and the negative voltage sampling terminal of the second current sampling resistor is connected to the inverting input terminal of the first operational amplifier through a third resistor; the non-inverting input terminal of the first operational amplifier is connected to a reference ground terminal through a fifth resistor, and the inverting input terminal is connected to the output terminal of the first operational amplifier through a sixth resistor; the output terminal of the first operational amplifier is connected to the output terminal of the first processing circuit for outputting the first voltage signal.

[0009] In some embodiments, the current acquisition circuit further includes a third current acquisition module with a third current range, wherein the second current range is greater than the third current range; the third current acquisition module is connected in series with the first current acquisition module and the second current acquisition module; the third current acquisition module includes a third current acquisition element, a third processing circuit, and a second control circuit connected in parallel; the input terminal of the second control circuit is connected to the output terminal of the first processing circuit to obtain a first voltage signal, and is turned on when the current corresponding to the first voltage signal exceeds the third current range, and is turned off when the current corresponding to the first voltage signal is within the third current range; the input terminal of the third current acquisition element is connected to a reference ground terminal, and the output terminal is connected to the output terminal of the current acquisition circuit; the third processing circuit is used to acquire the differential voltage signal of the third current acquisition element and process it into a third voltage signal, and output the third voltage signal to the controller; the controller is used to determine that the current value corresponding to the third voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the third current range.

[0010] In some embodiments, the second current sampling device includes a third current sampling resistor and a fourth current sampling resistor connected in parallel. The positive and negative voltage sampling terminals of the third and fourth current sampling resistors are respectively connected to the second processing circuit. The first control circuit includes a second operational amplifier, a third operational amplifier, and a first transistor. The non-inverting input terminal of the second operational amplifier is connected to the output terminal of the first processing circuit to obtain a first voltage signal. The inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier is connected to the first node through a first three-resistor. The current input terminals of the third and fourth current sampling resistors are connected to the first node through a first one-resistor. The first node is also connected to the negative reference voltage terminal through a first two-resistor. The non-inverting input terminal of the third operational amplifier is connected to the first node. The inverting input terminal is connected to the reference ground terminal through a first five-resistor. The output terminal is connected to the control electrode of the first transistor through a first four-resistor. The first electrode of the first transistor is connected to the current input terminals of the third and fourth current sampling resistors, and the second electrode is connected to the current output terminals of the third and fourth current sampling resistors.

[0011] In some embodiments, the first control circuit further includes a first control element, a first terminal of which is connected to the output terminal of the first enable control circuit, a second terminal of which is connected to the ground terminal of the first enable control circuit, a third terminal of which is connected to the negative voltage terminal through a first seven-resistor, and a fourth terminal of which is connected to the inverting input terminal of the third operational amplifier through a first six-resistor; the first control element is used to turn on the third terminal and the fourth terminal when it receives a high-level first enable signal output by the first enable control circuit, so that the third operational amplifier outputs a constant high level and the first transistor is fully turned on.

[0012] In some embodiments, the third current sampling device includes a fifth current sampling resistor and a sixth current sampling resistor connected in parallel, with the positive and negative voltage sampling terminals of the fifth and sixth current sampling resistors respectively connected to the third processing circuit; the second control circuit includes a fourth operational amplifier, a fifth operational amplifier, a sixth operational amplifier, and a second transistor; the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the first processing circuit through a second resistor to obtain a first voltage signal, and is connected to the output terminal of the fourth operational amplifier through a second resistor; the non-inverting input terminal of the fourth operational amplifier is connected to a reference ground terminal; and the output terminal of the fourth operational amplifier is connected to the second transistor through a second resistor. Point; the non-inverting input of the fifth operational amplifier is connected to the current output terminals of the fifth and sixth current sampling resistors, and the inverting input is connected to the output terminal of the fifth operational amplifier. The output terminal of the fifth operational amplifier is connected to the second node through the second resistor. The second node is also connected to the positive reference voltage terminal through the second resistor. The inverting input of the sixth operational amplifier is connected to the second node, the non-inverting input is connected to the reference ground terminal through the second resistor, and the output terminal is connected to the control electrode of the second transistor through the second resistor. The first electrode of the second transistor is connected to the current input terminals of the fifth and sixth current sampling resistors, and the second electrode is connected to the current output terminals of the fifth and sixth current sampling resistors.

[0013] In some embodiments, the second control circuit further includes a second control element. The first terminal of the second control element is used to connect to the output terminal of the second enable control circuit, the second terminal is used to connect to the ground terminal of the second enable control circuit, the third terminal is connected to the non-inverting input terminal of the sixth operational amplifier through a second six resistor, and the fourth terminal is connected to the positive voltage terminal through a second seven resistor. The second control element is used to turn on the third and fourth terminals when it receives a high-level second enable signal output by the second enable control circuit, so that the sixth operational amplifier outputs a constant high level and the second transistor is fully turned on.

[0014] Secondly, based on the same inventive concept, the following technical solution is provided through an embodiment:

[0015] A current acquisition circuit includes a controller and a first current acquisition module and a second current acquisition module connected in series. The first current acquisition module has a first current range, and the second current acquisition module has a second current range, wherein the first current range is greater than the second current range. The first current acquisition module includes a first current acquisition element and a first processing circuit connected in parallel, and the second current acquisition module includes a second current acquisition element, a second processing circuit, and a first control circuit connected in parallel. The input terminal of the second current acquisition element is connected to a reference ground terminal, and the output terminal of the second current acquisition element is connected to the input terminal of the first current acquisition element. The output terminal of the first current acquisition element is connected to the controller and the input terminal of the first control circuit. The first processing circuit is used to acquire the differential voltage signal of the first current acquisition element. The first voltage signal is processed into a first voltage signal and output to the first control circuit and the controller. The second processing circuit is used to acquire the differential voltage signal of the second current sampling device and process it into a second voltage signal, and output the second voltage signal to the controller. The first control circuit is used to turn on when the current corresponding to the first voltage signal exceeds the second current range to reduce the current of the second current sampling device, and to turn off when the current corresponding to the first voltage signal is within the second current range. The controller is used to determine the current value corresponding to the first voltage signal as a confidence current value when the current value corresponding to the first voltage signal exceeds the second current range, and to determine the current value corresponding to the second voltage signal as a confidence current value when the current value corresponding to the first voltage signal is within the second current range.

[0016] In some embodiments, the current acquisition circuit further includes a third current acquisition module having a third current range, wherein the second current range is greater than the third current range; the third current acquisition module is connected in series with the first current acquisition module and the second current acquisition module; the third current acquisition module includes a third current acquisition element, a third processing circuit, and a second control circuit connected in parallel; the input terminal of the second control circuit is connected to the output terminal of the first processing circuit to obtain a first voltage signal, and is turned on when the current corresponding to the first voltage signal exceeds the third current range, and turned off when the current corresponding to the first voltage signal is within the third current range; the output terminal of the third current acquisition element is connected to a reference ground terminal, and the input terminal is connected to the input terminal of the current acquisition circuit; the third processing circuit is used to acquire the differential voltage signal of the third current acquisition element and process it into a third voltage signal, and output the third voltage signal to the controller; the controller is used to determine that the current value corresponding to the third voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the third current range.

[0017] Thirdly, based on the same inventive concept, the following technical solution is provided through an embodiment:

[0018] A current acquisition device includes a current acquisition circuit provided in any of the first or second aspect embodiments.

[0019] According to one of the technical solutions in the above embodiments, the following beneficial effects or advantages are achieved:

[0020] This application provides a current acquisition circuit that uses a first current acquisition module and a second current acquisition module with different current ranges connected in series to achieve simultaneous operation of multiple ranges, avoiding pulse noise to the system current when switching ranges. Specifically, the first current acquisition module corresponds to a detection circuit with a relatively larger range, which operates continuously within a specified full current range. At this time, the first voltage signal acquired by the first processing circuit serves as both a confidence current when the current value is within the large range and a control signal input to the first control circuit of the second current acquisition module. The second current acquisition module is a detection circuit with a smaller range than the first current acquisition module. When the current value corresponding to the current first voltage signal exceeds the second current range, the first control circuit is in a conducting state to shunt the current to the second current acquisition module, reducing the power consumption of the second current acquisition module. When the current value corresponding to the current first voltage signal is within the second current range, the first control circuit is in the off state. At this time, the current value corresponding to the second voltage signal collected by the second processing circuit is the confidence current that meets the second current range. Therefore, the current acquisition circuit provided in this application abandons the conventional idea of ​​"exiting the current range before entering a new range". It uses the first current acquisition module and the second current acquisition module to establish the idea of ​​"the large range current acquisition module works fixedly and the small range current acquisition module works adaptively and selectively". It realizes a current acquisition circuit that can work with multiple ranges at the same time, outputs a confidence current sampling value according to the range range of the actual current, and the overall current acquisition impedance will not change abruptly due to the change of range. That is, it realizes a current acquisition circuit that avoids pulse noise to the system current when switching ranges.

[0021] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0022] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0023] Figure 1 A circuit diagram is shown that adjusts the resistance value of the current sampling resistor by means of a series resistor, thereby adjusting the current range.

[0024] Figure 2A circuit diagram is shown that adjusts the resistance value of the current sampling resistor by means of parallel resistors, thereby adjusting the current range.

[0025] Figure 3 A frame diagram of a current acquisition circuit including a first current acquisition module and a second current acquisition module according to an embodiment of this application is shown.

[0026] Figure 4 A framework diagram of a first and a second stream acquisition module according to an embodiment of this application is shown.

[0027] Figure 5 A framework diagram of a current acquisition circuit according to an embodiment of this application is shown. The circuit includes a first current acquisition module upstream, a second current acquisition module midstream, and a third current acquisition module downstream.

[0028] Figure 6 A schematic diagram of the connection of each level of the flow sampling module according to an embodiment of this application is shown.

[0029] Figure 7 A schematic diagram of the circuit structure of a first flow acquisition module according to an embodiment of this application is shown.

[0030] Figure 8 A schematic diagram of the circuit structure of a second flow acquisition module according to an embodiment of this application is shown.

[0031] Figure 9 A schematic diagram of the first step design of a first control circuit in the middle range according to an embodiment of this application is shown.

[0032] Figure 10 It shows the basis Figure 9 The power and voltage difference characteristic curves of the first transistor, the third current sampling resistor, and the fourth current sampling resistor in the figure.

[0033] Figure 11 A schematic diagram of the second step design of the medium range of the first control circuit according to an embodiment of this application is shown.

[0034] Figure 12 It shows the basis Figure 11 The power and voltage difference characteristic curves of the first transistor, the third current sampling resistor, and the fourth current sampling resistor in the figure.

[0035] Figure 13 A schematic diagram of the circuit structure of a third current sampling module according to an embodiment of this application is shown.

[0036] Figure 14 A schematic diagram of the first step design of a small-range second control circuit according to an embodiment of this application is shown.

[0037] Figure 15 It shows the basis Figure 14 The power versus voltage characteristic curves of the second transistor, the fifth current sampling resistor, and the sixth current sampling resistor in the circuit.

[0038] Figure 16 A schematic diagram of the small-range second step design of a second control circuit according to an embodiment of this application is shown.

[0039] Figure 17 It shows the basis Figure 16 The power versus voltage characteristic curves of the second transistor, the fifth current sampling resistor, and the sixth current sampling resistor in the circuit.

[0040] Figure 18 It shows from Figure 17 The power and voltage difference characteristic curves are extracted when the current range is 0~0.1A.

[0041] Figure 19 A frame diagram of a current acquisition circuit according to an embodiment of this application, in which a second current acquisition module is upstream and a first current acquisition module is downstream, is shown.

[0042] Figure 20 A schematic diagram of a current acquisition circuit according to an embodiment of this application is shown, in which a third current acquisition module is located upstream, a second current acquisition module is located midstream, and a first current acquisition module is located downstream. Detailed Implementation

[0043] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. Similar elements in different embodiments are referred to by related similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of the present application. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to the present application are not shown or described in the specification. This is to avoid obscuring the core parts of the present application with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.

[0044] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the order of the steps or actions in the method description can be changed or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.

[0045] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages).

[0046] As mentioned earlier, the impedance of the current sampling resistor connected in series with the entire system will change abruptly when manually or automatically switching the current range; this problem can be solved by... Figure 1 and Figure 2 Provide an explanation; Figure 1 A circuit diagram is provided to adjust the resistance value of the current sampling resistor by means of series resistor. By switching two relay switches controlled by Ctrl_1 and Ctrl_2, and in conjunction with three series current sampling resistors Rs1, Rs2 and Rs3 with different resistance values, the resistance of the current sampling circuit is changed, thereby realizing the switching of the current range. Figure 2 A circuit diagram is provided for adjusting the resistance value of the current sampling resistor using a parallel resistor method. The resistance of the current sampling circuit is changed by using three semiconductor switches (such as field-effect transistors) controlled by Ctrl_3 in conjunction with four parallel current sampling resistors Rs1, Rs2, Rs3 and Rs4 with different resistance values, thereby realizing the switching of the current range.

[0047] The reason for switching the range of the current sampling circuit is that a wide range of currents has different requirements for the current sampling resistor, including the resistor's rated power, accuracy, and temperature drift coefficient. In order to achieve the highest possible accuracy in measuring currents at all levels, different current sampling resistors are usually switched to achieve multi-range switching.

[0048] like Figure 1 or Figure 2 The conventional range-switching scheme shown has the following drawbacks: To ensure that the voltage differences I_sense+ and I_sense- across the current-sampling resistor are accurately read by subsequent circuits, the relay and semiconductor switch must be in a fully connected or disconnected state. Therefore, during manual or automatic range switching, the impedance of the current-sampling resistor connected in series with the entire system will change abruptly, introducing interference-type pulse noise into the system current. Furthermore... Figure 1 The series connection scheme may also have a momentary interruption of current when the relay switches. This moment not only causes a large disturbance to the system current, but may also cause an electric arc in the relay contacts.

[0049] To address the issue of abrupt changes in the impedance of the current-sampling resistor affecting the accuracy of current measurement when switching current ranges using manual or automatic switching, in one optional embodiment, please refer to... Figure 3 and Figure 4A current acquisition circuit is provided, including a controller 40 and a first current acquisition module 10 and a second current acquisition module 20 arranged in series. The first current acquisition module 10 has a first current range, and the second current acquisition module 20 has a second current range, wherein the first current range is greater than the second current range. The first current acquisition module 10 includes a first current acquisition element 11 and a first processing circuit 12 arranged in parallel, and the second current acquisition module 20 includes a second current acquisition element 21, a second processing circuit 22, and a first control circuit 23 arranged in parallel. The input terminal of the first current acquisition element 11 is connected to the input terminal of the current acquisition circuit, the output terminal of the first current acquisition element 11 is connected to the input terminal of the second current acquisition element 21, and the output terminal of the second current acquisition element 21 is connected to the reference ground terminal GND. The output terminal of the first processing circuit 12 is connected to the input terminals of the controller 40 and the first control circuit 23. The first processing circuit 12 is used to acquire the differential voltage signal of the first current acquisition element 11 and process it into a first voltage signal. The first control circuit 23 is used to obtain the differential voltage signal of the second current sampling element 21 and process it into a second voltage signal V(I1), and output the second voltage signal V(I2) to the controller 40. The first control circuit 23 is used to turn on when the current corresponding to the first voltage signal V(I1) exceeds the second current range to reduce the current of the second current sampling element 21, and to turn off when the current corresponding to the first voltage signal V(I1) is within the second current range. The controller 40 is used to determine the current value corresponding to the first voltage signal V(I1) as a confidence current value when the current value corresponding to the first voltage signal V(I1) exceeds the second current range, and to determine the current value corresponding to the second voltage signal V(I2) as a confidence current value when the current value corresponding to the first voltage signal V(I1) is within the second current range.

[0050] Specifically, the first current acquisition module 10 is a large-range current acquisition module compared to the second current acquisition module 20, while the second current acquisition module 20 is a relatively small-range current acquisition module. The first current range being greater than the second current range means that the current acquisition range of the first current acquisition module 10 is wider or broader than that of the second current acquisition module 20. The current range corresponding to the second current range is a subset of the current range corresponding to the first current range. For example, the first current range can be the full current range adapted to the object under test, such as 0A~20A, while the current range of the second current range can be a medium range, such as 0~1A. In this case, a current acquisition circuit with a large-range-medium-range framework is formed. It should be noted that the specific current range of each current range can be adjusted according to the measurement requirements.

[0051] The scheme of this application embodiment connects a first current sampling module 10 and a second current sampling module 20 with different current ranges in series. Both can simultaneously output the measured voltage signal corresponding to the current flowing through the first current sampling element 11 and the second current sampling element 21. That is, the first voltage signal V(I1) and the second voltage signal V(I2) are obtained after processing the voltage drop across the first current sampling element 11 and the second current sampling element 21. Figure 3 and Figure 4 The bold arrows indicate the direction of the current to be measured. It should be noted that the first current sampling module 10 and the second current sampling module 20 are directly connected in series without a selection switch for switching. The first current sampling element 11 and the second current sampling element 21 can use various components that can achieve current sampling, such as commonly used current sampling resistors.

[0052] The first processing circuit 12 is used to acquire and process the differential pressure signal across the first current sampling device 11 to obtain the corresponding first voltage signal V(I1); the second processing circuit 22 is used to acquire and process the differential pressure signal across the second current sampling device 21 to obtain the corresponding second voltage signal V(I2); the corresponding measured current values ​​I1 and I2 can be calculated based on the measured voltage signals.

[0053] Since the first current range is greater than the second current range, it can be understood that when the current to be measured exceeds the range of the second current range, the current measurement value of the first current sampling module 10 is more reliable, while when the current to be measured is within the range of the second current range, the current measurement value of the second current sampling module 20 is more reliable. Therefore, by judging based on the first voltage signal, the controller 40 can select a current value with higher measurement accuracy under different circumstances. The controller 40 can use a microcontroller unit (MCU) or other types of control devices, which are not limited here.

[0054] By connecting the first current acquisition module 10 and the second current acquisition module 20, which have different current ranges, in series, multiple ranges can operate simultaneously, avoiding pulse noise to the system current when switching ranges. The first current acquisition module 10, which has a relatively large range, can operate continuously within the specified full current range. In this case, the first voltage signal acquired by the first processing circuit 12 serves as both the confidence current when the current is within the large range and the control signal input to the first control circuit 23 of the second current acquisition module 20. Since the second current acquisition module 20 is a small-range detection circuit relative to the first current acquisition module 10, the first control circuit 23 ensures that the second current acquisition module 20 can measure within the second current range. The measurement accuracy is improved, and the second current acquisition module 20 is protected when the measured current exceeds the second current range. Specifically, when the current corresponding to the current first voltage signal V(I1) exceeds the second current range, the first control circuit 23 is in the conducting state to shunt the current to the second current acquisition element 21, thereby reducing the voltage difference across the second current acquisition element 21 by bypassing part of the current, thus reducing the power consumption of the second current acquisition element 21. When the current first voltage signal V(I1) is within the second current range, the first control circuit 23 is in the off state. At this time, the current corresponding to the second voltage signal V(I2) acquired and processed by the second processing circuit 22 is the confidence current that meets the second current range.

[0055] Therefore, the current acquisition circuit provided in this application has the following overall concept for solving the problem: abandoning the conventional idea of ​​"exiting the current range before entering a new range", the first current acquisition module 10 and the second current acquisition module 20 establish the idea of ​​"the large range current acquisition module works in a fixed manner, and the small range current acquisition module works adaptively and selectively", thus realizing a current acquisition circuit that can work in multiple ranges at the same time, outputs a reliable current sampling value according to the range range of the actual current, and the overall current acquisition impedance will not change abruptly due to the change of range, that is, realizing a current acquisition circuit that avoids pulse noise to the system current when switching ranges.

[0056] In short, the solution of this application aims to avoid sudden changes in current sampling impedance caused by range switching. When the current is relatively stable, the current sampling impedance is also relatively stable, thus achieving smooth switching of current range.

[0057] Based on the same inventive concept, more current sampling modules with different current ranges can be added, thereby enabling switching between more ranges.

[0058] In some embodiments, please refer to Figure 5 and Figure 6The current acquisition circuit also includes a third current acquisition module 30 with a third current range, the second current range being greater than the third current range; the third current acquisition module 30 is connected in series with the first current acquisition module 10 and the second current acquisition module 20; the third current acquisition module 30 includes a third current acquisition element 31, a third processing circuit 32 and a second control circuit 33 connected in parallel, the input terminal of the second control circuit 33 is connected to the output terminal of the first processing circuit 12 to obtain a first voltage signal V(I1), and is turned on when the current corresponding to the first voltage signal V(I1) exceeds the third current range, and is turned off when the current corresponding to the first voltage signal V(I1) is within the third current range.

[0059] The third processing circuit 32 is used to acquire the third voltage signal V(I3) of the third current acquisition device 31 and output the third voltage signal V(I3) to the controller 40; the controller 40 is used to determine the current value corresponding to the third voltage signal V(I3) as a confidence current value when the current value corresponding to the first voltage signal V(I1) is within the third current range.

[0060] The architecture of the third current acquisition module 30 is similar to that of the second current acquisition module 20. The third processing circuit 32 obtains the voltage signal at both ends of the third current acquisition element 31 and, after processing the current acquisition signal, obtains the third voltage signal V(I3) corresponding to the actual current. The on / off state of the second control circuit 33 is controlled by the first voltage signal V(I1) output by the first current acquisition module 10. When the current to be measured exceeds the third current range, the circuit is turned on to bypass part of the current in the third current acquisition element 31, thereby protecting the third current acquisition element 31 and reducing power consumption. When the current to be measured is within the third current range, the second control circuit 33 is turned off, and the current value corresponding to the third voltage signal V(I3) is reliable.

[0061] Considering that the second current range is greater than the third current range, the second current sampling module 20 can be regarded as a medium-range current sampling module, and the third current sampling module 30 can be regarded as a small-range current sampling module; see reference. Figure 6 The input terminal of the third current acquisition module 31 is connected to the reference ground terminal GND, and the output terminal is connected to the output terminal of the current acquisition circuit. That is, the second current acquisition module 20 is connected in series between the first current acquisition module 10 and the third current acquisition module 30.

[0062] Unless otherwise specified, the current range corresponding to the small range is a subset of the current range corresponding to the medium range, and the current range corresponding to the medium range is a subset of the current range corresponding to the large range.

[0063] The connection positions described above can be summarized as follows: In the direction from upstream to downstream of the current to be measured, the series sequence of each current acquisition module is: large range - medium range - small range. The large range current acquisition module (first current acquisition module 10) is located near the input end (upstream), the small range current acquisition module (third current acquisition module 30) is located near the output end (downstream), and the medium range current acquisition module (second current acquisition module 20) is located in between. The current acquisition circuit of this architecture aims to emphasize that when the current to be measured is in the small range range, the current flowing out of the entire system, i.e., all the current to be measured, passes through the small range third current acquisition module 31, so that the current measured in the small range is accurately equal to the current flowing out of the system, i.e., the current to be measured.

[0064] In the current acquisition circuit, the first voltage signal V(I1) acquired by the large-range current acquisition module is introduced into the medium-range and small-range current acquisition modules as control signals for the first control circuit 23 and the second control circuit 33, respectively. Simultaneously, these two modules output the second voltage signal V(I2) and the third voltage signal V(I3), respectively. Although the reading accuracy of V(I1) is relatively low, considering that the first current acquisition module 10 is always in operation, it can be considered basically correct or reliable. It can be used as a reliable current value when the measured current is within the large-range range, and as a control signal for the second current acquisition module 20 and the third current acquisition module 30. Furthermore, considering that the reading of V(I1) is always present, in some embodiments, the first voltage signal V(I1) can also be used as other control signals for the system, such as for cooling fans.

[0065] When V(I1) indicates that the current is applicable to the medium or small range, and the medium / small range current acquisition module is functioning normally, the second voltage signal V(I2) and the third voltage signal V(I3) are the highest accuracy current acquisition data under the current medium / small range. When V(I1) indicates that the current exceeds the range of the medium / small range, the V(I2) and V(I3) read at this time are incorrect and unreliable data.

[0066] The first current acquisition module 10 with a large range is a conventional single-range current acquisition module, and the impedance of the current acquisition module is constant. The impedance of the second current acquisition module 20 with a medium range and the third current acquisition module 30 with a small range is also relatively stable when the current is relatively stable. In the current acquisition circuit, multiple acquisition paths in series work simultaneously. If the current range is appropriate, the system can arbitrarily select the range of acquisition data, that is, it can arbitrarily switch the range without the overall current acquisition impedance changing abruptly.

[0067] However, if the current itself changes abruptly, the current sampling impedance can only change accordingly, otherwise the corresponding current sampling device may be burned out. Therefore, the first control circuit 23 and the second control circuit 33 can quickly respond to bypass the large current exceeding the range and protect the corresponding current sampling device.

[0068] In the current acquisition circuit provided in the embodiments of this application, the first current acquisition module 10 with a large range is mandatory, while the second current acquisition module 20 with a medium range and the third current acquisition module 30 with a small range are optional. That is, the current acquisition circuit can have only the first current acquisition module 10 and the third current acquisition module 30, or only the first current acquisition module 10 and the second current acquisition module 20, or it can simultaneously include the first current acquisition module 10 with a large range, the second current acquisition module 20 with a medium range, and the third current acquisition module 30 with a small range.

[0069] In this embodiment, the third current acquisition module 30 with a small range is located at the downstream end. While achieving the highest accuracy current measurement, it can also avoid the slight leakage current that may be generated by the other two current acquisition modules, and the obtained value is the accurate value of the current flowing out to be measured. Similarly, the first current acquisition module 10 with a large range is located at the upstream end of the current path and is a conventional current acquisition module. The reference ground GND is defined between the second current acquisition module 20 and the third current acquisition module 30 to facilitate the functional implementation of the second current acquisition module 20 and the third current acquisition module 30.

[0070] In another embodiment, the third current acquisition module 30 with a small range is located at the top. While achieving the highest accuracy current measurement, it can also avoid the slight leakage current that may be generated by the other two current acquisition modules, and the obtained value is the accurate value of the current flowing into the device. Similarly, the first current acquisition module 10 with a large range is located at the bottom of the current path and is a conventional current acquisition module. The reference ground GND is defined between the second current acquisition module 20 and the third current acquisition module 30 to facilitate the functional implementation of the second current acquisition module 20 and the third current acquisition module 30.

[0071] The above embodiments illustrate the overall framework and concept of the current acquisition circuit. In the following embodiments, the various modules in the current acquisition circuit will be further explained.

[0072] In some embodiments, please refer to Figure 7The first current sampling device 11 includes a first current sampling resistor RS1 and a second current sampling resistor RS2 connected in parallel. The first processing circuit 12 includes a first operational amplifier U1. The positive voltage sampling terminal of the first current sampling resistor RS1 is connected to the non-inverting input terminal of the first operational amplifier U1 through a first resistor R1, and the negative voltage sampling terminal of the first current sampling resistor RS1 is connected to the inverting input terminal of the first operational amplifier U1 through a fourth resistor R4. The positive voltage sampling terminal of the second current sampling resistor RS2 is connected to the non-inverting input terminal of the first operational amplifier U1 through a second resistor R2, and the negative voltage sampling terminal of the second current sampling resistor RS2 is connected to the inverting input terminal of the first operational amplifier U1 through a third resistor R3. The non-inverting input terminal of the first operational amplifier U1 is connected to the reference ground terminal GND through a fifth resistor R5, and the inverting input terminal is connected to the output terminal of the first operational amplifier U1 through a sixth resistor R6. The output terminal of the first operational amplifier U1 is connected to the output terminal of the first processing circuit for outputting the first voltage signal V(I1).

[0073] The first current acquisition module 10 is used to acquire current over a large range. It is a range-insensitive design and has multiple implementation methods. Figure 7 An optional scheme is provided, with the bold arrow indicating the direction of the current to be measured; the first current sampling element 11 can use two high-precision four-wire resistors connected in parallel to distribute the power load or reduce the power consumption of the first current sampling module 10; the first current sampling resistor RS1 and the second current sampling resistor RS2 can be directly connected in parallel, or as follows: Figure 7 As shown, an average current module AVG is set on one side of the current input terminal of the first current sampling resistor RS1 and the second current sampling resistor RS2 to perform current shunting; when the current to be measured passes through the first current sampling resistor RS1 and the second current sampling resistor RS2, the voltage difference information generated is sent to the first operational amplifier U1 for summation and amplification, and the total first voltage signal V(I1) is output.

[0074] The resistance values ​​of the first resistor R1 to the sixth resistor R6 are determined according to the first current range; for example, if the first current range representing the full current range is 0~20A, then the first current sampling resistor RS1 and the second current sampling resistor RS2 with a resistance of 10mΩ can be selected, and the resistance values ​​of other resistors can be R1=R2=R3=R4=4.02KΩ, R5=R6=45.3KΩ.

[0075] Based on the circuit design above, the first voltage signal V(I1) can be calculated using the following formula:

[0076] V(I1)=Iout×10mΩ×(45.3KΩ / 4.02KΩ)≈Iout×113mΩ.

[0077] In the above formula, Iout represents the total current flowing out of the first sampling element 11.

[0078] For example, when Iout=20A, V(I1)≈20A×113mΩ=2.26V can be calculated, which is applicable to subsequent analog-to-digital conversion based on 2.5V.

[0079] In some embodiments, please refer to Figure 8 Similar to the first current sampling device 11, the second current sampling device 21 includes a third current sampling resistor RS3 and a fourth current sampling resistor RS4 connected in parallel. The positive and negative voltage sampling terminals of the third current sampling resistor RS3 and the fourth current sampling resistor RS4 are respectively connected to the second processing circuit 22. That is, by using the two resistors connected in parallel, the second processing circuit 22 performs current sampling signal processing. Specifically, the current forms a differential signal when passing through the third current sampling resistor RS3 and the fourth current sampling resistor RS4. After current sampling signal processing, the second voltage signal V(I2) is obtained and output. The structure of the second processing circuit 22 can be similar to that of the first processing circuit 12, or other types of current sampling signal processing modules can be used to achieve the corresponding functions.

[0080] The circuit design of the first control circuit 23 is related to the size of the medium range; please refer to [link / reference]. Figure 8 The first control circuit 23 includes a second operational amplifier U2, a third operational amplifier U3, and a first transistor Q1. The non-inverting input of the second operational amplifier U2 is connected to the output of the first processing circuit 12 to obtain a first voltage signal V(I1). The inverting input of the second operational amplifier U2 is connected to the output of the second operational amplifier U2. The output of the second operational amplifier U2 is connected to the first node N1 through the first three resistors R13. The current input terminals of the third current sampling resistor RS3 and the fourth current sampling resistor RS4 are connected to the first node N1 through the first one resistor R11. The first node N1 is also connected to the negative reference voltage terminal -Vref through the first two resistors R12. The non-inverting input of the third operational amplifier U3 is connected to the first node N1. The inverting input terminal is connected to the reference ground terminal GND through the first five resistors R15. The output terminal is connected to the control terminal of the first transistor Q1 through the first four resistors R14. The first terminal of the first transistor Q1 is connected to the current input terminals of the third current sampling resistor RS3 and the fourth current sampling resistor RS4. The second terminal is connected to the current output terminals of the third current sampling resistor RS3 and the fourth current sampling resistor RS4.

[0081] To more intuitively illustrate the design concept and control principle of the first control circuit 23, further explanation will be provided below using actual data.

[0082] Taking the second current range (referred to as the medium range) as an example: 0~1A, the corresponding current sampling resistor values ​​can be: RS3=RS4=1Ω, and the resistance values ​​of each resistor can be: R11=24KΩ, R12=100KΩ, R13=130KΩ, and the negative reference voltage provided by the negative reference voltage terminal is -Vref=-2.5V.

[0083] First, based on the medium range of 0~1A, the maximum allowable current exceedance is 20%, i.e., 1.2A. This means the maximum allowable voltage difference between the third current sampling resistor RS3 and the fourth current sampling resistor RS4 is 0.6V. If a larger current flows through the current sampling resistor, the voltage difference between the two resistors will increase further, which may damage the third current sampling resistor RS3 and the fourth current sampling resistor RS4.

[0084] To avoid this situation, a first transistor Q1 is designed to be connected in parallel with the third current sampling resistor RS3 and the fourth current sampling resistor RS4. By bypassing a larger current, the voltage difference between the third current sampling resistor RS3 and the fourth current sampling resistor RS4 is controlled, thereby protecting them.

[0085] The design of the first step is as follows:

[0086] When the measured current is within the medium range, the voltage difference between the third current sampling resistor RS3 and the fourth current sampling resistor RS4 is less than 0.6V. The first transistor Q1 is turned off, and all the current passes through RS3 and RS4 to form a voltage difference signal. After the current sampling signal is processed by the second processing circuit 22, such as using an operational amplifier to convert the differential signal into a single-ended signal, a medium range current sampling signal output is generated, namely the second voltage signal V(I2).

[0087] When the current under test exceeds 1.2A, the voltage difference across RS3 and RS4 will be greater than 0.6V. At this time, it is necessary to control the first transistor Q1 to turn on and bypass the current so that the voltage difference does not exceed 0.6V.

[0088] Based on the above design concept, a design such as Figure 9 The first control circuit 23 shown includes a first transistor Q1 and a third operational amplifier U3. The first transistor Q1 is a device for turning on and off, and can be a bipolar transistor (BJT) or a field-effect transistor (MOS). The accompanying drawings of this application use a field-effect transistor as an example. Its drain (first terminal) is connected to the current input terminal of the third current sampling resistor RS3 and the fourth current sampling resistor RS4, its source (second terminal) is connected to the current output terminal of the third current sampling resistor RS3 and the fourth current sampling resistor RS4, and its gate (control terminal) is connected to the first four resistors R14.

[0089] The non-inverting input of the third operational amplifier U3 is connected to the first node N1 located between the first resistor R11 and the first second resistor R12. The inverting input is grounded through the first fifth resistor R15, and the output is connected to the control electrode of the first transistor Q1 through the first fourth resistor R14.

[0090] A comparison between "voltage difference" and "constant" is established using the third operational amplifier U3. The current output terminal located on one side of the third current sampling resistor RS3 and the fourth current sampling resistor RS4 is the reference ground terminal GND. Therefore, the voltage on the current input terminal side is the "voltage difference," which is introduced to the non-inverting input terminal of the third operational amplifier U3 through the first resistor R11. The "constant" is selected through the negative reference voltage terminal using a precise negative reference level -Vref, which is introduced to the non-inverting input terminal of the third operational amplifier U3 through the first resistor R12. The inverting input terminal of the third operational amplifier U3 can be directly grounded or grounded through the first resistor R15.

[0091] This achieves the following: when the voltage difference is less than the +0.6V constant, the non-inverting input of the third operational amplifier U3 is negative, and the inverting input is zero. Its negative output turns off the first transistor Q1. When the voltage difference exceeds +0.6V, the third operational amplifier U3 outputs a positive level, turning on the first transistor Q1 to bypass part of the current, reducing the current in the third current sampling resistor RS3 and the fourth current sampling resistor RS4, thus reducing the voltage difference until it decreases to +0.6V, achieving negative feedback regulation.

[0092] The first step of the numerical calculation is as follows:

[0093] When the current i is very small and the voltage difference is v, v / R11+(-Vref) / R12<0, the third operational amplifier U3 outputs a negative level, causing the first transistor Q1 to turn off; after RS3 and RS4 are connected in parallel, the resistance is 0.5Ω, the voltage difference v=0.5i, and the power p=0.5i. 2 The power of Q1 is q=0.

[0094] The equilibrium critical point of negative feedback regulation is v / R11+(-Vref) / R12=0, that is: v / 24KΩ+(-2.5V) / 100KΩ=0, so v=0.6V and i=1.2A.

[0095] When the current i > 1.2A, the non-inverting input of the third operational amplifier U3 will stabilize at the zero level of the inverting input due to feedback. According to Kirchhoff's current law, the voltage difference v / R11 + (-Vref) / R12 = 0, so v = 0.6V. The power p of RS3 and RS4 is p = v 2 / 0.5=0.72W, the voltage difference of Q1 is also 0.6V, the current is i-1.2A, and the power is q=0.6(i-1.2).

[0096] Based on the numerical calculation results above, a graph is drawn, as shown below. Figure 10 The power and voltage difference characteristic curves of the first transistor Q1, the third current sampling resistor RS3, and the fourth current sampling resistor RS4 are shown (current range: 0~20A, the 0~4A portion is selected).

[0097] according to Figure 10 As can be seen from the large range of 20A, when the current exceeds 1.2A, the total current in the third current sampling resistor RS3 and the fourth current sampling resistor RS4 reaches its maximum value of 1.2A, and the voltage difference is fixed at +0.6V. At this point, the power consumption of the first transistor Q1 is at its maximum: P(Q1) = +0.6V × (20A - 1.2A) = 11.28W. When the current exceeds 1.2A, the current sampling in the medium range becomes meaningless. The power consumption of Q1 can be reduced by decreasing the voltage difference between RS3, RS4 and Q1, which also reduces the power consumption of RS3 and RS4. Furthermore, the larger the total current, the more the voltage difference should be reduced.

[0098] Based on the above conclusions, the design for the second phase is as follows:

[0099] The total current signal is the first voltage signal V(I1) output by the first current sampling module 10 with a large range. It is a positive level signal, just like the "voltage difference" at the current input terminals of the third current sampling resistor RS3 and the fourth current sampling resistor RS4. Therefore, similarly introducing the first voltage signal V(I1) into the first control circuit 23 can, to a certain extent, offset the "voltage difference".

[0100] Therefore, please refer to Figure 11 The first voltage signal V(I1) uses a follower: the second operational amplifier U2 to reduce interference to V(I1). The output of the second operational amplifier U2 is connected to the first node N1 (i.e., the non-inverting input of the third operational amplifier U3) through the first three resistors R13; or the second operational amplifier U2 is not used, and it is similarly connected directly to the non-inverting input of the third operational amplifier U3 through the first three resistors R13. The advantage of using the second operational amplifier U2 as a follower is that it can reduce the load on V(I1) and avoid reverse interference.

[0101] When the total current is small, i.e., the first voltage signal V(I1) is approximately zero, V(I1) is close to the zero level of the non-inverting and inverting input terminals of the third operational amplifier U3, and V(I1) has virtually no effect on the above control. When the total current is large, i.e., V(I1) is large, the current flowing into the first three resistors R13 increases, raising the level of the non-inverting input terminal of the third operational amplifier U3, causing the third operational amplifier U3 to output a higher level, further turning on the first transistor Q1 (resistance decreases), reducing the voltage difference between the third current sampling resistor RS3 and the fourth current sampling resistor RS4, and further controlling the power consumption of the first transistor Q1 connected in parallel with RS3 and RS4 under high current conditions, thereby improving the efficiency of the entire system.

[0102] The numerical calculations designed in the second step are as follows:

[0103] When the total current i is very small, the effects of the first resistor R11 and the first third resistor R13 are small, while the effect of the first second resistor R12 and the negative reference voltage level -Vref provided by its negative reference voltage terminal is large. The non-inverting input of the third operational amplifier U3 is negative, and the low output level turns off the first transistor Q1. At this time, the parallel resistance of the third current sampling resistor RS3 and the fourth current sampling resistor RS4 is 0.5Ω, the voltage drop (voltage difference) v = i × 0.5, and the power p = i 2 ×0.5, the power q of the first transistor Q1 is 0.

[0104] When the total current is large enough to bring the loop into a stable feedback state, given that V(I1)≈i×113mΩ, the non-inverting input of the third operational amplifier U3 will stabilize at the zero level of the inverting input due to feedback. According to Kirchhoff's current law:

[0105] (1)

[0106] Substituting the values: -Vref = -2.5V, R11 = 24KΩ, R12 = 100KΩ, R13 = 130KΩ, we can obtain the voltage difference v of the current-collecting resistor:

[0107] v = (0.025 – i × 0.113 / 130) × 24

[0108] Then, based on the total power of the third current-sampling resistor RS3 and the fourth current-sampling resistor RS4:

[0109] p=v 2 / 0.5 (2)

[0110] The total power of RS3, RS4, and Q1 connected in parallel is v×i, from which the power q of the first transistor Q1 can be obtained:

[0111] q = v × ip

[0112] =((0.025-i×0.113 / 130)×24)×i-(((0.025-i×0.113 / 130)×24) 2 ) / 0.5 (3)

[0113] Therefore, the power-voltage characteristic curves of the third current-sampling resistor RS3, the fourth current-sampling resistor RS4, and the first transistor Q1 can be found here. Figure 12 The first transistor Q1 has a current of 1.195A@0W, q≈4.141Wmax@i≈14.957A; combined with Figure 11 and Figure 12It can be clearly seen that when the total current is within the medium range (0~1A) and less than 1.195A, the effects of the first resistor R11 and the first third resistor R13 are small, while the effects of the first second resistor R12 and its negative reference voltage terminal are large, and the third operational amplifier U3 turns off the first transistor Q1; when the total current exceeds the medium range, R11 and R13 operate, limiting the voltage difference between RS3 and RS4; when the total current continues to increase, the effect of R13 continues to increase, suppressing the voltage difference and thus controlling the power.

[0114] The above controls are always effective, but sometimes intermediate-range acquisition may not be necessary. To achieve this, please refer to [link to relevant documentation] in some embodiments. Figure 8 The first control circuit 23 also includes a first control element O1, the first terminal 1 of which is used to connect to the output terminal of the first enable control circuit. Figure 8 (Not shown), the second terminal 2 is used to connect to the ground terminal D1 of the first enable control circuit, the third terminal 3 is connected to the negative voltage terminal V- through the first seven resistor R17, and the fourth terminal 4 is connected to the inverting input terminal of the third operational amplifier U3 through the first six resistor R16; the first control element O1 is used to turn on the third terminal 3 and the fourth terminal 4 when it receives the first enable signal with a high level output from the first enable control circuit, so that the third operational amplifier U3 outputs a constant high level and the first transistor Q1 is fully turned on.

[0115] The above scheme is the third step of the design of the first control circuit 23: the first enable signal Short1 is input through the external first enable control circuit, and the negative voltage terminal V- is connected in series with the first seven resistor R17, the secondary of the first control element O1, the first six resistor R16, and the first five resistor R15 to divide the voltage to the inverting input terminal of the third operational amplifier U3; when the input first enable signal Short1 is low, the first control element O1 is turned off, the inverting input terminal of the third operational amplifier U3 is at zero level, and the second current acquisition module 20 in the medium range works normally; when the input first enable signal Short1 is high, the first control element O1 is turned on, making the inverting input terminal of the third operational amplifier U3 negative level, so that the third operational amplifier U3 outputs a constant high level, thereby making the first transistor Q1 fully turn on, realizing the medium range acquisition shutdown and short circuit effect, and controlling the total power of the second current acquisition module 20 to theoretically zero.

[0116] In some embodiments, the first control element O1 can be an optocoupler, which can well meet the above-mentioned on / off control requirements; the function of the first enable control circuit can be implemented by the controller 40, or by setting a dedicated enable circuit, which is not limited here.

[0117] The above embodiments describe in detail the circuit design and working principle of the second current acquisition module 20 with medium range. Next, we will describe the circuit design and working principle of the third current acquisition module 30 with small range.

[0118] In some embodiments, please refer to Figure 13 Similar to the principle of the first current sampling module 10 and the second current sampling module 20, the third current sampling element 31 in the third current sampling module 30 includes a fifth current sampling resistor RS5 and a sixth current sampling resistor RS6 connected in parallel. The positive and negative voltage sampling terminals of the fifth current sampling resistor RS5 and the sixth current sampling resistor RS6 are respectively connected to the third processing circuit 32. The resistance value of the current sampling resistor is determined according to the applicable small range. For example, if the range of the third current range is 0~0.01A, the resistance value of the current sampling resistor can be: RS5=RS6=100Ω.

[0119] The second control circuit 33 includes a fourth operational amplifier U4, a fifth operational amplifier U5, a sixth operational amplifier U6, and a second transistor Q2. The inverting input of the fourth operational amplifier U4 is connected to the output of the first processing circuit 12 via a second resistor R28 to obtain a first voltage signal V(I1), and is also connected to the output of the fourth operational amplifier U4 via a second resistor R29. The non-inverting input of the fourth operational amplifier U4 is connected to the reference ground GND, and the output of the fourth operational amplifier U4 is connected to the second node N2 via a second resistor R23. The non-inverting input of the fifth operational amplifier U5 is connected to the current output of the fifth current sampling resistor RS5 and the sixth current sampling resistor RS6, and the inverting input is connected to the output of the fifth operational amplifier U5. The output of operational amplifier U5 is connected to the second node N2 through the second resistor R21; the second node N2 is also connected to the positive reference voltage terminal +Vref through the second resistor R22; the inverting input of the sixth operational amplifier U6 is connected to the second node N2, the non-inverting input is connected to the reference ground terminal GND through the second resistor R25, and the output is connected to the control terminal of the second transistor Q2 through the second resistor R24; the first terminal of the second transistor Q2 is connected to the current input terminal of the fifth current sampling resistor RS5 and the sixth current sampling resistor RS6, and the second terminal is connected to the current output terminal of the fifth current sampling resistor RS5 and the sixth current sampling resistor RS6; similar to the first transistor Q1, the second transistor Q2 can be a bipolar transistor (BJT) or a field-effect transistor (MOS).

[0120] To more intuitively illustrate the design concept and control principle of the second control circuit 33, further explanation will be provided below using actual data.

[0121] Let the range of the third current range (referred to as the small range) be 0~0.01A, and the corresponding resistor values ​​are selected as: R21=24KΩ, R22=100KΩ, R23=130KΩ, and the positive reference voltage level of the positive reference voltage terminal is +Vref=+2.5V.

[0122] The initial range is designed to be 0~0.01A, with a maximum allowable exceedance of 20%, i.e., 0.012A. This means that the maximum current of each 100Ω current-collecting resistor is 0.006A, corresponding to a maximum voltage difference of 0.6V. If a larger current flows through, i.e. the voltage difference across the resistor increases further, RS5 and RS6 will be damaged, requiring the second transistor Q2 to shunt the current.

[0123] Circuit design in step one:

[0124] Please see Figure 14 The second transistor Q2 is designed to be connected in parallel with the fifth current sampling resistor RS5 and the sixth current sampling resistor RS6. By bypassing a larger current, the voltage difference between RS5 and RS6 is controlled to protect them. When the current is within a small range, the voltage difference between RS5 and RS6 is less than 0.6V, the second transistor Q2 is turned off, and all the current passes through RS5 and RS6 to form a current sampling signal. The current sampling signal is processed by the third processing circuit 32, which can be an operational amplifier to convert the differential signal into a single-ended signal and generate a small-range current sampling signal output, namely the third voltage signal V(I3).

[0125] When the current exceeds 0.012A, meaning the voltage difference across the sampling resistor is greater than 0.6V, the second transistor Q2 needs to be turned on to bypass part of the current, ensuring the voltage difference does not exceed 0.6V. Specifically, the sixth operational amplifier U6 is used to establish a comparison between the "voltage difference" and the "constant". The current input side of RS5 and RS6 is the reference ground GND, so the absolute value of the negative voltage on the current output side is the "voltage difference". This is introduced to the second node N2, i.e., the inverting input of the sixth operational amplifier U6, via the follower: the fifth operational amplifier U5 and the second resistor R21. The "constant" is selected through the positive reference voltage terminal using a precise positive reference level +Vref, and introduced to the second node N2, i.e., the inverting input of the sixth operational amplifier U6, via the second resistor R22. The non-inverting input of the sixth operational amplifier U6 can be directly grounded or grounded via the second resistor R25.

[0126] It should be noted that for the third current acquisition module 30 with a small range, the fifth operational amplifier U5, which acts as a follower, is very necessary. This is because if it is directly connected without it, leakage current will pass through the second resistor R21, which will not meet the measurement accuracy requirements for the small range.

[0127] This achieves the following: when the voltage difference v is less than 0.6V, the inverting input of the sixth operational amplifier U6 is positive, the non-inverting input is zero, and its negative output turns off the second transistor Q2; when the voltage difference v exceeds 0.6V, the inverting input of the sixth operational amplifier U6 becomes negative, and its high output turns on the second transistor Q2 to bypass the current, reducing the current of RS5 and RS6, thus reducing the voltage difference, until the voltage difference is reduced to 0.6V, achieving negative feedback regulation.

[0128] The first step of the numerical calculation is as follows:

[0129] When the current i flowing into the device is very small, at the second node N2: (-v) / R21+(+Vref) / R22>0, the sixth operational amplifier U6 outputs a negative level, causing the second transistor Q2 to turn off; the parallel resistance of RS5 and RS6 is 50Ω, the voltage difference of the current sampling resistor is v=50i, and the power is p=50i. 2 The power of the second transistor Q2 is q=0.

[0130] The critical point is (-v) / R21+(+Vref) / R22=0, which means (-v) / R21+(+Vref) / R22=0, so v=0.6V and i=0.012A.

[0131] When the current i flowing into the device exceeds 0.012A, the inverting input of the sixth operational amplifier U6 will stabilize due to feedback, equaling the zero level of the non-inverting input. According to Kirchhoff's current law: (-v) / R21 + (+Vref) / R22 = 0, the voltage difference between RS5 and RS6 is v = 0.6V, and the power p of RS5 and RS6 is v = 0.6V. 2 / 50=7.2mW, the voltage drop of the second transistor Q2 is also 0.6V, its current is i-0.012A, and its power is q=0.6×(i-0.012).

[0132] Based on the above numerical calculations, the following plot was obtained: Figure 15 The power and voltage difference characteristic curves of the second transistor Q2, the fifth current sampling resistor RS5, and the sixth current sampling resistor RS6 are shown (total current range 0~20A, the 0~0.04A portion is selected).

[0133] according to Figure 15The problems are evident; for example, taking the upper limit current of a large range, 20A, as an example, after exceeding 0.012A, the maximum current of RS5 and RS6 is 0.012A, and the voltage difference is fixed at 0.6V. The maximum power consumption of the second transistor Q2 is P(Q2) = 0.6V × (20A - 0.012A) = 11.9928W. When the current to be measured exceeds 0.012A, the current acquisition of a small range becomes meaningless. Therefore, the power consumption of Q2 can be reduced by decreasing the voltage difference between RS5, RS6, and Q2, and the power consumption of RS5 and RS6 can also be reduced. Therefore, the larger the total current flowing into the third current acquisition module 30, the more the voltage difference should be reduced.

[0134] The second step is circuit design:

[0135] Based on the above research conclusions, please refer to Figure 16 The design of the second control circuit 33 introduces the first voltage signal V(I1) output by the first current sampling module 10 with a large range as a positive level. After passing through the inverting follower built by the second eighth resistor R28, the second ninth resistor R29 and the fourth operational amplifier U4, it becomes a signal with a negative level, just like the current output side of RS5 and RS6. Similarly, it is connected to the second node N2 through the second third resistor R23, which can offset the "voltage difference" to a certain extent.

[0136] The first voltage signal V(I1) uses an inverting follower, meaning the fourth operational amplifier U4 is similarly connected to the inverting input of the sixth operational amplifier U6 via the second three-resistor R23. When the total current to be measured is small, i.e., V(I1) is approximately zero, V(I1) is close to the zero level of the non-inverting and inverting inputs of the sixth operational amplifier U6, and the first voltage signal V(I1) has virtually no effect on the above control. When the total current is large, i.e., the first voltage signal V(I1) is large, the current flowing out through the second three-resistor R23 increases, lowering the level of the inverting input of the sixth operational amplifier U6, causing the sixth operational amplifier U6 to output a higher level, further turning on the second transistor Q2, thereby reducing the voltage difference between RS5 and RS6.

[0137] The numerical calculations designed in the second step are as follows:

[0138] When the total current is very small, the effects of the second resistor R21 and the second resistor R23 are small, while the effects of the second resistor R22 and the +Vref terminal of the positive reference voltage are large. The inverting input of the sixth operational amplifier U6 is at a positive level, and the second transistor Q2 is off. At this time, the parallel resistance of RS5 and RS6 is 50Ω, v = i × 50, p = i 2 ×50, the power q of the second transistor Q2 is 0.

[0139] When the total current is large enough to allow the loop to enter a stable feedback state, given that the first voltage signal V(I1) ≈ i × 113mΩ, the inverting input of the sixth operational amplifier U6 will stabilize at the zero level of the non-inverting input due to feedback. According to Kirchhoff's current law:

[0140] (4)

[0141] Substituting the values: +Vref=2.5V, R21=24KΩ, R22=100KΩ, R23=130KΩ, we can obtain the voltage difference between RS5 and RS6:

[0142] v= (0.025 – i×0.113 / 130) ×24 (5)

[0143] According to p=v 2 / 50Ω, the total power of RS5 and RS6 can be calculated. The total power of RS5, RS6 and Q2 connected in parallel is v×i, which is the power of the second transistor Q2:

[0144] q = v × ip

[0145] =((0.025 - i×0.113 / 130)×24) ×i - (((0.025 - i×0.113 / 130) ×24) 2 ) / 50 (6)

[0146] Based on the above calculations, we can obtain the following: Figure 17 The power versus pressure characteristic curves (0~20A) shown are as follows: Figure 18 The power versus voltage characteristic curves shown are (0~0.1A); the second transistor Q2 has 1.195A@0W, q≈4.141Wmax@i≈14.957A; combined with Figures 16-18 It can be clearly seen that when the total current is within the small range of 0~0.01A, less than 0.011995A, the effects of R21 and R23 are small, while the effects of R22 and its +Vref are large, and the sixth operational amplifier U6 turns off the second transistor Q2; when the total current exceeds the small range, R21 and R23 operate, limiting the voltage difference between RS5 and RS6; when the total current continues to increase, the effect of R23 continues to increase, suppressing the voltage difference and thus controlling the power.

[0147] The above controls are always effective, but sometimes small-range data acquisition is not required. To achieve this effect, please refer to [link / reference] in some embodiments. Figure 13The second control circuit 33 also includes a second control element O2. The first terminal 1 of the second control element O2 is used to connect to the output terminal of the second enable control circuit, the second terminal 2 is used to connect to the ground terminal D2 of the second enable control circuit, the third terminal 3 is connected to the non-inverting input terminal of the sixth operational amplifier U6 through the second six resistor R26, and the fourth terminal 4 is connected to the positive voltage terminal V+ through the second seven resistor R27. When the second control element O2 receives a high-level second enable signal output by the second enable control circuit, it turns on the third terminal 3 and the fourth terminal 4 so that the sixth operational amplifier U6 outputs a constant high level and the second transistor Q2 is fully turned on.

[0148] The above scheme is the third step of the design of the second control circuit 33: its idea is to allow the second transistor Q2 to be fully turned on when small-range acquisition is not required, and further control the total power of the third current acquisition module 30 with small range to theoretically zero; thus, the external second enable control circuit needs to output the second enable signal Short2 to the first input terminal of the second control element O2, the ground terminal D2 of the second enable control circuit is connected to the second input terminal of the second control element O2, and the positive voltage V+ is connected in series with the second seven resistor R27, the secondary of the second control element O2, the second six resistor R26, and the second five resistor R25 to the non-inverting input terminal of the sixth operational amplifier U6.

[0149] When the second enable signal Short2 is low, the second control unit O2 is turned off, the non-inverting input of the sixth operational amplifier U6 is at zero level, and the third current sampling module 30 works normally. When the second enable signal Short2 is high, the third terminal 3 and the fourth terminal 4 of the second control unit O2 are turned on, the non-inverting input of the sixth operational amplifier U6 is at a positive level, so that the sixth operational amplifier U6 outputs a constant high level, so that the second transistor Q2 is fully turned on, realizing the shutdown and short-circuit effect of the third current sampling module 30 with a small range.

[0150] In some embodiments, the second control element O2 can be an optocoupler, which can well meet the above-mentioned on / off control requirements; the function of the second enable control circuit can be implemented by the controller 40, or by a specially set enable control circuit, which is not limited here; it should be noted that the second enable control circuit and the first enable control circuit can use different enable control circuits, or they can share the same enable control circuit.

[0151] The first embodiment described above connects the current acquisition modules in series in the direction from upstream to downstream of the current to be measured, in the order of large range - medium range - small range. In other embodiments, the series connection order can be reversed, that is, in the direction from upstream to downstream of the current to be measured, the current acquisition modules are connected in series in the order of small range - medium range - large range, so that the measured current of the small range current acquisition module is theoretically equal to the inflow current of the system. Although there is still an interference current of about tens of nA in reality, the impact of the interference current on the measurement accuracy is very small and can be ignored relative to the current range of the small range.

[0152] Based on the above concept, secondly, in an optional embodiment, please refer to... Figure 19 A current acquisition circuit is provided, including a controller 40 and a first current acquisition module 10 and a second current acquisition module 20 arranged in series. The first current acquisition module 10 has a first current range, and the second current acquisition module 20 has a second current range, wherein the first current range is greater than the second current range. The first current acquisition module 10 includes a first current acquisition element 11 and a first processing circuit 12 arranged in parallel. The second current acquisition module 20 includes a second current acquisition element 21, a second processing circuit 22, and a first control circuit 23 arranged in parallel. The input terminal of the second current acquisition element 21 is connected to the reference ground terminal GND, and the output terminal of the second current acquisition element 21 is connected to the input terminal of the first current acquisition element 11. The output terminal of the first current acquisition element 11 is connected to the output terminal of the current acquisition circuit. The output terminal of the first processing circuit 12 is connected to the input terminals of the controller 40 and the first control circuit 23. The first processing circuit 12 is used to acquire the differential voltage signal of the first current acquisition element 11 and process it into a first voltage signal. The first control circuit 23 is used to obtain the differential voltage signal of the second current sampling element 21 and process it into a second voltage signal V(I1), and output the second voltage signal V(I2) to the controller 40. The first control circuit 23 is used to turn on when the current corresponding to the first voltage signal V(I1) exceeds the second current range to reduce the current of the second current sampling element 21, and to turn off when the current corresponding to the first voltage signal V(I1) is within the second current range. The controller 40 is used to determine the current value corresponding to the first voltage signal V(I1) as a confidence current value when the current value corresponding to the first voltage signal V(I1) exceeds the second current range, and to determine the current value corresponding to the second voltage signal V(I2) as a confidence current value when the current value corresponding to the first voltage signal V(I1) is within the second current range.

[0153] The current acquisition circuit provided in this embodiment has the same structure and functional design of each circuit module as the corresponding module in the first aspect embodiment, so this part will not be described again. The main difference is that the first current acquisition module 10 with a large range is set downstream of the current to be measured, and the second current acquisition module 20 with a medium range is set upstream of the current to be measured. In this way, the measured current of the second current acquisition module 20 with a medium range is equal to the inflow current of the system. When the current acquisition circuit only includes the first current acquisition module 10 and the second current acquisition module 20, the reference ground terminal GND is connected to the input terminal of the current acquisition circuit.

[0154] Similarly, please refer to Figure 20 The current acquisition circuit also includes a third current acquisition module 30 with a third current range, where the second current range is greater than the third current range. The third current acquisition module 30 is connected in series with the first current acquisition module 10 and the second current acquisition module 20. The third current acquisition module 30 includes a third current acquisition element 31, a third processing circuit 32, and a second control circuit 33 connected in parallel. The input terminal of the second control circuit 33 is connected to the output terminal of the first processing circuit 12 to obtain a first voltage signal V(I1). The control circuit 33 is turned on when the current corresponding to the first voltage signal V(I1) exceeds the third current range and turned off when the current corresponding to the first voltage signal V(I1) is within the third current range. The output terminal of the third current acquisition element 31 is connected to the reference ground GND, and its input terminal is connected to the input terminal of the current acquisition circuit.

[0155] The third processing circuit 32 is used to acquire the differential pressure signal of the third current sampling device 31 and process it into a third voltage signal V(I3), and output the third voltage signal V(I3) to the controller 40; the controller 40 is used to determine that the current value corresponding to the third voltage signal V(I3) is a confidence current value when the current value corresponding to the first voltage signal V(I1) is within the third current range.

[0156] When the current acquisition circuit includes a current acquisition module with at least three current ranges, the modules are connected in series in the direction of transmission of the current to be measured, in the manner of small range-medium range-large range; the second current acquisition module 20 is of medium range, the third current acquisition module 30 is of small range, and the second current acquisition module 20 is connected in series between the first current acquisition module 10 and the third current acquisition module 30.

[0157] In general, the current acquisition circuits provided in the first and second aspect embodiments have at least the following characteristics:

[0158] 1) Multiple (at least 2 to 3) current acquisition modules with different ranges are connected in series and simultaneously acquire current. Each current acquisition module has an independent current acquisition path. The current signal output by different current acquisition modules can be trusted according to the range of the actual current to be measured. When the current is stable, the range switching effect is achieved by trusting different ranges. The overall current acquisition impedance does not change abruptly as a result, and the system current is not disturbed.

[0159] 2) Multiple current sampling paths with different ranges. The first current sampling module 10, which covers the total current range, can monitor the overall current and serve as a basis for judging the reliability of the second current sampling module 20 and / or the third current sampling module 30 for medium / small ranges (reading high-precision current values ​​when suitable for medium / small ranges). It can also be used as a control signal to be introduced into the second current sampling module 20 and / or the third current sampling module 30 as a supplementary measure. When the overall current exceeds the corresponding range, the excessive current is bypassed through the parallel transistor (MOS), thereby controlling the voltage difference of the current sampling resistor and reducing the overall power consumption of the current sampling resistor and the parallel transistor (MOS). This is the main measure to protect the medium / small range current sampling.

[0160] 3) The first current acquisition module 10 with a large range is required, while at least one of the second current acquisition module 20 and the third current acquisition module 30 with medium / small ranges is required. In addition, additional enable control can be added to the medium / small range current acquisition modules. When it is not desired that the entire current acquisition module will generate too much voltage drop on the system current, any medium / small range current acquisition module can be turned off by the enable signal, so that the corresponding transistor (MOS) is fully turned on, achieving a short circuit effect.

[0161] 4) The self-protection of the small and medium range second current sampling module 20 and / or the third current sampling module 30 is implemented by pure analog devices and does not rely on digital control, so the protection of the small and medium range current sampling resistor is faster.

[0162] Thirdly, based on the same inventive concept, in an optional embodiment, a current acquisition device is provided, including any of the current acquisition circuits provided in the first aspect embodiment or the second aspect embodiment.

[0163] The above examples illustrate this application only to aid understanding and are not intended to limit its scope. Those skilled in the art to which this application pertains can make various simple deductions, modifications, or substitutions based on the ideas presented.

Claims

1. A current acquisition circuit, characterized in that, It includes a controller and a first current sampling module and a second current sampling module connected in series; the first current sampling module has a first current range, the second current sampling module has a second current range, and the first current range is greater than the second current range. The first current acquisition module includes a first current acquisition element and a first processing circuit connected in parallel; the second current acquisition module includes a second current acquisition element, a second processing circuit, and a first control circuit connected in parallel; the input terminal of the first current acquisition element is connected to the input terminal of the current acquisition circuit, the output terminal of the first current acquisition element is connected to the input terminal of the second current acquisition element, the output terminal of the second current acquisition element is connected to a reference ground terminal and the output terminal of the current acquisition circuit, and the output terminal of the first processing circuit is connected to the controller and the input terminal of the first control circuit. The first processing circuit is used to acquire the differential pressure signal of the first sampling device, process it into a first voltage signal, and output the first voltage signal to the first control circuit and the controller; The second processing circuit is used to acquire the differential pressure signal of the second current sampling device, process it into a second voltage signal, and output the second voltage signal to the controller; The first control circuit is used to turn on when the current corresponding to the first voltage signal exceeds the second current range, so as to reduce the current of the second current sensor, and to turn off when the current corresponding to the first voltage signal is within the second current range. The controller is configured to determine that the current value corresponding to the first voltage signal is a confidence current value when the current value corresponding to the first voltage signal exceeds the second current range, and to determine that the current value corresponding to the second voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the second current range.

2. The current acquisition circuit as described in claim 1, characterized in that, The first current sampling device includes a first current sampling resistor and a second current sampling resistor arranged in parallel, and the first processing circuit includes a first operational amplifier. The positive voltage sampling terminal of the first current sampling resistor is connected to the non-inverting input terminal of the first operational amplifier through the first resistor, and the negative voltage sampling terminal of the first current sampling resistor is connected to the inverting input terminal of the first operational amplifier through the fourth resistor. The positive voltage sampling terminal of the second current sampling resistor is connected to the non-inverting input terminal of the first operational amplifier through a second resistor, and the negative voltage sampling terminal of the second current sampling resistor is connected to the inverting input terminal of the first operational amplifier through a third resistor. The non-inverting input of the first operational amplifier is connected to the reference ground through a fifth resistor, and the inverting input of the first operational amplifier is connected to the output of the first operational amplifier through a sixth resistor; the output of the first operational amplifier is connected to the output of the first processing circuit for outputting the first voltage signal.

3. The current acquisition circuit as described in claim 1, characterized in that, It also includes a third current sampling module with a third current range, wherein the second current range is greater than the third current range; the third current sampling module is connected in series with the first current sampling module and the second current sampling module; The third current acquisition module includes a third current acquisition element, a third processing circuit, and a second control circuit arranged in parallel. The input terminal of the second control circuit is connected to the output terminal of the first processing circuit to obtain the first voltage signal. The control circuit is turned on when the current corresponding to the first voltage signal exceeds the third current range and turned off when the current corresponding to the first voltage signal is within the third current range. The input terminal of the third current sampling device is connected to the reference ground terminal, and the output terminal of the third current sampling device is connected to the output terminal of the current acquisition circuit. The third processing circuit is used to acquire the differential pressure signal of the third current sampling device, process it into a third voltage signal, and output the third voltage signal to the controller; The controller is used to determine that the current value corresponding to the third voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the third current range.

4. The current acquisition circuit as described in claim 3, characterized in that, The second current sampling device includes a third current sampling resistor and a fourth current sampling resistor arranged in parallel. The positive and negative voltage sampling terminals of the third and fourth current sampling resistors are respectively connected to the second processing circuit. The first control circuit includes a second operational amplifier, a third operational amplifier, and a first transistor; the non-inverting input of the second operational amplifier is connected to the output of the first processing circuit to obtain the first voltage signal, the inverting input of the second operational amplifier is connected to the output of the second operational amplifier, and the output of the second operational amplifier is connected to the first node through a first three resistors; The current input terminals of the third current sampling resistor and the fourth current sampling resistor are connected to the first node through the first resistor, and the first node is also connected to the negative reference voltage terminal through the first resistor. The non-inverting input of the third operational amplifier is connected to the first node, the inverting input of the third operational amplifier is connected to the reference ground through the first five resistors, and the output of the third operational amplifier is connected to the control electrode of the first transistor through the first four resistors; the first electrode of the first transistor is connected to the current input of the third current sampling resistor and the fourth current sampling resistor, and the second electrode is connected to the current output of the third current sampling resistor and the fourth current sampling resistor.

5. The current acquisition circuit as described in claim 4, characterized in that, The first control circuit further includes a first control element, the first end of which is used to connect to the output terminal of the first enable control circuit, the second end of which is used to connect to the ground terminal of the first enable control circuit, the third end of which is connected to the negative voltage terminal through a first seven-resistor, and the fourth end of which is connected to the inverting input terminal of the third operational amplifier through a first six-resistor. The first control unit is used to turn on the third terminal and the fourth terminal when it receives a high-level first enable signal output by the first enable control circuit, so that the third operational amplifier outputs a constant high level and the first transistor is fully turned on.

6. The current acquisition circuit as described in claim 3, characterized in that, The third current sampling device includes a fifth current sampling resistor and a sixth current sampling resistor arranged in parallel. The positive and negative voltage sampling terminals of the fifth and sixth current sampling resistors are respectively connected to the third processing circuit. The second control circuit includes a fourth operational amplifier, a fifth operational amplifier, a sixth operational amplifier, and a second transistor; the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the first processing circuit through a second resistor to obtain the first voltage signal, and is connected to the output terminal of the fourth operational amplifier through a second resistor; the non-inverting input terminal of the fourth operational amplifier is connected to a reference ground terminal; and the output terminal of the fourth operational amplifier is connected to a second node through a second resistor. The non-inverting input of the fifth operational amplifier is connected to the current output terminals of the fifth and sixth current sampling resistors, the inverting input of the fifth operational amplifier is connected to the output terminal of the fifth operational amplifier, and the output terminal of the fifth operational amplifier is connected to the second node through a second resistor; the second node is also connected to the positive reference voltage terminal through a second resistor. The inverting input terminal of the sixth operational amplifier is connected to the second node, the non-inverting input terminal of the sixth operational amplifier is connected to the reference ground terminal through the second five resistor, and the output terminal of the sixth operational amplifier is connected to the control electrode of the second transistor through the second four resistor. The first terminal of the second transistor is connected to the current input terminal of the fifth and sixth current sampling resistors, and the second terminal is connected to the current output terminal of the fifth and sixth current sampling resistors.

7. The current acquisition circuit as described in claim 6, characterized in that, The second control circuit also includes a second control element. The first end of the second control element is used to connect to the output terminal of the second enable control circuit, the second end is used to connect to the ground terminal of the second enable control circuit, the third end is connected to the non-inverting input terminal of the sixth operational amplifier through a second six resistor, and the fourth end is connected to the positive voltage terminal through a second seven resistor. The second control unit is used to turn on the third terminal and the fourth terminal when it receives a high-level second enable signal output by the second enable control circuit, so that the sixth operational amplifier outputs a constant high level and the second transistor is fully turned on.

8. A current acquisition circuit, characterized in that, It includes a controller and a first current sampling module and a second current sampling module connected in series; the first current sampling module has a first current range, the second current sampling module has a second current range, and the first current range is greater than the second current range. The first current acquisition module includes a first current acquisition element and a first processing circuit connected in parallel; the second current acquisition module includes a second current acquisition element, a second processing circuit, and a first control circuit connected in parallel; the input terminal of the second current acquisition element is connected to a reference ground terminal and the input terminal of the current acquisition circuit; the output terminal of the second current acquisition element is connected to the input terminal of the first current acquisition element; the output terminal of the first current acquisition element is connected to the output terminal of the current acquisition circuit; the output terminal of the first processing circuit is connected to the controller and the input terminal of the first control circuit. The first processing circuit is used to acquire the differential pressure signal of the first sampling device, process it into a first voltage signal, and output the first voltage signal to the first control circuit and the controller; The second processing circuit is used to acquire the differential pressure signal of the second current sampling device, process it into a second voltage signal, and output the second voltage signal to the controller; The first control circuit is used to turn on when the current corresponding to the first voltage signal exceeds the second current range, so as to reduce the current of the second current sensor, and to turn off when the current corresponding to the first voltage signal is within the second current range. The controller is configured to determine that the current value corresponding to the first voltage signal is a confidence current value when the current value corresponding to the first voltage signal exceeds the second current range, and to determine that the current value corresponding to the second voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the second current range.

9. The current acquisition circuit as described in claim 8, characterized in that, It also includes a third current sampling module with a third current range, wherein the second current range is greater than the third current range; the third current sampling module is connected in series with the first current sampling module and the second current sampling module; The third current acquisition module includes a third current acquisition element, a third processing circuit, and a second control circuit arranged in parallel. The input terminal of the second control circuit is connected to the output terminal of the first processing circuit to obtain the first voltage signal. The control circuit is turned on when the current corresponding to the first voltage signal exceeds the third current range and turned off when the current corresponding to the first voltage signal is within the third current range. The output terminal of the third current sampling device is connected to the reference ground terminal, and the input terminal is connected to the input terminal of the current sampling circuit. The third processing circuit is used to acquire the differential pressure signal of the third current sampling device, process it into a third voltage signal, and output the third voltage signal to the controller; The controller is used to determine that the current value corresponding to the third voltage signal is a confidence current value when the current value corresponding to the first voltage signal is within the third current range.

10. A current acquisition device, characterized in that, Includes the current acquisition circuit as described in any one of claims 1 to 9.

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