Calibration device and calibration method based on 24-bit capacitance-to-digital converter

Abstract

The invention discloses a calibration device and a calibration method based on a 24-bit capacitance-to-digital converter, and belongs to the field of high-precision analog-to-digital conversion. The device is used for circuit calibration and test of the 24-bit capacitance-to-digital converter and comprises a hardware part and a software part, the hardware part adopts an acquisition control panel with an SOC + FPGA architecture, and the software adopts a Labview architecture. Synchronous sampling is carried out through the two customized sockets, so that the capacitance value and voltage calibration of the capacitor is realized; the to-be-calibrated chip and the TS temperature sensor are placed in the same cavity through the customized socket, so that the temperature calibration error is reduced; sHLD signals acquired by the FPGA can be converted into excitation sources, but data acquisition is abnormal, two sets of FPGA programs are adopted, one set is used for excitation calibration, and the other set is used for capacitance, voltage and temperature calibration and testing; and automatic control is facilitated. The device mainly comprises an ADC general test platform, a 24-bit capacitance digital converter calibration daughter board, a high-precision DA, a TS temperature sensor, a customized socket and the like.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of high-precision analog-to-digital conversion, and particularly relates to a 24-bit capacitance digital converter calibration device and a calibration method. BACKGROUND

[0002] The 24-bit capacitance digital converter high-precision analog-to-digital converter is widely used in automotive electronics, industry and medical systems, and the high-precision ADC (such as the 24-bit capacitance digital converter) is widely used in industrial detection, medical instruments and other fields, and is mainly used for pressure measurement, position detection, short-range sensing, liquid level detection, flow metering and impurity detection. The traditional calibration method has the following problems:

[0003] 1. Slow calibration speed: single-channel calibration requires repeated switching of the reference source and the device under test, which is low in efficiency; during temperature calibration, the intervention of the temperature box leads to low calibration efficiency and complicated steps;

[0004] 2. Large calibration error: affected by the environmental temperature, the capacitance (small capacity and high precision) calibration error is large; the temperature calibration accuracy is low;

[0005] 3. Insufficient synchronization: the sampling time of the reference source and the device under calibration is not synchronized, which introduces time drift error.

[0006] In the prior art, some schemes compensate through software or increase shielding structures to improve the error, but it is difficult to solve the speed and precision problems at the same time. Therefore, there is an urgent need for a device that can quickly eliminate capacitance error and realize high-precision synchronous calibration. SUMMARY

[0007] The present application relates to the technical field of high-precision analog-to-digital conversion, and particularly relates to a 24-bit capacitance digital converter calibration device and a calibration method.

[0008] To solve the above technical problems, the present application provides a 24-bit capacitance digital converter calibration device, which comprises an ADC universal test platform;

[0009] The ADC universal test platform is based on ZYNQ and FPGA, and comprises a calibration sub-board, an ADC adjustable power supply, a data acquisition circuit and an upper computer, and realizes calibration and testing of ADCs with different voltages and different interfaces;

[0010] The calibration sub-board comprises two customized sockets, one of which serves as a reference source and the other of which serves as a device under calibration, and the device under calibration and the temperature sensor are placed in the same cavity through the customized sockets;

[0011] The channel calibration of the two sockets is completed for the first time, and the channel performance indicators of the two sockets are made close to each other through calibration.

[0012] In an embodiment, the host computer is used for online updating of the FPGA program, meeting the convenient and fast testing of different ADC chips.

[0013] In an embodiment, the calibration device adopts two sets of FPGA programs, one set for excitation source calibration, and the other set for capacitance, voltage, and temperature calibration and testing.

[0014] The application also provides a 24-bit capacitance-digital converter calibration method, comprising:

[0015] Step A: first complete two-channel parameter calibration, and make the performances of the two channels basically consistent through calibration;

[0016] Step B: online download the excitation calibration FPGA program, configure the chip working mode, open the excitation source calibration switch of the chip to be calibrated, adjust the corresponding register value of the chip to be calibrated, and make the excitation source reach (16±0.2) KHz.

[0017] Step C: after online downloading the FPGA program for capacitance, voltage, and temperature calibration and testing, configure the DA register through the host computer, and output two same voltage values.

[0018] Step D: use two customized sockets, synchronously collect at the same time and under the same temperature and humidity, adjust the corresponding register value of the chip to be calibrated, and realize capacitance and voltage calibration.

[0019] Step E: collect the TS temperature value of the customized socket in real time, continuously adjust the corresponding register value of the chip to be calibrated, and realize temperature error calibration.

[0020] Step F: complete the 24-bit capacitance-digital converter OTP programming according to the programming sequence.

[0021] In Step A, first use needs to complete two-channel parameter calibration, use the same chip to complete the parameter calibration of two channels, eliminate the system error caused by circuit wiring and component difference, and make the performances of the two channels basically consistent.

[0022] In Step B, collect the SHLD signal and convert it into a frequency, and make the excitation source reach (16±0.2) KHz through continuously repeating the step.

[0023] In Step C, the output two voltage values are close to the full scale.

[0024] In Step D, one of the two customized sockets is used as a reference source, and the other is used as a DUT to be calibrated, and two capacitors with the same capacitance are synchronously collected.

[0025] The application provides a 24-bit capacitor digital converter calibration device and a calibration method. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 The application provides a 24-bit capacitor digital converter calibration device.

[0027] Figure 2 The application provides a 24-bit capacitor digital converter calibration device.

[0028] Figure 3 The application provides a 24-bit capacitor digital converter calibration device. DETAILED DESCRIPTION

[0029] The application provides a 24-bit capacitor digital converter calibration device and a calibration method.

[0030] Figure 1 The application provides a 24-bit capacitor digital converter calibration device and a calibration method.

[0031] The calibration subboard includes two custom sockets. One channel is used as the reference source, and the other is used for calibration. The first calibration of both channels was completed, bringing their performance indicators close to the same level. This addresses calibration and testing errors caused by external environmental factors (temperature, humidity), soldering, PCB trace length, etc., during high-precision calibration of small capacitors.

[0032] Custom sockets ensure that the chip under test (DUT) and temperature sensor (TS) are at the same case temperature, reducing temperature calibration error accuracy; one high-precision DA chip is used to output the full-scale voltage required for voltage calibration of the calibration chip.

[0033] Figure 2 The calibration flowchart of the 24-bit capacitor-to-digital converter calibration device provided by the present invention includes the following steps:

[0034] After completing the hardware wiring and power-on preparations, run the calibration test software;

[0035] After clicking the Start Calibration button, first download the FPGA program corresponding to the frequency source calibration, and then change the corresponding registers to make the SHLD signal frequency within the range of (16±0.2)KHz to complete the frequency source calibration.

[0036] Next, download the FPGA program corresponding to the capacitance, voltage, and temperature calibration. The capacitance calibration is performed under the premise that the two channels have been calibrated. The DUT to be calibrated is aligned with the measured value of the accompanying chip to complete the register matching. This method effectively solves the problem that the calibration error of capacitance (small capacitance value, high precision) is large due to the influence of ambient temperature. During the temperature calibration process, the DUT to be calibrated is aligned with the measured value of the temperature sensor TS in the same cavity to complete the register matching, which can effectively improve the accuracy of the calibration temperature.

[0037] After all calibration items are calibrated, the chip performance indicators are tested. If they pass, OTP programming is performed; otherwise, they are scrapped.

[0038] After the OTP programming of qualified products is completed, the program will automatically power on again and test the performance indicators of the chip again. Qualified products will be put into storage, and unqualified products will be scrapped.

[0039] Figure 3 This document presents a physical test diagram for calibrating a 24-bit capacitor-to-digital converter. The calibration test software interface mainly includes manual power-on / off, FPGA program download, register configuration, mode selection, and display of key test indicators.

[0040] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A 24-bit capacitance-to-digital converter calibration apparatus, comprising: The application relates to an ADC universal test platform. The ADC universal test platform is based on ZYNQ and FPGA, comprises a calibration subboard, an ADC adjustable power supply, a data acquisition circuit and an upper computer, and realizes calibration and test of ADCs with different voltages and different interfaces. The calibration subboard comprises two customized sockets, one of which is used as a reference source and the other is used as a chip to be calibrated; the chip to be calibrated and a temperature sensor are placed in the same cavity through the customized sockets. Channel calibration of the two sockets is completed for the first time, and the channel performance indexes of the two sockets are made close to each other through calibration.

2. The 24-bit capacitance-to-digital converter calibration apparatus of claim 1, wherein, The upper computer is used for online updating of the FPGA program, and different ADC chips can be conveniently and quickly tested.

3. The 24-bit capacitance-to-digital converter calibration apparatus of claim 1, wherein, The calibration device adopts two sets of FPGA programs, one set of which is used for excitation source calibration, and the other set is used for capacitor, voltage and temperature calibration and test.

4. A calibration device and calibration method according to any one of claims 1 to 3, characterized in that The application comprises the following steps: Step A: two-channel parameter calibration is completed for the first time, and the two-channel performance is made close to each other through calibration; Step B: an excitation calibration FPGA program is downloaded online, the chip working mode is configured, and the excitation source calibration switch of the chip to be calibrated is turned on; the corresponding register value of the chip to be calibrated is adjusted, so that the excitation source reaches (16+ / -0.2) KHz; Step C: after an FPGA program for capacitor, voltage and temperature calibration and test is downloaded online, the DA register is configured through the upper computer, and two paths of the same voltage value are outputted; Step D: two customized sockets are used to synchronously collect at the same time and under the same temperature and humidity, the corresponding register value of the chip to be calibrated is adjusted, and capacitor and voltage calibration are realized; Step E: the TS temperature value of the customized socket is collected in real time, the corresponding register value of the chip to be calibrated is continuously adjusted, and temperature error calibration is realized; Step F: 24-bit capacitor digital converter OTP programming is completed according to the programming sequence.

5. The 24-bit capacitor digital converter calibration apparatus and calibration method according to claim 4, wherein, In step A, two-channel parameter calibration is completed for the first time, and the same chip is used to complete parameter calibration of two channels, so that system errors caused by circuit wiring and component differences are eliminated, and the two-channel performance is made close to each other.

6. The 24-bit capacitance-to-digital converter calibration apparatus and calibration method according to claim 4, wherein, In step B, the SHLD signal is collected and converted into a frequency, and the excitation source is made to reach (16+ / -0.2) KHz through continuous repetition of the step.

7. The 24-bit capacitor digital converter calibration apparatus and calibration method according to claim 4, wherein, In step C, the two paths of the outputted voltage value are close to full scale.

8. The 24-bit capacitor digital converter calibration apparatus and calibration method according to claim 4, wherein, In step D, one of the two customized sockets is used as a reference source, and the other is used as a DUT to be calibrated; two capacitors with the same capacitance are synchronously collected.

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