Method for producing plurality of semiconductor laser chips, semiconductor laser chip, method for producing laser device, and laser device
By providing an epitaxial semiconductor layer sequence and a photonic crystal layer on the growth substrate and applying electrical contact sites in the wafer-level manufacturing process, the complexity of manufacturing photonic surface-emitting semiconductor laser chips in the prior art is solved, realizing the simplification and efficient manufacturing of flip chip structure and improving chip performance.
Patent Information
- Application Number
- CN202480038950.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-23
- Filing Date
- 2024-06-10
- Publication Date
- 2026-01-13
AI Technical Summary
Existing technologies are difficult to simplify the manufacturing of multiple photonic surface-emitting semiconductor laser chips, and it is also difficult to realize the manufacturing of photonic surface-emitting semiconductor laser chips with flip-chip structure.
By providing an epitaxial semiconductor layer sequence, including an active layer and a photonic crystal layer, on a growth substrate, and applying electrical contacts on or above the epitaxial semiconductor layer sequence, combined with wafer-level manufacturing processes, a flip-chip structure of a photonic surface-emitting semiconductor laser chip can be realized.
The fabrication of multiple photonic surface-emitting semiconductor laser chips has been simplified, which simplifies the manufacturing process, improves the current distribution of the chip and the reflection efficiency of the photonic crystal, and reduces inductance and switching time.
Smart Images

Figure CN121336330A_ABST
Abstract
Description
[0001] A method for manufacturing a plurality of photonic surface emitting semiconductor laser chips, a photonic surface emitting semiconductor laser chip, a method for manufacturing a laser device and a laser device are presented.
[0002] It is intended to present a simplified method for manufacturing a plurality of photonic surface emitting semiconductor laser chips. In particular, the method shall enable the production of photonic surface emitting semiconductor laser chips in flip chip configuration. Furthermore, it is intended to present an improved photonic surface emitting semiconductor laser chip, in particular a photonic surface emitting semiconductor laser chip in flip chip configuration. Moreover, it is intended to present a simplified method for manufacturing a laser device and an improved laser device.
[0003] These objects are achieved by the method having the steps of claim 1, by the photonic surface emitting semiconductor laser chip having the features of claim 10, by the method having the steps of claim 16 and by the laser device having the features of claim 17.
[0004] Advantageous embodiments and improvements of the two methods, the photonic surface emitting semiconductor laser chip and the laser device are given in the dependent claims, respectively.
[0005] According to one embodiment of the method for manufacturing a plurality of photonic surface emitting semiconductor laser chips, an epitaxial semiconductor layer sequence with an active layer is provided on a growth substrate. The epitaxial semiconductor layer sequence is in particular epitaxially grown on the growth substrate and completely covers the growth substrate.
[0006] For example, the epitaxial semiconductor layer sequence and the growth substrate have one or more semiconductor materials from the same material system or are formed by one or more semiconductor materials of the same material system. In this case, the lattice constant of the growth substrate and the lattice constant of the epitaxial semiconductor layer sequence are very similar to each other. In particular, in this case, the epitaxial semiconductor layer sequence is homoepitaxially grown on the growth substrate.
[0007] According to one embodiment of the method, the growth substrate and the epitaxial semiconductor layer sequence have one or more semiconductor materials from a material system of nitride compound semiconductor materials. Nitride compound semiconductor materials are compound semiconductor materials containing nitrogen, for example materials from the In x Al y Ga 1-x-y N system, wherein 0 ≤ x ≤ 1, 0 ≤ y ≤ 1 and x + y ≤ 1. For example, the growth substrate has GaN or is formed by GaN.
[0008] The active layer is provided for generating electromagnetic radiation. The active layer is arranged between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. In other words, the epitaxial semiconductor layer sequence has a first semiconductor layer, an active layer and a second semiconductor layer. The first semiconductor layer and the second semiconductor layer are doped according to two different conductivity types. For example, the first semiconductor layer is n-doped and the second semiconductor layer is p-doped, or vice versa. In particular, the first semiconductor layer is arranged closer to the growth substrate than the second semiconductor layer.
[0009] According to a further embodiment of the method, a photonic layer having a photonic crystal is generated in the first semiconductor layer and / or in the second semiconductor layer. The photonic layer consists, for example, of the photonic crystal.
[0010] The photonic crystal has a bandgap for photons which is equivalent to the electronic bandgap of a semiconductor, the so-called photonic bandgap. Photons having an energy within the photonic bandgap cannot propagate in the photonic crystal and are reflected by the photonic crystal. The photonic bandgap is constituted by a periodic structure consisting of at least two materials, the photonic crystal comprising or being formed by these materials. The dimension of the photonic crystal is determined by the dimension of the periodicity of the structure. A three-dimensional photonic crystal comprises a structure which is periodically continued in three spatial directions. A two-dimensional photonic crystal comprises an equivalent structure which is periodically constituted in two spatial directions.
[0011] The photonic crystal is generated, for example, by introducing columnar holes in a periodic pattern in the first semiconductor layer and / or in the second semiconductor layer, the main extension direction of the columnar holes running along the stacking direction of the epitaxial semiconductor layer sequence. The remaining material of the first semiconductor layer and / or of the second semiconductor layer, together with the material of the columnar holes, constitutes the photonic crystal, in particular. The columnar holes are filled, for example, with a gaseous medium, for example air. The columnar holes can also be filled with a dielectric material. It is particularly preferred that the difference in refractive index between the remaining material of the epitaxial semiconductor layer sequence in the photonic layer and the material of the columnar holes is particularly high in order to achieve a photonic bandgap which is as large as possible.
[0012] According to a further embodiment of the method, a recess is generated from a main face of the epitaxial semiconductor layer sequence, wherein the recess penetrates the active layer, in particular completely penetrates the active layer. In particular, the recess extends into the first semiconductor layer if the first semiconductor layer is arranged closer to the growth substrate than the second semiconductor layer. The recess can be generated, for example, by dry chemical etching.
[0013] According to a further embodiment of the method, a plurality of first electrical contact sites is applied in the recess, the first electrical contact sites being in electrical contact with the first semiconductor layer. In particular, the first electrical contact sites are applied in direct contact to the first semiconductor layer in the recess.
[0014] According to another embodiment of the method, a plurality of second electrical contact sites is applied on or above the main face of the epitaxial semiconductor layer sequence, which second electrical contact sites are in electrical contact with the second semiconductor layer. In particular, the second electrical contact sites are configured to be mirror-like for electromagnetic radiation of the active layer. For example, the second electrical contact sites comprise or are formed of silver. Furthermore, the second electrical contact sites can have or be formed of a metal-dielectric mirror. For example, the second electrical contact sites are applied in direct contact to the second semiconductor layer. If a photonic crystal is introduced into the second semiconductor layer, it is also possible to apply the second electrical contact sites in direct contact to the photonic layer having the photonic crystal.
[0015] The term "on or above" is in particular to indicate that the two elements so interrelated do not necessarily have to be in direct physical contact with each other. Rather, further elements can be arranged therebetween.
[0016] In particular, a solder layer can be applied on the first electrical contact sites and / or on the second electrical contact sites.
[0017] The method for manufacturing a plurality of photonic surface-emitting semiconductor laser chips in particular comprises the following steps:
[0018] - providing an epitaxial semiconductor layer sequence on a growth substrate, the epitaxial semiconductor layer sequence having an active layer arranged for generating electromagnetic radiation, wherein the active layer is arranged between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type,
[0019] - generating a photonic layer having a photonic crystal in the first semiconductor layer and / or in the second semiconductor layer,
[0020] - generating a recess from a main face of the epitaxial semiconductor layer sequence, wherein the recess penetrates the active layer,
[0021] - applying a plurality of first electrical contact sites in the recess, which first electrical contact sites are in electrical contact with the first semiconductor layer,
[0022] - applying a plurality of second electrical contact sites on or above the main face of the epitaxial semiconductor layer sequence, which second electrical contact sites are in electrical contact with the second semiconductor layer.
[0023] In particular, the steps are performed in the order as proposed.
[0024] In particular, the growth substrate is a wafer and the epitaxial semiconductor layer sequence is a semiconductor layer sequence having a plurality of consecutive semiconductor layer stacks from which a plurality of independent photonic surface-emitting semiconductor laser chips are subsequently generated.
[0025] The method is in particular a wafer-level method, wherein the method steps are performed at a wafer composite, thereby producing a plurality of identical photonic surface-emitting semiconductor laser chips. In particular, the growth substrate and the epitaxial semiconductor layer sequence are present as a wafer composite.
[0026] With the method, in particular a photonic surface-emitting semiconductor laser chip is manufactured in flip-chip configuration, wherein the first and the second electrical contact sites are arranged on or above the same main face of the epitaxial semiconductor layer sequence.
[0027] According to one embodiment of the method, a further layer is applied on the photonic layer before the first and the second electrical contact sites are applied. The further layer is for example a further semiconductor layer, which preferably has the same conductivity type as the semiconductor material of the photonic layer. In particular, the further semiconductor layer has the second conductivity type of the second semiconductor layer. In particular, the further semiconductor layer is p-doped. It is also possible that the further layer has or consists of a TCO (abbreviation of "transparent conductive oxide"), for example ITO (abbreviation of "indium tin oxide"). In particular, the further layer is electrically conductive.
[0028] According to another embodiment of the method, an insulating layer is arranged on the side of the recess. With the example of a single recess, the first electrical contact site extends for example completely over the bottom face of the recess and the side of the recess facing away from the photonic layer up to the adjoining portion of the main face of the epitaxial semiconductor layer sequence. The insulating layer covers for example the side of the recess which is not covered by the first electrical contact site. Preferably, the insulating layer completely covers the photonic layer exposed at the side of the recess. The insulating layer can be applied on the side of the recess immediately after the recess is produced or at any later point in time.
[0029] According to another embodiment of the method, an insulating layer is arranged between the first electrical contact sites and the second electrical contact sites. In particular, the insulating layer electrically insulates the first electrical contact sites and the directly adjacent second electrical contact sites from one another. In particular, the insulating layer is configured to be electrically insulating. The insulating layer has for example or consists of a dielectric material.
[0030] According to another embodiment of the method, a sacrificial layer is applied on or above the first and the second electrical contact sites, wherein the sacrificial layer has a plurality of through-holes which completely penetrate the sacrificial layer. The sacrificial layer has for example or consists of a metal or an electrical insulator, such as SiO2.
[0031] According to another embodiment of the method, a planarization layer is applied to the sacrificial layer, wherein the material of the planarization layer fills the vias. Specifically, the material of the planarization layer completely fills the vias. The planarization layer is applied entirely to the sacrificial layer. The planarization layer may specifically contain or be composed of a polymer, such as benzocyclobutene (BCB). For example, the planarization layer is applied by spin coating.
[0032] According to another embodiment, a carrier wafer is applied on or over a planarization layer. For example, the carrier wafer is attached to the planarization layer by adhesive or soldering. For example, the carrier wafer may be made of one of the following materials or formed from one of the following materials: silicon, germanium, or sapphire.
[0033] According to another embodiment of the method, the sacrificial layer is partially removed, such that the material of the planarization layer within the vias forms a connecting element that mechanically connects the epitaxial semiconductor layer sequence to the carrier wafer. Specifically, after removing the sacrificial layer, the epitaxial semiconductor layer sequence is mechanically connected to the carrier wafer solely through the connecting element.
[0034] For example, the sacrificial layer can be removed by dry chemical methods, such as by using a reactive gas mixture that selectively dissolves the sacrificial layer. Alternatively, wet chemical methods can also be used to remove the sacrificial layer. Preferably, a protective layer is applied over the first and second electrical contact sites before removing the sacrificial layer.
[0035] This method is specifically the so-called "Coupon-method," in which a subsequently processed photonic surface-emitting semiconductor laser chip is provided on a carrier wafer, and the completed photonic surface-emitting semiconductor laser chip is mechanically connected to the carrier wafer via connecting elements. The connecting elements are relatively small in size, allowing the photonic surface-emitting semiconductor laser chip to be easily detached from the carrier wafer and transferred to another element (e.g., a wiring carrier) at a later time point (e.g., using a stempel).
[0036] According to another embodiment of the method, multiple notches are formed in the epitaxial semiconductor layer sequence, allowing the sacrificial layer to be contacted through the notches. Specifically, the epitaxial semiconductor layer stack is defined by two directly adjacent notches, and this stack is part of a completed photonic surface-emitting semiconductor laser chip. The notches in the epitaxial semiconductor layer sequence are formed, for example, by dry chemical etching.
[0037] According to another embodiment of the method, the growth substrate is thinned or completely removed from the epitaxial semiconductor layer sequence. For example, the growth substrate is thinned or removed by etching, grinding, and / or polishing. If the growth substrate is thinned, the remaining thickness of the thinned growth substrate is, for example, 1 micrometer to 50 micrometers (inclusive of endpoints), or 1 micrometer to 20 micrometers (inclusive of endpoints), or 1 micrometer to 10 micrometers (inclusive of endpoints).
[0038] According to another embodiment of the method, a photonic layer is generated in the second semiconductor layer before the first and second electrical contact portions are applied to the epitaxial semiconductor layer sequence. In this embodiment, the wafer composite is mechanically stabilized, particularly by means of the growth substrate alone. Specifically, the carrier wafer is not yet fixed to the epitaxial semiconductor layer sequence.
[0039] According to another embodiment of the method, after applying the first and second electrical contact portions to the epitaxial semiconductor layer sequence, a photonic layer is generated in the first semiconductor layer. Here, the first semiconductor layer is disposed closer to the growth substrate than the second semiconductor layer. In this embodiment, in particular, the carrier wafer is fixed to the epitaxial semiconductor layer sequence and the growth substrate is completely removed, so that the first semiconductor layer is freely contactable to generate a photonic crystal in the first semiconductor layer.
[0040] In particular, in this embodiment of the method, it is not necessary to seal the photonic layer containing the photonic crystal. In other words, the structure (e.g., columnar recess) used to form the photonic crystal in the first semiconductor layer does not need to be filled with other materials. If the first semiconductor layer is an n-doped semiconductor layer, it is advantageous to generate the photonic crystal in this semiconductor layer because a better current distribution can be obtained in the subsequent operation of the photonic surface-emitting semiconductor laser chip compared to a p-doped semiconductor layer, and therefore the reduction in current through the semiconductor material due to the photonic crystal is no longer so important.
[0041] According to another embodiment of the method, the growth substrate is removed before the photonic layer is generated.
[0042] The method is configured to manufacture at least one photonic surface-emitting semiconductor laser chip. Specifically, the method provides a wafer composite comprising multiple photonic surface-emitting semiconductor laser chips connected to a carrier wafer, particularly via connecting elements. Therefore, all the features and embodiments described in conjunction with the method for manufacturing a photonic surface-emitting semiconductor laser chip can also be incorporated into the photonic surface-emitting semiconductor laser chip, and vice versa.
[0043] According to one embodiment, a photonic surface-emitting semiconductor laser chip includes a stack of epitaxial semiconductor layers having an active region disposed between a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, wherein the active region generates electromagnetic laser radiation during operation.
[0044] As described above, multiple notches are created in the epitaxial semiconductor layer sequence, separating the sequence into an epitaxial semiconductor layer stack. Hereinafter, the portion of the active layer located within the epitaxial semiconductor layer stack is specifically referred to as the active region. In other words, before the notches are introduced into the epitaxial semiconductor layer sequence, the active region is a portion of the active layer. However, the terminology for the first semiconductor layer and the second semiconductor layer remains unchanged, even though only a portion of the first semiconductor layer and a portion of the second semiconductor layer of the epitaxial semiconductor layer sequence exist within the epitaxial semiconductor layer stack. The same applies to photonic layers and photonic crystals.
[0045] According to another embodiment, the photonic surface-emitting semiconductor laser chip includes a photonic layer having a photonic crystal arranged in the near field of electromagnetic laser radiation generated in the active region. Specifically, the photonic surface-emitting semiconductor laser chip is a PCSEL (an abbreviation for "photonic surface-emitting semiconductor laser").
[0046] Specifically, the photonic crystal generates an increased photon density of states in the active region, resulting in electromagnetic laser radiation in the active region upon electrical pumping. The active region is optically coupled to the photonic crystal, causing at least one evanescent wave of the electromagnetic laser radiation mode to propagate within the photonic crystal. For example, the active region is separated from the photonic crystal only by a thin carrier blocking layer. Specifically, the active region is positioned in the near field of the photonic crystal. This results in emission, particularly in the photonic crystal mode.
[0047] According to another embodiment, the photonic surface-emitting semiconductor laser chip includes a first electrical contact and a second electrical contact on or above the main surface of an epitaxial semiconductor layer stack.
[0048] Specifically, a recess is arranged at least partially between the first electrical contact and the second electrical contact. For example, the recess extends annularly around the radiating surface of the photonic surface-emitting semiconductor laser chip. Alternatively, the recess may have the shape of a contact finger that extends entirely or partially on the radiating surface.
[0049] Furthermore, an insulating layer is preferably disposed between the first electrical contact portion and the second electrical contact portion. For example, the insulating layer is applied to the side surface of the recess. The insulating layer preferably electrically insulates the first electrical contact portion from the second electrical contact portion.
[0050] The radiation exit surface of a photonic surface-emitting semiconductor laser chip is specifically configured to completely or partially overlap with the first electrical contact area in a top view.
[0051] According to another embodiment of the photonic surface-emitting semiconductor laser chip, the photonic crystal is a two-dimensional photonic crystal, which helps to generate electromagnetic laser radiation in the active region.
[0052] According to another embodiment, the photonic surface-emitting semiconductor laser chip includes a first mounting surface and a second mounting surface located on the same plane. Specifically, the photonic surface-emitting semiconductor laser chip is a semiconductor chip with a flip-chip configuration. Specifically, the first electrical contact and the second electrical contact are arranged on or above the same main surface of the epitaxial semiconductor layer stack. Therefore, the photonic surface-emitting semiconductor laser chip can be easily mounted to other components (e.g., electrical wiring carriers).
[0053] For example, the first outer surface of the first electrical contact portion forms a first mounting surface, and the outer surface of the second electrical contact portion forms a second mounting surface of the photonic surface-emitting semiconductor laser chip. Alternatively, it is also feasible to provide solder layers on or above the first electrical contact portion and on or above the second electrical contact portion, respectively, with the solder layers forming the first mounting surface and / or the second mounting surface.
[0054] According to another embodiment of the photonic surface-emitting semiconductor laser chip, the first electrical contact portion is configured as annular in a top view and arranged around a second electrical contact portion at a distance, the second electrical contact portion preferably being circular, particularly circular. The first electrical contact portion, arranged annularly around the circular second electrical contact portion in the top view, particularly has improved switching time due to its geometry.
[0055] If the first electrical contact is arranged annularly around the second electrical contact at a distance in a top view, it is feasible for the annular first electrical contact to have an opening extending through it. This improves the solderability of the surface-emitting semiconductor laser chip because the bonding material (such as solder) is not surrounded by the annular first electrical contact. During bonding, excess bonding material can be discharged from below the surface-emitting semiconductor laser chip through the opening.
[0056] According to another embodiment of the photonic surface-emitting semiconductor laser chip, the radiation exit surface of the photonic surface-emitting semiconductor laser is configured as a circle in the top view and is covered by a circular second electrical contact portion. Specifically, the circular second electrical contact portion injects current into the overlapping region of the epitaxial semiconductor layer stack in the top view, thereby generating electromagnetic laser radiation thereon.
[0057] The photonic surface-emitting semiconductor laser chip described herein is configured for use in a method for manufacturing a laser device. Therefore, all features and embodiments disclosed in conjunction with the photonic surface-emitting semiconductor laser chip are also disclosed in the method for manufacturing a laser device, and vice versa.
[0058] According to one embodiment of a method for manufacturing a laser device, a plurality of photonic surface-emitting semiconductor laser chips are provided, as described above. Here, the photonic surface-emitting semiconductor laser chips are mechanically connected to a carrier wafer using connecting elements. Specifically, the photonic surface-emitting semiconductor laser chips are mechanically connected to the carrier wafer only through connecting elements. For example, each photonic surface-emitting semiconductor laser chip is mechanically connected to the carrier wafer using at least three connecting elements.
[0059] According to another embodiment of the method for manufacturing a laser device, at least one photonic surface-emitting semiconductor laser chip is transferred from a carrier wafer to a wiring carrier, for example using a punch, particularly a silicone punch. Here, the connection between the photonic surface-emitting semiconductor laser chip and the carrier wafer via connecting elements is weaker than the connection between the photonic surface-emitting semiconductor laser chip and the punch. Using the punch, the connecting elements are mechanically separated (e.g., broken), so that the photonic surface-emitting semiconductor laser chip, attached to the punch, can be transferred to another element (such as a wiring carrier).
[0060] Specifically, the method for manufacturing laser devices includes the following steps:
[0061] - Provides multiple photonic surface-emitting semiconductor laser chips, which are mechanically connected to a carrier wafer using connecting elements, and
[0062] - Transfer at least one photonic surface-emitting semiconductor laser chip from a carrier wafer to a wiring carrier.
[0063] In particular, these steps are performed in the proposed order.
[0064] Using the proposed method, it is particularly feasible to fabricate laser devices having multiple photonic surface-emitting semiconductor laser chips arranged at small distances to each other.
[0065] The following describes a laser device that can be manufactured using methods for manufacturing laser devices. Therefore, all the features and embodiments described in conjunction with methods for manufacturing laser devices can also be incorporated into a laser device, and vice versa.
[0066] According to one embodiment, the laser device includes a photonic surface-emitting semiconductor laser chip, particularly as described above.
[0067] According to another embodiment, the laser device includes a wiring carrier having a first electrical connection portion and a second electrical connection portion. For example, the wiring carrier is a printed circuit board (PCB). The wiring carrier can also be another semiconductor chip, such as a silicon semiconductor chip, or a photonic integrated circuit (PIC).
[0068] According to another embodiment of the laser device, for example by welding, the first electrical contact of the photonic surface-emitting semiconductor laser chip is electrically and mechanically connected to the first electrical connection of the wiring carrier, and the second electrical contact of the photonic surface-emitting semiconductor laser chip is electrically and mechanically connected to the second electrical connection of the wiring carrier.
[0069] For example, the first electrical contact and the first electrical connection have the same geometry. Furthermore, it is also feasible for the second electrical contact of the photonic surface-emitting semiconductor laser chip and the second connection of the wiring carrier to have the same geometry. In particular, if the second electrical contact of the photonic surface-emitting semiconductor laser chip is circular, especially circular, then the second electrical connection of the wiring carrier is preferably also circular, especially circular. Similarly, if the first electrical contact of the photonic surface-emitting semiconductor laser chip is annular, then the first electrical connection of the electrical connection carrier is preferably also annular. The relative arrangement between the first and second electrical connections of the wiring carrier is also preferably configured in the same way as the arrangement of the first and second electrical contacts.
[0070] According to another embodiment of the laser device, the second wiring portion is circular, particularly circular, in a top view, and the first wiring portion is arranged circumferentially around the circular second wiring portion at a distance. Furthermore, the first and second wiring portions are connected to guide rails on the wiring carrier, particularly in a direct connection. In particular, the photonic surface-emitting semiconductor laser chip described herein is configured as a flip-chip structure, thus allowing electrical contact between the photonic surface-emitting semiconductor laser chip and the wiring carrier via the same side.
[0071] Because surface-emitting diode (SED) laser chips are configured as flip chips, relatively flat laser devices can be produced. Furthermore, bonding wires can be eliminated in the electrical contacts of SED laser chips, resulting in lower inductance and shorter switching times for the laser devices.
[0072] Furthermore, advantageously, large-area optical elements can be directly mounted onto the photonic surface-emitting semiconductor laser chip connected to the wiring carrier, as there are no interfering adhesive lines. Specifically, after the photonic surface-emitting semiconductor laser chip is connected to the wiring carrier, other optical elements are mounted on or above the radiation-emitting surface of the photonic surface-emitting semiconductor laser chip. Therefore, the optical elements are not subject to harmful temperature rises during the connection process.
[0073] Furthermore, light from a photonic surface-emitting semiconductor laser chip can be directly coupled into an optical fiber, particularly one with a large cross-section. Additionally, a medium for matching the refractive index can be introduced between the optical element and / or the optical fiber.
[0074] Other advantageous implementations and improvements of photonic surface-emitting semiconductor laser chips, two methods, and laser devices are derived from the embodiments described below in conjunction with the accompanying drawings.
[0075] Figures 1 to 9 A schematic cross-sectional view of a method stage for manufacturing a plurality of photonic surface-emitting semiconductor laser chips according to one embodiment is shown.
[0076] Figures 10 to 12 A schematic cross-sectional view of a method stage for manufacturing a plurality of photonic surface-emitting semiconductor laser chips according to another embodiment is shown.
[0077] Figure 13 A schematic cross-sectional view of a photonic surface-emitting semiconductor laser chip as part of a wafer composite is shown according to one embodiment.
[0078] Figures 14 to 16 A schematic cross-sectional view of a method stage for manufacturing a laser device according to one embodiment is shown.
[0079] Figure 17 and Figure 18 A schematic cross-sectional view of a laser device according to one embodiment is shown.
[0080] Figure 19 and Figure 20 A schematic top view of the wiring carrier according to two different embodiments is shown.
[0081] The same, similar, or equivalent elements in the accompanying drawings are labeled with the same reference numerals. The dimensional proportions of the elements shown in the drawings and figures should not be considered as drawn to scale. Rather, individual elements, especially layer thicknesses, may be exaggerated for better illustration and / or better understanding.
[0082] According to Figures 1 to 9In the method for manufacturing multiple photonic surface-emitting semiconductor laser chips according to the embodiments, an epitaxial semiconductor layer sequence 2 is first provided on a growth substrate 1.
[0083] In this embodiment, the epitaxial semiconductor layer sequence 2 is based on a nitride compound semiconductor material and is epitaxially grown, for example, on a gallium nitride growth substrate (see...). Figure 1 ).
[0084] The epitaxial semiconductor layer sequence 2 includes a first semiconductor layer 3 of a first conductivity type and a second semiconductor layer 4 of a second conductivity type. In this embodiment, the first semiconductor layer 3 is n-doped, while the second semiconductor layer 4 is p-doped. Here, the n-doped first semiconductor layer 3 is disposed closer to the growth substrate 1 than the p-doped second semiconductor layer 4. An active layer 5 is disposed between the first semiconductor layer 3 and the second semiconductor layer 4, and this active layer is configured to generate electromagnetic radiation.
[0085] A growth substrate 1 and an epitaxial semiconductor layer sequence 2 are provided as a wafer composite 6 and are further processed in subsequent steps to produce multiple photonic surface-emitting semiconductor laser chips in parallel process steps. For clarity, the fabrication of only a single photonic surface-emitting semiconductor laser chip is shown in the figure.
[0086] Starting from the main plane of the epitaxial semiconductor layer sequence, a recess 7 is created in the epitaxial semiconductor layer sequence 2. Here, the recess 7 completely penetrates the active layer 5. Figure 2 In other words, the recess 7 exposes the first semiconductor layer 3. In this embodiment, the recess 7 is arranged in a ring around the central region 8 of the epitaxial semiconductor layer sequence 2. The recess 7 can also be configured as a contact finger structure to achieve the best possible current distribution in the active layer 5.
[0087] Then, a photonic layer 9 having a two-dimensional photonic crystal 10 is formed in the second semiconductor layer 4. Specifically, the photonic layer 9 is formed in the second semiconductor layer 4 in the central region 8 defined by the recess 7. In this embodiment, the photonic crystal 10 has columnar holes 11 arranged perpendicular to the main surface of the epitaxial semiconductor layer sequence 2. In this embodiment, the columnar holes 11 are arranged in a periodic pattern in the second semiconductor layer 4 to form the two-dimensional photonic crystal 10. In particular, the photonic layer 9 having the photonic crystal 10 is arranged close to the active layer 5, such that in the completed semiconductor laser chip, the photonic crystal 10 is arranged in the evanescent field of electromagnetic radiation generated in the active layer 5. Figure 2 ).
[0088] In the next step, an additional layer 12 is applied in the central region 8, on top of the photonic layer 9. For example, the additional layer 12 is epitaxially grown and also comprises a p-doped nitride compound semiconductor material or is composed of a p-doped nitride compound semiconductor material (e.g., p-GaN). Furthermore, it is feasible that the additional layer 12 has a TCO (such as ITO) or is formed from a TCO (such as ITO). Figure 3 ).
[0089] In another step, a first electrical contact 13 and a second electrical contact 14 are applied to the wafer composite 6. The first contact 13 is applied into the recess 7 and extends on the bottom surface 15 of the recess 7 and on the side surface 16 away from the central region 8, to the region of the main surface of the epitaxial semiconductor layer sequence 2. The first electrical contact 13 is in direct contact with the first semiconductor layer 3, at least in the recess 7 and on the bottom surface 15 of the recess 7. The second electrical contact 14 is applied directly to another layer 12 in the central region 8 of the epitaxial semiconductor layer sequence 2. In particular, the second electrical contact 14 is in direct contact with the second semiconductor layer 4.
[0090] An insulating layer 17 is arranged between the first electrical contact portion 13 and the second electrical contact portion 14. Figure 4 The insulating layer 17 is particularly adjacent to the first electrical contact 13 and the second electrical contact 14. Specifically, the insulating layer 17 electrically insulates the directly adjacent first electrical contact 13 and the directly adjacent second electrical contact 14 from each other and covers, preferably completely covers, the sides 16' of the recess 7. The insulating layer 17 may also be applied to its sides immediately after the recess is formed or at other times after the recess is formed.
[0091] In the next step, a sacrificial layer 18 is applied over the main surface of the epitaxial semiconductor layer sequence 2 on the wafer composite 6. The sacrificial layer 18 has a plurality of vias 19 that completely penetrate the sacrificial layer 18. In this embodiment, the sacrificial layer 18 is applied directly to and completely covers the first electrical contact 13, the second electrical contact 14, and the insulating layer 17. For example, the sacrificial layer 18 has a dielectric or a metal.
[0092] Then, a planarization layer 20 is applied directly to the sacrificial layer 18. Here, the planarization layer 20 completely fills the via 19. For example, the planarization layer 20 is formed of a polymer (such as BCB). Figure 5 ).
[0093] Then, the carrier wafer 21 is mechanically and stably fixed to the planarization layer 20 using a bonding layer 22 (e.g., a solder layer). Figure 6 ).
[0094] For example, the growth substrate 1 can be thinned by grinding ( Figure 7 The thinned growth substrate 1 has, for example, a thickness of a few micrometers. This is sufficient for good current distribution in the first semiconductor layer 3. Alternatively, the growth substrate 1 can be completely removed. In this case, the epitaxial semiconductor layer sequence 2 is exposed. A conductive layer, such as a conductive layer having a TCO (e.g., ITO) or composed of a TCO (e.g., ITO), can be applied to the epitaxial semiconductor layer sequence 2 for current injection.
[0095] In the next step, starting from the thinned growth substrate 1, notches 24 are introduced in the wafer composite 6 along the growth direction of the epitaxial semiconductor layer sequence 2, up to the sacrificial layer 18. Figure 8 The notch 24 completely penetrates the growth substrate 1 and the epitaxial semiconductor layer sequence 2. In particular, the sacrificial layer 18 is at least partially exposed by the notch 24.
[0096] The notch 24 defines an epitaxial semiconductor layer stack 25, which is subsequently part of a completed photonic surface-emitting semiconductor laser chip.
[0097] Then remove sacrificial layer 18 ( Figure 9 For example, through wet or dry chemical etching. After removing the sacrificial layer 18, the epitaxial semiconductor layer stack 25 formed through the notch 24 is mechanically connected to the carrier wafer 21 via the material in the via 19 of the planarization layer 22 in the sacrificial layer 18. In particular, the material in the via 19 of the planarization layer 22 constitutes the connection element 23 (see Figure 9 ).
[0098] At this time, there is a wafer composite 6, in which multiple photonic surface-emitting semiconductor laser chips are mechanically connected to the carrier wafer 21 via a connecting element 23.
[0099] According to Figures 10 to 12 In the method of the embodiment, the epitaxial semiconductor layer sequence 2 is first provided again, as in combination with Figure 1 As stated. However, unlike the combination... Figure 2 As described above, a photonic layer 9 with photonic crystal 10 is introduced into the second semiconductor layer 4. Conversely, a plurality of recesses 7 are introduced into the epitaxial semiconductor layer sequence 2, these recesses completely penetrating the active layer 5, such that the first semiconductor layer 3 is exposed at the bottom surface 15 of the recesses 7. Then, as combined Figure 4 The first electrical contact portion 13, the second electrical contact portion 14, and the insulating layer 17 between the first electrical contact portion 13 and the second electrical contact portion 14 are applied to the epitaxial semiconductor layer sequence 2.
[0100] In another step, a sacrificial layer 18 having vias 19 is disposed on or above the epitaxial semiconductor layer sequence 2. In this embodiment, the sacrificial layer 18 is arranged to be in direct contact with the first electrical contact 13, the second electrical contact 14, and the insulating layer 17.
[0101] A planarization layer 20 is applied on the sacrificial layer 18. The planarization layer 20 completely fills the recess 7 in the epitaxial semiconductor layer sequence 2 and the via 19 in the sacrificial layer 18.
[0102] The carrier wafer 21 is fixed onto the planarization layer 20 by means of a bonding layer 22 (e.g., a solder layer). The resulting wafer composite 6 is as follows: Figure 10 As shown.
[0103] In the next step, the growth substrate 1 is completely removed from the wafer composite 6. After removing the growth substrate 1, the first semiconductor layer 3 of the first conductivity type is freely accessible. Figure 11 In this embodiment, the first semiconductor layer 3 is n-doped.
[0104] Then, a photonic layer 9 having a photonic crystal 10 is introduced into the first semiconductor layer 3. Figure 12 For example, photonic crystal 10, such as... Figure 2 As described above.
[0105] Then, as in combination Figure 8 As described above, notches 24 are introduced in the epitaxial semiconductor layer sequence 2 to create multiple epitaxial semiconductor layer stacks 25 and partially expose the sacrificial layer 18. Figure 12 ).
[0106] Then the sacrificial layer 18 is removed, resulting in multiple photonic surface-emitting semiconductor laser chips. These photonic surface-emitting semiconductor laser chips are mechanically connected to the carrier wafer 21 via connecting elements 23 formed from the material of the planarization layer 20. Figure 13 ).
[0107] According to Figures 10 to 12 In the method of the embodiments, and according to Figures 1 to 9 The method differs from that in this embodiment, where the photonic layer 9 is introduced into the first semiconductor layer 3 instead of the second semiconductor layer 4. To achieve this, after fixing the carrier wafer 21, the growth substrate 1 is completely removed, allowing the first semiconductor layer 3 to be freely accessible for structuring with the photonic crystal 10. In other words, the timing of introducing the photonic crystal 10 into the second semiconductor layer 4 differs from the timing of introducing it into the first semiconductor layer 3.
[0108] Figure 13A photonic surface-emitting semiconductor laser chip is shown, mechanically connected to a carrier wafer 21 via a connecting element 23. The photonic surface-emitting semiconductor laser chip has an epitaxial semiconductor layer stack 25, which has an active region 26 disposed between a first semiconductor layer 3 of a first conductivity type and a second semiconductor layer 4 of a second conductivity type. In this embodiment, the first semiconductor layer 3 is n-doped and the second semiconductor layer 4 is p-doped. The active region 26 is adapted to generate electromagnetic laser radiation during operation.
[0109] Furthermore, the surface-emitting semiconductor laser chip includes a photonic layer 9 having a two-dimensional photonic crystal 10 disposed in a central region 8 of an epitaxial semiconductor layer stack 25. The central region 8 is defined by a recess 7 extending through an active region 26. The recess 7 is circular in top view and surrounds the central region 8. During operation, the surface-emitting semiconductor laser chip emits electromagnetic laser radiation from a radiation exit surface 27, which is also defined by the recess 7.
[0110] A photonic crystal 10 is arranged in the near field of electromagnetic laser radiation. The evanescent field of the electromagnetic laser radiation generated in the active region 26 during operation is optically coupled to the photonic crystal 10 of the photonic layer 9. Here, the photonic crystal 10 serves as the optical cavity of a photonic surface-emitting semiconductor laser chip, constituting the electromagnetic laser radiation generated by stimulated emission. Specifically, the photonic crystal 10 causes the electromagnetic radiation generated in the active region 26 to be emitted in the mode of the photonic crystal 10.
[0111] The surface-emitting diode (SED) laser chip is a flip chip, wherein a first electrical contact portion 13, which is electrically in contact with the first semiconductor layer 3, and a second electrical contact portion 14, which is electrically in contact with the second semiconductor layer 4, are arranged on one side of the SED laser chip. The first mounting surface 37 of the SED laser chip includes the outer surface of the first electrical contact portion 13, and the second mounting surface 38 of the SED laser chip includes the outer surface of the second electrical contact portion 14. The first mounting surface 37 and the second mounting surface 38 are located in the same plane E.
[0112] According to Figures 14 to 16 In the method for manufacturing a laser device according to an embodiment, a wafer composite 6 is first provided, for example, using a wafer composite according to an embodiment. Figures 10 to 12 It is manufactured by the method of the embodiment. Figure 14 A top view of the wafer composite 6 is shown. Multiple photonic surface-emitting semiconductor laser chips 28 are provided here, mechanically connected to the carrier wafer 21 via connecting elements 23 (not shown).
[0113] In addition, a wiring carrier 29 is provided, which is schematically shown in a top view. Figure 15In the middle, the wiring carrier 29 is configured to accommodate the photonic surface-emitting semiconductor laser chip 28. For this purpose, the wiring carrier 29 has a first electrical wiring portion 30 and a second electrical wiring portion 31. The first electrical wiring portion 30 is configured as annular, while the second electrical wiring portion 31 is configured as circular, and the first electrical wiring portion extends spaced apart from the second electrical wiring portion 30.
[0114] Specifically, in this embodiment, the first electrical contact portion 13 of the photonic surface-emitting semiconductor laser chip 28 to be applied is geometrically identical to the first electrical connection portion 30 of the wiring carrier 29. The second electrical contact portion 14 of the photonic surface-emitting semiconductor laser chip 28 is also geometrically identical to the second electrical connection portion 14 of the wiring carrier 29.
[0115] The photonic surface-emitting semiconductor laser chip 28 is removed from the carrier wafer 21 using the punch 32. Figure 16 The photonic surface-emitting semiconductor laser chip 28 is then transferred to the wiring carrier 29. The photonic surface-emitting semiconductor laser chip 28 is mechanically removed from the carrier wafer 21 using a punch 32, wherein the connecting element 23 is separated and the photonic surface-emitting semiconductor laser chip 28 is attached to the punch 32.
[0116] For example, the surface-emitting photonic semiconductor laser chip 28 is soldered to the first electrical connection portion 30 and the second electrical connection portion 31 of the wiring carrier 29 via the first electrical contact portion 13 and the second electrical contact portion 14.
[0117] For example, according to Figure 17 The laser device in the embodiment is based on Figures 14 to 16 It is manufactured by the method of the embodiment.
[0118] according to Figure 17 The laser device has a photonic surface-emitting semiconductor laser chip 28, which, for example, is combined with a laser based on... Figures 10 to 12 The method is as follows. The photonic surface-emitting semiconductor laser chip 28 has a photonic layer 9 with a photonic crystal 10, which is introduced into a first semiconductor layer 3 of an epitaxial semiconductor layer stack 25. The first semiconductor layer 3 has a first conductivity type. In this embodiment, the first semiconductor layer is n-doped.
[0119] The surface-emitting diode laser chip 28 is mechanically and electrically connected to the wiring carrier 29 via a solder layer (not shown). Specifically, the first electrical contact 13 of the surface-emitting diode laser chip 28 is soldered to the first wiring contact 30 of the wiring carrier 29, and the second electrical contact 14 of the surface-emitting diode laser chip 28 is soldered to the second wiring contact 31 of the wiring carrier 29.
[0120] according toFigure 18 The laser device of the embodiment has a photonic surface-emitting semiconductor laser chip 28, which is, for example, based on... Figures 1 to 9 The photonic surface-emitting semiconductor laser chip 28 is manufactured using a method that incorporates a photonic layer 9 with a photonic crystal 10 into a second semiconductor layer 4.
[0121] In addition, according to Figure 18 The laser device in the embodiment has a wiring carrier 29, which includes a first electrical connection portion 30 and a second electrical connection portion 31, and the photonic surface-emitting semiconductor laser chip 28 is mechanically and electrically connected to the wiring carrier.
[0122] During operation of the laser device, the photonic surface-emitting semiconductor laser chip 28 emits electromagnetic laser radiation from its radiating surface 27. Since the main surface of the photonic surface-emitting semiconductor laser chip 28, including the radiating surface 27, has no bonding line, the electromagnetic laser radiation 33 emitted from the radiating surface 27 can be directly coupled into the optical fiber 34 or an optical element. The optical element and / or optical fiber 34 can be arranged spaced apart from the radiating surface 27 of the photonic surface-emitting semiconductor laser chip 28 via an air gap 35. The air gap 35 can be filled with a material that matches the refractive indices of two directly adjacent materials.
[0123] according to Figure 19 The wiring carrier 29 of the embodiment can, for example, be according to Figures 14 to 16 It is used in the method of the embodiment.
[0124] and Figure 15 The wiring carrier 29 is different, according to Figure 19 The wiring carrier 29 has an annular first electrical wiring portion 30 with an opening 35. This geometry of the wiring carrier 29, with the first wiring portion 30 and the second wiring portion 31, can be connected to the photonic surface-emitting semiconductor laser chip 28 particularly easily by soldering, because air is not trapped inside the annular first electrical wiring portion 30, but can escape through the opening 35.
[0125] according to Figure 20 The wiring carrier 29 of the embodiment can also be based on Figures 14 to 16 Used in the method of the embodiments. And according to Figure 19 The wiring carrier 29 of the embodiment is different. In addition to the first electrical wiring portion 30 and the second electrical wiring portion 31, the wiring carrier 29 also includes a guide rail 36, which is directly electrically connected to the first electrical wiring portion 30 and the second electrical wiring portion 31.
[0126] Specifically, guide rail 36 extends from the first electrical connection portion 30 through the opening 35 of the annular first electrical connection portion 30. Another guide rail 36 connected to the annular first electrical connection portion 30 extends parallel to it.
[0127] This application claims priority to German application DE 102023116537.2, the disclosure of which is incorporated herein by reference.
[0128] This invention is not limited to what has been described through the embodiments. Rather, the invention includes each new feature and each combination of features (this in particular includes each combination of features in the claims), even if the feature or combination itself is not explicitly stated in the claims or embodiments.
[0129] List of reference numerals
[0130] 1 Growth substrate
[0131] 2 Epitaxial Semiconductor Layer Sequence
[0132] 3 First semiconductor layer
[0133] 4 Second semiconductor layer
[0134] 5 Active Layer
[0135] 6-chip complex
[0136] 7 concavities
[0137] 8 central areas
[0138] 9 photon layers
[0139] 10-photon crystal
[0140] 11 columnar holes
[0141] 12 Other layers
[0142] 13 First electrical contact point
[0143] 14 Second electrical contact point
[0144] 15The bottom surface of the concave part
[0145] 16, 16' side of the concave part
[0146] 17 insulation layers
[0147] 18 sacrificial layers
[0148] 19 through holes
[0149] 20 planarization layers
[0150] 21 carrier wafers
[0151] 22 bonding layer
[0152] 23 Connecting elements
[0153] 24 notches
[0154] 25 Epitaxial Semiconductor Layer Stack
[0155] 26 active areas
[0156] 27 Radiation exit surface
[0157] 28 semiconductor laser chips
[0158] 29-wire carrier
[0159] 30 First electrical connection point
[0160] 31 Second electrical wiring section
[0161] 32 punch
[0162] 33 Electromagnetic laser radiation
[0163] 34 optical fibers
[0164] 35 opening
[0165] 36 guide rails
[0166] 37 First mounting surface
[0167] 38 Second mounting surface
[0168] E plane
Claims
1. A method for manufacturing multiple photonic surface-emitting semiconductor laser chips (28), comprising the following steps: - An epitaxial semiconductor layer sequence (2) is provided on a growth substrate (1), the epitaxial semiconductor layer sequence having an active layer (5) configured to generate electromagnetic radiation, wherein the active layer (5) is disposed between a first semiconductor layer (3) of a first conductivity type and a second semiconductor layer (4) of a second conductivity type. - A photonic layer (9) having a photonic crystal (10) is generated in the first semiconductor layer (3) or the second semiconductor layer (4). - A recess (7) is generated from the main surface of the epitaxial semiconductor layer sequence (2), wherein the recess (7) penetrates the active layer (5). - A plurality of first electrical contact portions (13) are applied in the recess (7), the plurality of first electrical contact portions being in electrical contact with the first semiconductor layer (3). - A plurality of second electrical contact portions (14) are applied on or above the main surface of the epitaxial semiconductor layer sequence (2), the plurality of second electrical contact portions being in electrical contact with the second semiconductor layer (4).
2. The method according to the preceding claim, wherein, An insulating layer (17) is arranged on the side (16') of the recess (7).
3. The method according to the preceding claim, wherein, The insulating layer (17) is arranged between the first electrical contact portion (13) and the second electrical contact portion (14).
4. The method according to any one of the preceding claims, comprising the following additional steps: - A sacrificial layer (18) is applied on or above the first electrical contact (13) and the second electrical contact (14), wherein the sacrificial layer (18) has a plurality of through-holes (19) that completely penetrate the sacrificial layer (18), and - A planarization layer (20) is applied on the sacrificial layer (18), wherein the material of the planarization layer (20) fills the through-hole (19).
5. The method according to the preceding claim, further comprising the following steps: - A carrier wafer (21) is applied on or above the planarization layer (20), and - Remove the sacrificial layer (18) so that the material of the planarization layer (20) in the via (19) forms a connecting element (23) that mechanically connects the epitaxial semiconductor layer sequence (2) to the carrier wafer (21).
6. The method according to any one of claims 4 to 5, wherein, Multiple notches (24) are generated in the epitaxial semiconductor layer sequence (2) so that the sacrificial layer (18) can be contacted through the notches (24).
7. The method according to any one of the preceding claims, wherein, Before the first electrical contact (13) and the second electrical contact (14) are applied to the epitaxial semiconductor layer sequence (2), the photonic layer (9) is generated in the second semiconductor layer (4).
8. The method according to any one of the preceding claims, wherein, After the first electrical contact (13) and the second electrical contact (14) are applied to the epitaxial semiconductor layer sequence (2), the photonic layer (9) is generated in the first semiconductor layer (3).
9. The method according to the preceding claim, wherein, The growth substrate (1) is removed before the photonic layer (9) is generated.
10. A photonic surface-emitting semiconductor laser chip (28) having: - An epitaxial semiconductor layer stack (25) includes an active region (26) disposed between a first semiconductor layer (3) of a first conductivity type and a second semiconductor layer (4) of a second conductivity type, wherein the active region (26) generates electromagnetic laser radiation (33) during operation. - A photonic layer (9) having a photonic crystal (10) arranged in the near field of the electromagnetic laser radiation (33) generated in the active region (26), and - The first electrical contact (13) and the second electrical contact (14) on or above the main surface of the epitaxial semiconductor layer stack (25).
11. The photonic surface-emitting semiconductor laser chip (28) according to the preceding claim, wherein, The photonic crystal (10) is a two-dimensional photonic crystal (10) which helps to generate electromagnetic laser radiation (33) in the active region (26).
12. The photonic surface-emitting semiconductor laser chip (28) according to any one of claims 10 to 11, further comprising a first mounting surface (37) and a second mounting surface (38) located in the same plane (E).
13. The photonic surface-emitting semiconductor laser chip (28) according to any one of claims 10 to 12, wherein, The first electrical contact portion (13) is arranged in a ring around the second electrical contact portion (14) at a distance in the top view.
14. The photonic surface-emitting semiconductor laser chip (28) according to the preceding claim, wherein, The annular first electrical contact portion (13) has an opening (35) through the annular first electrical contact portion (13).
15. The photonic surface-emitting semiconductor laser chip (28) according to any one of claims 13 to 14, wherein, The radiation exit surface (27) of the photonic surface-emitting semiconductor laser chip (28) is circular in top view and is covered by the second electrical contact portion (14).
16. A method for manufacturing a laser device, comprising the following steps: - Provides a plurality of photonic surface-emitting semiconductor laser chips (28) according to any one of claims 10 to 15, which are mechanically connected to a carrier wafer (21) by means of a connecting element (23), and - Transfer at least one photonic surface-emitting semiconductor laser chip (28) from the carrier wafer (21) onto the wiring carrier (29).
17. A laser device, comprising: - The photonic surface-emitting semiconductor laser chip (28) according to any one of claims 10 to 15, and - A wiring carrier (29) having a first electrical connection part (30) and a second electrical connection part (31). in The first electrical contact (13) of the photonic surface-emitting semiconductor laser chip (28) is electrically and mechanically connected to the first electrical connection (30) of the wiring carrier (29), and the second electrical contact (14) of the photonic surface-emitting semiconductor laser chip (28) is electrically and mechanically connected to the second electrical connection (31) of the wiring carrier (29).
18. The laser device according to the preceding claim, wherein... - The second electrical connection portion (31) is circular in the top view, and - The first electrical connection portion (30) is arranged circumferentially around the second electrical connection portion (31) at a distance from the circle, and - The first electrical connection part (30) and the second electrical connection part (31) are connected to the guide rail (36) on the wiring carrier (29).
19. The method according to any one of claims 1 to 9, wherein, The first electrical contact portion (13) extends completely on the bottom surface and the side surface of the recess (7).