A code rate estimation apparatus and method, a video encoder, an electronic device, a storage medium and a computer program product

Abstract

This disclosure relates to a bitrate estimation apparatus and method, a video encoder, an electronic device, a storage medium, and a computer program product. The bitrate estimation apparatus includes: a parameter determination module for calculating and storing at least one bitrate estimation reference information corresponding to each residual block in an encoding unit; a bitrate estimation module for determining the input index of the last non-zero residual block in the encoding unit after storing the bitrate estimation reference information of all residual blocks in the encoding unit in the parameter determination module; and a bitrate estimation module for performing bitrate estimation on a target residual block based on at least one bitrate estimation reference information corresponding to the residual block on which bitrate estimation of the target residual block depends, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block. Embodiments of this disclosure can effectively reduce the amount of data that needs to be stored for bitrate estimation and reduce the computational resources required for bitrate estimation.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a bit rate estimation device and method, a video encoder, an electronic device, a storage medium, and a computer program product. Background Technology

[0002] In various existing video codec chips, to improve the encoding quality of video encoders and obtain more accurate bitrate information during rate-distortion optimization, the Context-Adaptive Binary Arithmetic Coding (CABAC) bitrate estimation method is required. Using the CABAC bitrate estimation method in the entropy coding scheme of High-Efficiency Video Coding (HEVC) encoders can achieve higher compression efficiency.

[0003] In CABAC rate estimation, there are computational dependencies between residual blocks within each coding unit. The upper-left residual block depends on the lower-right residual block, and the upper-left residual block must wait for the lower-right residual block's calculation results to be completed before it can begin its own calculation. This results in significant storage resource consumption in residual block-based video coding. Summary of the Invention

[0004] In view of this, the present disclosure provides a bitrate estimation device and method, a video encoder, an electronic device, a storage medium, and a computer program product.

[0005] According to one aspect of this disclosure, a rate estimation apparatus is provided, comprising: a parameter determination module, configured to calculate and store at least one rate estimation reference information corresponding to each residual block in an encoding unit; a rate estimation module, configured to determine the input index of the last non-zero residual block in the encoding unit after the parameter determination module has stored the rate estimation reference information of all residual blocks in the encoding unit; and the rate estimation module, configured to perform rate estimation on the target residual block based on at least one rate estimation reference information corresponding to the residual block on which rate estimation of the target residual block depends, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

[0006] In one possible implementation, the parameter determination module is specifically used to: for any residual block in the coding unit, calculate and store the code rate estimation reference information corresponding to the residual block based on the magnitude of the residual coefficients in the residual block, wherein the magnitude of the residual coefficients corresponding to different types of code rate estimation reference information is different.

[0007] In one possible implementation, the parameter determination module includes: a first rate parameter determination submodule, configured to calculate and store first rate estimation reference information corresponding to any residual block in the coding unit, based on whether the residual block contains non-zero residual coefficients; a second rate parameter determination submodule, configured to calculate and store second rate estimation reference information corresponding to any residual block in the coding unit, based on whether each residual coefficient in the residual block is zero; a third rate parameter determination submodule, configured to determine third rate estimation reference information corresponding to any residual block in the coding unit, based on the first N non-zero residual coefficients in the residual block, where N is a positive integer; and a fourth rate parameter determination submodule, configured to determine fourth rate estimation reference information corresponding to any residual block in the coding unit, based on the first residual coefficient greater than 1 in the residual block.

[0008] In one possible implementation, the rate estimation module is configured to: perform a first rate estimation on whether the target residual block contains non-zero residual coefficients based on the first rate estimation reference information of the residual block on which the first rate estimation of the target residual block depends, and determine the first rate estimate value of the target residual block; perform a second rate estimation on whether each residual coefficient in the target residual block is zero based on the second rate estimation reference information of the residual block on which the second rate estimation of the target residual block depends, and determine the second rate estimate value of the target residual block; perform a third rate estimation on the first N non-zero residual coefficients in the target residual block based on the third rate estimation reference information of the residual block on which the third rate estimation of the target residual block depends, and determine the third rate estimate value of the target residual block; and perform a fourth rate estimation on the first residual coefficient greater than 1 in the target residual block based on the fourth rate estimation reference information of the residual block on which the fourth rate estimation of the target residual block depends, and determine the fourth rate estimate value of the target residual block.

[0009] In one possible implementation, the rate estimation module is configured to: perform a fifth rate estimation on the sign bits of the non-zero residual coefficients in any residual block in the coding unit to determine the fifth rate estimate of the residual block; and perform a sixth rate estimation on the residual residual values ​​of all residual coefficients in the residual block to determine the sixth rate estimate of the residual block.

[0010] In one possible implementation, the rate estimation module is configured to: when the target residual block is the last non-zero residual block, perform a seventh rate estimation on the position of the last non-zero residual coefficient in the target residual block, and determine the seventh rate estimate value of the target residual block.

[0011] In one possible implementation, the apparatus further includes an accumulator, configured to: when the target residual block is not the last non-zero residual block, accumulate a first rate estimate, a second rate estimate, a third rate estimate, a fourth rate estimate, a fifth rate estimate, and a sixth rate estimate of the target residual block to determine a rate estimate of the target residual block; and when the target residual block is the last non-zero residual block, accumulate the first rate estimate, the second rate estimate, the third rate estimate, the fourth rate estimate, the fifth rate estimate, the sixth rate estimate, and a seventh rate estimate of the target residual block to determine a rate estimate of the target residual block.

[0012] In one possible implementation, the accumulator is used to: accumulate the rate estimate of each target residual block in the coding unit to determine the rate estimate of the coding unit.

[0013] According to another aspect of this disclosure, a code rate estimation method is provided, comprising: calculating and storing at least one code rate estimation reference information corresponding to each residual block in a coding unit; after storing the code rate estimation reference information of all residual blocks in the coding unit, determining the input index of the last non-zero residual block in the coding unit; performing code rate estimation on the target residual block according to at least one code rate estimation reference information corresponding to the residual block on which code rate estimation of the target residual block depends, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

[0014] According to another aspect of this disclosure, a video encoder is provided, including the bitrate estimation device described above.

[0015] According to another aspect of this disclosure, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above-described method.

[0016] According to another aspect of this disclosure, a non-volatile computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the above-described method.

[0017] According to another aspect of this disclosure, a computer program product is provided, including a computer program or a non-volatile computer-readable storage medium carrying the computer program, wherein the computer program, when executed by a processor, implements the steps of the above-described method.

[0018] The rate estimation apparatus of this disclosure includes a parameter determination module that calculates and stores at least one rate estimation reference information corresponding to each residual block in the coding unit. After the parameter determination module has stored the rate estimation reference information for all residual blocks in the coding unit, the rate estimation module determines the input index of the last non-zero residual block in the coding unit. This enables effective rate estimation for target residual blocks whose input index is less than or equal to the input index of the last non-zero residual block. Since the amount of data in the rate estimation reference information corresponding to the residual block is much smaller than the amount of data in the residual block itself, compared to the prior art where rate estimation requires storing and utilizing the residual block itself, the rate estimation apparatus of this disclosure, by setting the parameter determination module to pre-calculate and store the rate estimation reference information corresponding to each residual block, instead of storing each residual block itself, can effectively reduce the amount of data that needs to be stored for rate estimation and reduce the computational resources required for rate estimation.

[0019] Other features and aspects of this disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0020] The accompanying drawings, which are included in and form part of this specification, illustrate exemplary embodiments, features, and aspects of this disclosure together with the specification and serve to explain the principles of this disclosure.

[0021] Figure 1 This diagram illustrates a bitrate estimation technique in the prior art.

[0022] Figure 2 A block diagram of a bitrate estimation apparatus according to an embodiment of the present disclosure is shown.

[0023] Figure 3 A schematic diagram illustrating a bitrate estimation according to an embodiment of the present disclosure is shown.

[0024] Figure 4 A flowchart of a bitrate estimation method according to an embodiment of the present disclosure is shown.

[0025] Figure 5 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0026] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0027] As used herein, the terms “comprising,” “including,” “having,” or variations thereof are open-ended and include one or more of the stated features, integrals, elements, steps, components, or functions, but do not exclude the presence or addition of one or more other features, integrals, elements, steps, components, functions, or groups thereof.

[0028] When an element is referred to as “connected,” “coupled,” “responding,” or a variation thereof relative to another element, it may be directly connected, coupled, or responding to another element, or there may be an intermediate element present.

[0029] Although the terms first, second, third, etc., may be used herein to describe various elements / operations, these elements / operations should not be limited by these terms. These terms are only used to distinguish one element / operation from another. Therefore, without departing from the teachings of the inventive concept, a first element / operation in some embodiments may be referred to as a second element / operation in other embodiments.

[0030] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0031] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0032] The CABAC rate estimation method involves binarization, context modeling, and binary arithmetic coding. Binarization converts non-binary syntax elements into a binary string, with each bit called a bin. Based on the position and context of each bin, a probability model is selected for the current bin, providing an estimate of whether the current bin is 0 or 1. Finally, based on the probabilities provided by the probability model for each bin, arithmetic coding is performed step-by-step on each bin in the binary string, compressing the data into a shorter bitstream.

[0033] The CABAC rate estimation method has high computational complexity, slow encoding speed, difficult hardware implementation, and high power consumption. However, the CABAC rate estimation method provides relatively accurate rate estimation, which can improve the accuracy of mode decision in rate-distortion optimization, thereby improving the encoding quality of the video encoder.

[0034] During the rate estimation process, each residual block in the coding unit is input into the rate estimation device according to a preset scanning order, and then the rate is estimated step by step for each residual block according to the reverse scanning order. During rate estimation, there are computational dependencies between each residual block in each coding unit. The upper left residual blocks in a coding unit depend on the lower right residual blocks; the upper left residual blocks must wait for the calculation results of the lower right residual blocks to be completed before they can begin their calculations.

[0035] In the process of estimating the code rate of a coding unit based on the CABAC code rate estimation method, the following information needs to be calculated:

[0036] The seventh rate estimate (A rate estimate) at the position of the last non-zero residual coefficient in the coding unit.

[0037] Whether each residual block in the coding unit contains a first rate estimate (B rate estimate) with non-zero residual coefficients.

[0038] The second rate estimate (C rate estimate) is whether each residual coefficient in each residual block in the coding unit is zero.

[0039] The third rate estimate (D rate estimate) of the first N non-zero residual coefficients in each residual block of the coding unit.

[0040] The fourth rate estimate (E-rate estimate) of the first residual coefficient greater than 1 in each residual block of the coding unit.

[0041] The fifth rate estimate (F rate estimate) of the sign bit of the non-zero residual coefficient in each residual block of the coding unit.

[0042] The sixth rate estimate (G-rate estimate) of the residual residual values ​​of all residual coefficients in each residual block of the coding unit.

[0043] Figure 1 This diagram illustrates a bitrate estimation method in the prior art. (For example...) Figure 1 As shown, the first step is the input storage procedure for each residual block in the coding unit. One residual block is input and stored each time according to the preset scanning order. The input order of the residual blocks is not equal to the computational dependency order of the residual blocks in the rate estimation process. Therefore, it is necessary to store all residual blocks in the coding unit.

[0044] In one example, a 4×4 residual block contains 16 residual coefficients. Assuming each residual coefficient has a bit width of 16 bits, the 4×4 residual block contains 256 bits of residual coefficients. A 32×32 coding unit contains 64 4×4 residual blocks, requiring the storage of 64×256 bits of residual coefficients; a 16×16 coding unit contains 16 4×4 residual blocks, requiring the storage of 16×256 bits of residual coefficients; and an 8×8 coding unit contains 4 4×4 residual blocks, requiring the storage of 4×256 bits of residual coefficients.

[0045] like Figure 1 As shown, the second step is the rate estimation preparation process. For any residual block, since the rate estimation process of the first to fourth rate estimations (BE rate estimation) of the residual block needs to rely on the relevant information of the residual blocks input before the residual block in the preset scanning order, the rate estimation preparation is required for the residual block to perform the first to fourth rate estimations (BE rate estimation); the rate estimation process of the seventh rate estimation (A rate estimation) of the residual block needs to rely on all residual blocks in the coding unit; the rate estimation process of the FG rate estimation of the residual block only depends on the residual block itself.

[0046] like Figure 1 As shown, the third step is the rate estimation process. After the residual coefficients of all residual blocks in the coding unit are stored, the reverse scanning order is started according to the preset scanning order to determine the first to seventh rate estimates (AG rate estimates) of each residual block. Then, the first to seventh rate estimates (AG rate estimates) of each residual block are accumulated using an accumulator to obtain the rate estimate of each residual block. This yields the rate estimates of all residual blocks in the coding unit. Finally, the rate estimates of all residual blocks in the coding unit are accumulated to obtain the rate estimate of the coding unit.

[0047] The existing CABAC rate estimation process requires storing all residual blocks in different coding units, consuming significant storage resources. Furthermore, during rate-distortion calculation, multiple coding units may perform rate estimation in parallel, leading to even greater storage consumption.

[0048] To address the aforementioned technical problems, this disclosure provides a bitrate estimation apparatus that effectively reduces the amount of data that needs to be stored and the computational resources required for bitrate estimation during the CABAC bitrate estimation process. The bitrate estimation apparatus provided in this disclosure is described in detail below.

[0049] Figure 2 A block diagram of a bitrate estimation apparatus according to an embodiment of the present disclosure is shown. Figure 2As shown, the rate estimation device 20 includes: a parameter determination module 21, used to calculate and store at least one rate estimation reference information corresponding to each residual block in the coding unit; a rate estimation module 22, used to determine the input index of the last non-zero residual block in the coding unit after storing the rate estimation reference information of all residual blocks in the coding unit in the parameter determination module 21; and a rate estimation module 22, used to perform rate estimation on the target residual block according to at least one rate estimation reference information corresponding to the residual block on which the target residual block needs to perform rate estimation, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

[0050] Since the amount of data in the rate estimation reference information corresponding to the residual block is much smaller than the amount of data in the residual block itself, compared with the prior art which requires storing and utilizing the residual block itself to perform rate estimation, the rate estimation device of this embodiment calculates and stores the rate estimation reference information corresponding to each residual block in advance by setting the parameter determination module, instead of storing each residual block itself. This can effectively reduce the amount of data that needs to be stored for rate estimation and reduce the computational resources required for rate estimation.

[0051] In one possible implementation, the rate estimation device 20 further includes an input module for receiving each residual block in the coding unit.

[0052] Figure 3 A schematic diagram illustrating a bitrate estimation according to an embodiment of the present disclosure is shown. Figure 3 As shown, firstly, each residual block in the coding unit is input according to a preset scanning order. The specific process of inputting each residual block in the coding unit into the rate estimation device according to the preset scanning order can be found in related technologies, and this disclosure does not specifically limit it.

[0053] The preset scan order can indicate the input index of each residual block in the coding unit. The input index of each residual block may be different under different preset scan orders. The preset scan order can be horizontal or vertical, and this disclosure does not specifically limit it.

[0054] Based on the input module, each residual block in the encoding unit is input according to a preset scanning order. After the input module receives a residual block, the parameter determination module begins to calculate and store the rate estimation reference information corresponding to that residual block. Compared with the prior art, which requires storing each residual block itself, this embodiment only stores the rate estimation reference information corresponding to each residual block, which can effectively reduce the amount of data that needs to be stored for rate estimation.

[0055] In one possible implementation, the parameter determination module 21 is specifically used to: for any residual block in the coding unit, calculate and store the code rate estimation reference information corresponding to the residual block according to the magnitude of the residual coefficients in the residual block, wherein the residual coefficients corresponding to different types of code rate estimation reference information are of different magnitudes.

[0056] For any residual block in the coding unit, the rate estimation reference information corresponding to the residual block is calculated and stored based on the magnitude of the residual coefficients in the residual block. This ensures that other residual blocks that depend on the residual block can sequentially obtain the rate estimation reference information corresponding to the residual block to complete the rate estimation.

[0057] Since BE rate estimation requires the dependencies between residual blocks, different types of rate estimation reference information are determined for any given residual block to accommodate BE rate estimation. Depending on the specific differences in BE rate estimation, the residual coefficients corresponding to these different types of rate estimation reference information vary in size.

[0058] In one possible implementation, the parameter determination module 21 includes: a first rate parameter determination submodule, used to calculate and store first rate estimation reference information corresponding to any residual block in the coding unit, based on whether the residual block contains non-zero residual coefficients; a second rate parameter determination submodule, used to calculate and store second rate estimation reference information corresponding to any residual block in the coding unit, based on whether each residual coefficient in the residual block is zero; a third rate parameter determination submodule, used to determine third rate estimation reference information corresponding to any residual block in the coding unit, based on the first N non-zero residual coefficients in the residual block, where N is a positive integer; and a fourth rate parameter determination submodule, used to determine fourth rate estimation reference information corresponding to any residual block in the coding unit, based on the first residual coefficient greater than 1 in the residual block.

[0059] like Figure 3 As shown, after receiving any input residual block, the first rate parameter determination submodule (B rate parameter determination submodule) starts to calculate and store the first rate estimation reference information (B rate estimation reference information) corresponding to the residual block based on whether the residual block contains non-zero residual coefficients.

[0060] Taking the aforementioned 4×4 residual block containing 16 residual coefficients, each with a bit width of 16 bits, as an example, the first rate parameter determination submodule (B rate parameter determination submodule) iterates through the 16 residual coefficients in the 4×4 residual block. When the 4×4 residual block includes non-zero residual coefficients, it marks the first rate estimation reference information (B rate estimation reference information) as 1; when it does not include non-zero residual coefficients, it marks the first rate estimation reference information (B rate estimation reference information) as 0. Therefore, compared to the 256 bits of residual coefficients that the 4×4 residual block itself needs to store, the first rate parameter determination submodule (B rate parameter determination submodule) only needs to store 1 bit of the first rate estimation reference information (B rate estimation reference information) corresponding to the 4×4 residual block, effectively reducing the amount of data that needs to be stored for subsequent first rate estimation (B rate estimation).

[0061] like Figure 3 As shown, after receiving any input residual block, the second rate parameter determination submodule (C rate parameter determination submodule) calculates and stores the second rate estimation reference information (C rate estimation reference information) corresponding to the residual block based on whether each residual coefficient in the residual block is zero.

[0062] Taking the aforementioned 4×4 residual block, which includes 16 residual coefficients, each with a bit width of 16 bits, as an example, the second rate parameter determination submodule (C rate parameter determination submodule) iterates through the 16 residual coefficients in the 4×4 residual block. For non-zero residual coefficients in the 4×4 residual block, the second rate estimation reference information (C rate estimation reference information) is marked as 1, and for zero residual coefficients, it is marked as 0. Therefore, compared to the 256 bits of residual coefficients that the 4×4 residual block itself needs to store, the second rate parameter determination submodule (C rate parameter determination submodule) only needs to store the 16 bits of second rate estimation reference information (C rate estimation reference information) corresponding to the 4×4 residual block, effectively reducing the amount of data that needs to be stored for subsequent second rate estimation (C rate estimation).

[0063] like Figure 3 As shown, after receiving any input residual block, the third rate parameter determination submodule (D rate parameter determination submodule) calculates and stores the third rate estimation reference information (D rate estimation reference information) corresponding to the residual block based on the first N non-zero residual coefficients in the residual block. The specific value of N can be flexibly set according to the actual situation, and this disclosure does not impose a specific limitation on it. For example, under the HEVC video coding standard, using the CABAC rate method, the residual block size is 4×4, and N=8.

[0064] Taking the aforementioned 4×4 residual block, which includes 16 residual coefficients, with each residual coefficient having a bit width of 16 bits, as an example, the third rate parameter determination submodule (D rate parameter determination submodule) traverses the 16 residual coefficients in the 4×4 residual block, determines the first 8 non-zero residual coefficients, and then, for any one of the first 8 non-zero residual coefficients, if it is greater than 1, marks the third rate estimation reference information (D rate estimation reference information) as 1, and if it is equal to 1, marks the third rate estimation reference information (D rate estimation reference information) as 0. Therefore, compared to the 256 bits of residual coefficients that the 4×4 residual block itself needs to store, the third rate parameter determination submodule (D rate parameter determination submodule) only needs to store a maximum of 8 bits of third rate estimation reference information (D rate estimation reference information) corresponding to the 4×4 residual block, effectively reducing the amount of data that needs to be stored for subsequent third rate estimation (D rate estimation).

[0065] like Figure 3 As shown, after receiving any input residual block, the fourth rate parameter determination submodule (E rate parameter determination submodule) calculates and stores the fourth rate estimation reference information (E rate estimation reference information) corresponding to the residual block based on the first residual coefficient greater than 1 in the residual block.

[0066] Taking the aforementioned 4×4 residual block containing 16 residual coefficients, each with a bit width of 16 bits, as an example, the fourth rate parameter determination submodule (E-rate parameter determination submodule) iterates through the 16 residual coefficients in the 4×4 residual block, determines the first residual coefficient greater than 1 in the 4×4 residual block, and marks the fourth rate estimation reference information (E-rate estimation reference information) as 1 when the first residual coefficient greater than 1 is greater than 2, and marks the fourth rate estimation reference information (E-rate estimation reference information) as 0 when it is equal to 2. Therefore, compared to the 256 bits of residual coefficients that the 4×4 residual block itself needs to store, the fourth rate parameter determination submodule (E-rate parameter determination submodule) only needs to store 1 bit of the fourth rate estimation reference information (E-rate estimation reference information) corresponding to the 4×4 residual block, effectively reducing the amount of data that needs to be stored for subsequent fourth rate estimation (E-rate estimation).

[0067] The 32×32 coding unit comprises 64 4×4 residual blocks, requiring the storage of 1×64=64 bits of first rate estimation reference information (B rate estimation reference information), 16×64=1024 bits of second rate estimation reference information (C rate estimation reference information), 8×64=512 bits of third rate estimation reference information (D rate estimation reference information), and 1×64=64 bits of fourth rate estimation reference information (E rate estimation reference information), totaling 1664 bits of rate estimation reference information. Compared to the existing technology where the 32×32 coding unit requires storing 64×256=16384 bits of residual coefficients, only about one-tenth of the data needs to be stored, effectively reducing the amount of data that needs to be stored.

[0068] A 16×16 coding unit comprises 16 4×4 residual blocks, requiring the storage of 1×16=16 bits of first rate estimation reference information (B rate estimation reference information), 16×16=256 bits of second rate estimation reference information (C rate estimation reference information), 8×16=128 bits of third rate estimation reference information (D rate estimation reference information), and 1×16=16 bits of fourth rate estimation reference information (E rate estimation reference information), totaling 416 bits of rate estimation reference information. Compared to the existing technology where a 16×16 coding unit needs to store 16×256=4096 bits of residual coefficients, only about one-tenth of the data needs to be stored, effectively reducing the amount of data that needs to be stored.

[0069] An 8×8 coding unit comprises four 4×4 residual blocks, requiring the storage of 1×4=4 bits of first rate estimation reference information (B rate estimation reference information), 16×4=64 bits of second rate estimation reference information (C rate estimation reference information), 8×4=32 bits of third rate estimation reference information (D rate estimation reference information), and 1×4=4 bits of fourth rate estimation reference information (E rate estimation reference information), totaling 104 bits of rate estimation reference information. Compared to the existing technology where an 8×8 coding unit needs to store 4×256=1024 bits of residual coefficients, only about one-tenth of the data needs to be stored, effectively reducing the amount of data that needs to be stored.

[0070] In one possible implementation, the rate estimation module 13 is used to: perform a fifth rate estimation on the sign bits of the non-zero residual coefficients in any residual block in the coding unit to determine the fifth rate estimate of the residual block; and perform a sixth rate estimation on the residual residual values ​​of all residual coefficients in the residual block to determine the sixth rate estimate of the residual block.

[0071] Since the rate estimation process, which involves fifth rate estimation (F-rate estimation) and sixth rate estimation (G-rate estimation) for each residual block in the coding unit, depends only on the residual block itself, the rate estimation module can immediately perform fifth rate estimation (F-rate estimation) on the sign bits of the non-zero residual coefficients in the residual block after receiving any input residual block, thus determining the fifth rate estimate (F-rate estimate) of the residual block; and perform sixth rate estimation (G-rate estimation) on the residual values ​​of all residual coefficients in the residual block, thus determining the sixth rate estimate (G-rate estimate) of the residual block.

[0072] For any received input residual block, the first rate parameter determination submodule (B rate parameter determination submodule), the second rate parameter determination submodule (C rate parameter determination submodule), the third rate parameter determination submodule (D rate parameter determination submodule), the fourth rate parameter determination submodule (E rate parameter determination submodule), and the rate estimation module can calculate the first to fourth rate estimation reference information (BE rate estimation reference information) and the fifth to sixth rate estimates (FG rate estimates) for the residual block in parallel. After calculating and storing the first rate estimation reference information (B rate estimation reference information), the second rate estimation reference information (C rate estimation reference information), the third rate estimation reference information (D rate estimation reference information), the fourth rate estimation reference information (E rate estimation reference information), the fifth rate estimate (F rate estimate), and the sixth rate estimate (G rate estimate) for the residual block, the residual block is deleted.

[0073] like Figure 3 As shown, the rate estimation device also includes an accumulator, in which the fifth rate estimate (F rate estimate) and the sixth rate estimate (G rate estimate) of each residual block determined by the rate estimation module can be temporarily stored.

[0074] After all residual blocks in the coding unit have been input, and the rate estimation reference information for each residual block has been calculated and stored, the input index of the last non-zero residual block in the coding unit is determined so that the first to fourth and seventh rate estimations (AE rate estimation) can be performed on the last non-zero residual block starting from the last non-zero residual block; the first to fourth rate estimations (BE rate estimation) can be performed on the target residual blocks whose input index is less than that of the last non-zero residual block, that is, on the residual blocks input before the last non-zero residual block; there is no need to perform redundant first to fourth rate estimations (BE rate estimation) on the zero residual blocks input after the last non-zero residual block.

[0075] After determining the input index of the last non-zero residual block, the rate estimation module performs the seventh rate estimation (A rate estimation) on the last non-zero residual block, and the first to fourth rate estimation (BE rate estimation) on the target residual blocks whose input index is less than or equal to the input index of the last non-zero residual block, that is, on the last non-zero residual block and the residual blocks input before it.

[0076] In one possible implementation, the rate estimation module 13 is used to: perform a seventh rate estimation on the position of the last non-zero residual coefficient in the target residual block when the target residual block is the last non-zero residual block, and determine the seventh rate estimate value of the target residual block.

[0077] For the last non-zero residual block, the rate estimation module first determines the position of the last non-zero coefficient in the residual block, and then performs the seventh rate estimation (A rate estimation) at that position to determine the seventh rate estimate (A rate estimate) of the residual block.

[0078] Taking the aforementioned 4×4 residual block containing 16 residual coefficients as an example, the rate estimation module iterates through the 16 residual coefficients in the last non-zero 4×4 residual block to determine the position (y, x) of the last non-zero residual coefficient. Then, the rate estimation module performs a seventh rate estimation (A-rate estimation) on the position (y, x) of the last non-zero residual coefficient in the last non-zero 4×4 residual block to determine the seventh rate estimate (A-rate estimate) of the last non-zero residual block.

[0079] The seventh rate estimate (A rate estimate) of the last non-zero residual block can be temporarily stored in the accumulator.

[0080] In the case where the rate estimation device includes only one rate estimation module, the rate estimation module performs first to fourth rate estimations (BE rate estimations) on each target residual block in sequence.

[0081] In one possible implementation, the rate estimation module 13 is configured to: perform a first rate estimation on whether the target residual block contains non-zero residual coefficients based on the first rate estimation reference information of the residual block on which the first rate estimation of the target residual block depends, and determine the first rate estimate value of the target residual block; perform a C-rate estimation on whether each residual coefficient in the target residual block is zero based on the second rate estimation reference information of the residual block on which the second rate estimation of the target residual block depends, and determine the second rate estimate value of the target residual block; perform a third rate estimation on the first N non-zero residual coefficients in the target residual block based on the third rate estimation reference information of the residual block on which the third rate estimation of the target residual block depends, and determine the third rate estimate value of the target residual block; and perform a fourth rate estimation on the first residual coefficient greater than 1 in the target residual block based on the fourth rate estimation reference information of the residual block on which the fourth rate estimation of the target residual block depends, and determine the fourth rate estimate value of the residual block.

[0082] For any target residual block, the rate estimation module determines a probability model for the target residual block based on the first rate estimation reference information (B-rate estimation reference information) of the residual block that the first rate estimation (B-rate estimation) of the target residual block depends on. Then, using the determined probability model, the module performs a first rate estimation (B-rate estimation) on whether the target residual block contains non-zero residual coefficients, determines the first rate estimate (B-rate estimate) of the target residual block, and temporarily stores the first rate estimate (B-rate estimate) of the target residual block in an accumulator. The specific residual block that the target residual block depends on for performing the first rate estimation (B-rate estimation) can be determined based on relevant technologies; this disclosure does not impose specific limitations on this.

[0083] The rate estimation module determines a probability model for the target residual block based on the second rate estimation reference information (C rate estimation reference information) of the residual block that the target residual block needs to rely on for performing the second rate estimation (C rate estimation). Then, using the determined probability model, it performs a second rate estimation (C rate estimation) on whether each residual coefficient in the target residual block is zero, determining the second rate estimate (C rate estimate) of the target residual block, and temporarily storing the second rate estimate (C rate estimate) of the residual block in an accumulator. The specific residual block that the target residual block needs to rely on for performing the second rate estimation (C rate estimation) can be determined based on relevant technologies; this disclosure does not impose specific limitations on this.

[0084] The rate estimation module determines a probability model for the target residual block based on the third rate estimation reference information (D-rate estimation reference information) of the residual block that the target residual block needs to rely on for third rate estimation (D-rate estimation). Then, it uses the determined probability model to perform third rate estimation (D-rate estimation) on the first N non-zero residual coefficients in the target residual block, determining the third rate estimate (D-rate estimate) of the target residual block, and temporarily storing the third rate estimate (D-rate estimate) of the target residual block in an accumulator. The specific residual block that the target residual block needs to rely on for third rate estimation (D-rate estimation) can be determined based on relevant technologies; this disclosure does not impose specific limitations on this.

[0085] The rate estimation module determines a probability model for the target residual block based on the fourth rate estimation reference information (E-rate estimation reference information) of the residual block that the fourth rate estimation (E-rate estimation) of the target residual block depends on. Then, using the determined probability model, it performs a fourth rate estimation (E-rate estimation) on the first residual coefficient greater than 1 in the target residual block, determining the fourth rate estimate (E-rate estimate) of the target residual block, and temporarily storing the fourth rate estimate (E-rate estimate) of the target residual block in an accumulator. The specific residual block that the target residual block depends on for performing the fourth rate estimation (E-rate estimation) can be determined based on relevant technologies; this disclosure does not impose specific limitations on this.

[0086] In one possible implementation, the apparatus 10 further includes an accumulator, configured to: when the target residual block is not the last non-zero residual block, accumulate a first rate estimate, a second rate estimate, a third rate estimate, a fourth rate estimate, a fifth rate estimate, and a sixth rate estimate of the target residual block to determine the rate estimate of the target residual block; and when the target residual block is the last non-zero residual block, accumulate a seventh rate estimate, a first rate estimate, a second rate estimate, a third rate estimate, a fourth rate estimate, a fifth rate estimate, and a sixth rate estimate of the target residual block to determine the rate estimate of the target residual block.

[0087] After the rate estimation module performs the first to fourth and seventh rate estimations (AE rate estimation) on the last non-zero residual block, the accumulator accumulates the seventh rate estimate (A rate estimate), the first rate estimate (B rate estimate), the second rate estimate (C rate estimate), the third rate estimate (D rate estimate), the fourth rate estimate (E rate estimate), the fifth rate estimate (F rate estimate), and the sixth rate estimate (G rate estimate) of the last non-zero residual block to determine the rate estimate of the last non-zero residual block.

[0088] After the rate estimation module performs the first to fourth rate estimations (BE rate estimations) on any target residual block whose input index is less than the input index of the last non-zero residual block, the accumulator accumulates the first rate estimate (B rate estimate), the second rate estimate (C rate estimate), the third rate estimate (D rate estimate), the fourth rate estimate (E rate estimate), the fifth rate estimate (F rate estimate), and the sixth rate estimate (G rate estimate) of the target residual block to determine the rate estimate of the target residual block.

[0089] In one possible implementation, the accumulator is used to: accumulate the rate estimate of each target residual block in the coding unit to determine the rate estimate of the coding unit.

[0090] After determining the bitrate estimate for each target residual block (with an input index less than or equal to the input index of the last non-zero residual block) in the coding unit, the accumulator accumulates the bitrate estimate for each target residual block again to determine the bitrate estimate for the coding unit, thus completing the bitrate estimation for the coding unit.

[0091] like Figure 3 As shown, the accumulator outputs the code rate estimate of the coding unit.

[0092] The rate estimation apparatus of this disclosure includes a parameter determination module that calculates and stores at least one rate estimation reference information corresponding to each residual block in the coding unit. After the parameter determination module has stored the rate estimation reference information for all residual blocks in the coding unit, the rate estimation module determines the input index of the last non-zero residual block in the coding unit. This enables effective rate estimation for target residual blocks whose input index is less than or equal to the input index of the last non-zero residual block. Since the amount of data in the rate estimation reference information corresponding to the residual block is much smaller than the amount of data in the residual block itself, compared to the prior art where rate estimation requires storing and utilizing the residual block itself, the rate estimation apparatus of this disclosure, by setting the parameter determination module to pre-calculate and store the rate estimation reference information corresponding to each residual block, instead of storing each residual block itself, can effectively reduce the amount of data that needs to be stored for rate estimation and reduce the computational resources required for rate estimation.

[0093] Without compromising the quality of the video encoder, the area and computational cost of the entire video encoder can be reduced by eliminating the need to store all information of all residual blocks in the entire coding unit. Furthermore, when the video encoder needs to perform rate-distortion optimization in parallel on multiple coding units, multiple parallel bitrate estimation devices need to be deployed in the video encoder. Utilizing the bitrate estimation device of this disclosure embodiment can effectively optimize the hardware area for bitrate estimation, thereby reducing the cost of the video encoder in the GPU chip.

[0094] Figure 4 A flowchart illustrating a bitrate estimation method according to an embodiment of this disclosure is shown. Figure 1 As shown, the method includes:

[0095] In step S41, at least one code rate estimation reference information corresponding to each residual block in the coding unit is calculated and stored;

[0096] In step S42, after storing the rate estimation reference information of all residual blocks in the coding unit, the input index of the last non-zero residual block in the coding unit is determined.

[0097] In step S43, the target residual block is rate estimated based on at least one rate estimation reference information corresponding to the residual block on which the rate estimation of the target residual block depends. The input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

[0098] In one possible implementation, the code rate estimation reference information corresponding to each residual block in the coding unit is calculated and stored, including:

[0099] For any residual block in the coding unit, the rate estimation reference information corresponding to the residual block is calculated and stored based on the magnitude of the residual coefficients in the residual block. The magnitude of the residual coefficients corresponding to different types of rate estimation reference information is different.

[0100] In one possible implementation, at least one rate estimation reference information corresponding to each residual block in the coding unit is calculated and stored, including:

[0101] For any residual block in the coding unit, the first code rate estimation reference information corresponding to the residual block is calculated and stored based on whether the residual block contains non-zero residual coefficients;

[0102] Based on whether each residual coefficient in the residual block is zero, calculate and store the second rate estimation reference information corresponding to the residual block;

[0103] Based on the first N non-zero residual coefficients in the residual block, the third rate estimation reference information corresponding to the residual block is determined, where N is a positive integer;

[0104] Based on the first residual coefficient greater than 1 in the residual block, determine the fourth rate estimation reference information corresponding to the residual block.

[0105] In one possible implementation, bitrate estimation of the target residual block is performed based on at least one bitrate estimation reference information corresponding to the residual block on which bitrate estimation of the target residual block is required, including:

[0106] Based on the reference information of the first rate estimation of the residual block that the first rate estimation of the target residual block depends on, the first rate estimation is performed on whether the target residual block contains non-zero residual coefficients, and the first rate estimation value of the target residual block is determined.

[0107] Based on the second rate estimation reference information of the residual block that the second rate estimation of the target residual block depends on, the second rate estimation is performed on whether each residual coefficient in the target residual block is zero, and the second rate estimation value of the target residual block is determined.

[0108] Based on the reference information of the third rate estimation of the residual block that the third rate estimation of the target residual block depends on, the third rate estimation is performed on the first N non-zero residual coefficients in the target residual block to determine the third rate estimate of the target residual block.

[0109] Based on the fourth rate estimation reference information of the residual block that the fourth rate estimation of the target residual block depends on, the fourth rate estimation is performed on the first residual coefficient greater than 1 in the target residual block to determine the fourth rate estimate value of the target residual block.

[0110] In one possible implementation, the method further includes:

[0111] For any residual block in the coding unit, the sign bit of the non-zero residual coefficient in the residual block is used to perform the fifth code rate estimation to determine the fifth code rate estimate value of the residual block;

[0112] Perform a sixth rate estimate on the residual values ​​of all residual coefficients in the residual block to determine the sixth rate estimate of the residual block.

[0113] In one possible implementation, the method further includes:

[0114] If the target residual block is the last non-zero residual block, the position of the last non-zero residual coefficient in the target residual block is used to perform the seventh code rate estimation to determine the seventh code rate estimate of the target residual block.

[0115] In one possible implementation, the method further includes:

[0116] If the target residual block is not the last non-zero residual block, the first, second, third, fourth, fifth, and sixth rate estimates of the target residual block are accumulated to determine the rate estimate of the target residual block.

[0117] If the target residual block is the last non-zero residual block, the first, second, third, fourth, fifth, sixth, and seventh rate estimates of the target residual block are accumulated to determine the rate estimate of the target residual block.

[0118] In one possible implementation, the method further includes:

[0119] Accumulate the rate estimate of each target residual block in the coding unit to determine the rate estimate of the coding unit.

[0120] It is understood that the various method embodiments mentioned above in this disclosure can be combined with each other to form combined embodiments without violating the principle and logic. Due to space limitations, this disclosure will not elaborate further. Those skilled in the art will understand that in the above methods of specific implementation, the specific execution order of each step should be determined by its function and possible internal logic.

[0121] In some embodiments, the functions or modules of the apparatus provided in this disclosure can be used to perform the methods described in the above method embodiments. The specific implementation can be referred to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0122] This disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the above method.

[0123] This disclosure also provides a non-volatile computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the above-described method.

[0124] This disclosure also provides a computer program product, including a computer program or a non-volatile computer-readable storage medium carrying the computer program, wherein the computer program, when executed by a processor, implements the steps of the above method.

[0125] Figure 5 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. (Refer to...) Figure 5 Device 1900 can be provided as a server or terminal device. (See reference...) Figure 5 The apparatus 1900 includes a processing component 1922, which further includes one or more processors, and memory resources represented by memory 1932 for storing instructions, such as application programs, that can be executed by the processing component 1922. The application programs stored in memory 1932 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 1922 is configured to execute instructions to perform the methods described above.

[0126] Device 1900 may also include a power supply component 1926 configured to perform power management of device 1900, a wired or wireless network interface 1950 configured to connect device 1900 to a network, and an input / output interface 1958 (I / O interface). Device 1900 can operate on an operating system, such as Windows Server, stored in memory 1932. TM macOS X TM Unix TM Linux TM FreeBSD TM Or similar.

[0127] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions that can be executed by a processing component 1922 of the device 1900 to perform the above-described method.

[0128] Computer-readable storage media can be tangible devices capable of holding and storing programs / instructions used by instruction execution devices. Computer-readable storage media can be, for example—but not limited to—electrical storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disc read-only memory (CD-ROM), digital multifunction disc (DVD), memory sticks, floppy disks, mechanical encoding devices, such as punch cards or recessed protrusions storing instructions thereon, and any suitable combination of the foregoing. The computer-readable storage media used herein are not to be construed as transient signals themselves, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses through fiber optic cables), or electrical signals transmitted through wires.

[0129] The computer program (or computer-readable program instructions) described herein can be downloaded from a computer-readable storage medium to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage medium in the respective computing / processing device.

[0130] The computer program (or computer program instructions) used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing state information from the computer-readable program instructions to implement various aspects of this disclosure.

[0131] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0132] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0133] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0134] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction containing one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0135] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A bit rate estimation device, characterized in that, include: The parameter determination module is used to calculate and store at least one rate estimation reference information corresponding to each residual block in the coding unit; The rate estimation module is used to determine the input index of the last non-zero residual block in the coding unit after the rate estimation reference information of all residual blocks in the coding unit has been stored in the parameter determination module. The bitrate estimation module is used to perform bitrate estimation on the target residual block based on at least one bitrate estimation reference information corresponding to the residual block on which the bitrate estimation of the target residual block depends, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

2. The apparatus according to claim 1, characterized in that, The parameter determination module, specifically Used for: For any residual block in the coding unit, the rate estimation reference information corresponding to the residual block is calculated and stored based on the magnitude of the residual coefficients in the residual block. The magnitude of the residual coefficients corresponding to different types of rate estimation reference information is different.

3. The apparatus according to claim 1 or 2, characterized in that, The parameter determination module includes: The first rate parameter determination submodule is used to calculate and store the first rate estimation reference information corresponding to any residual block in the coding unit, based on whether the residual block contains non-zero residual coefficients. The second rate parameter determination submodule is used to calculate and store the second rate estimation reference information corresponding to any residual block in the coding unit, based on whether each residual coefficient in the residual block is zero. The third rate parameter determination submodule is used to determine the third rate estimation reference information corresponding to any residual block in the coding unit based on the first N non-zero residual coefficients in the residual block, where N is a positive integer; The fourth rate parameter determination submodule is used to determine the fourth rate estimation reference information corresponding to any residual block in the coding unit based on the first residual coefficient greater than 1 in the residual block.

4. The apparatus according to claim 1, characterized in that, The bit rate estimation module is used for: Based on the first rate estimation reference information of the residual block that the first rate estimation of the target residual block depends on, the first rate estimation is performed on whether the target residual block contains non-zero residual coefficients, and the first rate estimation value of the target residual block is determined. Based on the second rate estimation reference information of the residual block that the second rate estimation of the target residual block needs to rely on, the second rate estimation is performed on whether each residual coefficient in the target residual block is zero, and the second rate estimation value of the target residual block is determined. Based on the reference information of the third rate estimation of the residual block that the third rate estimation of the target residual block needs to rely on, the third rate estimation is performed on the first N non-zero residual coefficients in the target residual block to determine the third rate estimation value of the target residual block. Based on the fourth rate estimation reference information of the residual block that the fourth rate estimation of the target residual block needs to rely on, the fourth rate estimation is performed on the first residual coefficient greater than 1 in the target residual block to determine the fourth rate estimate value of the target residual block.

5. The apparatus according to claim 1, characterized in that, The bit rate estimation module is used for: For any residual block in the coding unit, the sign bit of the non-zero residual coefficient in the residual block is used for the fifth code rate estimation to determine the fifth code rate estimate value of the residual block; A sixth rate estimate is performed on the residual residual values ​​of all residual coefficients in the residual block to determine the sixth rate estimate of the residual block.

6. The apparatus according to claim 1, characterized in that, The bit rate estimation module is used for: If the target residual block is the last non-zero residual block, the position of the last non-zero residual coefficient in the target residual block is used to perform a seventh code rate estimation to determine the seventh code rate estimate of the target residual block.

7. The apparatus according to any one of claims 4 to 6, characterized in that, The device further includes: an accumulator, used for: If the target residual block is not the last non-zero residual block, the first bitrate estimate, the second bitrate estimate, the third bitrate estimate, the fourth bitrate estimate, the fifth bitrate estimate, and the sixth bitrate estimate of the target residual block are accumulated to determine the bitrate estimate of the target residual block. If the target residual block is the last non-zero residual block, the first, second, third, fourth, fifth, sixth, and seventh rate estimates of the target residual block are accumulated to determine the rate estimate of the target residual block.

8. The apparatus according to claim 7, characterized in that, The accumulator is used for: The bitrate estimate of the coding unit is determined by summing the bitrate estimates of each target residual block in the coding unit.

9. A bitrate estimation method, characterized in that, include: Calculate and store at least one rate estimation reference for each residual block in the coding unit; After storing the rate estimation reference information for all residual blocks in the coding unit, the input index of the last non-zero residual block in the coding unit is determined. Based on at least one rate estimation reference information corresponding to the residual block on which the rate estimation of the target residual block is required, rate estimation is performed on the target residual block, wherein the input index of the target residual block is less than or equal to the input index of the last non-zero residual block.

10. A video encoder, characterized in that, Includes the rate estimation apparatus according to any one of claims 1 to 8.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the method of claim 9.

12. A non-volatile computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method of claim 9.

13. A computer program product comprising a computer program, or a non-volatile computer-readable storage medium carrying a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method of claim 9.

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