Series assembly die and chip for high-power semiconductor device cells

By using a series assembly mold for high-power semiconductor device cells, the shortcomings of manual soldering processes and traditional packaging methods have been overcome, achieving high-precision alignment and efficient soldering, improving the reliability and consistency of SPDS devices, and meeting the needs of large-scale production.

CN121358221APending Publication Date: 2026-01-16XIAN SEMIPOWER ELECTRONICS TECH
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Patent Information

Application Number
CN202511473626.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-15
Publication Date
2026-01-16

AI Technical Summary

Technical Problem

In the current SPDS device cell tandem assembly process, the defects of manual soldering process and the limitations of traditional packaging methods combine to result in poor device reliability, low performance consistency, and low production efficiency, which cannot meet the needs of large-scale production and high-end applications.

Method used

A serial assembly mold for high-power semiconductor device cells is adopted, including a welding base, a heat sink, a welding positioning plate, and a welding pressure block. By precisely limiting the position and uniformly distributing the solder paste, the chip alignment accuracy and welding quality are ensured, and positional misalignment and voids are avoided.

Benefits of technology

It improves the alignment accuracy between series cells, reduces chip tilt and solder void rate, ensures device voltage transmission stability and heat conduction efficiency, and improves production efficiency and device consistency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a series assembly die and chip for high-power semiconductor device cells, and the die comprises a welding pedestal which is provided with a plurality of grooves; the heat sink sheets are arranged in the plurality of grooves, solder paste is arranged at the tops of the heat sink sheets, and the solder paste is used for bearing the chips; the welding positioning plate is arranged at the top of the welding base, a plurality of open holes are formed in the welding positioning plate, and the open holes are matched with the heat sink pieces; and the welding pressing block is movably connected to the welding positioning plate, the welding pressing block is provided with a plurality of bosses, and the bosses are inserted into the open holes and abut against the chip. When the boss of the welding pressing block is inserted into the hole of the positioning plate and abuts against the top of the chip, the ductility of the solder paste when the solder paste is heated and melted can be restrained, and the chip is prevented from inclining due to deformation of the solder paste. On the other hand, the transverse shaking of the chip can be further limited through the clearance fit of the boss and the open hole, and finally the inclination of the chip is controlled within 20 microns, so that the alignment precision between series cells is ensured, and the stability of voltage transmission of the SPDS device is ensured.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor packaging, and particularly relates to a series assembly mold for a high-power semiconductor device cell and a chip. BACKGROUND

[0002] In the field of pulse power technology, semiconductor pulse power devices (SPDS) based on the SOS effect of semiconductor diodes have unique self-synchronous triggering characteristics, can flexibly increase the working voltage by the number of series dies, and can achieve voltage output from several hundred volts to hundreds of kilovolts or even megavolts. SPDS has irreplaceable application value in high-end fields such as high-energy physics, power systems, and national defense equipment. However, SPDS devices have extremely strict special requirements for packaging: on the one hand, to ensure stable transmission of pulse power signals and safe operation of the device, the packaging structure needs to have extremely low parasitic inductance to avoid signal distortion or device damage caused by inductance interference; on the other hand, since the device generates a large amount of heat during operation and is often used in compact equipment, the packaging needs to meet the performance indicators of high power density, small size, and strong heat dissipation. The traditional packaging methods of existing high-power semiconductor devices, such as bolt-type packaging and module-type packaging, are limited by structural design and process characteristics and cannot meet the comprehensive needs of low parasitic inductance, high power density, small size, and strong heat dissipation. This has become a key bottleneck restricting the performance improvement and large-scale application of SPDS devices. To achieve the voltage increase goal of SPDS devices, multiple device cells need to be series assembled. Currently, the series assembly of SPDS device cells in the industry still mainly relies on manual soldering process. This process lacks positioning and constraints of special auxiliary molds, and has significant defects in the soldering operation of heat sink pieces and chips: first, the tin paste will deform due to its own ductility and stress characteristics during heating, causing the chip to easily deviate during soldering, and the chip inclination often exceeds 20 microns, which seriously damages the alignment accuracy between series cells and affects the voltage transmission stability of the device as a whole; second, in the subsequent vacuum reflow furnace soldering process, manual operation cannot guarantee the uniformity of tin paste coating and the consistency of the soldering environment, and it is easy to produce soldering voids with a proportion of ≥3%. These soldering voids can greatly reduce the heat conduction efficiency between the heat sink piece and the chip, causing local heat accumulation during device operation, which not only shortens the service life of the device, but also causes performance fluctuations, making it difficult to ensure the consistency of device performance in batch production, and further increasing the risk of SPDS device operation under high voltage conditions. In summary, in the series assembly process of existing SPDS device cells, the defects of manual soldering process and the limitations of traditional packaging methods are superimposed, resulting in poor device reliability, low performance consistency, and low production efficiency, which cannot meet the needs of large-scale production and high-end application scenarios of SPDS devices. Summary of the Invention

[0003] This invention provides a mold and chip for the tandem assembly of high-power semiconductor device cells, addressing the technical shortcomings of existing SPDS device cell tandem assembly processes. These shortcomings stem from the combined effects of defects in manual soldering and limitations of traditional packaging methods, resulting in poor device reliability, low performance consistency, and low production efficiency. Consequently, these advancements fail to meet the demands of large-scale SPDS device production and high-end applications. To achieve the above objectives, the present invention employs the following technical solution: In a first aspect, a cascade assembly mold for high-power semiconductor device cells is provided, comprising: A welding base with multiple grooves provided on it; A heat sink is disposed in a plurality of said grooves, and solder paste is provided on the top of the heat sink for carrying the chip; A welding positioning plate is disposed on the top of the welding base. The welding positioning plate has multiple openings, each of which is adapted to a heat sink sheet. A welding pressure block is movably connected to the welding positioning plate. The welding pressure block has multiple protrusions, which are inserted into the openings and abut against the chip.

[0004] Furthermore, all the grooves have the same structure, and four heat sinks are provided in each groove, with a chip disposed on each heat sink.

[0005] Furthermore, the number of grooves is four.

[0006] Furthermore, the chip is disposed in the middle of the heat sink.

[0007] Furthermore, multiple openings are sequentially spaced along the entire length of the welding positioning plate, and each opening has the same structure. When the welding positioning plate is placed on the welding base, each opening corresponds to each chip.

[0008] Furthermore, the shape of the boss is adapted to the shape of the opening.

[0009] Furthermore, the cross-section of the boss is larger than the cross-section of the chip.

[0010] Furthermore, both the welding base and the welding positioning plate are plate-shaped structures.

[0011] Furthermore, the welding base, welding positioning plate, and welding pressure block are all made of aluminum alloy.

[0012] Secondly, a chip is provided, which is soldered using a serial assembly mold for high-power semiconductor device cells as described above.

[0013] Compared with the prior art, the present invention has the following beneficial effects: 1. Multiple grooves on the soldering base are adapted to the structure of the heat sink, which can precisely limit the position of the heat sink and prevent lateral displacement of the heat sink during manual placement. The soldering positioning plate covers the top of the soldering base, and its openings correspond one-to-one with the heat sink. Simply place the chip on the solder paste of the heat sink through the openings, and the boundary constraints of the openings can prevent the chip from shifting laterally during placement. When the boss of the soldering pad is inserted into the opening of the positioning plate and abuts against the top of the chip, it can suppress the extensibility of the solder paste when it is heated and melted, and prevent the chip from tilting due to the deformation of the solder paste. On the other hand, the gap fit between the boss and the opening can further limit the lateral wobble of the chip, and ultimately control the chip tilt within 20μm, ensuring the alignment accuracy between series cells and ensuring the stability of voltage transmission of SPDS devices.

[0014] 2. All grooves are identical in size, depth, and internal flatness, ensuring that the four heat sinks in each groove are on the same mounting reference surface. This avoids misalignment of some heat sinks due to differences in groove structure, thus ensuring the chip height consistency of the four sets of heat sinks in the same groove.

[0015] 3. The four grooves can simultaneously support sixteen sets of heat sinks, thereby increasing the assembly capacity and meeting the production needs of medium-batch SPDS devices.

[0016] 4. When the chip is located in the middle of the heat sink, the solder paste on the top of the heat sink can be evenly distributed around the chip. When vertical pressure is applied to the protrusion of the soldering block, the pressure can be evenly transmitted to the solder paste below through the chip, preventing the chip from shifting. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This invention provides an overall schematic diagram of a series assembly mold for high-power semiconductor device cells; Figure 2 This invention provides a schematic diagram of a welding base in a series assembly mold for high-power semiconductor device cells; Figure 3 This invention provides a schematic diagram of a welding positioning plate in a series assembly mold for high-power semiconductor device cells; Figure 4This invention provides a schematic diagram of a welding block in a series assembly mold for high-power semiconductor device cells; Figure 5 This invention provides a side view of a serial assembly mold for high-power semiconductor device cells.

[0019] The components include: 1. Chip; 2. Heat sink; 3. Welding base; 4. Welding positioning plate; 5. Welding clamping block. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0021] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0022] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0023] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper," "lower," "horizontal," or "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Furthermore, terms such as "first" and "second" are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] Furthermore, the use of the term "horizontal" does not imply that the component must be absolutely horizontal, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0025] In the description of the embodiments of the present invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention according to the specific circumstances.

[0026] In the field of pulsed power technology, semiconductor pulsed power devices (SPDS) developed based on the SOS effect of semiconductor diodes have unique self-synchronization triggering characteristics. They can flexibly increase the operating voltage by increasing the number of series-connected dies, and can achieve voltage output from hundreds of volts to hundreds of kilovolts or even megavolts. They have irreplaceable application value in high-end fields such as high-energy physics, power systems, and national defense equipment. However, SPDS devices impose extremely stringent special requirements on packaging: on the one hand, to ensure stable transmission of pulse power signals and safe operation of the device, the packaging structure must have extremely low parasitic inductance to avoid signal distortion or device damage caused by inductive interference; on the other hand, since the device generates a lot of heat during operation and is often used in compact devices, the packaging must simultaneously meet the performance indicators of high power density, small size, and strong heat dissipation. Existing traditional packaging methods for high-power semiconductor devices, such as bolt-type packaging and modular packaging, are limited by structural design and process characteristics and cannot meet the comprehensive requirements of low parasitic inductance, high power density, small size, and strong heat dissipation. This has become a key bottleneck restricting the performance improvement and large-scale application of SPDS devices. To achieve the voltage boost target of SPDS devices, multiple device cells need to be assembled in series. Currently, the industry still mainly relies on manual soldering for the series assembly of SPDS device cells. This process lacks the positioning and constraint of dedicated auxiliary molds, and has significant defects in the soldering operation between the heat sink and the chip: First, the solder paste deforms due to its own ductility and stress characteristics during heating, which makes the chip prone to positional displacement during the soldering process. Moreover, the chip tilt often exceeds 20μm, which seriously damages the alignment accuracy between series cells and affects the overall voltage transmission stability of the device. Second, in the subsequent vacuum reflow oven soldering process, manual operation makes it difficult to ensure the uniformity of solder paste coating and the consistency of the soldering environment, which easily produces solder voids with a ratio of ≥3%. These solder voids will significantly reduce the heat conduction efficiency between the heat sink and the chip, causing local heat accumulation during device operation. This will not only shorten the device's lifespan but also cause device performance fluctuations, making it difficult to ensure the consistency of device performance in mass production, and further increasing the operating risk of SPDS devices under high voltage conditions. In summary, the defects of manual soldering and the limitations of traditional packaging methods in the existing SPDS device cell tandem assembly process combine to result in poor device reliability, low performance consistency, and low production efficiency, which cannot meet the needs of large-scale production and high-end application scenarios of SPDS devices.

[0027] To address the technical deficiencies mentioned above, this embodiment provides a mold and chip for the serial assembly of high-power semiconductor device cells.

[0028] The present invention will now be described in further detail with reference to the accompanying drawings: See Figures 1-5 The first aspect of the present invention provides a serial assembly mold for high-power semiconductor device cells, including a welding base 3, which is a plate-shaped structure with multiple grooves; a heat sink 2 disposed in the multiple grooves, with solder paste on the top of the heat sink 2 for supporting a chip 1; a welding positioning plate 4 disposed on the top of the welding base 3, with multiple openings on the welding positioning plate 4, each opening being adapted to the heat sink 2; and a welding pressure block 5 movably connected to the welding positioning plate 4, with multiple bosses inserted into the openings and abutting against the chip 1.

[0029] In the above structure, the groove on the solder base 3 can be adapted to the structure of the heat sink 2. When the heat sink 2 is placed in the groove, the groove can precisely limit the position of the heat sink 2 and prevent the heat sink 2 from shifting laterally. At the same time, the depth of the groove matches the thickness of the heat sink 2, ensuring that multiple heat sinks 2 are on the same horizontal plane. This eliminates the problem of chip 1 shifting due to the ductility and stress characteristics of the solder paste itself, which causes the heat sink 2 to misalign and cause chip 1 assembly deviation. In addition, the opening design of the welding positioning plate 4 can correspond one-to-one with the heat sink 2. After the chip 1 is placed on the solder paste of the heat sink 2 through the opening, the boundary constraint of the opening can be used to avoid the lateral displacement of the chip 1 during the placement process; and the aperture of the opening is precisely matched with the size of the chip 1, further limiting the displacement space of the chip 1.

[0030] The protrusion design of the soldering block 5 achieves vertical pressing and limiting of the chip 1. When the protrusion of the soldering block 5 is inserted into the opening on the soldering positioning plate 4 and abuts against the top of the chip 1, on the one hand, the stable pressure in the vertical direction suppresses the problem of the chip 1 tilting due to the melting of solder paste; on the other hand, the gap fit between the protrusion and the opening can further limit the lateral shaking of the chip 1, and finally control the chip tilt within 20μm, ensuring the alignment accuracy between series cells and ensuring the stability of voltage transmission of SPDS devices.

[0031] like Figure 2As shown, the dimensions, depth, and internal flatness of each groove are exactly the same. When the heat sink 2 is placed in the groove, the chip 1 is set in the middle of the heat sink 2. The four heat sinks 2 in each groove can be on the same mounting reference surface, avoiding misalignment of some heat sinks 2 due to differences in groove structure, thus ensuring the chip height consistency on the four sets of heat sinks 2 in the same groove. At the same time, since there are four grooves, a total of sixteen sets of heat sinks 2 can be supported, further increasing the assembly volume and meeting the production needs of medium-batch SPDS devices.

[0032] During implementation, from Figure 3 As can be seen above, multiple openings are sequentially spaced along the length of the welding positioning plate 4, and each opening has the same structure. When the welding positioning plate 4 is placed on the welding base 3, each opening corresponds to each chip 1, the shape of the boss matches the shape of the opening, and the cross-section of the boss is larger than the cross-section of the chip 1.

[0033] Furthermore, both the welding base 3 and the welding positioning plate 4 are plate-shaped structures, and the welding base 3, welding positioning plate 4, and welding pressure block 5 are all made of aluminum alloy. Specifically, the welding base 3 is made of aluminum alloy 6061, and its shape is a cube with four grooves. The length and width of each groove are twice the length and width of the heat sink 2, and the groove thickness is the same as the thickness of the heat sink 2. The welding positioning plate 4 is also made of aluminum alloy 6061 and is also cube-shaped. The welding pressure block 5 is also made of aluminum alloy 6061 and is also cube-shaped. During operation, one set of molds requires four welding pressure blocks 5. The boss on the welding pressure block 5 has a length and width of chip 1 + 0.2mm and a height of 0.2mm.

[0034] When applying the product, after putting on the work gloves, first check whether the groove on the welding base 3 is clean and free of foreign objects. Then, manually place the heat sink 2 into the groove of the welding base 3. After placement, visually check whether the heat sink 2 and the welding base 3 are flat.

[0035] Next, check the copper mesh for foreign objects. After confirming that there are no foreign objects, use a stencil to brush solder paste onto the heat sink 2. Then, use a suction pen to pick up the chip 1 and place it in the center of the top of the heat sink 2. Then, cover the soldering positioning plate 4 onto the soldering base 3. The soldering base 3 and the soldering positioning plate 4 are tightly connected so that the opening on the soldering positioning plate 4 corresponds to the chip 1. Then, place the soldering pressure block 5 on the soldering positioning plate 4 so that the protrusion on the soldering pressure block 5 can be inserted into the opening and abut against the chip 1. The protrusion can completely cover the chip 1.

[0036] Finally, all the assembled molds are placed in a vacuum reflow oven. The reflow parameters of the vacuum reflow oven are set according to the reflow parameters provided in the solder paste specification. During the reflow process, the solder paste passes through different temperature zones, changing from a liquid state to a solid state, to ensure that the heat sink 2 and the chip 1 are successfully soldered.

[0037] The welding positioning plate 4 provided by this mold has the same opening size as the chip 1, so the position of the chip 1 on the heat sink 2 will not shift during the welding process. At the same time, during the welding process, the welding pressure block 5 exerts downward pressure on the chip 1, so the tilt of the chip 1 on the heat sink 2 can be significantly reduced to ≤5um. In addition, during the welding process, the welding pressure block 5 exerts downward pressure on the chip 1, and with the combined effect of the vacuum reflow oven, the welding quality can be improved, and the void content can be reduced to ≤0.5%.

[0038] Secondly, a chip is provided, which is soldered using a serial assembly mold for high-power semiconductor device cells as described above.

[0039] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A series assembly mold for a high-power semiconductor device cell, characterized by, The utility model relates to a welding baseplate and welding positioning plate for large power semiconductor device cell series assembly, which comprises the following: a welding baseplate with a plurality of grooves; a heat sink piece arranged in the grooves, the top of the heat sink piece being provided with a tin paste for carrying a chip; a welding positioning plate arranged on the top of the welding baseplate, the welding positioning plate being provided with a plurality of openings, each of the openings being matched with a heat sink piece; a welding pressing block movably connected to the welding positioning plate, the welding pressing block being provided with a plurality of protrusions, the protrusions being inserted into the openings and abutting against the chips.

2. The series assembly mold for a cell of a high-power semiconductor device according to claim 1, wherein Each of the grooves has the same structure, and four heat sink pieces are arranged in each of the grooves, and one chip is arranged on each of the heat sink pieces.

3. A series assembly mold for a cell of a high-power semiconductor device according to claim 1 or 2, wherein The number of the grooves is four.

4. The series assembly mold for a cell of a high-power semiconductor device according to claim 1 or 2, wherein The chip is arranged at the middle of the heat sink piece.

5. The series assembly mold for a cell of a high-power semiconductor device according to Claim 1, wherein The plurality of openings are sequentially and spacedly arranged along the length direction of the welding positioning plate, and each of the openings has the same structure. When the welding positioning plate is covered on the welding baseplate, each of the openings corresponds to one chip.

6. The series assembly mold for a cell of a high power semiconductor device according to Claim 1, wherein The shape of the protrusion is matched with the shape of the opening.

7. The series assembly mold for a cell of a high power semiconductor device according to Claim 1, wherein The cross section of the protrusion is larger than the cross section of the chip.

8. The series assembly mold for a cell of a high power semiconductor device according to Claim 1, wherein The welding baseplate and the welding positioning plate are both plate-shaped structures.

9. The series assembly mold for a cell of a high power semiconductor device according to Claim 1, wherein The welding baseplate, the welding positioning plate and the welding pressing block are all made of aluminum alloy.

10. A chip, characterized by The chip is welded by using the series assembly mold for large power semiconductor device cell according to any one of claims 1-9.