Circuit board structure

Abstract

The invention provides a circuit board structure. The circuit board structure comprises a substrate layer, a redistribution layer, a copper metal layer and a first molybdenum metal layer. The redistribution layer penetrates through the substrate layer and is provided with a first end and a second end. The copper metal layer is disposed on the first end of the redistribution layer. The first molybdenum metal layer is disposed on the copper metal layer or the second end of the redistribution layer.

Description

TECHNICAL FIELD

[0001] The present invention relates to a circuit board structure, and more particularly to a circuit board structure using a molybdenum metal layer as a protective layer. BACKGROUND

[0002] In the manufacturing process of a circuit board structure, one or more temporary substrates can be used as a carrier to sequentially process both sides of the circuit board structure. In order to avoid oxidation of the circuit pattern during the above-mentioned processing, a protective layer is usually provided on both sides of the circuit board structure. Further, after the circuit board structure is processed, the protective layers can be removed by an etching process. However, the above-mentioned process steps are complicated, time-consuming and costly. Therefore, although the existing circuit board structures have gradually met their intended purposes, they are not satisfactory in all aspects. Thus, there is still a need to develop new circuit board structures and processes. SUMMARY

[0003] According to some embodiments, a circuit board structure is provided. The circuit board structure includes a base layer, a redistribution layer, a copper metal layer, and a first molybdenum metal layer. The redistribution layer is disposed in the base layer and has a first end and a second end. The copper metal layer is disposed on the first end of the redistribution layer. The first molybdenum metal layer is disposed on the copper metal layer or the second end of the redistribution layer.

[0004] In some embodiments, the first molybdenum metal layer is disposed on the copper metal layer.

[0005] In some embodiments, the circuit board structure further includes a carrier substrate, wherein the first molybdenum metal layer is between the copper metal layer and the carrier substrate.

[0006] In some embodiments, the first molybdenum metal layer is coplanar with a surface of the base layer.

[0007] In some embodiments, the base layer has a thickness between 1 μm and 200 μm, the first molybdenum metal layer has a thickness between 5 nm and 1000 nm, and the copper metal layer has a thickness between 5 nm and 1000 nm.

[0008] In some embodiments, the circuit board structure further includes a second molybdenum metal layer, wherein the second molybdenum metal layer is disposed on the second end of the redistribution layer.

[0009] In some embodiments, the second molybdenum metal layer is not coplanar with a surface of the base layer.

[0010] In some embodiments, the first molybdenum metal layer is disposed on the second end of the redistribution layer.

[0011] In some embodiments, the circuit board structure further includes a titanium metal layer, wherein the titanium metal layer is on the copper metal layer.

[0012] In some embodiments, the circuit board structure further includes a carrier substrate, wherein the titanium metal layer is located between the copper metal layer and the carrier substrate.

[0013] The circuit board structure of the present disclosure can be applied in various types of electronic devices. In order to make the components and advantages of the present disclosure more apparent, various embodiments are described below, and the accompanying drawings are described in detail as follows. BRIEF DESCRIPTION OF DRAWINGS

[0014] When read in conjunction with the accompanying drawings, the present disclosure can be more fully understood. It is worth noting that, in accordance with the standard practice in the industry, the components are not drawn to scale. In fact, for the sake of clarity, the size of each component can be arbitrarily enlarged or reduced. Figure One

[0015] are cross-sectional schematic views showing different stages of a circuit board structure in a manufacturing process, respectively, according to some embodiments of the present disclosure. Figures 1 to 4

[0016] are cross-sectional schematic views showing different stages of a circuit board structure in a subsequent process, respectively, according to some embodiments of the present disclosure. Figures 5 to 11

[0017] are cross-sectional schematic views showing different stages of a circuit board structure in a manufacturing process, respectively, according to some other embodiments of the present disclosure. Figures 12 to 16

[0018] is a cross-sectional schematic view showing a circuit board structure, according to yet some other embodiments of the present disclosure. Figure 17 DETAILED DESCRIPTION The apparatuses according to various embodiments of the present disclosure are described in detail below. It should be understood that the following description provides many different embodiments, or examples, for implementing different aspects, embodiments and / or configurations of the present disclosure. Each of the various embodiments can provide for a single implementation of the present disclosure or a combination of various implementations. However, it should be understood that they are presented in order to provide the reader with a thorough description of the different aspects, embodiments and / or configurations of the present disclosure as well as to comply with applicable filing rules. It is submitted that the present disclosure can be practiced without necessarily being limited to any single implementation presented, which can be implemented in or with any number of different devices, systems and / or methods.

[0019]

[0020] ​Furthermore, it is to be understood that the use of relational terms such as first, second, and the like, are used solely to distinguish one from another entity without necessarily implying a sequence or order to the entities. The terms "first", "second", and the like can be used interchangeably with the terms "initial", "primary", and the like, and vice versa. The terms "comprise", "comprising", "comprises", and the like can be used interchangeably with the term "include" or "including". The terms "include", "including", and the like can be used interchangeably with the term "comprise", "comprising", and the like. The terms "plurality" and "a plurality" encompass both the meaning of "multiple" or "two or more" and the meaning of "two or more but not single".

[0021] In some embodiments of the present disclosure, the term of connection, such as "connect", "interconnect", "bond", and the like, unless specifically defined, can refer to two structures in direct contact, or can also refer to two structures not in direct contact, with other structures disposed between the two structures. And this term of connection, bonding can also include both two structures can be movable, or both two structures are fixed. In addition, the term "electrically connected" or "electrically coupled" includes any direct and indirect electrical connection means.

[0022] In the present disclosure, the terms "approximate", "about", "substantially" generally mean within 10%, or 5%, or 3%, or 2%, or 1%, or 0.5% of a given value or range. The given number is approximately the number, that is, without specific description of "about", "approximately", "substantially", the meaning of "about", "approximately", "substantially" is still implied. The term "range between a first value and a second value" means that the range includes the first value, the second value and other values between them. Furthermore, there can be an error in any two values or directions used for comparison. If the first value is equal to the second value, it implies that there can be an error of about 10%, or 5%, or 3%, or 2%, or 1%, or 0.5% between the first value and the second value. If the first direction is perpendicular to the second direction, the angle between the first direction and the second direction can be between 80 degrees and 100 degrees. If the first direction is parallel to the second direction, the angle between the first direction and the second direction can be between 0 degrees and 10 degrees.

[0023] It should be understood that the following examples can be substituted, recombined, combined with components in different embodiments to complete other embodiments without departing from the spirit of the present disclosure. The components of each embodiment can be used in any combination as long as they do not conflict with the spirit of the invention or conflict.

[0024] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined in the embodiments of the disclosure.

[0025] In the manufacturing process of the conventional circuit board structure, a metal with high chemical stability and / or structural stability is usually used as a protective layer of the circuit pattern to protect the circuit pattern from oxidation during the processing of the circuit board structure. However, these protective layers, although having sufficient protection, are not easy to be removed. In this way, an etching process may be used to ensure that these metals with high chemical stability and / or structural stability can be completely removed. In addition, in order to facilitate subsequent processing, the circuit board structure after etching may also be subjected to surface treatment. In other words, although the use of metals with high chemical stability and / or structural stability as a protective layer can effectively protect the circuit board structure, it will also lead to complicated procedures and high production costs. Therefore, the present disclosure provides a circuit board structure which uses molybdenum (Mo) as a protective layer to avoid oxidation of the circuit pattern of the circuit board structure, and which can effectively reduce the process steps and reduce production costs.

[0026] Reference is made to Figures 1 to 4 According to some embodiments of the present disclosure, the cross-sectional schematic diagrams of the circuit board structure at different stages of the manufacturing process are shown. It is worth mentioning that, for the sake of simplicity and easy understanding, the drawings of the present disclosure may exaggerate the size of the elements and the proportion between them (for example, the first molybdenum metal layer 11, the copper metal layer 12, the redistribution layer 14, the second molybdenum metal layer 21, the titanium metal layer 22 or the first molybdenum metal layer 23 which will appear below). In addition, the drawings of the present disclosure may omit some elements in the circuit board structure, but those skilled in the art can understand that the circuit board structure can also include other common elements.

[0027] As Figure 1As shown, a carrier substrate 10 is provided for supporting components disposed thereon during manufacturing (e.g., the first molybdenum metal layer 11, copper metal layer 12, and redistribution layer 14, etc., mentioned below). In some embodiments, the material of the carrier substrate 10 may be or may include: group IV elements or group IV compounds, such as silicon (Si), diamond (C), or silicon carbide (SiC); group III-V compounds, such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium phosphide (GaP), gallium arsenide (GaAs), or aluminum gallium arsenide (AlGaAs); other suitable materials; or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the carrier substrate 10 may be or may include glass, quartz, sapphire, ceramic, other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In some embodiments, the material of the carrier substrate 10 may be or may include polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), polypropylene (PP), other suitable materials, or combinations thereof, but this disclosure is not limited thereto. In this embodiment, the carrier substrate 10 may be a glass substrate.

[0028] like Figure 1 As shown, following the steps described above, a first molybdenum metal layer 11 is formed on the carrier substrate 10. Specifically, the first molybdenum metal layer 11 is used to protect the copper metal layer 12 or redistribution layer 14 disposed thereon in subsequent processes, and can be removed in subsequent processes by applying flux. A detailed description is provided below. In some embodiments, the first molybdenum metal layer 11 can be formed by sputtering, evaporation, other suitable processes, or combinations thereof, but this disclosure is not limited thereto. In this embodiment, the first molybdenum metal layer 11 is formed on the carrier substrate 10 by a sputtering process.

[0029] In some embodiments, the first molybdenum metal layer 11 comprises molybdenum, and the weight percentage of molybdenum may be greater than or equal to 80 wt%, but this disclosure is not limited thereto. For example, the weight percentage of molybdenum may be 80 wt%, 85 wt%, 87.5 wt%, 90 wt%, 92.5 wt%, 95 wt%, 97.5 wt%, or any value or range between the above values. In some embodiments, a molybdenum alloy target may be used as a raw material to form the first molybdenum metal layer 11. For example, a molybdenum-tantalum alloy (having 10.7 wt% tantalum (Ta)), a molybdenum-niobium alloy (having 5 wt% niobium (Nb)), other similar alloys, or combinations thereof may be used, but this disclosure is not limited thereto. In other words, the first molybdenum metal layer 11 may include small or trace amounts of other elements, rather than being composed solely of molybdenum.

[0030] In some embodiments, the thickness t1 of the first molybdenum metal layer 11 can be between 5 nm and 1000 nm, but this disclosure is not limited thereto. For example, the thickness t1 can be 5 nm, 10 nm, 50 nm, 100 nm, 200 nm, 500 nm, 750 nm, 1000 nm, or any value or range between the above values. In this embodiment, the thickness t1 is 50 nm.

[0031] like Figure 1 As shown, following the steps described above, a copper metal layer 12 is formed on the first molybdenum metal layer 11. Specifically, the copper metal layer 12 serves as a seed layer for the redistribution layer 14 in subsequent processes to facilitate the growth of the redistribution layer 14. In some embodiments, the copper metal layer 12 can be formed by sputtering, vapor deposition, other suitable processes, or combinations thereof, but this disclosure is not limited thereto. In this embodiment, the copper metal layer 12 is formed on the first molybdenum metal layer 11 by sputtering.

[0032] In some embodiments, the copper metal layer 12 comprises copper (Cu), and the weight percentage of copper may be greater than or equal to 99.0 wt%, but this disclosure is not limited thereto. For example, the weight percentage of copper may be 99.00 wt%, 99.20 wt%, 99.50 wt%, 99.75 wt%, 99.90 wt%, 99.99 wt%, 99.999 wt%, 99.9999 wt%, or any value or range between the foregoing. Alternatively, the first copper metal layer 12 may substantially comprise copper and exclude other components. That is, without considering impurities, the copper metal layer 12 may be substantially composed of copper.

[0033] In some embodiments, the thickness t2 of the copper metal layer 12 can be between 5 nm and 1000 nm, although the present disclosure is not limited thereto. For example, the thickness t2 can be 5 nm, 10 nm, 50 nm, 100 nm, 200 nm, 500 nm, 750 nm, 1000 nm, or any value or range between the aforementioned values. In the present embodiment, the thickness t2 is 300 nm.

[0034] As shown in FIG. 1C, after the aforementioned steps, a mask layer 13 is disposed on the copper metal layer 12. Specifically, the mask layer 13 covers a portion of the copper metal layer 12 and exposes another portion of the copper metal layer 12. In some embodiments, the mask layer 13 can be formed by a photolithography process, although the present disclosure is not limited thereto. For example, the photolithography process can include photoresist coating (e.g., spin-on coating), soft baking, mask aligning, exposure, post-exposure baking, photoresist developing, rinsing, drying (e.g., spin-drying and / or hard baking), other suitable photolithography techniques, and / or combinations thereof. Figure 2 In some embodiments, the mask layer 13 can include a hard mask, a soft mask, or a combination thereof. For example, the material of the mask layer 13 can be or can include silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, photoresist, other suitable materials, or combinations thereof, although the present disclosure is not limited thereto. In the present embodiment, the mask layer 13 is photoresist.

[0035] As shown in FIG. 1D, after the aforementioned steps, a redistribution layer 14 is disposed on the copper metal layer 12 exposed from the mask layer 13. Specifically, the redistribution layer 14 is used to form electrical connections on both sides of the subsequently formed circuit board structure. It is worth mentioning that, although the structure of the redistribution layer 14 shown in FIG. 1D is a large-area sheet or an upwardly extending column, the present disclosure is not limited thereto. Those skilled in the art can adjust the specific shape, size, and configuration of the redistribution layer 14 according to design requirements (e.g., adjust to be as shown in FIG. 1E).

[0036] Figure 3 As shown in FIG. 1F, after the aforementioned steps, a passivation layer 15 is disposed on the redistribution layer 14. Specifically, the passivation layer 15 covers a portion of the redistribution layer 14 and exposes another portion of the redistribution layer 14. In some embodiments, the passivation layer 15 can be formed by a photolithography process, although the present disclosure is not limited thereto. For example, the photolithography process can include photoresist coating (e.g., spin-on coating), soft baking, mask aligning, exposure, post-exposure baking, photoresist developing, rinsing, drying (e.g., spin-drying and / or hard baking), other suitable photolithography techniques, and / or combinations thereof. Figure 3 Figure 4 ​​The re-distribution layer 14 can be formed by electroplating, electroless plating, other suitable processes, or a combination thereof, in some embodiments, but the disclosure is not limited thereto. In the present embodiment, the re-distribution layer 14 is disposed on the copper metal layer 12 by an electroplating process.

[0037] The material of the re-distribution layer 14 can be or can include aluminum (Al), copper, an alloy thereof, or a compound thereof, in some embodiments, but the disclosure is not limited thereto. For example, the alloy or compound of copper can be or can include brass, phosphor bronze, beryllium alloy, or oxygen-free copper, but the disclosure is not limited thereto. The material of the re-distribution layer 14 can be similar to or the same as the material of the copper metal layer 12, in some embodiments, but the disclosure is not limited thereto.

[0038] As shown in FIG. 1C, after the above step, the mask layer 13 is removed to expose the copper metal layer 12. The mask layer 13 can be removed by dry etching, wet etching, or a combination thereof, when the mask layer 13 includes silicon oxide, silicon nitride, silicon carbide, or silicon oxycarbide, in some embodiments, but the disclosure is not limited thereto. Alternatively, the mask layer 13 can be removed by heating, light exposure, or a combination thereof, when the mask layer 13 includes photoresist, but the disclosure is not limited thereto. Figure 3 As shown in FIG. 1D, after the above step, the copper metal layer 12 and the first molybdenum metal layer 11 thereunder, which are not covered by the re-distribution layer 14, are removed to expose the carrier substrate 10. The copper metal layer 12 and the first molybdenum metal layer 11 thereunder can be removed by dry etching, wet etching, or a combination thereof, in some embodiments, but the disclosure is not limited thereto. The mask layer 13, the copper metal layer 12, and the first molybdenum metal layer 11 can be removed by the same removal process at one time, in some embodiments, but the disclosure is not limited thereto. Alternatively, the mask layer 13, the copper metal layer 12, and the first molybdenum metal layer 11 can be removed by different removal processes, respectively.

[0039] Figure 3 As shown in FIG. 1E, after the above step, the second molybdenum metal layer 21 is formed on the carrier substrate 10. The second molybdenum metal layer 21 can be formed by electroplating, electroless plating, other suitable processes, or a combination thereof, in some embodiments, but the disclosure is not limited thereto. The second molybdenum metal layer 21 can be formed by a same process as the first molybdenum metal layer 11, in some embodiments, but the disclosure is not limited thereto.

[0040] As shown in FIG. 1F, after the above step, the third molybdenum metal layer 31 is formed on the second molybdenum metal layer 21. The third molybdenum metal layer 31 can be formed by electroplating, electroless plating, other suitable processes, or a combination thereof, in some embodiments, but the disclosure is not limited thereto. The third molybdenum metal layer 31 can be formed by a same process as the second molybdenum metal layer 21, in some embodiments, but the disclosure is not limited thereto. Figure 4 ​As shown, after the above steps, a base layer 15 is disposed on the carrier substrate 10. In some embodiments, the base layer 15 can be formed by a lamination process, a coating process, other suitable processes, or a combination thereof, but the present disclosure is not limited thereto. In some embodiments, the base layer 15 can include a plurality of sub-layers, and each sub-layer can be formed using similar or identical processes or materials. In some embodiments, the material of the base layer 15 can be or can include epoxy, polyimide, Ajinomoto buildup film (ABF), other suitable polymer materials, or a combination thereof, but the present disclosure is not limited thereto

[0041] In some embodiments, the steps of disposing the mask layer 13, disposing the redistribution layer 14, removing the mask layer 13, and disposing the base layer 15 can be repeatedly performed. For example, a coating process, a photolithography process, a plating process, an etching process, other suitable processes, or a combination thereof can be repeatedly performed to form the redistribution layer 14 and the base layer 15 as shown. In this way, the circuit board structure la can be obtained. Figure 4

[0042] In the present embodiment, the circuit board structure la includes the carrier substrate 10, the first molybdenum metal layer 11, the copper metal layer 12, the redistribution layer 14, and the base layer 15. Specifically, the redistribution layer 14 is disposed in the base layer 15 and has a first end 140 and a second end 141. The copper metal layer 12 is disposed on the first end 140 of the redistribution layer 14. The first molybdenum metal layer 11 is disposed on the copper metal layer 12 and is coplanar with the surface (i.e., the lower surface) of the base layer 15. In the present disclosure, by covering the copper metal layer 12 with the first molybdenum metal layer 11 and locating the first molybdenum metal layer 11 between the copper metal layer 12 and the carrier substrate 10, the copper metal layer 12 can be effectively protected from oxidation (as the carrier substrate 10 will be removed in subsequent processes). It is worth mentioning that, Figure 4 The specific configuration (e.g., element size, element proportion, or element shape) of the circuit board structure la shown in FIG. 1A is only an example, and the present disclosure is not limited thereto.

[0043] In some embodiments, the thickness t3 of the redistribution layer 14 can be between 1 pm and 200 pm, but the present disclosure is not limited thereto. For example, the thickness t3 can be 1 pm, 5 pm, 10 pm, 50 pm, 100 pm, 150 pm, 200 nm, or any value or range between the above values. In some embodiments, the redistribution layer 14 can have a non-columnar structure, such as the structure shown in FIG. 1B. In this case, the thickness t3 of the redistribution layer 14 refers to the thickness of the redistribution layer 14 along the normal direction of the circuit board structure la (e.g., the z-axis direction in FIG. 1B). Figure 4 Figure 4 ​​an extension length in a vertical direction (as shown in the middle).

[0044] In some embodiments, the thickness t4 of the base layer 15 can be between 1 pm and 200 pm, but the present disclosure is not limited thereto. For example, the thickness t4 can be 1 pm, 5 pm, 10 pm, 50 pm, 100 pm, 150 pm, 200 nm, or any value or range between the aforementioned values. In some embodiments, the thickness t4 of the base layer 15 can be slightly less than the thickness t3 of the redistribution layer 14. In other words, the first end 140 of the redistribution layer 14 can be non-coplanar with the base layer 15.

[0045] In the foregoing, a possible forming method of the circuit board structure la has been disclosed. In the following, subsequent processes of the circuit board structure la will be further described to make the advantageous effects of the present disclosure more clear and understandable. Referring to Figure 5 to 11 FIG. 2, which shows cross-sectional schematic views of the circuit board structure at different stages in the subsequent processes according to some embodiments of the present disclosure.

[0046] As shown in FIG. 2(a), after the above-mentioned step, the base layer 15 is removed from the side of the circuit board structure la away from the carrier substrate 10. In some embodiments, the base layer 15 can be removed by physical means, chemical means, or a combination thereof, but the present disclosure is not limited thereto. For example, the physical means includes breaking, peeling, cutting, or other suitable methods, and the chemical means includes wet etching, dry etching, or other suitable methods. Figure 5 As shown in FIG. 2(b), after the above-mentioned step, a molding layer 16 is disposed on the side of the base layer 15 of the circuit board structure la away from the carrier substrate 10. In some embodiments, the material of the molding layer 16 can be or can include epoxy resin, filler, and additive, but the present disclosure is not limited thereto. Among them, the material of the filler can be or can include silicon dioxide. As shown in FIG. 2(c), after the above-mentioned step, an adhesive layer 17 and a carrier substrate 18 are disposed on the molding layer 16. In some embodiments, the material of the carrier substrate 18 can be or can include group IV elements or group IV compounds, III-V compounds, glass, quartz, sapphire, ceramic, polyimide, polycarbonate, polyethylene terephthalate, polypropylene, other suitable materials, or a combination thereof, but the present disclosure is not limited thereto. In the present embodiment, the carrier substrate 18 is a glass substrate. Figure 6 As shown in FIG. 2(d), after the above-mentioned step, the carrier substrate 10 is removed to expose the first molybdenum metal layer 11 and the base layer 15. In some embodiments, the carrier substrate 10 can be removed by physical means, chemical means, or a combination thereof, but the present disclosure is not limited thereto. For example, the physical means includes breaking, peeling, cutting, or other suitable methods, and the chemical means includes wet etching, dry etching, or other suitable methods.

[0047] As shown in FIG. 2(e), after the above-mentioned step, a second molybdenum metal layer 12 is disposed on the first molybdenum metal layer 11. In some embodiments, the material of the second molybdenum metal layer 12 can be or can include molybdenum, but the present disclosure is not limited thereto. In the present embodiment, the second molybdenum metal layer 12 is a molybdenum layer. Figure 7 As shown in FIG. 2(f), after the above-mentioned step, a second redistribution layer 20 is disposed on the second molybdenum metal layer 12. In some embodiments, the material of the second redistribution layer 20 can be or can include copper, but the present disclosure is not limited thereto. In the present embodiment, the second redistribution layer 20 is a copper layer.

[0048] It is to be understood that the first molybdenum metal layer 11 can serve as a protective layer to protect the copper metal layer 12 from oxidation since the carrier substrate 10 is removed. In particular, the first molybdenum metal layer 11 can react with oxygen to form volatile molybdenum oxide. In this case, the formed molybdenum oxide can gradually sublimate to avoid further oxygen from entering the copper metal layer 12. In this way, the process margin can be effectively improved to avoid the copper metal layer 12 from being oxidized as much as possible before being bonded with other electronic devices.

[0049] As shown in FIG. 1C, after the above step, a carrier substrate 19 is disposed on the first molybdenum metal layer 11 and the base layer 15. In some embodiments, the carrier substrate 19 can be a blue tape. Figure 8 As shown in FIG. 1D, after the above step, the adhesive layer 17 and the carrier substrate 18 are removed to expose the molding layer 16. In some embodiments, the carrier substrate 18 can be removed by heating, light exposure, or direct tearing of the adhesive layer 17, but the present disclosure is not limited thereto. Figure 9 As shown in FIG. 1E, after the above step, the carrier substrate 19 is removed to expose the first molybdenum metal layer 11 and the base layer 15. In some embodiments, the carrier substrate 19 can be removed by direct tearing, but the present disclosure is not limited thereto. As shown in FIG. 1F, after the above step, a dicing process DP can be performed on the structure to form a plurality of circuit board structures 2, each of which includes the first molybdenum metal layer 11, the copper metal layer 12, the redistribution layer 14, the base layer 15, and the molding layer 16. These circuit board structures 2 can be electrically connected to other electronic devices (not shown) through connectors such as solder balls.

[0050] Figure 10 As shown in FIG. 1G, after the above step, the first molybdenum metal layer 11 can be removed by applying flux before the circuit board structure 2 is bonded with other electronic devices. In particular, flux is generally used to remove surface impurities (e.g., oxides) of a material to be soldered (e.g., the copper metal layer 12) to obtain a clean soldering surface, and the main components of flux include "acid" and "salt" with corrosive properties. In the present disclosure, molybdenum can be removed by applying flux directly at the temperature of the soldering process since molybdenum is used as the protective layer (i.e., the first molybdenum metal layer 11). In other words, compared with the prior art in which other metals are used to protect the copper metal layer 12, the present disclosure can omit the step of etching the protective layer of other metals and further omit the step of surface treatment of the copper metal layer 12. In this way, the present disclosure can effectively save the process steps required for the circuit board structure 1a (or the circuit board structure 2) in subsequent processing to effectively reduce production costs. Figure 11 As shown in FIG. 1G, after the above step, the first molybdenum metal layer 11 can be removed by applying flux before the circuit board structure 2 is bonded with other electronic devices. In particular, flux is generally used to remove surface impurities (e.g., oxides) of a material to be soldered (e.g., the copper metal layer 12) to obtain a clean soldering surface, and the main components of flux include "acid" and "salt" with corrosive properties. In the present disclosure, molybdenum can be removed by applying flux directly at the temperature of the soldering process since molybdenum is used as the protective layer (i.e., the first molybdenum metal layer 11). In other words, compared with the prior art in which other metals are used to protect the copper metal layer 12, the present disclosure can omit the step of etching the protective layer of other metals and further omit the step of surface treatment of the copper metal layer 12. In this way, the present disclosure can effectively save the process steps required for the circuit board structure 1a (or the circuit board structure 2) in subsequent processing to effectively reduce production costs.

[0051]

[0052] ​​In addition, in the case that molybdenum itself does not react with tin (Sn) or copper (e.g., form an intermetallic compound), even if the flux can not completely remove the first molybdenum metal layer 11, the residual molybdenum does not affect the joint between the copper metal layer 12 and the tin ball. In this way, the manufacturing process of the present disclosure also effectively improves the structural stability and electrical stability of the circuit board structure.

[0053] Referring to Figures 12 to 16 , which shows cross-sectional schematic diagrams of a circuit board structure at different stages of a manufacturing process according to other embodiments of the present disclosure. Among them, Figure 12 is the process step Figure 3 successively, so the relevant description can refer to the foregoing, which will not be repeated here. As shown in Figure 12 , successively to the above steps, a mask layer 20 is disposed on the carrier substrate 10. Specifically, the mask layer 20 blanketly covers the redistribution layer 14. In some embodiments, the mask layer 20 can be formed by a coating process, but the present disclosure is not limited thereto. In the present embodiment, the mask layer 20 is a photoresist, but the present disclosure is not limited thereto.

[0054] As shown in Figure 13 , successively to the above steps, a portion of the mask layer 20 is removed to expose the upper surface of the redistribution layer 14. It is worth mentioning that in this step, the upper surface of the mask layer 20 can be higher than the upper surface of the redistribution layer 14, so that the mask layer 20 and the redistribution layer 14 together form an accommodation space AS. Specifically, the accommodation space AS is used to provide a position for disposing the second molybdenum metal layer 21.

[0055] As shown in Figure 14 , successively to the above steps, the second molybdenum metal layer 21 is disposed in the accommodation space AS, wherein the second molybdenum metal layer 21 covers the redistribution layer 14. Unlike Figures 1 to 4 embodiments, the present embodiment additionally provides the second molybdenum metal layer 21 on the second end 141 of the redistribution layer 14. Similar to the first molybdenum metal layer 11, the second molybdenum metal layer 21 can also be removed by flux, and the residue (if any) does not affect the joint between the redistribution layer 14 and other electronic devices. In some embodiments, the second molybdenum metal layer 21 can also not be removed, but directly electrically connected to other electronic devices.

[0056] In some embodiments, the second molybdenum metal layer 21 comprises molybdenum, and the weight percentage of molybdenum may be greater than or equal to 80 wt%, but this disclosure is not limited thereto. For example, the weight percentage of molybdenum may be 80 wt%, 85 wt%, 87.5 wt%, 90 wt%, 92.5 wt%, 95 wt%, 97.5 wt%, or any value or range between the above values. In some embodiments, a molybdenum alloy target may be used as a raw material to form the second molybdenum metal layer 21. For example, a molybdenum-tantalum alloy (having 10.7 wt% tantalum (Ta)), a molybdenum-niobium alloy (having 5 wt% niobium (Nb)), other similar alloys, or combinations thereof may be used, but this disclosure is not limited thereto. In other words, the second molybdenum metal layer 21 may include small or trace amounts of other elements, rather than being composed solely of molybdenum. In some embodiments, the material of the second molybdenum metal layer 21 may be similar to or the same as the material of the first molybdenum metal layer 11, but this disclosure is not limited thereto.

[0057] like Figure 15 As shown, the masking layer 20 is removed. In some embodiments, the masking layer 20 can be removed by heating, lighting, or a combination thereof, but this disclosure is not limited thereto. Figure 16 As shown, coating, photolithography, plating, etching, other suitable processes, or combinations thereof can be repeatedly performed to form a structure such as... Figure 16 The redistribution layer 14 and the base layer 15 are shown. In this way, the circuit board structure 1b can be obtained.

[0058] In this embodiment, the circuit board structure 1b includes a carrier substrate 10, a first molybdenum metal layer 11, a copper metal layer 12, a redistribution layer 14, a base layer 15, and a second molybdenum metal layer 21. Specifically, the first molybdenum metal layer 11 is disposed on the copper metal layer 12 and is coplanar with the surface (i.e., the lower surface) of the base layer 15. In this disclosure, by covering the copper metal layer 12 with the first molybdenum metal layer 11 and positioning the first molybdenum metal layer 11 between the copper metal layer 12 and the carrier substrate 10, the copper metal layer 12 can be effectively protected from oxidation (since the carrier substrate 10 will be removed in a subsequent process).

[0059] On the other hand, the second molybdenum metal layer 21 is disposed on the second end 141 of the redistribution layer 14 and is non-coplanar with the surface (i.e., the upper surface) of the substrate layer 15. In this disclosure, by covering the second end 141 of the redistribution layer 14 with the second molybdenum metal layer 21, the redistribution layer 14 can be effectively protected from oxidation. It is worth mentioning that... Figure 16 The specific configuration of the circuit board structure 1b shown (e.g., component size, component ratio, or component shape) is merely an example, and this disclosure is not limited thereto.

[0060] Reference Figure 17This is a cross-sectional schematic diagram of a circuit board structure according to further embodiments of the present disclosure. Figure 17 As shown, in some embodiments disclosed herein, titanium and molybdenum can be used simultaneously as protective layers to protect both sides of the circuit board structure 1c. In this embodiment, the circuit board structure 1c includes a carrier substrate 10, a titanium metal layer 22, a copper metal layer 12, a redistribution layer 14, a base layer 15, and a first molybdenum metal layer 23 (which may be similar to the second molybdenum metal layer 21). Specifically, the first molybdenum metal layer 23 is disposed on the second end 141 of the redistribution layer 14 and is non-coplanar with the surface (i.e., the upper surface) of the base layer 15. In this disclosure, by covering the second end 141 of the redistribution layer 14 with the first molybdenum metal layer 23, the redistribution layer 14 can be effectively protected from oxidation.

[0061] On the other hand, the titanium metal layer 22 is disposed on the copper metal layer 12 and is coplanar with the surface (i.e., the lower surface) of the substrate layer 15. In this disclosure, by covering the copper metal layer 12 with the titanium metal layer 22 and positioning the titanium metal layer 22 between the copper metal layer 12 and the carrier substrate 10, the copper metal layer 12 can be effectively protected from oxidation (since the carrier substrate 10 will be removed in a subsequent process). It is worth mentioning that... Figure 17 The specific configuration of the circuit board structure 1c shown (e.g., component size, component ratio, or component shape) is merely an example, and this disclosure is not limited thereto. By employing both titanium and molybdenum as protective layers, the circuit patterns of the circuit board structure 1c can be effectively protected from oxidation.

[0062] In some embodiments, the titanium metal layer 22 comprises titanium, and the weight percentage of titanium may be greater than or equal to 99.0 wt%, but this disclosure is not limited thereto. For example, the weight percentage of titanium may be 99.00 wt%, 99.20 wt%, 99.50 wt%, 99.75 wt%, 99.90 wt%, 99.99 wt%, 99.999 wt%, 99.9999 wt%, or any value or range between the foregoing. Alternatively, the titanium metal layer 22 may substantially comprise molybdenum and exclude other components. That is, without considering impurities, the titanium metal layer 22 may be substantially composed of titanium.

[0063] In some embodiments, the first molybdenum metal layer 23 includes molybdenum, and the weight percentage of molybdenum can be greater than or equal to 80 wt%, but the present disclosure is not limited thereto. For example, the weight percentage of molybdenum can be 80 wt%, 85 wt%, 87.5 wt%, 90 wt%, 92.5 wt%, 95 wt%, 97.5 wt%, or any value or range between the above values. In some embodiments, a molybdenum alloy target can be used as a raw material to form the first molybdenum metal layer 11. For example, a molybdenum-tantalum alloy (with 10.7 wt% of tantalum (Ta)), a molybdenum-niobium alloy (with 5 wt% of niobium (Nb)), other similar alloys, or a combination thereof can be used, but the present disclosure is not limited thereto. In other words, the first molybdenum metal layer 23 can include a small amount or trace amount of other elements, rather than being composed only of molybdenum elements. In some embodiments, the material of the first molybdenum metal layer 23 can be similar to or the same as the material of the first molybdenum metal layer 11 or the second molybdenum metal layer 21, but the present disclosure is not limited thereto.

[0064] In summary, the present disclosure provides a circuit board structure and embodiments thereof. By using molybdenum as a protective layer, the circuit pattern can be effectively protected while reducing the process complexity (or the number of processes) to reduce production costs.

[0065] The above-described embodiments are intended to be illustrative only. Changes can be made to the embodiments in light of the changes made in the art, without departing from the scope of the disclosed embodiments. Changes can also be made to the embodiments in light of changes in design, construction, and / or mechanical equivalents. These and other changes, substitutions and modifications are intended to fall within the scope of the disclosed embodiments, and to be within the skill of the art, and as such express no limitation of scope of the disclosed embodiments.

[0066] [Symbol Description]

[0067] 1a: circuit board structure

[0068] 1b: circuit board structure

[0069] 1c: circuit board structure

[0070] 10: carrier substrate

[0071] 11: first molybdenum metal layer

[0072] 12: copper metal layer

[0073] 13: mask layer

[0074] 14: redistribution layer

[0075] 140: first end

[0076] 141: second end

[0077] 15: base layer

[0078] 16: molding layer

[0079] 17: adhesive layer

[0080] 18: carrier substrate

[0081] 19: carrier substrate

[0082] 2: circuit board structure

[0083] 20: mask layer

[0084] 21: second molybdenum metal layer

[0085] 22: titanium metal layer

[0086] 23: first molybdenum metal layer

[0087] DP: dicing process

[0088] t1: thickness

[0089] t2: thickness

[0090] t3: thickness

[0091] t4: thickness

[0092] AS: accommodation space.

Claims

1. A circuit board structure, characterized by, comprising: a base layer; a rewiring layer disposed in the base layer and having a first end and a second end; a copper metal layer disposed on the first end of the rewiring layer; and a first molybdenum metal layer disposed on the copper metal layer or the second end of the rewiring layer.

2. The circuit board structure of claim 1, wherein the first molybdenum metal layer is disposed on the copper metal layer.

3. The circuit board structure of claim 2, wherein, further comprising a carrier substrate, wherein the first molybdenum metal layer is between the copper metal layer and the carrier substrate.

4. The circuit board structure of claim 2, wherein the first molybdenum metal layer is coplanar with a surface of the base layer.

5. The circuit board structure of claim 2, wherein a thickness of the base layer is between 1 pm and 200 pm, a thickness of the first molybdenum metal layer is between 5 nm and 1000 nm, and a thickness of the copper metal layer is between 5 nm and 1000 nm.

6. The circuit board structure of claim 2, wherein, further comprising a second molybdenum metal layer, wherein the second molybdenum metal layer is disposed on the second end of the rewiring layer.

7. The circuit board structure of claim 6, wherein the second molybdenum metal layer is not coplanar with a surface of the base layer.

8. The circuit board structure of claim 1, wherein the first molybdenum metal layer is disposed on the second end of the rewiring layer.

9. The circuit board structure of claim 8, wherein, further comprising a titanium metal layer, wherein the titanium metal layer is disposed on the copper metal layer.

10. The circuit board structure of claim 9, wherein, further comprising a carrier substrate, wherein the titanium metal layer is between the copper metal layer and the carrier substrate.

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