Small area current driver

Abstract

The present disclosure relates to a current driver circuit (200) comprising: an input branch (202) configured to receive an input current (IREF), a first transistor element (214) and a second transistor element (216); an output branch (204) including an output terminal (210), a third transistor element (218), and a fourth transistor element (220); and a bias branch (206) comprising a bias terminal (212) configured to receive a bias current (IB) and a fifth transistor element (222) wherein the second transistor element (216) and the fourth transistor element (220) define a current mirror to replicate the input current (IREF) to an output current (IOUT) at the output branch (204), wherein the third transistor element (218) is coupled with the input terminal (208) to allow current to flow from the fourth transistor element (220) to the output terminal (210), and wherein the fifth transistor element (222) is in a diode-connected configuration, and wherein the first transistor element (214) and the fifth transistor element (222) define a voltage level shift, the second transistor element (214) is coupled to the fourth transistor element (220) to provide a match between the voltage at the first node (224b) of the second transistor element (214) and the voltage at the first node (224d) of the fourth transistor element (220).

Description

Technical Field

[0001] This disclosure generally relates to a driver circuit with a reduced footprint. Background Technology

[0002] Constant current drivers are typically an important building block in many circuit architectures. In short, a constant current driver is a circuit configured to provide a regulated output current by maintaining a constant output current value, even when changes occur at the driver input or in the load coupled to the driver. Therefore, a constant current driver is configured to adjust the voltage across its output to maintain a constant current flow. Constant current drivers have a wide range of applications for driving loads that should be fed a constant current. A prominent example is the use of constant current driver circuits to drive light emission, such as for driving light-emitting diodes (LEDs). In this case, the constant current driver can be referred to as an LED driver or a constant current LED driver. In this context, a constant current driver can ensure uniform brightness of the emitted light and also reduces the risk of damaging the LED by ensuring that the LED does not draw current exceeding its nominal (rated) current. Therefore, improvements in the performance of constant current drivers can be particularly relevant to the further development of several technologies, especially for driving light-emitting devices (e.g., LED-based devices). Attached Figure Description

[0003] In the accompanying drawings, the same reference numerals generally refer to the same parts in different views. The drawings are not necessarily drawn to scale, and the focus is generally on illustrating the principles of the invention. In the following description, various aspects of the invention are described with reference to the following drawings, wherein:

[0004] Figure 1A and Figure 1B A schematic diagram of possible configurations of the current driver circuit is shown, depending on various aspects.

[0005] Figure 1C and Figure 1D A schematic diagram showing possible configurations of the operational amplifier according to various aspects is provided;

[0006] Figure 2A A schematic diagram of a current driver circuit is shown, according to various aspects;

[0007] Figure 2B A schematic diagram illustrating the implementation of a current driver circuit from various aspects is shown;

[0008] Figure 3A A schematic diagram of a current driver circuit, including a voltage source, is shown according to various aspects;

[0009] Figure 3BA schematic diagram is shown illustrating the implementation of a current driver circuit, which also includes a voltage source, according to various aspects.

[0010] Figure 4A A schematic diagram of a current driver circuit, including an additional current source in the bias branch, is shown, according to various aspects.

[0011] Figure 4B A schematic diagram is shown illustrating the implementation of a current driver circuit that includes an additional current source with a bias branch, depending on various aspects.

[0012] Figure 5A A schematic diagram of a current driver circuit, including an additional current source with a bias branch, is shown, depending on various aspects.

[0013] Figure 5B A schematic diagram is shown illustrating the implementation of a current driver circuit that includes an additional current source with a bias branch, depending on various aspects.

[0014] Figure 6 A schematic diagram of a system including a current driver circuit and a load coupled to the current driver circuit is shown, according to various aspects; and

[0015] Figure 7A and Figure 7B A schematic diagram of the conventional circuit architecture is shown to highlight its difference from the configuration proposed in this paper. Detailed Implementation

[0016] The following detailed description is taken with reference to the accompanying drawings, which illustrate by way of illustration specific details and aspects in which the invention may be practiced. These aspects are described in sufficient detail to enable those skilled in the art to practice the invention. Other aspects may be utilized, and structural, logical, and electrical changes may be made without departing from the scope of the invention. The aspects are not necessarily mutually exclusive, as some aspects may be combined with one or more other aspects to form new aspects.

[0017] Generally, a constant current driver can be understood as a circuit configured to provide a regulated output current. A current driver can receive an input (reference) current and can provide an output current with a stable value at the output. Considering LED applications, a constant current driver can be a constant current source capable of adapting to changes in the forward voltage of an LED or LED string. Therefore, a constant current driver has a range within which the output voltage can vary to adapt to changes in the load and maintain a constant output current. Thus, the output DC voltage of a constant current driver can vary within this range according to the load; for example, the output voltage can increase for an increased load resistance and decrease for a decreased load resistance. In this document, "constant current driver" can also be simply referred to as a "current driver".

[0018] In this regard, current driver design combines high precision with stringent dynamic range requirements. Many applications (e.g., in LED drivers, where mismatch between LED currents alters the resulting color) demand high precision, while reduced dynamic range is often a critical requirement as it helps keep power consumption within the device low. With this in mind, the typical approach to designing constant current drivers is not a simple cascode current mirror, but rather the introduction of operational amplifiers to achieve high output impedance, meet stringent dynamic range requirements, and enable fast turn-on.

[0019] Various architectures have been developed to implement constant current drivers. Generally, the basic concepts associated with constant current drivers and their operation are well known in the art. This document provides a brief description to introduce aspects relevant to this disclosure. Some related design considerations will be discussed in conjunction with... Figures 1A to 1D These diagrams illustrate possible architectures of current drivers and possible architectures of possible components of current drivers.

[0020] In this disclosure, particular reference may be made to using a current driver to drive one or more LEDs. Exemplarily, particular reference may be made to using a current driver as an LED driver or as part of an LED driver. This application may be of particular interest because the current driver is capable of precisely controlling the current supplied to the LED, thereby allowing precise control over the emitted light, such as in terms of color, brightness, etc. Therefore, terminology specific to the context of LEDs and light emission may be used in this disclosure. However, it should be understood that the various aspects described with respect to a current driver for supplying current to an LED can be applied accordingly to other applications of the current driver, such as for driving other types of circuits. For example, the output current of the current driver may be indicated or described as I... LED However, it should be understood that this current can be used for any suitable application and can be simply referred to as the "output current" (I0). OUT ).

[0021] Figure 1A and Figure 1B Schematic diagrams of various configurations 100a, 100b of the current driver 100 are shown. Throughout this document, the various configurations 100a, 100b are collectively referred to as the current driver 100. Typically, the current driver 100 may include an operational amplifier and one or more transistors to receive a reference current I. REF (For example, via reference current source 102) and provide output current I LED .exist Figure 1A and Figure 1BIn the exemplary configuration, the transistor is represented as an NMOS transistor, where NMOS stands for N-channel metal-oxide-semiconductor (a type of metal-oxide-semiconductor field-effect transistor (MOSFET)). However, it should be understood that the aspects described herein can be applied accordingly to other types of transistors, such as PMOS (P-channel metal-oxide-semiconductor) or bipolar junction transistors (BJTs).

[0022] In addition, Figure 1A and Figure 1B In an exemplary configuration, a reference current source 102 is illustrated to provide a reference current I at the input of the current driver 100. REF In this configuration, the current driver 100 acts as a current sink at the output. The various aspects described for this configuration apply in the opposite manner, where the current sink is present at the input and the current driver 100 acts as a current source at the output.

[0023] Figure 1A A first configuration 100a of a feedback current mirror is shown, representing a popular implementation of an LED driver. In brief, the feedback current mirror 100a can receive a reference current I. REF (e.g., from reference current source 102), and can be configured to pass through first transistor 104 (M D ) and the second transistor 106 (M) LED ) reference current I REF Mirrored into the output branch as the output current I LED For example, to bias an external LED. The current mirror 100a may also include a third transistor 108 (M... C ) and the fourth transistor 110 (M) OUT The current mirror 100a can also include an operational amplifier 114, which further increases the output impedance, as the requirements are typically stringent. The virtual ground of the operational amplifier 114 is typically taken from the voltage V. R The voltage V R This is obtained by the difference in saturation voltages of two transistors (e.g., two NMOS transistors). This optimizes the output dynamic range at the output terminals (e.g., at the LED pin).

[0024] Through examples, in Figure 1A In this configuration, operational amplifier 114 operates as a regulated cascode amplifier to increase output impedance. The current mirror is provided by first transistor 104 (M... D ) and the second transistor 106 (M) LED ) definition. For example, the second transistor 106 (M LEDThe drain current of the ) follows the reference current I. REF The third transistor 108 (M C ) is used to maintain voltage V R Lower common-source cascode element. For example, the third transistor 108 (M C ) to prevent the first transistor 104 (M) D The third transistor is configured as a transistor 108 (M). C ) can be considered a shift element used to shift the first transistor 104 (M) D The drain voltage is kept low enough.

[0025] As shown in the figure, the current driver 100a may also include a "bias branch" at which the current driver 100a receives a bias current I. B (e.g., from bias current source 116), and also includes a fifth transistor 112 (M CASC The source terminal of the fifth transistor 112 is connected to the second transistor 106 (M). LED The source extreme sub-coupled.

[0026] Therefore, a reference branch exists in configuration 100a, where the reference current I... REF It is injected into the diode, operational amplifier 114, and output section. A level-shifting transistor 108 (M) is embedded in the reference branch. C To reduce the first transistor (M) that acts as a diode D The drain voltage of the second transistor 106 (M) is applied. Operational amplifier 114 applies the same voltage to the second transistor 106 (M) which acts as a current generator. LED The drain electrode of ).

[0027] Configuration 100a exhibits various drawbacks. For example, the voltage V at the input of operational amplifier 114... R The voltage is close to ground, and the output of operational amplifier 114 is connected to the fourth transistor (M). OUT The gate of the transistor should therefore be close to the gate-source voltage (V) used to activate the transistor. GS Therefore, considering that there may be some issues with the dynamic range, and that folding may be necessary to obtain the voltage V at the input of operational amplifier 114. R A suitable dynamic range between output and output. Furthermore, due to the relatively large number of transistors (also considering the architecture of operational amplifier 114), configuration 100a occupies a considerable area.

[0028] In many cases, including the fifth transistor (M) CASC The bias branch of ) can be short-circuited by the third transistor 108 (M) C ) and the first transistor 104 (M) D To remove the gate, such as Figure 1B The configuration 100b is shown in the diagram. This reduces the output impedance value because the second transistor 106 (M) LED The transistor is at its boundary conditions, but this degradation is generally acceptable. In this case, by using the first transistor 104 (M... D Directly connected to the reference current I REF To remove the "cascode branch", so that the cascode is used to provide the reference current I to the output mirror. REF The same branch is directly biased.

[0029] Figure 1B Configuration 100b can have performance comparable to configuration 100a, with tolerable degradation. However, some considerations may still remain regarding operational amplifier 114. Typically, the output current I... LED It is the reference current I REF The copies are made of the same material, and therefore they should have the same precision. Operational amplifier 114 should be properly biased, thus introducing the need for another bias generating element to drive operational amplifier 114.

[0030] Considering exemplary configurations 150c, 150d of operational amplifier 150 (exemplary configurations of operational amplifier 114, for example) Figure 1C and Figure 1D As shown, considerations regarding operational amplifier 114 can be understood. As previously mentioned, the relevant considerations for operational amplifier design relate to the fact that the input common-mode voltage is close to ground, typically in the range of 200 mV or 300 mV, while the output should be maintained at transistor M... OUT (e.g., NMOS) V GS The above. This requirement led to the introduction of an input stage with PMOS differential pairs (typically worse than NMOS in terms of matching) into operational amplifier 150, along with some folding to bring the signal from this stage to the output. Considering Figure 1A and Figure 1B With this configuration, the output signals 170c and 170d (“output”) at the output of operational amplifier 150 can drive the fourth transistor 110 (M). OUT The gate of ).

[0031] Considering Figure 1C In the configuration 150c, the operational amplifier 150 may include a differential pair formed by two PMOS transistors 152c and 154c, with tail current I TAIL (Biased from tail current source 156c). At the output, operational amplifier 150 may also include another pair of PMOS transistors 158c, 160c and a pair of NMOS transistors 162c, 164c, biased by bias current I. B(Bias from one or more bias current sources 166c, 168c)

[0032] Figure 1D Configuration 150d provides a less direct alternative implementation by introducing a level shifter. In configuration 150d, the differential pair comprises four transistors: a first series pair consisting of NMOS transistor 162d and PMOS transistor 152d, and a second series pair consisting of NMOS transistor 164d and PMOS transistor 154d, controlled by a bias current I... B (Biased from one or more bias current sources 166d, 168d). Configuration 150d also includes output level shifting (another NMOS transistor 172d is biased by another bias current I from another bias current source 174d). B2 (Bias) to prevent the NMOS device 164d from operating as a transistor.

[0033] Therefore, the configuration 150d provides an alternative implementation of an operational amplifier that can accept input dynamic range down to ground voltage. However, in the same case, any requirements regarding the minimum supply voltage may become critical. Furthermore, the presence of more branches and poles introduces significant considerations regarding the stability of the component and the offset of the amplifier 150. Typically, large device size (with a large area) and high power consumption are associated with the design of such components.

[0034] Various aspects of this disclosure relate to an adaptive architecture for a current driver that offers area savings compared to conventional driver architectures. These aspects can be based on insights into how current drivers can be designed to achieve their functionality with a fewer number of components. In particular, the proposed current driver architecture can include fewer transistor elements than conventional architectures and can provide adaptive arrangement and coupling of transistor elements to achieve current mirroring and operational amplifier functions, while saving significant area, power consumption, and even design effort.

[0035] According to various aspects, a current driver circuit may include: an input branch including an input terminal configured to receive an input current, a first transistor element coupled to the input terminal, and a second transistor element coupled to the first transistor element; an output branch including an output terminal configured to be coupled to a load, a third transistor element coupled to the output terminal, and a fourth transistor element coupled to the third transistor element; and a bias branch including a bias terminal configured to receive a bias current, and a fifth transistor element coupled to the bias terminal, wherein each transistor element includes a first node, a second node, and a control node to allow control of current flow between the first node and the second node; wherein the second transistor... The first and fourth transistor elements are configured to define a current mirror to replicate the input current from the input branch to the output current at the output branch, wherein the third transistor element is arranged between the fourth transistor element and the output terminal, and the control node of the third transistor element is coupled to the input terminal to allow current to flow from the fourth transistor element to the output terminal, wherein the fifth transistor element is in a diode-connected configuration, wherein the control nodes of the first and fifth transistor elements are coupled to a bias terminal, and wherein the first and fifth transistor elements are configured to define a voltage level shift to provide matching between the voltage at the first node of the second transistor element and the voltage at the first node of the fourth transistor element.

[0036] As previously stated, the proposed method may be particularly relevant for implementation in electronic circuits used to drive light-emitting elements (e.g., light-emitting diodes). The proposed strategy allows for the provision of drive current for controlling light emission while maintaining a small footprint for the current driver, thus facilitating its integration into numerous host devices (e.g., mobile communication devices, vehicles, etc.). Therefore, in the following text, specific reference may be made to the configuration of the proposed current driver used to provide drive current to one or more light-emitting elements. However, it should be understood that the application of the proposed circuit architecture is not limited to light-emitting elements, and the current driver can be used in any suitable scenario.

[0037] Figure 2A A schematic diagram of a current driver circuit 200 is shown according to various aspects. Typically, the current driver circuit 200 may include an input branch 202, which includes components configured to receive an input current I. REF The input terminal 208 and the output branch 204 including the output terminal 210, the current driver circuit 200 provides the output current I at the output terminal 210. OUT Input branch 202 may also be referred to as reference branch 202 in this document, input terminal 208 may also be referred to as reference terminal 208 in this document, and input current I REFThis may also be referred to herein as the reference current or input reference current. According to the proposed architecture, the current driver circuit 200 may further include a bias branch 206, which includes components configured to receive a bias current I. B The bias terminal 212. The current driver circuit 200 may also be referred to herein as a constant current driver circuit, a constant current driver, or simply a current driver or driver circuit.

[0038] Depending on various aspects, the current driver circuit 200 may be an integrated circuit. Exemplarily, various components of the current driver circuit 200 may be integrated on the same substrate, such as a printed circuit board (PCB) substrate.

[0039] As an example configuration, the current driver circuit 200 may include a reference current source, or may be coupled to a reference current source at input terminal 208, and the reference current source may be configured to generate / provide input current I. REF Considering that it is configured to provide a reference current I REF The current driver circuit 200 can act as a current sink on the output side, serving as a current source. As an exemplary implementation, the reference current source may include a digital-to-analog converter. As another exemplary configuration, the current driver circuit 200 may include a reference current sink, or may be coupled to a reference current sink at input terminal 208. This is considering being configured to sink a reference current I at input terminal 208. REF The current sink and current driver circuit 200 can act as a current source on the output side.

[0040] In this disclosure, particular reference may be made to the following scenario: input terminal 208 and the supply of input current I REF The reference current source is coupled, as this is perhaps the most relevant use case scenario when considering the current driver circuit 200 for driving optical emission. However, it should be understood that various aspects described regarding the configuration with a reference current source can be applied accordingly to a configuration with a reference current absorber, and vice versa.

[0041] Accordingly, in some aspects, the current driver circuit 200 may include a bias current source, or may be coupled to a bias current source at the bias terminal 212, and the bias current source may be configured to generate / provide a bias current I at the bias terminal 212. B At output branch 204, output terminal 210 can be configured to couple with a load (see also...). Figure 6 For example, the current driver circuit 200 can be configured to provide an output current I to the load. OUT For example, operations used to drive loads, such as emitting light.

[0042] The current driver circuit 200 can typically be configured to drive the input current I REF The image shows the output current I at output terminal 210. OUT For example, the current driver circuit 200 can replicate the input current I at the output terminal 210. REF The configuration proposed in this paper and discussed in further detail below can be applied to input current I. REF With output current I OUT Any suitable relationship between them. As an example, the current driver circuit 200 (e.g., the second and fourth transistor elements 216, 220) can be configured to cause the output current I... OUT The current value is equal to the input current I. REF The current value. As another example, the current driver circuit 200 (e.g., the second and fourth transistor elements 216, 220) can be configured to cause the output current I... OUT The current value is the input current I. REF A multiple of the current value, for example, the output current I. OUT It can be the input current I REF Two times, three times, or any other suitable multiple (e.g., an integer multiple). As a further example, the current driver circuit 200 (e.g., the second and fourth transistor elements 216, 220) can be configured such that the output current I... OUT The current value is the input current I. REF A fraction of the current value, for example, the output current I. OUT It can be the input current I REF Half, one-third, or any other suitable fraction.

[0043] In principle, the architecture proposed in this paper can be applied to input current I. REF and output current I OUT The current driver circuit 200 can be configured to deliver an output current I in the range of 50 microamps to 50 milliamps, within any suitable range of current values. In a preferred configuration, the current driver circuit 200 can be configured to deliver an output current I in the range of 50 microamps to 50 milliamps. OUT For example, current values ​​in the range of 100 microamps to 10 milliamps, or current values ​​in the range of 1 milliamp to 2 milliamps.

[0044] The architecture proposed in this paper allows for a circuit with a small footprint by reducing the total number of circuit components. Therefore, the current driver circuit 200 can be a "small footprint circuit" or a "small area circuit." As a numerical example, the current driver circuit 200 can have a footprint ranging from 0.0005 square millimeters to 1 square millimeter, for example, from 0.001 square millimeters to 0.5 square millimeters, or for example, from 0.01 square millimeters to 0.05 square millimeters. In this regard, the term "footprint" can refer to the area occupied by the circuit (e.g., on a substrate).

[0045] Input branch 202, output branch 204, and bias branch 206 may each include one or more transistor elements. In various aspects, input branch 202 may include a first transistor element 214 and a second transistor element 216, output branch 204 may include a third transistor element 218 and a fourth transistor element 220, and bias branch 206 may include a fifth transistor element 222. (This will be combined with...) Figures 3A to 5B Describe in more detail the possible variations of this configuration.

[0046] Each transistor element 214-222 may include corresponding first nodes 224a-224e, second nodes 226a-226e, and control nodes 228a-228e. Control nodes 228a-228e may allow control of the electrical behavior between the first nodes 224a-224e and the second nodes 226a-226e (e.g., channel behavior between the first nodes 224a-224e and the second nodes 226a-226e). Exemplarily, control nodes 228a-228e may allow control of the current flow between the first nodes 224a-224e and the second nodes 226a-226e, for example, the current flowing from the second nodes 226a-226e to the first nodes 224a-224e.

[0047] In principle, any suitable type of transistor can be used. In a preferred configuration, transistor elements 214-222 may include MOSFETs, particularly NMOS transistors. Compared to other transistor types, NMOS transistors can be implemented in a smaller size, thus contributing to a small footprint for circuit 200. In other respects, transistor elements 214-222 may include PMOS transistors, or other types of transistors such as BJTs.

[0048] Given that transistor elements 214-222 include an NMOS transistor configuration, control nodes 228a-228e can be gate nodes, first nodes 224a-224e can be drain nodes, and second nodes 226a-226e can be source nodes. The NMOS transistor may include a gate structure defining a channel region (in the bulk material) between the source and drain nodes. In this case, the gate node can allow control of the drain current flowing from the source node to the drain node.

[0049] As another example, considering that transistor elements 214-222 include a BJT configuration, control nodes 228a-228e can be base nodes, first nodes 224a-224e can be collector nodes, and second nodes 226a-226e can be emitter nodes. It should be understood that, depending on the type of transistor used, other configurations with reversed source / drain or collector / emitter node arrangements may also be provided. Typically, transistor elements 214-222 can be of the same transistor type or different transistor types, as will be described in more detail below.

[0050] Before introducing the functions performed by transistor elements 214-222, it would be helpful to describe in detail how transistor elements 214-222 are coupled to each other and to the various terminals of the current driver circuit 200.

[0051] Turning to input branch 202, the first transistor element 214 and the second transistor element 216 can be connected in series with each other. In this respect, the second node 226a of the first transistor element 214 can be coupled to the first node 224b of the second transistor element 216. The first transistor element 214 can be further coupled to the input terminal 208, for example, the first node 224a of the first transistor element 214 can be coupled to the input terminal 208. The second transistor element 216 can be further coupled to the output branch 204, as will be discussed in more detail below. Input current I REF Therefore, the first transistor element 214 and the second transistor element 216 can be biased.

[0052] Turning to output branch 204, the third transistor element 218 and the fourth transistor element 220 can be connected in series with each other. In this respect, the second node 226c of the third transistor element 218 can be coupled to the first node 224d of the fourth transistor element 220. The third transistor element 218 can be further coupled to the output terminal 210, for example, the first node 224c of the third transistor element 218 can be coupled to the output terminal 210. The fourth transistor element 220 can be further coupled to the input branch 202, as will be discussed in more detail below.

[0053] Turning to bias branch 206, the fifth transistor element 222 can be coupled to bias terminal 212. For example, the first node 224e of the fifth transistor element 222 can be coupled to bias terminal 212. The fifth transistor element 222 can have a diode connection configuration, for example, the first node 224e and the control node 228e of the fifth transistor element 222 can be coupled to each other, such that the voltage at the first node 224e corresponds to the voltage at the control node 228e. Given the diode connection configuration, the fifth transistor element 222 has diode characteristics and can behave like a "two-ended" device. For example, considering the case that the fifth transistor element 222 is an NMOS transistor, the gate can be connected to the drain, allowing the NMOS transistor to be in saturation.

[0054] Now turning to the function implemented by transistor elements 214-222, the second transistor element 216 and the fourth transistor element 220 can be configured to define a current mirror to reflect the input current I from the input branch 202. REF Copy to the output current I at output branch 204 OUT For example, the second transistor element 216 and the fourth transistor element 220 can be coupled to each other in such a way that the input current I from the input branch 202 REF It can be converted into voltage to drive the fourth transistor element 220 and provide output current I at the output branch 204. OUT In some respects, the second transistor element 216 and the fourth transistor element 220 may be of the same transistor type (e.g., both NMOS).

[0055] like Figure 2A As shown, the control node 228b of the second transistor element 216 can be coupled to the control node 228d of the fourth transistor element 220. Furthermore, the second node 226b of the second transistor element 216 and the second node 226d of the fourth transistor element 220 can be at the same potential; for example, the second nodes 226b and 226d can be coupled to each other and / or can both be coupled to the (same) reference potential (e.g., at ground terminal 230).

[0056] The control node 228b of the second transistor element 216 can be further coupled to the control node 228a of the first transistor element 214. Therefore, when a suitable control voltage is provided to the control node 228a of the first transistor element 214, the second transistor element 216 can be incorporated into a diode-connected configuration. Thus, the second transistor element 216 can be understood as a reference equivalent diode for the current mirror. In this case, the input current I... REF The control voltage at the control node 228d of the fourth transistor element 220 can be defined (e.g., the gate-source voltage V, considering an NMOS configuration).GS This causes current to flow from the fourth transistor element 220 (e.g., from the first terminal 224d to the output terminal 210). As is generally known in the art, the input current I can be adjusted by selecting the size of the transistor. REF The relationship between the current output from the fourth transistor element 220 and the current output from the fourth transistor element 220. For example, considering that the second transistor element 216 and the fourth transistor element 220 are NMOS devices, the current I output from the fourth transistor element 220... D It can be represented as I D = [(W / L) / (W / L) REF ]*I REF Where W / L is the ratio of the width to the length of the fourth transistor element 220, and (W / L) REF This is the width-to-length ratio of the second transistor element 216. Therefore, the fourth transistor element 220 can be understood as being used to generate the output current I. OUT A current generator.

[0057] and combination Figure 1A and Figure 1B Compared to the configurations discussed, the proposed circuit architecture can have at least two major differences.

[0058] As a first aspect, the third transistor element 218, arranged along the path between the fourth transistor element 220 and the output terminal 210, can be further coupled to the input terminal 208, as shown in the figure. The control node 228c of the third transistor element 218 can be coupled to the input terminal 208. Therefore, in the proposed configuration, the third transistor element 218 can act as the current I output from the fourth transistor element 220. D (Input current I) REF The control gate of the copy. Therefore, the third transistor element 218 can enable the output current I. OUT The current flows from the fourth transistor element 220 to the output terminal 210, due to the input current I. REF Control is achieved through the coupling between control node 228c and input terminal 208. Considering... Figure 1A and Figure 1B In this configuration, the third transistor element 218 can be exemplarily represented as transistor 110 (M OUT ), and has a bias from input terminal 208 such that the proposed configuration of input branch 202 is equivalent to Figure 1A and Figure 1B Operational amplifier 114 is included in the configuration. Therefore, in the proposed architecture, the "operational amplifier function" can be arranged more compactly compared to conventional circuit architectures.

[0059] As a further aspect, the first transistor element 214 and the fifth transistor element 222 can be configured to act as level shifters to provide matching between the voltage at the first node 224b of the second transistor element 216 and the voltage at the first node 224d of the fourth transistor element 220 (e.g., matching between the drain voltages of the second and fourth transistor elements 216, 220). As shown, the second node 226e of the fifth transistor element 222 can be coupled to the first node 224d of the fourth transistor element 220, and as previously described, the second node 226a of the first transistor element 214 can be coupled to the first node 224b of the second transistor element 216. Therefore, the first transistor element 214 and the fifth transistor element 222 can be configured to define a voltage level shift such that the voltage at the first node 224b of the second transistor element 216 matches (exemplarily, equals) the voltage at the first node 224d of the fourth transistor element 220.

[0060] The function of the level shifter defined by the first transistor element 214 and the fifth transistor element 222 can be better explained by considering that transistor elements 214-220 are implemented as NMOS transistors, but such considerations can also be applied to other transistor types.

[0061] Typically, the core component of circuit 200 is the second transistor element 216, which receives (e.g., draws) the input current I. REF Considering the coupling between the circuit architecture and transistor elements 214-220, the current at the second transistor element 216 (e.g., its drain current) is related to the input current I. REF Matching ensures that the voltage at the input of circuit 200 does not diverge.

[0062] Given the fixed current (I) supplied to the second transistor element 216 REF The voltage across the second transistor element 216, for example, the voltage between control node 228b and the second node 226b (e.g., its gate-source voltage V). GS Therefore, it can be fixed. The voltage across the second transistor element 216 (the second gate-source voltage V) GS The difference between the voltage across the fifth transistor element 222 and the voltage across the second transistor element 226d (e.g., the voltage between control node 228d and the second node 226d, such as the fifth gate-source voltage V) GS The voltage at the first node 224d of the fourth transistor element 220, such as its drain voltage, can be defined, referred to herein as V. R Through examples, V R This can be achieved by first increasing the second gate-source voltage V. GS Then the fifth gate-source voltage V is decreased. GS To obtain.

[0063] On the input side, the voltage at the first node 224b of the second transistor element 216, such as its drain voltage, can be determined by the voltage across the first transistor element 214 (e.g., the voltage between control node 228a and the second node 226a, such as the first gate-source voltage V). GS The voltage at the first node 224b of the second transistor element 216 can be defined by the difference between the voltage across the second transistor element 216 and the voltage across the first transistor element 214. By way of example, the drain voltage of the second transistor element 216 can be defined by decreasing the first gate-source voltage V. GS To obtain.

[0064] By configuring the first transistor element 214 and the fifth transistor element 222 as matched transistors (e.g., as transistors of the same type and having matched dimensions as described below), such that the voltage across the first transistor element 214 corresponds to the voltage across the fifth transistor element 222, it can be ensured that the voltage at the first node 224b of the second transistor element 216 matches the voltage at the first node 224d of the fourth transistor element 220. Voltage matching improves the performance of the current mirror.

[0065] As previously described, the control node 228a of the first transistor element 214 and the control node 228e of the fifth transistor element 222 can be coupled to each other and can be further coupled to the bias terminal 212. Therefore, the bias current I B The behavior of the first transistor element 214 and the fifth transistor element 222 can be driven. In some respects, the first transistor element 214 and the fifth transistor element 222 can be the same transistor type (e.g., both NMOS), for example, the same type as the second and fourth transistor elements 216, 220, or a different type from the second and fourth transistor elements 216, 220.

[0066] As illustrated by the examples, the proposed architecture can include a "single-branch operational amplifier" (consisting of an input current I0). REF The first and second transistor elements 214, 216 are biased. The voltage at the control node 228b (e.g., its gate) of the second transistor element 216 can set the value of the virtual ground of the operational amplifier, and this voltage can bias both the control node 228d and the first node 224d (e.g., the drain) of the fourth transistor element 220 (exemplarily, an output current generator). The first implementation can be achieved by a direct connection between the control nodes 228b, 228d of the second and fourth transistor elements 216, 220, such that the second and fourth transistor elements 216, 220 can act as true current generators.

[0067] Simultaneously, to set the same voltage at the first nodes 224b, 224d (e.g., drains) of the two devices, two voltage shifters 214, 222 are added to the architecture. Depending on various aspects, the first and fifth transistor elements 214, 222 can be matched voltage shifters. In this respect, the aspect ratio of the first transistor element 214 (e.g., W / L for a MOSFET, where W is the width and L is the length) can be proportional to the aspect ratio of the fifth transistor element 222 via a scaling factor defined as the input current I. REF With bias current I B The ratio. Considering the typical input current I... REF Greater than the bias current I B The aspect ratio of the first transistor element 214 can be I of the aspect ratio of the fifth transistor element 222. REF / I B The fifth transistor element 222 can be considered as being powered by an additional bias current I. B A simple biased diode, and the first transistor element 214 can be a matched transistor that satisfies the above conditions.

[0068] The aspect ratio matching with the current value ensures voltage matching at the first nodes 224b and 224d of the second and fourth transistor elements 216 and 220. This allows stringent requirements regarding the dynamic range of the output side of the current driver circuit 200 to be met.

[0069] Considering the combination Figures 1A to 1D The configuration discussed allows for a direct comparison of its complexity with that of the proposed architecture. In fact, while both architectures contain an input branch (with two series-connected transistors) and an output branch (with two series-connected transistors), the current driver circuit 200 includes a single (bias) branch 206, which includes a bias terminal 212 and a fifth transistor element 222 (and, in some respects, a current bias generator) to complete the architecture. Figures 1A to 1D Compared to the configuration of operational amplifiers with three or four branches and many transistors, the proposed configuration allows for favorable savings in power consumption and area.

[0070] Furthermore, due to the smaller number of internal nodes and devices, the feedback loop of the proposed architecture can provide better stability, thus potentially requiring only a smaller compensation upper limit. In simple configurations (such as...) Figure 2A In the diagram, the current driver circuit 200 can include exactly five transistor elements 214-222. Finally, if an NMOS transistor is used in the input branch 202, an NMOS input stage replacing the PMOS input stage and fewer devices are used to affect the first node 224d (V) of the fourth transistor element 220.R The offset of precision at the node may be smaller for the proposed architecture.

[0071] In the current driver circuit 200, the input current I REF The second transistor element 216, which provides the current mirror, can be biased, and furthermore, the connection at the control node 228c of the third transistor element 218 at the output branch 204 comes directly from the input current I. REF The input branch 202 acts as both an amplifier and a reference branch for the current mirror in the current driver circuit 200, thus providing these functions with fewer transistors than in a conventional configuration. In the proposed architecture, the first transistor element 214 and the second transistor element 216 can act as "operational amplifiers" because the first node 224a (e.g., drain) of the first transistor element 214 biases the control node 228c (e.g., gate) of the third transistor element 218, while the control node 228b of the second transistor element 216 (via the fifth transistor element 222 acting as a diode) is coupled to the first node 224d (e.g., drain) of the fourth transistor element 220. This is... Figure 1A and Figure 1B The operational amplifier 114 in the traditional configuration performs the same function, but with fewer components. In the conventional configuration, there are two separate components, while in the proposed architecture, the input current and the operational amplifier function are embedded in a single block, using fewer transistors.

[0072] In the proposed architecture, the first transistor element 214 can act as a cascode element. In this respect, a cascode element can be a device connected / configured to provide an impedance increase (e.g., an output impedance increase). Furthermore, the fifth transistor element 222 is affected by the voltage at the second transistor element 216 (e.g., its Vt). GS The voltage is biased directly at the fourth transistor element 220. The first transistor element 214 and the fifth transistor element 222 thus provide a shift that reduces the voltage at the first node 224d of the fourth transistor element 220 to increase the dynamic range at the output. In this context, the first transistor element 214 is part of the architecture used to bring the first node 224b of the second transistor element 216 to the same voltage (V) as the first node 224d of the fourth transistor element 220. R This is to provide better matching conditions for the current mirror.

[0073] As described above, the first and fifth transistor elements 214, 222 can be transistors of the same type as each other, and the second and fourth transistor elements 216, 220 can be transistors of the same type as each other. In this respect, the transistor type of the third transistor element 218 can be freely chosen. For example, the third transistor element 218 can be a different type from the first / fifth transistor elements 214, 222, and can be the same type as the second / fourth transistor elements 216 / 220, and vice versa. As another example, all transistors can be of the same transistor type (e.g., all NMOS). This flexible adaptation of the third transistor element 218 allows for optimization of this transistor while considering area savings, without requiring a specific "matching" transistor type.

[0074] Before further implementation and configuration of the current-driving circuit 200, it is helpful to discuss the role of the third transistor element 218. By way of example, the third transistor element 218 acts as a control gate and allows the voltage at the first node 224d of the fourth transistor element 220 to be set. Furthermore, the third transistor element 218 allows the second transistor element 216 to... R The voltage at the control node 228b of the fourth transistor element 220 is set to a suitable value to draw the current, which is converted by the fifth transistor element 222. The fifth transistor element 222 sets the voltage at the control node 228b of the fourth transistor element 220 to draw the input current I. REF The third transistor element 218 receives the current output from the fourth transistor element 220 (as the output current I). OUT ), and the voltage across the third transistor element 218 (e.g., the voltage between control node 228c and the second node 226c, e.g., the third gate-source voltage V). GS The fixed voltage V at the second node 226c (e.g., the source) R Define, and control the voltage at node 228c by the input current I. REF Definition. Therefore, the third transistor element 218 allows current to flow from the fourth transistor element 220, and the presence of the third transistor element 218 exemplarily closes the loop in the circuit architecture, thereby providing appropriate voltage values ​​at the nodes of the second and fourth transistor elements 216, 220.

[0075] Figure 2B A current driver circuit 250 is shown, illustrating an exemplary implementation of the current driver circuit 200. Figure 2B The configuration can be a preferred implementation of the current driver circuit 200, which uses components that allow for a small footprint to perform various functions. However, it should be understood that other implementations are also possible, for example, using other types of transistors.

[0076] The current driver circuit 250 may include an input branch, an output branch, and a bias branch. In the input branch, the current driver circuit 250 may include a reference current source 252 and an input terminal 258 (reference terminal), which is coupled to the reference current source 252. The reference current source 252 may provide an input current I to the input terminal 258. REF Furthermore, at the input branch, the current driver circuit 250 may include a first NMOS transistor 264 connected in series. C ) and the second NMOS transistor 266 (M D As shown in the figure, the first NMOS transistor 264 (M) C The drain node of the first NMOS transistor 264 (M) can be coupled to the input terminal 258, and the first NMOS transistor 264 (M) can be coupled to the input terminal 258. C The source node of ) can be connected to the second NMOS transistor 266 (M D The drain node is coupled.

[0077] At the output branch, the current driver circuit 250 may include an output terminal 260, at which the current driver circuit 250 provides an output current I. LED Furthermore, at the output branch, the current driver circuit 250 may include a third NMOS transistor 268 connected in series. OUT ) and the fourth NMOS transistor 270 (M LED As shown in the figure, the third NMOS transistor 268 (M) OUT The drain node of the third NMOS transistor 268 can be coupled to the output terminal 260, and the drain node of the third NMOS transistor 268 can be coupled to the output terminal 260. OUT The source node of ) can be connected to the fourth NMOS transistor 270 (M LED The drain node is coupled.

[0078] Such as combination Figure 2A The second NMOS transistor 266 (M) discussed D ) and the fourth NMOS transistor 270 (M LED A current mirror can be formed to reflect the input current I. REF "Mirroring" to the output branch as the fourth NMOS transistor 270 (M LED The drain current of the second NMOS transistor 266 (M) is shown in the figure. D ) and the fourth NMOS transistor 270 (M LED The gate nodes of the two NMOS transistors can be coupled to each other, and in addition, the second NMOS transistor 266 (M D ) and the fourth NMOS transistor 270 (M LED The source nodes of the ) can be coupled to each other (and to the reference terminal 280, for example, ground).

[0079] At the bias branch, the current driver circuit 250 may include a bias current source 256 and a bias terminal 262 coupled to the bias current source 256. The bias current source 256 may provide a bias current I to the bias terminal 262. B Furthermore, at the output branch, the current driver circuit 250 may include a fifth NMOS transistor 272 in a diode-connected configuration. LS For example, the fifth NMOS transistor 272 (M) LS The drain and gate nodes of the fifth NMOS transistor 272 (M) can be coupled to each other. LS The drain node of the ) can be coupled to the bias terminal 262.

[0080] Such as combination Figure 2A The first NMOS transistor 264 (M) discussed C ) and the fifth NMOS transistor 272 (M LS ) can be configured as a level shifter to make the second NMOS transistor 266 (M D The voltage at the drain node of the fourth NMOS transistor 270 (M) LED The voltage V at the drain node of ) R Matching (exemplarily, equal or substantially equal) improves the accuracy of the current mirror. In this regard, the first NMOS transistor 264 (M... C The gate node of ) can be connected to the fifth NMOS transistor 272 (M) LS The gate node of the first NMOS transistor 264 (and correspondingly its drain node) is coupled. C The gate node of the fifth NMOS transistor 272 (M) can be coupled to the bias terminal 262. Furthermore, the gate node of the fifth NMOS transistor 272 (M) can be coupled to the bias terminal 262. LS The source node of ) can be connected to the fourth NMOS transistor 270 (M LED The drain node is coupled.

[0081] Return to the output branch, such as combining Figure 2A The third NMOS transistor 268 (M) is discussed. OUT The gate node of the third NMOS transistor 268 can be coupled to the input terminal 258. This coupling allows the third NMOS transistor 268 (M OUT ) Receive input current I REF And allows the use of input current I REF This is used to bias the current driver circuit 250's "amplification stage". For example, the third transistor element 218 (M... OUT ) acts as the control gate and is controlled by the input current I REFA mirror copy passes through, while the amplification stage, composed of the first and second transistor elements 214 and 216, is powered by the input current I. REF Direct biasing is achieved thanks to the third transistor element 218 (M OUT It closes the loop and allows this bias.

[0082] As mentioned above, compared with other architectures (e.g., Figures 1A to 1D The comparison shown illustrates the relevant advantages in terms of complexity and power consumption. In the following sections, we will combine... Figures 3A to 5B This section will describe possible modifications to the current driver circuits 200 and 250. For clarity and brevity, [the following has been combined with...] Figure 2A and Figure 2B The described circuit components are in Figures 3A to 5B The same reference numerals are used in the accompanying drawings, and repetitions of already described connections and configurations will be omitted. It should be understood that, in conjunction with... Figure 2A and Figure 2B The various aspects discussed in the current driver circuits 200 and 250 also apply to... Figures 3A to 5B The current driver circuits in the circuits are 300, 350, 400, 450, 500, and 550, and vice versa.

[0083] Further improvements to the proposed configuration involve limiting the bias current I. B The influence of (and bias source) can be a source of error and will affect the current I supplied to the output load. OUT Subtract from the middle. Furthermore, in the proposed configuration, the fourth transistor element (M) LED It operates at the boundary of the transistor.

[0084] These potential problems are usually tolerable. Even in the fourth transistor element (M... LED Even with a slight bias towards the transistor, the output impedance remains sufficiently high. Furthermore, the increased sensitivity to operational amplifier offset is addressed by the reference V already discussed. R The need for higher precision is alleviated. As a further consideration, as long as the output current I... OUT Much larger than the reference current I REF (This is typically the case for any type of current driver), bias current I B The effects of (and bias source) can be ignored, and only in M LED and M D It only works when the mirror image ratio between them is very small.

[0085] Despite the above considerations, in some respects, a voltage source can be introduced into the circuit architecture to ensure the fourth transistor element 220 (M LED It does not operate in the transistor region. For example... Figure 3AAs shown, in various aspects, the current driver circuit 300 may further include a voltage source 302 (e.g., a portion of bias branch 206). In this configuration, the voltage source 302 may be coupled between the control node 228e of the fifth transistor element 222 and the control node 228d of the fourth transistor element 220. Therefore, considering the interconnection between transistor elements, the voltage source 302 may be coupled to the control node 228a of the first transistor element 214 and the control node 228b of the second transistor element 216.

[0086] Voltage source 302 can be configured to generate a voltage and supply the generated voltage to one or more control nodes 228a, 228e of the first transistor element 214 and the fifth transistor element 222. The voltage supplied by voltage source 302 can shift the voltage at one or more control nodes 228a, 228e upwards, thereby increasing the voltage V. R This also mitigates the dynamic range weakness at the first node 224d (e.g., the drain) of the fourth transistor element 220. A few millivolts are sufficient to adjust V. R This does not cause potential problems with the dynamic range at the output. Therefore, voltage source 302 can be configured to generate a voltage in the range of 10 mV to 100 mV, for example, a voltage in the range of 30 mV to 60 mV, for example, a voltage of 50 mV. Exemplarily, a higher V is obtained by subtracting the voltage across the fifth transistor element 222 (the fifth gate-source voltage). R Previously, voltage source 302 contributed voltage to the voltage (second gate-source voltage) across the second transistor element 216.

[0087] In principle, voltage source 302 can be implemented in any suitable manner. Typically, such as... Figure 3B As shown, for the current driver circuit 350, the voltage source 302 may be or may include a battery 352. The battery 352 can provide a compact and space-saving solution (from the second NMOS transistor 266 M). D The first NMOS transistor 264 (M) is obtained starting from the gate voltage. C ) and the fifth NMOS transistor 272 (M LS The desired upward shift of the voltage at the gate node of the () increases V R And give the second NMOS transistor 266, M, which is clearly leaving the transistor region. D And the fourth NMOS transistor 270, M LED The drain provides more headroom. The battery is easy to implement, requiring only one additional branch.

[0088] Combination Figure 3A and Figure 3BPossible implementations of the discussed configuration (exemplarily, possible battery implementations) are as follows: Figure 4A and Figure 4B As shown, it illustrates current driver circuits 400 and 450, which are adapted to ensure the fourth transistor element 220 (output generator M) LED ) is in a strong saturation state and the elimination is due to the fifth transistor element 222 (M) LS Any potential error caused by the bias current at ().

[0089] Compared to Figure 2A The current driver circuit 200, and the current driver circuit 400 may further include a sixth transistor element 406 (with corresponding first node 424f, second node 426f, and control node 428f) at a bias branch, a (further) bias current source 402 (e.g., a current generator), and a seventh transistor element 408 (with corresponding first node 424g, second node 426g, and control node 428g). These components may exemplarily define a “battery section” of the circuit 400. As shown, the seventh transistor element 408 may be arranged between the bias terminal 212 and the fifth transistor element 222. For example, the first node 424g of the seventh transistor element 408 may be coupled to the bias terminal, and the second node 426g of the seventh transistor element 408 may be coupled to the first node 224e of the fifth transistor element 222 (and correspondingly to the control nodes 228a, 228f of the first and fifth transistor elements 214, 222).

[0090] The seventh transistor element 408 may have a diode-connected configuration; for example, the first node 424e and the control node 428e of the seventh transistor element 408 may be coupled to each other such that the voltage at the first node 424e corresponds to the voltage at the control node 428e. Furthermore, the control node 428f of the sixth transistor element 406 may be coupled to the control node 428g of the seventh transistor element 408 (and correspondingly to its first node 424g). The second node 426f of the sixth transistor element 406 may be coupled to one or more control nodes 228b, 228d of the second and fourth transistor elements 216, 220.

[0091] The proposed configuration implies that the sixth and seventh transistor elements 406, 408 have mismatched voltages (e.g., mismatched V) at their respective control nodes 428f, 428g. GS(Voltage). For example, this can be achieved by providing sixth and seventh transistor elements 406, 408 with different sizes. Conversely, the mismatch causes the voltage at one or more second nodes 226a, 226e of the first and fifth transistor elements 214, 222 to rise relative to the voltage at the control node 228b of the second transistor element 216. (See reference...) Figure 4B The implementation of the medium current driver circuit 450, the sixth NMOS transistor 456 (M B1 ) and the seventh NMOS transistor 458 (M B2 ) with appropriate mismatch of V GS So that M C and M LS The source relative to M D Gate rises. For example, in Figure 4A and Figure 4B In the configuration, the added transistor element implements Figure 3A The function of an additional voltage source (battery).

[0092] By way of example, the relationship between the control node 228b (e.g., gate) of the second transistor element 216 and the first node 224d (e.g., drain) of the fourth transistor element 220 is changed by the difference between the voltage across the sixth transistor element 406 (e.g., the voltage between the control node 228f and the second node 226f, e.g., the sixth gate-source voltage) and the voltage across the seventh transistor element 408 (e.g., the voltage between the control node 228g and the second node 226g, e.g., the seventh gate-source voltage). Considering Figure 4B Configuration, voltage V R It can be defined as M D V GS + M B2 V GS - M B1 V GS - M LS V GS To illustrate with examples, Figure 4A and Figure 4B The configuration can be understood as a "top-down" configuration, in which the voltage at control node 228b first rises the voltage across the sixth transistor element 406, and then falls the voltage across the seventh transistor element 408.

[0093] The mismatch between the sixth and seventh transistor elements 406, 408 can be configured to cause V R Increase. In this respect, the sixth transistor element 406 and the seventh transistor element 408 can be configured such that the voltage across the sixth transistor element 406 (sixth gate-source voltage) is greater than the voltage across the seventh transistor element 406 (seventh gate-source voltage).

[0094] Depending on the aspects, the sixth transistor element 406 and the seventh transistor element 408 may be transistors of the same type as the second and fourth transistor elements 216, 220 (e.g., they may all be NMOS) to ensure uniform transistor behavior, for example, even if there are variations due to temperature or process.

[0095] Depending on various aspects, the current driver circuit 400 may further include (at the bias branch) a capacitor element 410 coupled between the second node 224d of the fourth transistor element 220 and the control node 228b of the first transistor element 216. The capacitor element 410 can enhance the stability of the circuit. Reference Figure 4B In the implementation of the medium current driver circuit 450, capacitor 460 can be coupled to the fourth NMOS transistor 270 (M LED The drain of the second NMOS transistor 266 (M) D Between the gates of the capacitors, any pole introduced by the bypass route from the "battery" section. The capacitance of capacitor elements 410, 460 can be relatively small, for example, in the range of 100 fF (fefefarad) to 100 pF (picofarad), for example, in the range of 1 pF to 10 pF.

[0096] Steering achieves bias current I B The correction can be achieved in several ways. In a simple configuration, a fourth transistor element 220 (M) can be added. LED The size of ). As another option, such as Figure 4A and Figure 4B As shown, in all aspects, except for providing a bias current I at the bias terminal 212 B In addition to the bias current source, the current driver circuit 400 may also include additional (e.g., second) bias current sources 402, 452. Exemplarily, the bias current I at the bias terminal... B (For example, generated by the corresponding (first) bias current source 256) can flow along a specific path in the circuit. Second bias current sources 402, 452 can be configured to generate a (second) bias current to bias the sixth transistor element 406. As an optional component, such as Figure 4A and Figure 4BAs shown, circuit 400 may further include third bias current sources 404 and 454. The third bias current source 404 may be coupled to the fifth transistor element 222, for example, to the second node 226e (the source node of the fifth NMOS transistor 272) of the fifth transistor element 222. Another terminal of the second bias current source 402 may be coupled to a reference potential of circuit 400. The third bias current source 404 may be configured to generate a bias current (e.g., having the same current value I as the second bias current source 402). B ), and can also act as a sink for the current from the first bias to avoid the output current I OUT The error in the process. However, this error may be very small, so in some scenarios the third bias current source 404, 454 can be omitted.

[0097] Depending on various aspects, the current driver circuit 400 may therefore include a bias current source (e.g., Figure 4B The bias current source 256 is coupled to the bias terminal 212 and is configured to provide a bias current I to the bias terminal 212. B It may further include a second bias current source 402, which is arranged in the bias branch to bias additional voltage shifting elements defined by the sixth and seventh transistor elements 406, 408. The second bias current source 402 may be configured to generate a bias current I from the (first) bias current source coupled to the bias terminal 212. B Bias current I of the same current value B The second bias current source 402 can be further coupled to the second and fourth transistor elements 216, 220, for example, to their corresponding control nodes 228b, 228d. Another terminal of the second bias current source 402 can be coupled to the reference potential of the circuit 400.

[0098] Considering Figure 4A and Figure 4B One possible cause of concern regarding this configuration is the biasing of the common control nodes 428f and 428g of the sixth and seventh transistor elements 406 and 408. For example, considering... Figure 4B The implementation method of M B1 and M B2 The common gate may be 2V higher than the reference potential (GND). GS above. Figure 5A and Figure 5B The configuration of the current driver circuits 500 and 550 in the circuit addresses this potential problem by providing a voltage source (battery V). LS The implementation method leads to a solution that can operate safely at lower supply voltages.

[0099] exist Figure 5A and Figure 5B In this configuration, the sixth and seventh transistor elements 406 and 408 work together to cause the voltage at the control node of the second transistor element 216 (e.g., M) to... D The voltage at the gate is first shifted down and then up. This is illustrated by an example. Figure 5A and Figure 5B The configuration can be understood as a "bottom-up" configuration, where the voltage at control node 228b first decreases the voltage across the seventh transistor element 408, and then increases the voltage across the sixth transistor element 406. Although compared to... Figure 2A The basic architecture is more complex, but this configuration further improves the accuracy of the circuit.

[0100] like Figure 5A As shown, in this configuration, the sixth transistor element 406 can be in a diode-connected configuration, with its control node 428f coupled to the first node 424f. Furthermore, the control node 428f and the first node 424f of the sixth transistor element 406 can be coupled to the control node 228a of the first transistor element 214, and correspondingly coupled to the first node 224e and the control node 228e of the diode-connected fifth transistor element 222.

[0101] In this configuration, the seventh transistor element 408 can also be in a diode-connected configuration, with its control node 428g coupled to the first node 424g. The second node 426g of the seventh transistor element 408 can be coupled to the second node 426f of the sixth transistor element 406. Furthermore, the control node 428g and the first node 424g of the seventh transistor element 408 can be coupled to the control node 228b of the second transistor element 216, and correspondingly coupled to the control node 228d of the fourth transistor element 220.

[0102] In this scenario, the current driver circuit 500 may also include (at the bias branch) multiple bias current sources 502-508 to achieve the desired voltage shift. In an exemplary implementation of the current driver circuit 550, the current sources are designated as 552-558.

[0103] The current driver circuit 500 may include a first bias current source 502, which is configured to provide (e.g., generate) a first bias current I. A The first bias current source 502 can be coupled to the seventh transistor element 408, for example, at the first node 424g (and therefore can be coupled to one or more control nodes 228b, 228d, 428g of the second, fourth, and seventh transistor elements 216, 220, 408). Therefore, the first bias current source 502 can supply a first bias current I.A It is delivered to the seventh transistor element 408.

[0104] The current driver circuit 500 may further include a second bias current source 504, which is configured to provide (e.g., generate) a second bias current I. B The second bias current source 504 may be coupled to the seventh transistor element 408, for example, at the second node 426g. Another terminal of the second bias current source 504 may be coupled to one or more second nodes 226b, 226d of the second and fourth transistor elements 216, 220. Exemplarily, the other terminal of the second bias current source 504 and one or more second nodes 226b, 226d may be coupled to a reference potential (e.g., ground) of the circuit 500.

[0105] The current driver circuit 500 may further include a third bias current source 506, which is configured to provide (e.g., generate) a third bias current I. C The third bias current source 506 can be coupled to the fifth transistor element 222, for example, at the first node 224e. Therefore, the third bias current source 506 can be coupled to the first node 424f of the sixth transistor element 406, and one or more control nodes 228a, 228e, 428f of the first, fifth, and sixth transistor elements 214, 222, 406.

[0106] As an optional component (similar to) Figure 4A The third bias current source 404), and the current driver circuit 500 may further include a fourth bias current source 508, which is configured to provide (e.g., generate) a fourth bias current I. X This reduces potential errors in the output current. The fourth bias current source 508 can be coupled to the fifth transistor element 222, for example, at the second node 226e. Therefore, the fourth bias current source 508 can be coupled to the first node 224d of the fourth transistor element 220 and the second node 226c of the third transistor element 218.

[0107] Depending on various factors, current sources 502-508 can be configured to provide the corresponding current I. A I B I C I X A predefined current value is provided to facilitate biasing of the "level shifting section". In this regard, the second bias current I... B It can be greater than (in other words, higher than) the first bias current I. A This ensures the protection of the sixth transistor element 406 ( Figure 5B M inB2 There is sufficient bias. Correspondingly, the third bias current I... C It can be greater than the second bias current I. B With the first bias current I A The difference between them, i.e., I C > (I B - I A For example, the third bias current I C It can be greater than the current flowing through the sixth transistor element 406 (M) B2 The current of ). As a further consideration, if present, the fourth bias current I. X It can be equal to the first and third bias currents I A I C The sum of the two bias currents I and the second bias current I B The difference between them, i.e., I X = I A + I C - I B As mentioned earlier, add current generator I. A +I C -I B Ensure output current I OUT It is unaffected by any systematic contribution from the current of the level shifting section.

[0108] Figure 6 A system 600 is shown, which includes a current driver circuit 610 and a load 620 coupled to the current driver circuit 610. The current driver circuit 610 can be configured as presented herein; for example, the current driver circuit 610 can have a combination of Figures 2A to 5B The current driver circuits 200, 250, 300, 350, 400, 450, 500, and 550 discussed herein are in any configuration. For simplicity, the individual components of the current driver circuit 510 are not illustrated. Typically, the current driver circuit 510 can receive an input current I at input terminal 602. REF It can also deliver output current I at output terminal 604. OUT .

[0109] In some aspects, system 600 may also include an input current source coupled to input terminal 602. Figure 6 In one exemplary configuration, load 620 may be coupled to output terminal 604, and current driver circuit 610 may act as a current sink on the output side. In other aspects, system 600 may include an input current sink coupled to input terminal 602, and current driver circuit 610 may act as a current source on the output side.

[0110] It should be understood that, typically, the current driver circuit 610 may include components relative to the combination. Figures 2A to 5B Additional components of those components described. As an example component, the current driver circuit 610 may include control circuitry, one or more filters, temperature protection elements, voltage surge protection elements, memory, etc.

[0111] In principle, the load 620 can be any suitable device (e.g., any suitable circuit), and the current delivery utilizing the characteristics of the proposed current driver circuit 610 may be beneficial to it, for example, in terms of small footprint.

[0112] In a preferred configuration, load 620 may include a light-emitting device having one or more light-emitting elements, such as multiple light-emitting elements. For example, load 620 may include a light-emitting device having one or more light-emitting diodes (LEDs), such as multiple LEDs. In this scenario, the current driver circuit 610 may be an LED driver. For example, load 620 may include a string of LED devices connected in series, or multiple strings of LED devices.

[0113] Light-emitting elements (e.g., LEDs) can be configured to emit light with a predefined wavelength, for example, in the visible light range (e.g., from about 380 nm to about 700 nm), the infrared and / or near-infrared range (e.g., from about 700 nm to about 5000 nm), or the ultraviolet range (e.g., from about 100 nm to about 400 nm). In some aspects, light-emitting elements can be configured to emit light in different wavelength ranges. For example, a first light-emitting element can be configured to emit light in a first wavelength range (e.g., a first color, such as blue), a second light-emitting element can be configured to emit light in a second wavelength range (e.g., a second color, such as red), and a third light-emitting element can be configured to emit light in a third wavelength range (e.g., a third color, such as green), and so on.

[0114] As a final note, it is necessary to emphasize the architecture proposed in this paper (e.g., Figure 2A The difference between the basic configuration of the Wilson Current Mirror 700 and two popular architectures is that the Wilson Current Mirror 700 ( Figure 7A ) and regulated common source cascode stage 710 ( Figure 7B They may look similar, but their behaviors are quite different.

[0115] refer to Figure 7AAs can be seen, the Wilson current mirror 700 lacks the level shifting present in the architecture proposed herein, thus making the Wilson method unsuitable for current drivers due to this weakness in dynamic range. Exemplarily, in the Wilson current mirror 700, there is no bias branch with a (fifth) transistor element to provide level shifting. In the current driver circuit of this disclosure, an additional (fifth) transistor element allows the first node of the fourth transistor element (e.g., M) to be shifted. LED The voltage at the drain is lower, thus saving a significant amount of voltage at the output in the dynamic range.

[0116] refer to Figure 7B It can be seen that the modulated cascode 710 obtains the driver reference current I from a branch different from the branch that builds the operational amplifier. REF The operational amplifier at the output (M OUT The third transistor element is driven at point ). In the regulated cascode 710, the bias current I op Possibly related to output current I LED and input current I REF Completely unrelated. This allows for performance tuning in terms of dynamic range and large output impedance implementation. Furthermore, transistor M... op The channel length can be very large (to increase amplifier gain and further improve output impedance), or even at the minimum lithographic limit (to ensure a very fast response).

[0117] However, the modulated cascode 710 did not anticipate the cascode M at the input. C (Example, first transistor element 214), or if such a transistor exists, it is not anticipated that such a transistor would be directly taken from M. D The gate voltage bias. In practice, this puts the operational amplifier stage into transistor mode and hinders the increase in output impedance. Furthermore, in typical applications, a signal is superimposed on the current of the regulated cascode 710. If used to bias an operational amplifier, this presents serious design problems because component stability and correct dynamic range must be ensured over a wide current range. This makes the approach inconvenient, if not infeasible, due to the operational amplifier current I... op Another reason why it is not related to the current on the output branch.

[0118] By way of example, the architecture proposed in this paper can be regarded as a combination of the beneficial characteristics of Wilson current mirror and tunable cascode, without being affected by the shortcomings of each.

[0119] As used herein, the terms “processor,” “processing circuit,” or “control circuit” can be understood as any type of technical entity that allows the processing of data. Data can be processed according to one or more specific functions that the processor / processing circuit / control circuit can perform. Furthermore, as used herein, “processor / processing circuit / control circuit” can be understood as any type of circuit, such as any type of analog or digital circuit. Therefore, a processor / processing circuit / control circuit can be or includes analog circuits, digital circuits, mixed-signal circuits, logic circuits (e.g., hard-wired logic circuits or programmable logic circuits), microprocessors, central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs), integrated circuits, application-specific integrated circuits (ASICs), etc., or any combination thereof. It should be understood that any two (or more) processors / processing circuits / control circuits detailed herein can be implemented as a single entity with equivalent functionality, and vice versa, any single processor / processing circuit / control circuit detailed herein can be implemented as two (or more) separate entities with equivalent functionality.

[0120] The term "connection" as used herein can be used with respect to terminals, integrated circuit elements, devices, etc., to indicate an electrical connection, which can include direct or indirect connections. An indirect connection may consist only of additional structures in the current path that do not affect the basic function of the circuit or device. The term "conductive connection" as used herein describes an electrical connection between one or more terminals, devices, areas, contacts, etc., and can be understood as an electrical connection exhibiting ohmic behavior (e.g., provided by a metal or degenerate semiconductor without a pn junction in the current path). The term "conductive connection" may also be referred to as "electrical connection." The term "coupling" may be used herein in the same manner as the term "connection."

[0121] As used herein, the term "terminal" can be used to describe a location (e.g., a point) or structure of a device or element of a device at which a signal (e.g., an analog signal, such as current or voltage) can be provided and / or where another device or element can be connected. Exemplarily, a terminal can be a location or structure that is electrically connected to a device or element. In this document, a terminal may also be referred to as a port, pin, contact, or contact point.

[0122] The terms “reference voltage” or “reference potential” as used herein can be used to refer to the base voltage of a circuit. In some respects, the reference voltage may also be referred to as ground (GND) voltage, ground potential, virtual ground voltage, or zero volt (0V). In an exemplary configuration, the reference voltage may be 0 volts, but the various aspects described herein can, in principle, be applied to any suitable value of the reference voltage.

[0123] The word "exemplary" is used herein to mean "as an example, instance, or illustration." Any embodiment or design described herein as "exemplary" is not necessarily to be construed as superior to other embodiments or designs.

[0124] The phrases “at least one” and “one or more” can be understood to include a numerical quantity greater than or equal to one (e.g., one, two, three, four, etc.). The phrase “at least one” relating to a group of elements can be used herein to mean at least one element in a group consisting of those elements. For example, the phrase “at least one” relating to a group of elements can be used herein to mean a selection of: one of the listed elements, multiple of the listed elements, multiple individual listed elements, or multiple of multiple individual listed elements.

[0125] All abbreviations defined in the above description also apply to all claims included herein.

[0126] Although the invention has been specifically shown and described with reference to particular aspects, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the scope of the invention is indicated by the appended claims, and all changes within the meaning and equivalents of the claims are intended to be covered.

[0127] List of reference numerals

[0128] 100 Current Driver

[0129] Configuration of 100A current mirror

[0130] Configuration of 100b current mirror

[0131] 102 Reference Current Source

[0132] 104 First Transistor

[0133] 106 Second Transistor

[0134] 108 Third Transistor

[0135] 110 Fourth Transistor

[0136] 112 Fifth transistor

[0137] 114 Operational Amplifier

[0138] 150 operational amplifier

[0139] Configuration of 150c operational amplifier

[0140] Configuration of 150D operational amplifier

[0141] 152c PMOS transistor

[0142] 152d PMOS transistor

[0143] 154c PMOS transistor

[0144] 154d PMOS transistor

[0145] 156C tail current source

[0146] 158c PMOS transistor

[0147] 160c PMOS transistor

[0148] 162c NMOS transistor

[0149] 162d NMOS transistor

[0150] 164c NMOS transistor

[0151] 164d NMOS transistor

[0152] 166c Bias Current Source

[0153] 166d bias current source

[0154] 168c Bias Current Source

[0155] 168d bias current source

[0156] 170c output signal

[0157] 170d output signal

[0158] 172d NMOS transistor

[0159] 174d bias current source

[0160] 200 Current Driver Circuit

[0161] 202 Input Branch

[0162] 204 Output Branches

[0163] 206 bias branches

[0164] 208 Input Terminals

[0165] 210 Output Terminal

[0166] 212 Bias Terminal

[0167] 214 First transistor element

[0168] 216 Second transistor element

[0169] 218 Third transistor element

[0170] 220 Fourth transistor element

[0171] 222 Fifth transistor element

[0172] 224a First Node

[0173] 224b First Node

[0174] 224c First Node

[0175] 224d First Node

[0176] 224e First Node

[0177] 226a Second Node

[0178] 226b Second Node

[0179] 226c Second Node

[0180] 226d Second Node

[0181] 226e Second Node

[0182] 228a Control Node

[0183] 228b Control Node

[0184] 228c control node

[0185] 228d control node

[0186] 228e Control Node

[0187] 230 Grounding Terminal

[0188] 250 Ω current driver circuit

[0189] 252 Reference Current Source

[0190] 256 Bias Current Source

[0191] 258 input terminals

[0192] 260 Output Terminal

[0193] 262 Bias Terminal

[0194] 264 First NMOS Transistor

[0195] 266 Second NMOS transistor

[0196] 268 Third NMOS transistor

[0197] 270 Fourth NMOS transistor

[0198] 272 Fifth NMOS transistor

[0199] 280 Grounding Terminal

[0200] 300 Current Driver Circuit

[0201] 302 Voltage Source

[0202] 350 Current Driver Circuit

[0203] 352 battery

[0204] 400 Current Driver Circuit

[0205] 402 Current Source

[0206] 404 Current Source

[0207] 406 Sixth Transistor Component

[0208] 408 Seventh Transistor Component

[0209] 410 Capacitor Components

[0210] 424f First Node

[0211] 424g First Node

[0212] 426f Second Node

[0213] 426g Second Node

[0214] 428f control node

[0215] 428g control node

[0216] 450 Current Driver Circuit

[0217] 452 Current Source

[0218] 454 Current Source

[0219] 456 Sixth NMOS transistor

[0220] 458 Seventh NMOS transistor

[0221] 460 capacitor

[0222] 500 Current Driver Circuit

[0223] 502 First Current Source

[0224] 504 Second Current Source

[0225] 506 Third Current Source

[0226] 508 Fourth Current Source

[0227] 550 Current Driver Circuit

[0228] 552 First Current Source

[0229] 554 Second Current Source

[0230] 556 Third Current Source

[0231] 558 Fourth Current Source

[0232] 600 system

[0233] 602 Input Terminal

[0234] 604 Output Terminal

[0235] 610 Current Driver Circuit

[0236] 620 load

[0237] 700 Wilson current mirror

[0238] 710 Adjustable Common Source Common Grid Stage

Claims

1. A current driver circuit (200-500) comprising: an input branch (202) comprising an input terminal (208) configured to receive an input current (I REF ) a first transistor element (214) coupled with the input terminal (208), and a second transistor element (216) coupled with the first transistor element (214); an output branch (204) comprising an output terminal (210) configured to be coupled with a load, a third transistor element (218) coupled with the output terminal (210), and a fourth transistor element (220) coupled with the third transistor element (218); and wherein each transistor element (214-222) comprises a first node (224a-224e), a second node (226a-226e), and a control node (228a-228e) to allow control of a current flow between the first node (224a-224e) and the second node (226a-226e); a bias branch (206) comprising a bias terminal (212) configured to receive a bias current (I B ) and a fifth transistor element (222) coupled with the bias terminal (212), wherein the third transistor element (218) is arranged between the fourth transistor element (220) and the output terminal (210), and a control node (228c) of the third transistor element (218) is coupled with the input terminal (208) to allow a current flow from the fourth transistor element (220) to the output terminal (210), wherein the second transistor element (216) and the fourth transistor element (220) are configured to define a current mirror to copy an input current (I REF ) from the input branch (202) as an output current (I OUT ) at the output branch (204), wherein the fifth transistor element (222) is in a diode-connected configuration, and wherein control nodes (228a, 228e) of the first transistor element (214) and fifth transistor element (222) are coupled with the bias terminal (212), and wherein the first transistor element (214) and the fifth transistor element (222) are configured to define a voltage level shift to provide a match between a voltage at the first node (224b) of the second transistor element (214) and a voltage at the first node (224d) of the fourth transistor element (220).

2. The current driver circuit (200-500) according to claim 1, wherein a second node (226a) of the first transistor element (214) is coupled with a first node (224b) of the second transistor element (216), and wherein a second node (226e) of the fifth transistor element (222) is coupled with a first node (224d) of the fourth transistor element (220).

3. The current driver circuit (200-500) according to claim 1 or 2, wherein the first transistor element (214) and the fifth transistor element (222) are of a same transistor type; and / or wherein the second transistor element (216) and the fourth transistor element (220) are of a same transistor type.

4. The current driver circuit (200-500) according to any one of claims 1 to 3, 5. The current driver circuit (200-500) according to any one of claims 1 to 4, wherein an aspect ratio of the first transistor element (214) is proportional to an aspect ratio of the fifth transistor element (222) by a scaling factor defined as a ratio of the input current (I REF ) to the bias current (I B ). ​ Further comprising a voltage source (302) coupled between the control node (228e) of the fifth transistor element (222) and the control node (228d) of the fourth transistor element (220) and configured to generate a voltage to cause an upward shift of the voltages at the control nodes (228a, 228e) of the first and fifth transistor elements (214, 222).

6. The current driver circuit (200-500) according to any one of claims 1 to 4, Further comprising a sixth transistor element (406) and a seventh transistor element (408) at the bias branch (206), wherein a second node (426f) of the sixth transistor element (406) is coupled with the control nodes (228b, 228d) of the second and fourth transistor elements (216, 220), wherein the seventh transistor element (408) is in a diode-connected configuration and arranged between the bias terminal (212) and the fifth transistor element (222), and wherein the sixth and seventh transistor elements (406, 408) are mismatched such that the voltage across the sixth transistor element (406) is greater than the voltage across the seventh transistor element (408).

7. The current driver circuit (200-500) according to claim 6, Further comprising a capacitor element (410) coupled between the first node (224d) of the fourth transistor element (220) and the control node (228b) of the second transistor element (216).

8. The current driver circuit (200-500) according to claim 6 or 7, A first bias current source is also included, coupled with the bias terminal (212) and configured to provide the bias current (I B ) to the bias terminal (212), and A second bias current source (402) is also included, coupled with the sixth transistor element (406) and configured to generate a second bias current having a current value that matches a bias current (I B ) from the first bias current source to bias the sixth transistor element (406).

9. The current driver circuit (200-500) according to any one of claims 1 to 4, Further comprising a sixth transistor element (406) and a seventh transistor element (408) at the bias branch (206), wherein the sixth transistor element (406) is in a diode-connected configuration, a second node (426f) of the sixth transistor element (406) is coupled with a second node (426g) of the seventh transistor element (408), and a control node (428f) of the sixth transistor element (406) is coupled with the control nodes (228a, 228e) of the first and fifth transistor elements (214, 222); and wherein the seventh transistor element (408) is in a diode-connected configuration, and a control node (428g) of the seventh transistor element (408) is coupled with the control nodes (228b, 228d) of the second and fourth transistor elements (216, 220), and wherein the sixth and seventh transistor elements (406, 408) are mismatched such that the voltage across the sixth transistor element (406) is greater than the voltage across the seventh transistor element (408).

10. The current driver circuit (200-500) according to claim 9, further comprising: a first bias current source (502) coupled with the first node (424g) of the seventh transistor element (408) and configured to provide a first bias current (I A ) a second bias current source (504) coupled with the second node (426g) of the seventh transistor element (408) and configured to provide a second bias current (I B ) and a third bias current source (506) coupled with the first node (224e) of the fifth transistor element (222) and configured to provide a third bias current (I C ).

11. The current driver circuit (200-500) according to claim 10, wherein the second bias current (I B ) is greater than the first bias current (I A ); and / or The third bias current (I C ) is greater than the difference between the second bias current (I B ) and the first bias current (I A ).

12. The current driver circuit (200-500) according to claim 11, further comprising: a fourth bias current source (508) coupled with the second node (226e) of the fifth transistor element (222) and configured to provide a fourth bias current (I X ), wherein preferably the fourth bias current (I X ) is equal to the difference between the sum of the first and third bias currents (I A , I C ) and the second bias current (I B ).

13. The current driver circuit (200-500) according to any one of claims 1 to 12, wherein at least one of the first transistor element (214) and / or the second transistor element (216) is an N-channel metal-oxide-semiconductor (NMOS) transistor.

14. A system (600) comprising: a current driver circuit (610) configured according to any one of claims 1 to 13; and a load (620) coupled with the current driver circuit (610) at an output terminal (604) and configured to receive an output current (I OUT ) from the current driver circuit (610) as a drive current.

15. The system (600) according to claim 14, wherein the load (620) comprises one or more light emitting elements, wherein preferably the load (620) comprises one or more light emitting diodes (LEDs).

Images