Identification system based on nonlinear physical storage pool and implementation method thereof
By employing nonlinear quantization of encoding modules, resistor-capacitor circuits, and digital-to-analog converters combined with linear regression networks on edge devices, the problems of hardware complexity and high-precision hardware dependence in reservoir computing are solved, achieving efficient image and speech recognition.
Patent Information
- Application Number
- CN202511488226.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-17
- Publication Date
- 2026-02-03
AI Technical Summary
In existing technologies, reservoir computing schemes based on biological organoids and electronic devices face the problem of complex signal reading hardware and reliance on high-precision analog-to-digital converters and floating-point operations, resulting in high hardware costs and high power consumption, making it difficult to widely apply them on edge devices.
The input signal is preprocessed using an encoding module, nonlinear quantization is performed using a resistor-capacitor circuit and a digital-to-analog converter, and recognition is achieved through a 4-bit analog-to-digital converter in conjunction with a linear regression network, thereby reducing hardware complexity and power consumption.
It enables efficient recognition of image and voice signals on edge devices, reduces hardware costs and power consumption, improves recognition performance, and solves the problem of dependence on high-precision hardware.
Smart Images
Figure CN121461998A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the field of artificial intelligence hardware, and in particular, to a recognition system based on a nonlinear physical reservoir and an implementation method thereof. BACKGROUND
[0002] As an important application scenario of artificial intelligence, the performance of edge computing is currently mainly dominated by deep learning models, such as convolutional neural networks (CNN) and long short-term memory networks (LSTM). Although these models have excellent performance in processing complex tasks, their inherent computing-intensive characteristics, especially the large number of floating-point operations and gradient-based iterative training algorithms, severely restrict their deployment and application on edge devices that are limited in computing, storage, and power consumption. To break through this bottleneck, the neuromorphic computing paradigm represented by reservoir computing (RC) provides an efficient alternative solution. The core advantage of the RC architecture is that its hidden layer (i.e., the "reservoir") is a fixed, randomly generated nonlinear dynamic system, and the learning process is limited to training a linear output layer. This "training-free" feature greatly reduces the computational complexity, making it naturally suitable for processing time series data, and thus becoming a highly potential technology in the field of edge intelligence.
[0003] At the physical implementation level, reservoir computing exhibits excellent compatibility with a variety of hardware carriers, including analog electronic devices, spin electronic oscillators, and even biological organs, which are designed to build high-energy-efficient, high-throughput non-Von Neumann computing architectures. However, current physical implementation schemes still face serious signal reading challenges. For example, biological organ-based reservoirs need to rely on a highly complex microelectrode array (MEA) for signal acquisition, while electronic device-based reservoirs generally rely on high-bit, high-precision analog-to-digital converters (ADCs). The expensive reading hardware and the inevitable floating-point operations in subsequent processing together constitute the main obstacle to the widespread application of RC technology. SUMMARY
[0004] The purpose of the embodiments of the present disclosure is to provide a recognition system based on a nonlinear physical reservoir and an implementation method thereof, to solve the inherent contradiction between the simplicity of the hardware architecture and the nonlinear computing required in the prior art, and the problem of excessive dependence on high-precision hardware and floating-point operations in existing reservoir systems.
[0005] The embodiment of the present disclosure adopts the technical scheme as follows: a recognition system based on a nonlinear physical reservoir, comprising: an encoding module, a reservoir network, and a linear regression network; wherein the encoding module is configured to preprocess an input signal and encode the preprocessed input signal to obtain a PAM encoded signal; the reservoir network comprises a resistor-capacitor circuit and a digital-to-analog converter, the PAM encoded signal is input into the resistor-capacitor circuit, and the capacitor voltage in the resistor-capacitor circuit is collected; the capacitor voltage is nonlinearly quantized by the digital-to-analog converter to obtain an output signal; and the linear regression network is configured to output a recognition result according to the output signal.
[0006] In some embodiments, the input signal comprises an image signal and a voice signal.
[0007] In some embodiments, when the input signal is an image signal, the encoding module is configured to preprocess the input signal by performing image shaping processing and / or mask processing on the image signal, and splicing the processed image signal into a one-dimensional input signal; and when the input signal is a voice signal, the encoding module is configured to preprocess the input signal by performing MFCC feature extraction on the voice signal to obtain a frequency domain matrix of the voice signal, and unfolding the frequency domain matrix into a one-dimensional input signal along a time axis.
[0008] In some embodiments, the encoding module is configured to encode the one-dimensional input signal into a PAM encoded signal with a preset period, the effective level width of the PAM encoded signal is half of the preset period, and the amplitude of the effective level is positively correlated with the feature strength of the one-dimensional input signal.
[0009] In some embodiments, the reservoir network is configured to input the PAM encoded signal into the resistor-capacitor circuit, select the end time of each pulse period in the PAM encoded signal as a virtual node, and determine the capacitor voltage at all the virtual nodes; and based on the digital-to-analog converter, perform 4-bit digital quantization on the capacitor voltage at all the virtual nodes to output the quantization result corresponding to each capacitor voltage.
[0010] In some embodiments, the capacitor voltage at the virtual node is determined based on the following formula:
[0011] wherein, represents the size of the capacitor voltage read at the virtual node, represents the size of the input voltage, represents the time of a single pulse period, represents the duration of the effective level in a single pulse period.
[0012] In some embodiments, the digital-to-analog converter is a 4-bit or 8-bit analog-to-digital converter.
[0013] In some embodiments, the linear regression network is specifically configured to: perform matrix operation on the quantization results at all the virtual nodes and the trained weight matrix, determine the label values of the results, and determine the recognition result according to the label values.
[0014] In some embodiments, the weight matrix is trained based on labeled sample signals.
[0015] The embodiments of the present disclosure also provide a recognition method based on a nonlinear physical reservoir, which is used for the system described above, and specifically includes: receiving an input signal by an encoding module, pre-processing the input signal, and encoding the pre-processed input signal to obtain a PAM encoded signal; inputting the PAM encoded signal into a resistor-capacitor circuit of a reservoir network, and collecting a capacitor voltage in the resistor-capacitor circuit; performing nonlinear quantization on the capacitor voltage by a digital-to-analog converter of the reservoir network to obtain an output signal; and calling a linear regression network to output a recognition result.
[0016] The embodiments of the present disclosure have the beneficial effects that: the digital-to-analog converter is used as a core computing unit, the quantization ladder thereof is both fine enough to retain key features and rough enough to introduce strong and deterministic nonlinear quantization, weak capacitor voltage fluctuations are effectively filtered out or merged, strong voltages caused by key features are clearly retained and separated, the sparsity of the reservoir network is effectively enhanced, the performance of recognition by the physical reservoir is ensured, the dependence of the physical reservoir on complex hardware is solved, and resource saving is achieved at both hardware and algorithm levels. BRIEF DESCRIPTION OF DRAWINGS
[0017] In order to more clearly illustrate the technical solutions of one or more embodiments of the present disclosure or the prior art, the drawings needed in the embodiment or prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments described in the present disclosure, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.
[0018] Figure 1 FIG. 1 is a structural schematic diagram of a recognition system based on a nonlinear physical reservoir in a first embodiment of the present disclosure; Figure 2 FIG. 2 is a waveform schematic diagram of a random sample in a FSDD data set in the first embodiment of the present disclosure; Figure 3 FIG. 3 is a schematic diagram of a processing process of an original audio signal in the first embodiment of the present disclosure. Figure 4 Conceptual diagram of the identification system based on nonlinear physical reservoir in the first embodiment of the present disclosure; Figure 5 Identification accuracy results for the FSDD test set at different resolutions in the first embodiment of the present disclosure; Figure 6 Flowchart of the identification method based on nonlinear physical reservoir in the second embodiment of the present disclosure. DETAILED DESCRIPTION
[0019] In order to enable personnel in the technical field to better understand the technical solutions in one or more embodiments of the present specification, the technical solutions in one or more embodiments of the present specification will be described clearly and completely in conjunction with the drawings in one or more embodiments of the present specification. Obviously, the described embodiments are only a part of the embodiments of the present specification, rather than all the embodiments. Based on one or more embodiments of the present specification, all other embodiments obtained by those skilled in the art without creative labor should belong to the protection scope of the present document.
[0020] As an important application scenario of artificial intelligence, the performance of edge computing is currently mainly dominated by deep learning models, such as convolutional neural networks (CNN) and long short-term memory networks (LSTM). Although these models have excellent performance in processing complex tasks, their inherent computing-intensive characteristics, especially the large number of floating-point operations and gradient-based iterative training algorithms, severely restrict their deployment and application on edge devices that are limited in computing, storage, and power consumption. To break through this bottleneck, the neuromorphic computing paradigm represented by reservoir computing (RC) provides an efficient alternative solution. The core advantage of the RC architecture is that its hidden layer (i.e., the "reservoir") is a fixed, randomly generated nonlinear dynamic system, and the learning process is limited to training a linear output layer. This "training-free" feature greatly reduces the computational complexity, making it naturally suitable for processing time series data, and thus becoming a highly potential technology in the field of edge intelligence.
[0021] At the physical implementation level, reservoir computing exhibits excellent compatibility with a variety of hardware carriers, including analog electronic devices, spin electronic oscillators, and even biological organs, which are all aimed at building a high-energy-efficient, high-throughput non-Von Neumann computing architecture. However, the current physical implementation scheme still faces serious signal reading challenges. For example, biological organ-based reservoirs need to rely on a microelectrode array (MEA) with extremely complex structure for signal acquisition, and electronic device-based reservoirs generally rely on high-bit, high-precision analog-to-digital converters (ADCs). The expensive reading hardware and the inevitable floating-point operations in subsequent processing together constitute the main obstacle to the widespread application of RC technology.
[0022] Therefore, the two core challenges faced by the current physical reservoir scheme based on resistance-capacitance (RC) circuits are: first, the inherent contradiction between the simplicity of the hardware architecture and the non-linear ability required for computing; a simplified scheme, such as using pulse amplitude modulation (PAM) for signal driving, greatly reduces the hardware complexity, but its essential linear mapping characteristics are generally considered to be unable to meet the core requirement of reservoir computing for rich dynamic nonlinearity; on the contrary, introducing complex modulation techniques to enhance nonlinearity directly violates the design principle of low cost and low power consumption for edge applications. The second is the over-reliance of the system on high-precision hardware and floating-point operations. The existing scheme generally needs high-precision analog-to-digital converters (ADCs) for signal acquisition, and intensive floating-point operations in subsequent processing, which significantly increases hardware cost, system power consumption and memory occupation, constituting a key obstacle to the popularization and application of RC technology in resource-constrained edge computing fields.
[0023] In order to solve the problems existing in the prior art, the first embodiment of the present disclosure provides a recognition system based on a nonlinear physical reservoir, which is mainly used for recognizing image signals and / or voice signals, such as recognizing digital values contained in the signals, and of course the image signals can also be extended to complex types of clothes, letters, etc. The structural diagram of the recognition system based on the nonlinear physical reservoir of the present embodiment is shown in Figure 1 As shown, it mainly includes an encoding module 10, a reservoir network 20 and a linear regression network 30 coupled in sequence; wherein the encoding module 10 is used for pre-processing the input signal and encoding the pre-processed input signal to obtain a PAM encoded signal; the reservoir network 20 includes a resistance-capacitance circuit 21 and a digital-to-analog converter 22, the PAM encoded signal is input into the resistance-capacitance circuit 21, and the capacitance voltage in the resistance-capacitance circuit 21 is collected, and the capacitance voltage is non-linearly quantized through the digital-to-analog converter 22 to obtain an output signal; the linear regression network 30 is used for outputting a recognition result according to the output signal.
[0024] Specifically, the encoding module 10 can be a microprocessor with data processing and signal encoding functions, mainly used to convert the input signals into encoded signals through a specific processing manner, so as to facilitate the signal mapping of the storage network 20 and capture the correlation between the input signals. In the embodiment, after receiving the image or voice signal input by the user, the encoding module 10 first pre-processes the input signal. In the case of an image signal, the encoding module 10 performs image shaping and / or masking processing on the image signal, converts the image signal into a specific size and each pixel value of the pixel is within a specific pixel value range, and then splices the processed image signal to form a one-dimensional input signal; in the case of a voice signal, the encoding module 10 performs MFCC feature extraction on the voice signal to obtain a frequency domain matrix of the voice signal to represent the frequency domain features of the voice signal, and then flattens the frequency domain matrix along the time axis to form a one-dimensional input signal. After obtaining the one-dimensional input signal, it can be encoded into a PAM encoded signal with a preset period T according to the PAM encoding rule, the level width of the effective level in a single pulse period is limited to half of the preset period, and the pulse amplitude of the PAM signal is used to represent the intensity of the feature in the one-dimensional input signal. In a preferred embodiment, the preset period T is 1 ms, and the effective level width is 0.5 ms, and the amplitude of the effective level is between 0V and 3.3V.
[0025] The resistance-capacitance circuit 21 refers to a circuit composed of a single resistance and a capacitance in series, which is the core element of the physical storage, and provides short-term memory using the charging and discharging behavior of the capacitance. After the encoding module 10 determines the one-dimensional input signal, it is input to the input end of the resistance-capacitance circuit, and the mapping of the input signal is realized by collecting the capacitance voltage. Specifically, the end time of each pulse period in the PAM encoded signal is selected as a virtual node, and the capacitance press at all virtual nodes is determined, which can be determined according to the following formula:
[0026] wherein, represents the size of the capacitance voltage read at the virtual node, represents the size of the input voltage, represents the time of a single pulse period, represents the duration of the effective level in a single pulse period, represents a time parameter determined by the hardware parameters of the resistance-capacitance circuit, and the calculation method R is the resistance, and C is the capacitance.
[0027] After the resistance-capacitance circuit 21 outputs the capacitance voltage values at each virtual node, the analog-to-digital converter 22 is used to perform analog-to-digital conversion on the capacitance voltage values, and the quantization results of each capacitance voltage value are output as the output signals of the reservoir network. In this embodiment, the analog-to-digital conversion is performed by a low-resolution range of the analog-to-digital converter 22, specifically, a 4-bit digital signal quantization is implemented to introduce non-linear mapping to the output results of the linear resistance-capacitance circuit 21. In actual implementation, the quantization effect of the low-resolution analog-to-digital converter is converted into the non-linear source required for reservoir computing. In theory, an ideal ADC is a linear device, and its digital output is proportional to the analog input. However, in actual application, the quantization steps of a low-bit ADC (such as a 4-bit ADC) are very rough, which can introduce significant quantization non-linearity. This embodiment does not regard this as an error, but as an intrinsic and additional computing resource that does not require additional hardware. Through this non-linear reading mechanism, combined with the inherent short-term memory characteristics of the resistance-capacitance circuit itself, the reservoir network successfully meets the two basic requirements of "memory" and "non-linearity" for reservoir computing, thereby constructing a highly efficient and minimalist physical reservoir.
[0028] In actual selection of the analog-to-digital converter 22, a 4-bit analog-to-digital converter or an 8-bit analog-to-digital converter is preferably used. A too high resolution of the analog-to-digital converter will not only increase the construction cost, but also affect the degradation of non-linearity. It should be noted that the analog-to-digital converter 22 in this embodiment only needs to output a 4-bit result when an 8-bit analog-to-digital converter is used, to ensure the best balance between non-linearity and information fidelity. The quantization steps are fine enough to retain the core features and rough enough to introduce strong and deterministic quantization non-linearity. Weak capacitance voltage fluctuations are effectively filtered out or merged, while strong voltage responses caused by key features are clearly retained and separated. This mechanism not only injects valuable non-linearity into the system, but also enhances the sparsity of the reservoir state, ultimately generating rich and easily linearly separated feature representations, thereby greatly improving the classification performance. If the resolution is increased to 6 bits or 8 bits, the transfer function of the analog-to-digital converter becomes increasingly close to the ideal linear relationship, and its output is almost a direct copy of the RC circuit response. This linear and predictable response cannot effectively map the input information to the high-dimensional feature space required to solve complex problems, thereby weakening the computing power of the reservoir.
[0029] In addition to being a non-linear computing engine, the 4-bit output method of this embodiment also has significant computing and storage advantages. The small signal output after quantization by the analog-to-digital converter 22 contains a large number of zero values. This intrinsic sparsity means that a large number of multiplication operations can be directly skipped during subsequent linear regression network training and inference processes, thereby further reducing the computational complexity and power consumption at the algorithm level, which is crucial for resource-constrained edge devices.
[0030] After the reservoir network 20 outputs the quantization results at each virtual node, the linear regression network 30 performs matrix operations on the output results of the reservoir network 20 based on the trained weight matrix, and determines the label value of the results. The recognition result can be determined according to the label value. The weight matrix in the embodiment is trained based on the labeled sample signals. When image recognition is needed, the labeled sample signals can directly use corresponding clear digital images, or come from a handwritten digit set (MNIST, Mixed National Institute of Standards and Technology database), a handwritten letter set (E-MNIST, an extension of MNIST to handwritten letters), a clothing data set (Fashion-MNIST, a Novel Image Dataset for Benchmarking Machine Learning Algorithms), etc. When voice recognition is needed, a free spoken digit data set (FSDD, Free Spoken Digit Dataset) can be used as a voice sample. The FSDD contains 3000 voice samples of digits 0-9 with a sampling rate of 8 kHz, and the audio waveforms are standardized before training: samples longer than 750 ms are truncated, and those shorter than 750 ms are zero-padded to ensure that all input sequences have the same length. Then, each audio waveform is preprocessed by MFCC, and finally flattened to form a one-dimensional sample signal required for training.
[0031] The training method of the weight matrix is to train the weight matrix by linear regression, for example, by least squares method, or other training methods with the same function, such as ridge regression, etc. Formula (2) shows the calculation formula for calculating the weight matrix by linear regression:
[0032] wherein, represents the matrix output by all sample signals after passing through the reservoir network, i.e., the quantization matrix output by the analog-to-digital converter, and the superscript represents the transpose of the matrix, and the superscript represents the pseudo-inverse of the matrix, is the label value matrix after one-hot encoding, and the weight matrix is
[0033] This embodiment uses a digital-to-analog converter as the core computing unit. Its quantization ladder is both fine enough to preserve core features and coarse enough to introduce strong, deterministic quantization nonlinearity. This effectively filters out or merges weak capacitor voltage fluctuations, while clearly preserving and separating strong voltage responses caused by key features. This effectively enhances the sparsity of the reservoir network, ensuring the performance of identification using physical reservoirs. At the same time, it solves the problem of dependence on complex hardware for physical reservoirs, achieving resource conservation at both the hardware and algorithm levels.
[0034] The following is combined Figures 2 to 5 The implementation process of speech recognition using the recognition system in this embodiment is illustrated through simulation examples.
[0035] Figure 2 The diagram shows a waveform representation of a random sample from the FSDD dataset, which contains audio files of the numbers 0 to 9 read aloud by different speakers. Figure 2 Each image in the diagram represents a specific digital audio file. The original audio signal is then processed using Mel-frequency cepstral coefficients (MFCC), followed by masking of the MFCC-processed matrix, and finally modulated to form a PAM-coded signal, as shown below. Figure 3 As shown. Figure 4 This embodiment shows a conceptual representation of the identification system, in which a resistor-capacitor circuit and an analog-to-digital converter form a... Figure 4 In the reservoir network, the PAM encoded signal is input into the reservoir network, processed by the resistor-capacitor circuit and quantized by the analog-to-digital converter. The output signal is then processed by the weight matrix to obtain the corresponding tag value. Finally, the recognition result is determined based on the tag value. Figure 5 The diagram shows the recognition accuracy for the FSDD test set at different resolutions, from... Figure 5 As demonstrated, at 2-bit resolution, the overly coarse quantization ladder (only 4 levels) fails to capture the effective dynamics of the input signal, resulting in the complete destruction of key feature information and a sharp drop in recognition accuracy to 10%. When the resolution increases to 6-bit, 8-bit, and above, the ADC's transfer function increasingly approximates the ideal linear relationship, and its output is almost a direct replication of the RC circuit response. This linear, predictable response cannot effectively map the input information to the high-dimensional feature space required to solve complex problems, thereby weakening the reservoir's computational power and causing the accuracy to drop from its peak. The performance peak (86% accuracy) of this embodiment occurs with a 4-bit ADC, representing the optimal balance between nonlinearity and information fidelity.
[0036] Based on the same inventive concept, the second embodiment of this disclosure provides an identification method based on a nonlinear physical reservoir, mainly applied to the identification system provided in the first embodiment of this disclosure. The flowchart of this method is as follows: Figure 6 As shown, the main steps include the following: S10, receiving an input signal by the encoding module, pre-processing the input signal, and encoding the pre-processed input signal to obtain a PAM encoded signal.
[0037] Specifically, the input signal of the embodiment includes an image signal and a voice signal. In the case of an image signal, the pre-processing of the input signal by the encoding module includes image shaping and / or mask processing of the image signal, and splicing the processed image signal into a one-dimensional input signal; in the case of a voice signal, the pre-processing of the input signal by the encoding module includes MFCC feature extraction of the voice signal to obtain a frequency domain matrix of the voice signal, and unfolding the frequency domain matrix into a one-dimensional input signal along the time axis.
[0038] Further, the one-dimensional input signal is encoded by the encoding module into a PAM encoded signal with a preset period, the effective level width of the PAM encoded signal is half of the preset period, and the amplitude of the effective level is positively correlated with the feature strength of the one-dimensional input signal.
[0039] S20, inputting the PAM encoded signal into the resistance-capacitance circuit of the reservoir network, and collecting the capacitance voltage in the resistance-capacitance circuit.
[0040] Specifically, the PAM encoded signal is input into the resistance-capacitance circuit, and the end time of each pulse period in the PAM encoded signal is selected as a virtual node to determine the capacitance voltage at all virtual nodes; the capacitance voltage at the virtual node is determined based on the following formula:
[0041] wherein, represents the size of the capacitance voltage read at the virtual node, represents the size of the input voltage, represents the time of a single pulse period, represents the duration of the effective level in a single pulse period.
[0042] S30, non-linear quantization of the capacitance voltage by the digital-to-analog converter of the reservoir network to obtain an output signal.
[0043] Specifically, the capacitance voltage at all virtual nodes is quantized by the digital-to-analog converter to 4 bits, and the quantization result corresponding to each capacitance voltage is output, and the digital-to-analog converter can be a 4-bit analog-to-digital converter or an 8-bit analog-to-digital converter.
[0044] S40, calling the linear regression network to output the recognition result of the output signal.
[0045] Finally, the quantization results at all virtual nodes are subjected to matrix operation with the trained weight matrix to determine the label value of the result, and the recognition result is determined according to the label value, and the formula is:
[0046] wherein, represents the matrix output by all sample signals after the reservoir network, that is, the quantization matrix output by the analog-to-digital converter, and the superscript represents the transpose of the matrix, and the superscript represents the pseudo-inverse of the matrix, is the label value matrix after one-hot encoding, and the weight matrix is obtained based on the labeled sample signals.
[0047] In this embodiment, the digital-to-analog converter is taken as the core computing unit, and the quantization ladder is both fine enough to retain the key features and rough enough to introduce strong and deterministic quantization nonlinearity, so that weak capacitance voltage fluctuations are effectively filtered out or merged, while strong voltage corresponding to key features is clearly retained and separated, the sparsity of the reservoir network is effectively enhanced, the performance of identification using the physical reservoir is ensured, and the dependence of the physical reservoir on complex hardware is solved, and the resource saving is realized at both hardware and algorithm levels.
[0048] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present disclosure, but not to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present disclosure.
Claims
1. A recognition system based on a nonlinear physical reservoir, characterized in that, The system comprises an encoding module, a reservoir network and a linear regression network, wherein: the encoding module is configured to preprocess an input signal and encode the preprocessed input signal to obtain a PAM encoded signal; the reservoir network comprises a resistor-capacitor circuit and a digital-to-analog converter, the PAM encoded signal is input into the resistor-capacitor circuit, the capacitor voltage in the resistor-capacitor circuit is collected, the capacitor voltage is nonlinearly quantized by the digital-to-analog converter to obtain an output signal; the linear regression network is configured to output a recognition result according to the output signal. The input signal comprises an image signal and a voice signal.
2. The identification system based on a nonlinear physical reservoir according to claim 1, characterized in that, The encoding module is specifically configured to:
3. The identification system based on a non-linear physical reservoir according to claim 2, characterized in that, in the case that the input signal is an image signal, the preprocessing of the input signal by the encoding module comprises image shaping processing and / or mask processing on the image signal, and the processed image signal is spliced into a one-dimensional input signal; in the case that the input signal is a voice signal, the preprocessing of the input signal by the encoding module comprises MFCC feature extraction on the voice signal to obtain a frequency domain matrix of the voice signal, and the frequency domain matrix is unfolded into a one-dimensional input signal along a time axis. The encoding module is specifically configured to encode the one-dimensional input signal into a PAM encoded signal with a preset period, the effective level width of the PAM encoded signal is half of the preset period, and the amplitude of the effective level is positively correlated with the feature intensity of the one-dimensional input signal.
4. The identification system based on a non-linear physical reservoir according to claim 3, characterized in that, The reservoir network is specifically configured to:
5. The identification system based on a non-linear physical reservoir according to claim 4, characterized in that, input the PAM encoded signal into the resistor-capacitor circuit, select the end time of each pulse period in the PAM encoded signal as a virtual node, and determine the capacitor voltage at all the virtual nodes; based on the digital-to-analog converter, quantize the capacitor voltage at all the virtual nodes by 4 bits to output the quantization result corresponding to each capacitor voltage. The capacitor voltage at the virtual node is determined based on the following formula:
6. The identification system based on a non-linear physical reservoir according to claim 5, characterized in that, The digital-to-analog converter is a 4-bit or 8-bit analog-to-digital converter. wherein, represents the magnitude of the capacitive voltage read at the virtual node, represents the magnitude of the input voltage, represents the time of a single pulse period, represents the duration of the active level in a single pulse period.
7. The non-linear physical reservoir based identification system of claim 5, wherein, The linear regression network is specifically configured to:
8. The non-linear physical reservoir based identification system of claim 5, wherein, perform matrix operation on the quantization results at all the virtual nodes and a trained weight matrix to determine the label value of the result, and determine the recognition result according to the label value. The weight matrix is trained based on a labeled sample signal.
9. The identification system based on a non-linear physical reservoir according to claim 8, characterized in that, The method is used for the system of any one of claims 1 to 9, and specifically comprises:
10. A method of identification based on a nonlinear physical reservoir, characterized in that, receiving an input signal by an encoding module, preprocessing the input signal, and encoding the preprocessed input signal to obtain a PAM encoded signal; inputting the PAM encoded signal into a resistor-capacitor circuit of a reservoir network, and collecting the capacitor voltage in the resistor-capacitor circuit; nonlinearly quantizing the capacitor voltage by a digital-to-analog converter of the reservoir network to obtain an output signal; calling a linear regression network to output a recognition result.