Traffic shaping method, system, storage medium and electronic device for axi bus

By collecting traffic data in real time on the AXI bus, using LSTM to predict future trends and combining reinforcement learning algorithms to optimize weight allocation, the problem of uneven resource allocation in heterogeneous SoCs is solved, achieving a balance between low latency, high bandwidth utilization and fairness, and improving system performance.

CN121462511BActive Publication Date: 2026-04-10SHENZHEN WEIXUN TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHENZHEN WEIXUN TECH CO LTD
Filing Date
2026-01-06
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing AXI bus arbitration and scheduling schemes are difficult to simultaneously satisfy low latency, high bandwidth utilization and fairness in heterogeneous SoCs, resulting in limited overall system performance.

Method used

By collecting AXI bus traffic performance data in real time, using long short-term memory networks to predict future traffic trends, and combining reinforcement learning algorithms to calculate weight adjustment strategies, the allocation of bus resources is dynamically optimized to achieve real-time traffic shaping.

Benefits of technology

While ensuring the real-time performance of critical tasks, it improves bus bandwidth utilization efficiency and overall system performance, and optimizes resource allocation for heterogeneous SoCs.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The application discloses an AXI bus traffic shaping method, a system, a storage medium and an electronic device, wherein the AXI bus traffic shaping method comprises the following steps: collecting traffic performance data of each master device on an AXI bus in real time to obtain a real-time monitoring data set; predicting the traffic trend of each master device in a future time window through a long short-term memory network based on the real-time monitoring data set to obtain a prediction result; calculating a weight adjustment strategy of each master device through a reinforcement learning algorithm according to the prediction result and the real-time monitoring data set to obtain a decision instruction; and performing real-time traffic shaping control on the AXI bus according to the decision instruction. The application can improve the bus bandwidth utilization efficiency and the overall system performance on the premise of guaranteeing the real-time performance of key tasks.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of system on chip bus management, and particularly relate to an AXI bus traffic shaping method and system, a storage medium and an electronic device. BACKGROUND

[0002] With the evolution of semiconductor technology and the diversification of computing needs, system on chip (SoC) is developing towards highly heterogeneous integration. On a single chip, in addition to the traditional central processing unit (CPU), various computing units such as graphics processing unit (GPU), neural processing unit (NPU) and digital signal processor (DSP) are also widely integrated. These master devices exhibit diverse and dynamic traffic characteristics on the advanced eXtensible interface bus (AXI), for example, the CPU usually initiates short transactions that are extremely sensitive to delay, while the GPU and artificial intelligence accelerator tend to initiate high-bandwidth, long-burst data transmission. The competition of such heterogeneous traffic on shared bus resources has become a key bottleneck restricting the overall performance, energy efficiency and real-time performance of the system.

[0003] To manage bus resources, the industry has proposed various arbitration and scheduling schemes, such as fixed priority, polling, time division multiple access (TDMA) and lottery arbitration, but their limitations lie in the widespread use of static, passive reaction or simple heuristic control mechanisms. For example, fixed priority arbitration is prone to "starvation" of low priority devices and priority inversion; polling mechanism, although pursuing fairness, is "blind" to real-time needs and unfriendly to delay-sensitive tasks; the static time slice allocation of TDMA is inefficient under burst traffic; and dynamic schemes such as lottery arbitration also lack the ability to predict future loads.

[0004] Therefore, the current schemes all make decisions after contention occurs, making it difficult to meet the problems of low delay, high bandwidth utilization and fairness in heterogeneous SoC at the same time. SUMMARY

[0005] Embodiments of the present application provide an AXI bus traffic shaping method and system, a storage medium and an electronic device, which can improve bus bandwidth utilization efficiency and overall system performance while ensuring the real-time performance of critical tasks.

[0006] In a first aspect, an AXI bus traffic shaping method is provided, comprising:

[0007] Real-time traffic performance data of each master device on the AXI bus is collected to obtain a real-time monitoring data set;

[0008] Based on the real-time monitoring data set, a long short-term memory network is used to predict the traffic trend of each master device in a future time window to obtain a prediction result;

[0009] According to the prediction result and the real-time monitoring data set, a reinforcement learning algorithm is used to calculate a weight adjustment strategy of each master device to obtain a decision instruction;

[0010] According to the decision instruction, real-time traffic shaping control is performed on the AXI bus.

[0011] In the AXI bus traffic shaping method provided in the embodiments of the present application, based on the real-time monitoring data set, a long short-term memory network is used to predict the traffic trend of each master device in a future time window to obtain a prediction result, comprising:

[0012] The real-time monitoring data and the historical hidden state vector are spliced to form an input vector;

[0013] The input vector is input into the long short-term memory network, and the current hidden state vector of the long short-term memory network is calculated through matrix multiplication and a nonlinear activation function;

[0014] The current hidden state is fully connected to output the traffic trend of each master device in the future time window to obtain the prediction result.

[0015] In the AXI bus traffic shaping method provided in the embodiments of the present application, the current hidden state vector of the long short-term memory network is calculated through matrix multiplication and a nonlinear activation function, comprising:

[0016] The input vector is multiplied by a preset weight matrix, and the calculation result is added to a bias vector to obtain a forget gate linear result, an input gate linear result, a candidate cell state linear result, and an output gate linear result;

[0017] The forget gate linear result, the input gate linear result, the candidate cell state linear result, and the output gate linear are nonlinearly activated to obtain a forget gate activation value, an input gate activation value, an output gate activation value, and a candidate cell state activation value;

[0018] The current hidden state vector of the long short-term memory network is calculated based on the forget gate activation value, the input gate activation value, the output gate activation value, and the candidate cell state activation value.

[0019] In the traffic shaping method of the AXI bus provided in the embodiments of the present application, the current hidden state vector of the long short-term memory network is calculated based on the forgetting gate activation value, the input gate activation value, the output gate activation value and the candidate cell state activation value, comprising:

[0020] The forgetting gate activation value is multiplied by a historical cell state to obtain a first product;

[0021] The input gate activation value is multiplied by the candidate cell state activation value to obtain a second product;

[0022] The first product and the second product are added to obtain a current cell state;

[0023] The current cell state is subjected to hyperbolic tangent activation, and the activation result is multiplied by the output gate activation value to obtain the current hidden state vector of the long short-term memory network.

[0024] In the traffic shaping method of the AXI bus provided in the embodiments of the present application, the weight adjustment strategy of each master device is calculated by an reinforcement learning algorithm according to the prediction result and the real-time monitoring data set to obtain a decision instruction, comprising:

[0025] The traffic performance data in the prediction result and the real-time monitoring data set are respectively subjected to discrete quantization processing to generate a state level of each master device;

[0026] The state level of each master device is spliced with a corresponding device identifier to generate a decision query index;

[0027] The decision query index is used to query a preset Q value table to obtain Q values corresponding to different adjustment actions in the current state;

[0028] Based on the Q values, a target weight adjustment action is selected according to a preset strategy to generate a decision instruction for controlling traffic shaping.

[0029] In the traffic shaping method of the AXI bus provided in the embodiments of the present application, the AXI bus is subjected to real-time traffic shaping control according to the decision instruction, comprising:

[0030] The decision instruction is parsed to obtain a priority weight adjustment value for each master device;

[0031] The current bandwidth weight of each master device is dynamically updated according to the priority weight adjustment value;

[0032] At least one bus traffic shaping action is generated and executed according to the current bandwidth weight to adjust transaction transmission of the corresponding master device on the AXI bus.

[0033] In the AXI bus traffic shaping method provided by the embodiments of the present application, the bus traffic shaping action includes a gating action.

[0034] According to the current bandwidth weight, at least one bus traffic shaping action is generated and executed to adjust the transaction transmission of the master device on the AXI bus, including:

[0035] The current bandwidth weight is compared with a preset gating threshold, and a gating signal is generated according to the comparison result to allow or block the transaction request of the corresponding master device.

[0036] In a second aspect, the embodiments of the present application provide an AXI bus traffic shaping system, comprising:

[0037] A monitoring module is configured to collect traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set.

[0038] A prediction module is configured to predict the traffic trend of each master device in a future time window based on the real-time monitoring data set through a long short-term memory network to obtain a prediction result.

[0039] A decision module is configured to calculate a weight adjustment strategy of each master device through a reinforcement learning algorithm according to the prediction result and the real-time monitoring data set to obtain a decision instruction.

[0040] A shaping module is configured to perform real-time traffic shaping control on the AXI bus according to the decision instruction.

[0041] In a third aspect, the present application provides a storage medium, which stores a plurality of instructions, and the instructions are adapted to be loaded by a processor to execute the AXI bus traffic shaping method of any one of the above aspects.

[0042] In a fourth aspect, the present application provides an electronic device, which comprises a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the AXI bus traffic shaping method of any one of the above aspects when executing the computer program.

[0043] In summary, the traffic shaping method of the AXI bus provided in the embodiments of the present application comprises collecting traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set; based on the real-time monitoring data set, predicting a traffic trend of each master device in a future time window through a long short-term memory network to obtain a prediction result; according to the prediction result and the real-time monitoring data set, calculating a weight adjustment strategy of each master device through a reinforcement learning algorithm to obtain a decision instruction; and performing real-time traffic shaping control on the AXI bus according to the decision instruction. The embodiments of the present application can improve the bus bandwidth utilization efficiency and the overall system performance on the premise of guaranteeing the real-time performance of key tasks. BRIEF DESCRIPTION OF DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0045] Figure 1 is an application scenario diagram of the traffic shaping method of the AXI bus provided in the embodiments of the present application.

[0046] Figure 2 is a flowchart of the traffic shaping method of the AXI bus provided in the embodiments of the present application.

[0047] Figure 3 is a structure diagram of the prediction module provided in the embodiments of the present application.

[0048] Figure 4 is a structure diagram of the decision module provided in the embodiments of the present application.

[0049] Figure 5 is a structure diagram of the traffic shaping system of the AXI bus provided in the embodiments of the present application.

[0050] Figure 6 is a structure diagram of the electronic device provided in the embodiments of the present application. DETAILED DESCRIPTION

[0051] The exemplary embodiments will be described in detail herein with reference to the drawings. Unless otherwise indicated, the same numbers on the different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments are not meant to represent all implementations in which one can practice the present application. Rather, they are merely examples of systems and methods in which one can practice the present application as detailed in the attached claims.

[0052] It should be noted that the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element. Like terms are to be construed as having the same meaning, unless the context requires otherwise.

[0053] It should be understood that the specific embodiments described herein merely exemplify the application and should not be considered as limiting the application.

[0054] In the following description, suffixes used for elements, such as "module", "part", or "unit", are used only in order to facilitate the explanation for the application, and are not intended to have specific meanings or roles. Therefore, "module", "part", or "unit" can be mixedly used.

[0055] In the description of the application, it should be noted that the terms "upper", "lower", "left", "right", "inner", "outer", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are merely used to facilitate the description of the application and simplify the description, and do not indicate or imply that the systems or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the application. In addition, the terms "first", "second", and the like are used only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0056] To manage bus resources, various arbitration and scheduling schemes have been proposed in the industry, such as fixed priority, polling, TDMA, and lottery arbitration, but their limitations lie in the widespread use of static, passive reaction or simple heuristic control mechanisms. For example, fixed priority arbitration is prone to "starvation" of low priority devices and priority inversion; polling mechanism, although pursuing fairness, is "blind" to real-time needs and is not friendly to delay-sensitive tasks; the static time slice allocation of TDMA is inefficient under burst traffic; and dynamic schemes such as lottery arbitration also lack the ability to predict future loads.

[0057] Therefore, the current schemes all make decisions after contention occurs, making it difficult to simultaneously meet the problems of low delay, high bandwidth utilization, and fairness in heterogeneous SoC.

[0058] Based on this, the embodiment of the application provides a traffic shaping method and system of an AXI bus, a storage medium and an electronic device. Specifically, the traffic shaping system of the AXI bus can be integrated in an electronic device. The electronic device can be a server or a terminal device. The terminal device can include a mobile phone, a wearable smart device, a tablet computer, a notebook computer, a personal computer (PC), and other computers and auxiliary devices. The server can be a single server or a server cluster composed of multiple servers. The server can be a physical server or a virtual server.

[0059] For example, as shown in Figure 1 The electronic device can collect traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set. Based on the real-time monitoring data set, the traffic trend of each master device in a future time window is predicted through a long short-term memory (LSTM) network to obtain a prediction result. According to the prediction result and the real-time monitoring data set, a weight adjustment strategy of each master device is calculated through a reinforcement learning algorithm to obtain a decision instruction. According to the decision instruction, real-time traffic shaping control is performed on the AXI bus.

[0060] The technical solutions shown in the application will be described in detail below through specific embodiments. It should be noted that the order of the following embodiments is not limited to the priority order of the embodiments.

[0061] Please refer to Figure 2 , Figure 2 is a flowchart of the traffic shaping method of the AXI bus provided by the embodiment of the application. The specific process of the traffic shaping method of the AXI bus can be as follows:

[0062] 101, real-time collection of traffic performance data of each master device on the AXI bus to obtain a real-time monitoring data set.

[0063] In this embodiment, through the monitor hardware circuit integrated in the interface of each master device, the traffic performance data is collected in real time in each configurable time window. Specifically, for each master device (such as CPU, GPU, NPU), the collected data includes but is not limited to request rate, average delay, and burst length distribution. The collection method can be as follows:

[0064] Among them, the request rate: for each master device, a counter is used to count the number of successful handshake requests req_cnt in the current time window T (unit: ns). The request rate req_rate can be calculated by the formula req_rate= req_cnt / T.

[0065] Average latency: latency measurement is implemented with a timestamp counter and a first-in-first-out memory (FIFO). When a request (AW / AR channel) handshake is successful, the current timestamp t_s is written into the FIFO. When the corresponding response (AR channel corresponding to the final read data (RLAST) or AW channel corresponding to the write response (B channel)) handshake is successful, the timestamp t_s stored in the FIFO is read and the current timestamp t_e is recorded. The single latency latency_single = t_e - t_s (timestamp rollover needs to be processed). The average latency latency_avg in a time window is calculated by the formula latency_avg = Σ (latency_single) / req_cnt. Where the timestamp counter bit width is 32 bits, which can be increased or trimmed according to actual needs.

[0066] Burst length distribution: when the AW / AR channel request handshake is successful, record its burst length burst_len, and distribute the statistics according to the preset interval (for example, 0-3, 4-7, 8-15, 16-255) in the current time window, and calculate the average burst length.

[0067] It can be understood that the traffic performance data of all master devices is aggregated at the end of each time window, that is, the real-time monitoring data set can be formed.

[0068] 102、Based on the real-time monitoring data set, the traffic trend of each master device in the future time window is predicted by a long short-term memory network, and a prediction result is obtained.

[0069] The embodiment can be completed by a hardware-implemented prediction module (Prediction Module). The purpose is to infer the load change of each master device in the future time window (i.e. the next time window of the current time window) according to the historical traffic pattern. The specific implementation process follows the forward calculation principle of LSTM and is optimized for hardware implementation, which can include the following steps:

[0070] 1021、Splice the real-time monitoring data and the historical hidden state vector to form an input vector.

[0071] Specifically, the prediction module receives real-time monitoring datasets from the monitoring module. For each master device, it extracts traffic performance data for the current time window, including request rate (req_rate), average latency (latency_avg), and burst length distribution (burst_len_feature). These three traffic performance data together constitute the initial input vector x_t. Simultaneously, it reads the historical hidden state vector h_{t-1} generated from the previous time window (i.e., the previous time window) from the status register corresponding to the master device. The initial input vector x_t and the historical hidden state vector h_{t-1} are concatenated along the vector dimension to form the LSTM input vector Zconcat for the current time window.

[0072] That is, Zconcat = [h_{t-1}; x_t]; for example, assuming the dimension of the hidden state vector is 16 (d_hidden= 16) and the dimension of the initial input vector is 3 (d_in = 3), then the dimension of the input vector Zconcat is 19×1.

[0073] 1022. Input the input vector into the Long Short-Term Memory network, and calculate the current hidden state vector of the Long Short-Term Memory network through matrix multiplication and nonlinear activation function.

[0074] This embodiment can be completed in hardware through time-division multiplexing using dedicated computing circuits (such as the matrix multiplication unit MM and the activation module Activation). Specifically, it can be as follows:

[0075] 1022a. Multiply the input vector by the preset weight matrix and add the calculation result to the bias vector to obtain the linear results of the forget gate, the linear results of the input gate, the linear results of the candidate cell state, and the linear results of the output gate.

[0076] In practice, the input vector Zconcat can be multiplied by a pre-trained weight matrix W stored in the weight RAM, and then a similarly pre-defined bias vector B can be added. This operation can be represented by the formula Z = W·Zconcat + B.

[0077] wherein the dimension of the preset weight matrix W is [4*d_hidden, (d_hidden + d_in)], which is [64, 19] in this embodiment, and the weight matrix W is horizontally spliced by the input weight matrix W_x and the hidden weight matrix W_h. The dimension of the bias vector B is [4*d_hidden, 1], i.e., [64, 1]. The result Z of the linear transformation (dimension [64, 1]) contains the linear combination of four parts, which correspond to the four gate and state calculation units of the LSTM, i.e., the linear result of the forget gate Z_f, the linear result of the input gate Z_i, the linear result of the candidate cell state Z_c, and the linear result of the output gate Z_o. The dimension of each part is [d_hidden, 1], i.e., [16, 1].

[0078] 1022b, performing nonlinear activation on the linear results of the forget gate, the input gate, the candidate cell state, and the output gate to obtain the activation values of the forget gate, the input gate, the output gate, and the candidate cell state.

[0079] Specifically, a nonlinear activation function can be applied to each of the above four linear results to convert them into gate values and candidate values between 0-1 or -1-1.

[0080] For example, the Sigmoid (σ) function is applied to Z_f to obtain the activation value of the forget gate f_t=σ(Z_f).

[0081] The Sigmoid (σ) function is applied to Z_i to obtain the activation value of the input gate i_t=σ(Z_i).

[0082] The hyperbolic tangent (tanh) function is applied to Z_c to obtain the activation value of the candidate cell state \overline{C}_t=tanh(Z_c).

[0083] The Sigmoid (σ) function is applied to Z_o to obtain the activation value of the output gate o_t=σ(Z_o).

[0084] In hardware implementation, the Sigmoid function and the tanh function can be efficiently implemented by a lookup table (LUT) or a piecewise linear approximation circuit.

[0085] That is, the step 1022b can specifically be to perform sigmoid activation on the linear results of the forget gate, the input gate, and the output gate to obtain the activation values of the forget gate, the input gate, and the output gate. The hyperbolic tangent activation is performed on the linear result of the candidate cell state to obtain the activation value of the candidate cell state.

[0086] 1022c. Calculate the current hidden state vector of the long short-term memory network based on the forget gate activation value, the input gate activation value, the output gate activation value, and the candidate cell state activation value.

[0087] In this embodiment, the internal memory state of the LSTM can be updated and the current hidden state vector can be calculated according to the four activation values described above.

[0088] First, the historical cell state C_{t-1} of the historical time window can be read from the register. Then, the forget gate activation value f_t is multiplied element by element (Hadamard product) with the historical cell state C_{t-1} to obtain a first product: f_t C_{t-1}. The input gate activation value i_t is multiplied element by element with the candidate cell state activation value \overline{C}_t to obtain a second product: i_t \overline{C}_t. The first product and the second product are added to obtain the current cell state C_t: C_t=f_t C_{t-1}+i_t \overline{C}_t. The current cell state C_t is activated by applying a hyperbolic tangent (tanh) function. Finally, the activation result after the tanh activation is multiplied element by element with the output gate activation value o_t to finally obtain the current hidden state vector h_t of the LSTM: h_t=o_t tanh(C_t).

[0089] That is, the step 1022c can specifically be: multiplying the forget gate activation value with the historical cell state to obtain a first product; multiplying the input gate activation value with the candidate cell state activation value to obtain a second product; adding the first product and the second product to obtain the current cell state; activating the current cell state by a hyperbolic tangent and multiplying the activation result with the output gate activation value to obtain the current hidden state vector of the long short-term memory network.

[0090] It can be understood that after the calculation is completed, the current cell state C_t and the current hidden state vector h_t can be written to the corresponding register as the historical state of the next time window.

[0091] 1023. Perform a fully connected calculation on the current hidden state to output the traffic trend of each master device in the future time window to obtain a prediction result.

[0092] Specifically, the current hidden state vector h_t (dimension [16, 1]) can be input to a fully connected output layer. The fully connected output layer can be calculated by an output weight matrix W_out (dimension [3, 16], corresponding to the predicted three targets: request rate trend, delay trend, burst length trend) to map the high-dimensional hidden state to a low-dimensional prediction vector. Specifically, the following can be used:

[0093] Prediction_Output = W_out · h_t + b_out (b_out is the output layer bias).

[0094] The final prediction result (for example, in the form of a fixed-point number S1.7) represents the traffic trend of the master device in the future time window.

[0095] In some embodiments, the structure of the prediction module implementing the present embodiment can be as shown in Figure 3 The prediction module can include the following modules:

[0096] The weight parameter storage module (weight_ram) is used to store all weight parameters required for long short-term memory network calculation, including the input weight matrix W_x, the hidden weight matrix W_h, the fully connected weight matrix W_con, the output weight matrix W_out, and the bias vector B. These weight parameters can be pre-written into static random access memory (SRAM) through a configuration interface. The weight parameters are stored independently by the master device (CPU, GPU, NPU), and each master device has a set of independent weight parameters to adapt to its unique traffic pattern. The data types and fixed-point formats of the weight parameters comply with the provisions of Table 1 as shown below, for example, the input weight matrix W_x and the hidden weight matrix W_h are stored in the SRAM in the signed fixed-point number format S2.14 (2-bit integer, 14-bit decimal).

[0097] The matrix operation module (MM) is responsible for performing all matrix multiplication operations, including the calculation of Z = W · Zconcat + B in step 1022a. The module contains a simple scheduler inside: when the matrix operation of one master device is completed, the operation of the next master device is started immediately, until all master devices (such as CPU, GPU, NPU) are calculated. This time-division multiplexing mechanism can make a single matrix operation module efficiently serve multiple master devices.

[0098] Activation: used to implement the nonlinear activation function calculation in step 1022b, including Sigmoid function and hyperbolic tangent (tanh) function. The activation operation module can be implemented in two ways: lookup table (LUT) or piecewise linear approximation. The lookup table method is fast but occupies more RAM resources; the piecewise linear approximation method occupies less resources but is slightly slower in calculation. The choice of specific implementation depends on the trade-off between accuracy and hardware resources of the system.

[0099] Update: used to perform cell state and hidden state update calculation in step 1022c. The update module receives the forget gate activation value f_t, the input gate activation value i_t, the candidate cell state activation value \overline{C}_t and the output gate activation value o_t output by the activation operation module, and the historical cell state C_{t-1} read from the internal register (Register, REG), and calculates the current cell state C_t and the current hidden state h_t according to the formula C_t = f_t C_{t-1} + i_t \overline{C}_t and h_t = o_t tanh(C_t) to obtain the current cell state C_t and the current hidden state h_t. After the calculation is completed, the current cell state C_t and the current hidden state h_t are written back to the internal REG and can be used as input parameters for subsequent matrix operations.

[0100] Output: used to complete the full connection calculation in step 1023. The output calculation module receives the current hidden state vector h_t output by the update module, performs matrix multiplication with the output weight matrix W_out (stored in the internal register, with the format S2.14), and adds the output layer bias to finally obtain the prediction result LSTM_O. The data format of LSTM_O is signed fixed-point number S1.7, representing the traffic trend of each master device in the future time window.

[0101] The above Table 1 is shown as follows:

[0102]

[0103] In a specific implementation, the matrix operation module (MM), the activation operation module (activation), the update module (update), and the output calculation module (output) are designed to be shared by multiple master devices (such as CPUs, GPUs, and NPUs) in time division multiplexing. For example, when the output calculation module is calculating the LSTM prediction result of the CPU, the matrix operation module, the activation operation module, and the update module can start the LSTM operation of the GPU in parallel, so as to realize calculation pipelining and improve hardware utilization. The time window can be independently set for each master device, or a same time window can be shared. In an embodiment, the three master devices can share a same time window, and in this case, the selection of the time window needs to be greater than the total time value required for the LSTM and subsequent Q-Learning operations of the three master devices to be completed in sequence, so as to ensure that all calculations in each time window can be completed.

[0104] 103. According to the prediction result and the real-time monitoring data set, the weight adjustment strategy of each master device is calculated by the reinforcement learning algorithm, and a decision instruction is obtained.

[0105] This embodiment is executed by a decision module (Decision Module). Based on the Q-Learning reinforcement learning algorithm, the decision module combines the prediction result from the prediction module with the traffic performance data in the real-time monitoring data set to dynamically generate an optimal bandwidth allocation strategy. The specific implementation process can be as follows:

[0106] 1031. The prediction result and the traffic performance data in the real-time monitoring data set are respectively discretized and quantized to generate the state level of each master device.

[0107] After the decision module receives the prediction result from the prediction module and the real-time monitoring data set (including Req_Rate, Lat_Avg, and Bw_Remain) from the monitoring module. First, the prediction result and the traffic performance data in the real-time monitoring data set can be discretized and quantized to map continuous or large-range values to limited state levels, so as to reduce the dimension of the state space and facilitate hardware implementation.

[0108] Specifically, first, the threshold comparison and mapping of the traffic performance data in the real-time monitoring data set can be performed. The threshold comparison and mapping of each traffic performance data can be as follows:

[0109] Request rate (Req_Rate): According to the first preset threshold interval in which the value falls, it is mapped to 4 levels, for example: 00 indicates that the load will decrease, 01 indicates that the load remains stable, 10 indicates that the load will slowly rise, and 11 indicates that the load will sharply rise.

[0110] Lat_Avg: mapped to "low", "medium", "high", "critical" according to the second preset threshold interval it falls into.

[0111] Bw_Remain: mapped to "sufficient", "tight", "exhausted" according to the third preset threshold interval it falls into.

[0112] Then, the predicted load trend (Predicted_load) is quantified and mapped to "falling", "stable", "rising" three levels.

[0113] It should be noted that req_rate, latency, Bw_Remain are real-time statistical values of the current time window, and Predicted_load is the load trend predicted by the prediction module based on the real-time values of the same time window. Therefore, before merging into the decision query index, they must correspond to the same time window, that is, they have a strict time correspondence. For multiple master devices (such as CPU, GPU, NPU), the data of each master device needs to be arranged independently and aligned by time window for separate processing.

[0114] 1032、Splice each state level with the corresponding device identifier to generate a decision query index.

[0115] In the embodiments of the present application, each master device has a unique device identifier (Master ID), for example: 00 represents CPU, 01 represents GPU, and 10 represents NPU.

[0116] By splicing the above-mentioned quantized state level and device identifier, a combined decision query index (State) can be formed. For example, splice the request rate (2 bits), average delay (2 bits), remaining bandwidth (2 bits), predicted load (2 bits) and device identifier (2 bits) to form a total of 10 binary numbers.

[0117] 1033、According to the decision query index, query the preset Q value table to obtain the Q value corresponding to different adjustment actions in the current state.

[0118] Among them, the preset Q value table is usually stored in RAM. The preset Q value table stores the Q value (state-action value) corresponding to different optional adjustment actions for each possible state (identified by the decision query index). The Q value represents the long-term cumulative reward expectation that can be obtained by executing the corresponding adjustment action in the state.

[0119] In implementation, the decision query index can be used as an address to access the preset Q value table to read the Q values corresponding to different adjustment actions (e.g., "increase weight", "keep weight unchanged", and "decrease weight") in the current state.

[0120] 1034、Based on the Q values, a target weight adjustment action is selected according to a preset strategy to generate a decision instruction for controlling traffic shaping.

[0121] In implementation, a target weight adjustment action can be selected according to a preset strategy (e.g., an ε-greedy strategy or a strategy of directly selecting an adjustment action corresponding to the maximum Q value). In an embodiment, the preset strategy is a strategy of selecting an adjustment action corresponding to the maximum Q value. The selected adjustment action can be encoded as a decision instruction, for example, 01 represents increasing the weight, 00 represents keeping the weight unchanged, and 11 represents decreasing the weight.

[0122] In some embodiments, in order to enable the decision strategy to adapt to dynamically changing traffic patterns, the decision module can update the Q value table according to the immediate reward of the environment feedback after each execution of an adjustment action to realize online learning. Specifically, the following can be performed:

[0123] First, after the execution of an adjustment action and entering a new system state, an immediate reward R_{t+1} can be calculated according to the following formula:

[0124] R_{t+1}=β1*(1-Latency_Avg_norm)+β2*Throughput_norm+β3*Fairness;

[0125] wherein β1, β2, and β3 are configurable fairness calculation factors respectively determining the importance of the system to delay, throughput, and fairness. Latency_Avg_norm is the normalized real-time average delay. Throughput_norm is the normalized real-time bus throughput (calculated based on the request rate and burst length). Fairness is a fairness index calculated based on real-time service records (such as the authorization rate).

[0126] The immediate reward can reflect the comprehensive performance of the system in the three dimensions of delay, throughput, and fairness after the execution of the last adjustment action.

[0127] Then, the Q-Learning algorithm can be used to update the entries in the preset Q value table corresponding to the last state and the executed adjustment action. Specifically, the following can be performed:

[0128] Q(s_t,a_t)←Q(s_t,a_t)+α*[R_{t+1}+γ*max_{a′}Q(s_{t+1},a′)-Q(s_t,a_t)];

[0129] where s_t is the state of the history time window. a_t is the adjustment action performed. s_{t+1} is the new state reached after performing the adjustment action. a is the learning rate, controlling the update magnitude. g is the discount factor, indicating the degree of emphasis on future rewards. max_{a'} Q(s_{t+1}, a') is the maximum Q value among all possible adjustment actions in the new state s_{t+1}.

[0130] In this embodiment, the hardware implementation structure of the decision module (Decision Module) is as shown in Figure 4 The decision module includes state quantization encoding circuit, state memory (State RAM) and state calculator (State Calc). All operations use fixed-point numbers, and the parameter format is shown in Table 2:

[0131]

[0132] In the embodiment of the application, the calculation circuit (including State Calc) of the decision module is designed to be time-division multiplexed for multiple host devices (CPU, GPU, NPU). Each host device has an independent preset Q value table and independent configuration parameters (a, b1 / b2 / b3, g, Priority_weight, etc.), which are configured by the host device through a configuration interface in advance. To ensure the balance between precision and hardware efficiency, key parameters use specific fixed-point formats, for example, Q value is S8.8, immediate reward R_{t+1} is S4.12, and priority weight Priority_weight is U1.7.

[0133] The final output of the decision module is the weight adjustment step value (such as 01, 00, 11), which is sent to the shaping module (Shaping Module) in the back stage to perform specific traffic shaping control.

[0134] 104. Real-time traffic shaping control is performed on the AXI bus according to the decision instruction.

[0135] This embodiment is executed by the shaping module (Shaping Module), which is the final execution link of the "perception-prediction-decision-execution" closed loop. Its function is to perform real-time traffic shaping control on the transactions on the AXI bus according to the decision instruction issued by the decision module, so as to realize dynamic adjustment of bandwidth, delay and fairness. Specifically, the following can be performed:

[0136] 1041. Analyze the decision instruction to obtain the priority weight adjustment value for each host device.

[0137] Specifically, the shaping module can extract the priority weight adjustment value corresponding to each master by parsing the decision instruction. In the embodiment of the present application, the priority weight adjustment value usually has three types: an up-regulation of a fixed step value (such as +0.1), a down-regulation of a fixed step value (such as -0.1), or no change.

[0138] 1042、According to the priority weight adjustment value, dynamically update the current bandwidth weight of each master.

[0139] In the embodiment, the shaping module maintains a current bandwidth weight register for each master, and the value of the register represents the current bandwidth weight of the master in bus arbitration. The data format is an unsigned fixed-point number U1.7 (as shown in Table 2). According to the parsed priority weight adjustment value, the current bandwidth weight of each master can be updated.

[0140] For example, if the current bandwidth weight is W_current (in U1.7 format) and an up-regulation instruction (+Δ) is received, then the new current bandwidth weight W_new = W_current + Δ. Similarly, the configurable saturation logic ensures that the updated current bandwidth weight is limited within a reasonable range (such as 0.0 to 2.0).

[0141] 1043、According to the current bandwidth weight, generate and execute at least one bus traffic shaping action to adjust the transaction transmission of the corresponding master on the AXI bus.

[0142] In the embodiment, the bus traffic shaping action includes a gating action, an adaptive burst length adjustment action, and a weight redistribution action.

[0143] When the bus traffic shaping action is a gating action, each master can compare the current bandwidth weight W_new with a preset gating threshold, and generate a gating signal according to the comparison result to allow or block the transaction request of the corresponding master.

[0144] Specifically, if W_new is lower than the preset gating threshold, the shaping module sends a gating signal to the AXI interface of the master. When the gating signal is valid, it will block the new transaction request initiated by the master (such as pulling down the AWVALID or ARVALID signal, so that it cannot complete the handshake), thereby achieving the purpose of limiting its bus access. If W_new is greater than or equal to the preset gating threshold, the gating signal is invalid, and the request of the master is allowed to be normally sent out.

[0145] When the bus traffic shaping action is an adaptive burst length adjustment action, the shaping module can monitor the remaining bandwidth (Bw_Remain) of the AXI bus in real time. When a master device initiates a burst request, the shaping module determines whether the remaining bandwidth is sufficient to support the full burst length declared by the burst request. If the remaining bandwidth is sufficient, the burst request is allowed to be sent in its original length. If the remaining bandwidth is insufficient, the shaping module calculates the length limit supported by the remaining bandwidth, and splits the burst request into multiple shorter burst sub-requests that meet the length limit, and then schedules and sends them in turn. Thus, it is prevented that a single longer burst request excessively occupies the AXI bus and causes other high-priority or delay-sensitive transactions to be blocked.

[0146] It can be understood that when it is detected that a master device is prohibited from sending a request due to the gating action, the bandwidth weight allocated to the master device is actually idle. At this time, the shaping module can temporarily grant the bandwidth weight of the master device (gated) to one or more currently active (not gated) master devices according to a preset strategy (such as according to priority or QoS identification). The embodiment is equivalent to dynamically adjusting the weight distribution of the arbiter at runtime, further improving the utilization efficiency of the bus bandwidth, especially in the scene of high load and large traffic characteristic difference.

[0147] It should be noted that the operation of the shaping module is not performed in isolation, but cooperates with the monitoring module, the prediction module, and the decision module in a unified timing to form a closed loop. Specifically, the bus state change (such as request blocking, burst splitting) caused by the shaping module after executing the decision instruction will be perceived by the monitoring module in the future time window, and will be input into the system as a new "real-time monitoring data set". This feedback data enables the prediction module and the decision module to evaluate the effect of the adjustment action in the previous time window (through reward calculation) and learn to optimize subsequent decisions. The embodiment of the present application realizes the continuous adaptive shaping of the AXI bus traffic by running the "collection (101)-prediction (102)-decision (103)-execution (104)" process periodically in a fixed time window.

[0148] In summary, the AXI bus traffic shaping method provided by the embodiments of the present application first collects the traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set; then, based on the real-time monitoring data set, the traffic trend of each master device in a future time window is predicted through a long short-term memory network to obtain a prediction result; subsequently, according to the prediction result and the real-time monitoring data set, a weight adjustment strategy of each master device is calculated through a reinforcement learning algorithm to obtain a decision instruction; finally, according to the decision instruction, real-time traffic shaping control is performed on the AXI bus, so as to construct an intelligent closed-loop control system of “perception-prediction-decision-execution”, and to change passive response into active management, thereby avoiding resource conflict and queuing delay at the source, so as to significantly improve the bus bandwidth utilization efficiency and the overall system performance on the premise of guaranteeing the real-time performance of key tasks.

[0149] To better implement the AXI bus traffic shaping method provided by the embodiments of the present application, the embodiments of the present application further provide an AXI bus traffic shaping system. The meanings of the terms are the same as those in the above AXI bus traffic shaping method, and the specific implementation details can be referred to the description in the method embodiments.

[0150] Please refer to Figure 5 , Figure 5 is a structural schematic diagram of the AXI bus traffic shaping system provided by the embodiments of the present application. The AXI bus traffic shaping system can include a monitoring module 201, a prediction module 202, a decision module 203 and a shaping module 204. Among them,

[0151] The monitoring module 201 is configured to collect the traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set;

[0152] The prediction module 202 is configured to predict the traffic trend of each master device in a future time window through a long short-term memory network based on the real-time monitoring data set to obtain a prediction result;

[0153] The decision module 203 is configured to calculate a weight adjustment strategy of each master device through a reinforcement learning algorithm according to the prediction result and the real-time monitoring data set to obtain a decision instruction;

[0154] The shaping module 204 is configured to perform real-time traffic shaping control on the AXI bus according to the decision instruction.

[0155] The specific implementation of each unit can be referred to the above embodiments of the AXI bus traffic shaping method, which will not be repeated here.

[0156] In summary, the traffic shaping system of the AXI bus provided by the embodiments of the present application can collect the traffic performance data of each master device on the AXI bus in real time through the monitoring module 201 to obtain a real-time monitoring data set; the prediction module 202 predicts the traffic trend of each master device in a future time window based on the real-time monitoring data set through a long short-term memory network to obtain a prediction result; the decision module 203 calculates the weight adjustment strategy of each master device through a reinforcement learning algorithm according to the prediction result and the real-time monitoring data set to obtain a decision instruction; and the shaping module 204 performs real-time traffic shaping control on the AXI bus according to the decision instruction. The embodiments of the present application convert passive response into active management by constructing an intelligent closed-loop control system of “perception-prediction-decision-execution”, which avoids resource conflicts and queuing delays at the source, thereby significantly improving the bus bandwidth utilization efficiency and the overall system performance on the premise of ensuring the real-time performance of critical tasks.

[0157] The embodiments of the present application also provide an electronic device, which can integrate the traffic shaping system of the AXI bus of the embodiments of the present application, as shown in Figure 6 The embodiments of the present application also provide an electronic device, which can integrate the traffic shaping system of the AXI bus of the embodiments of the present application, as shown in

[0158] The electronic device can include a processor 301 with one or more processing cores and a memory 302 with one or more computer-readable storage media. Those skilled in the art can understand that the structure of the electronic device shown in Figure 6 The electronic device structure shown in the above does not constitute a limitation on the electronic device, and can include more or fewer components than shown, or combine certain components, or different component arrangements. Among them:

[0159] The processor 301 is the control center of the electronic device, which connects various parts of the entire electronic device through various interfaces and lines, executes the software programs and / or the present application stored in the memory 302 and the data stored in the memory 302, performs various functions and processes data of the electronic device, and thus monitors the entire electronic device. Optionally, the processor 301 can include one or more processing cores; preferably, the processor 301 can integrate an application processor and a modem processor, wherein the application processor mainly processes operation storage media, user interfaces and application programs, and the modem processor mainly processes wireless communication. It can be understood that the above-mentioned modem processor can also not be integrated into the processor 301.

[0160] The memory 302 can be used to store software programs and the present application, and the processor 301 executes various function applications and data processing by running the software programs and the present application stored in the memory 302. The memory 302 can mainly include a program storage area and a data storage area, wherein the program storage area can store application programs required by at least one function of the operating storage medium, and the data storage area can store data created according to the use of the electronic device. In addition, the memory 302 can include a high-speed random access memory, and can also include a non-volatile memory such as at least one magnetic disk storage device, a flash memory device, or other volatile solid-state memory device. Accordingly, the memory 302 can also include a memory controller to provide access of the processor 301 to the memory 302.

[0161] Although not shown, the electronic device can also include a display unit, an input unit, a power supply, and the like, which will not be described here. In particular, in the present embodiment, the processor 301 in the electronic device will load the executable file corresponding to the process of one or more application programs into the memory 302 according to the following instructions, and run the application programs stored in the memory 302 by the processor 301, thereby realizing various functions, as follows:

[0162] Real-time collection of traffic performance data of each master device on the AXI bus to obtain a real-time monitoring data set;

[0163] Based on the real-time monitoring data set, the traffic trend of each master device in a future time window is predicted through a long short-term memory network to obtain a prediction result;

[0164] According to the prediction result and the real-time monitoring data set, a weight adjustment strategy of each master device is calculated through a reinforcement learning algorithm to obtain a decision instruction;

[0165] According to the decision instruction, real-time traffic shaping control is performed on the AXI bus.

[0166] Those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructions, or by instructions controlling related hardware, which can be stored in a computer readable storage medium and loaded and executed by a processor.

[0167] To this end, the present application provides a storage medium having a plurality of instructions stored therein, which can be loaded by a processor to execute the steps in any of the methods provided by the embodiments of the present application. For example, the instructions can perform the following steps:

[0168] Real-time collection of traffic performance data of each master device on the AXI bus to obtain a real-time monitoring data set;

[0169] Based on the real-time monitoring data set, the traffic trend of each master device in a future time window is predicted through a long short-term memory network to obtain a prediction result;

[0170] According to the prediction result and the real-time monitoring data set, a weight adjustment strategy of each master device is calculated through a reinforcement learning algorithm to obtain a decision instruction;

[0171] According to the decision instruction, real-time traffic shaping control is performed on the AXI bus.

[0172] The specific implementation of each operation can be seen from the foregoing embodiments, and will not be described here.

[0173] The storage medium can include a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0174] Due to the instructions stored in the storage medium, the steps in any method provided by the embodiments of the present application can be executed, and thus the beneficial effects that can be achieved by any method provided by the embodiments of the present application can be achieved. Details are described in the foregoing embodiments, and will not be described here.

[0175] The traffic shaping method, system, storage medium, and electronic device of the AXI bus provided by the present application are described in detail above. The principles and implementation manners of the present application are described by applying specific examples in this paper. The above example is only used to help understand the core idea of the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation manner and application range will be changed. In summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A method of traffic shaping for an AXI bus, characterized by, The application comprises: Real-time acquisition of traffic performance data of each master device on the AXI bus to obtain a real-time monitoring data set; wherein the traffic performance data includes request rate, average delay and burst length distribution; Based on the real-time monitoring data set, the traffic trend of each master device in a future time window is predicted through a long short-term memory network to obtain a prediction result; The prediction result and the traffic performance data in the real-time monitoring data set are respectively discretized and quantized to generate a state level of each master device; The state level and the corresponding device identifier are spliced to generate a decision query index; According to the decision query index, a preset Q value table is queried to obtain the Q value corresponding to different adjustment actions in the current state; Based on the Q value, a target weight adjustment action is selected according to a preset strategy to generate a decision instruction for controlling traffic shaping; The decision instruction is parsed to obtain a priority weight adjustment value for each master device; According to the priority weight adjustment value, the current bandwidth weight of each master device is dynamically updated; According to the current bandwidth weight, at least one bus traffic shaping action is generated and executed to adjust the transaction transmission of the corresponding master device on the AXI bus.

2. The traffic shaping method of AXI bus according to claim 1, wherein, The application comprises: The real-time monitoring data and the historical hidden state vector are spliced to form an input vector; The input vector is input into the long short-term memory network to calculate the current hidden state vector of the long short-term memory network through matrix multiplication and a nonlinear activation function; The current hidden state is fully connected to output the traffic trend of each master device in the future time window to obtain a prediction result.

3. The method of traffic shaping of an AXI bus according to claim 2, wherein, The application comprises: The input vector is multiplied by a preset weight matrix, and the calculation result is added to a bias vector to obtain a forgetting gate linear result, an input gate linear result, a candidate cell state linear result and an output gate linear result; The forgetting gate linear result, the input gate linear result, the candidate cell state linear result and the output gate linear are nonlinearly activated to obtain a forgetting gate activation value, an input gate activation value, an output gate activation value and a candidate cell state activation value; The current hidden state vector of the long short-term memory network is calculated based on the forgetting gate activation value, the input gate activation value, the output gate activation value and the candidate cell state activation value.

4. The traffic shaping method of AXI bus according to claim 3, wherein, The application comprises: The forgetting gate activation value is multiplied by the historical cell state to obtain a first product; The input gate activation value is multiplied by the candidate cell state activation value to obtain a second product; The first product and the second product are added to obtain a current cell state; The current cell state is hyperbolic tangent activated, and the activation result is multiplied by the output gate activation value to obtain a current hidden state vector of the long short-term memory network.

5. The method of traffic shaping for AXI bus according to claim 1, wherein, The bus traffic shaping action includes a gating action; According to the current bandwidth weight, at least one bus traffic shaping action is generated and executed to adjust the transaction transmission of the master device on the AXI bus, including: The current bandwidth weight is compared with a preset gating threshold, and a gating signal is generated according to the comparison result to allow or block the transaction request of the corresponding master device.

6. A traffic shaping system for an AXI bus, characterized by Including: A monitoring module is configured to collect traffic performance data of each master device on the AXI bus in real time to obtain a real-time monitoring data set; wherein the traffic performance data includes request rate, average delay and burst length distribution; A prediction module is configured to predict traffic trends of each master device in a future time window based on the real-time monitoring data set through a long short-term memory network to obtain a prediction result; A decision module is configured to discretely quantize the prediction result and the traffic performance data in the real-time monitoring data set to generate a state level of each master device; splice each state level with a corresponding device identifier to generate a decision query index; query a preset Q value table according to the decision query index to obtain Q values corresponding to different adjustment actions under the current state; and select a target weight adjustment action according to a preset strategy based on the Q values to generate a decision instruction for controlling traffic shaping. A shaping module is configured to analyze the decision instruction to obtain a priority weight adjustment value for each master device; dynamically update a current bandwidth weight of each master device according to the priority weight adjustment value; and generate and execute at least one bus traffic shaping action according to the current bandwidth weight to adjust the transaction transmission of the master device on the AXI bus.

7. A storage medium, characterized by The storage medium stores a plurality of instructions adapted to be loaded by the processor to execute the traffic shaping method of the AXI bus according to any one of claims 1-5.

8. An electronic device, comprising: The computer program product comprises a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the traffic shaping method of the AXI bus according to any one of claims 1-5 when executing the computer program.

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