Interaction method for chip power-on initialization and related product

Abstract

The invention discloses an interaction method for power-on initialization of a chip and a related product. In the scheme, the working rate of a high-speed signal transmitter is determined based on a conversion result of an analog-to-digital converter on an input voltage, and a low-speed signal receiver is started; if the low-speed signal receiver receives a second preset sequence sent by the deserializer, performing reset calibration operation on a second phase-locked loop; if the reset and calibrated second phase-locked loop is in a locked state, performing calibration operation on the first phase-locked loop; if the calibrated first phase-locked loop is in a locked state, executing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send a first preset sequence to a deserializer; and controlling the high-speed signal transmitter to be switched to an idle data mode based on a switching instruction sent by the deserializer, and sending idle data to the deserializer. Compared with the problems that a traditional chip initialization process depends on fixed parameters or external control logic, and link establishment delay or communication interruption is likely to be caused, the chip initialization method has obvious advantages.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an interactive method for chip power-on initialization and related products. Background Technology

[0002] In high-speed serial communication systems, SerDes (serializer / deserializer) is a serial communication technology that uses a serializer and a deserializer in pairs. During data serialization and deserialization, the serializer and deserializer must operate in the same mode to achieve reliable data transmission. As data transmission rates continue to increase to the tens of gigabits per second level, the initialization efficiency of the SerDes chip during link establishment becomes a key factor affecting the overall system performance.

[0003] Traditional SerDes chip initialization processes typically rely on preset fixed parameters or external control logic for configuration. When the communicating parties are from different manufacturers, use different processes, or have different connection environments, for example, the connection harnesses between the serializer and deserializer vary in type and length, and the corresponding parameters need to be adjusted according to different environments, it is very easy to cause problems such as initialization failure, link establishment delay, or communication interruption.

[0004] How to achieve the interactive power-on initialization of the SerDes chip, and ensure that the serializer and deserializer can quickly and reliably enter the normal working state after initialization, is an urgent technical problem to be solved. Summary of the Invention

[0005] To address the aforementioned issues, this application provides an interactive method and related products for chip power-on initialization. The aim is to enable interactive power-on initialization of the SerDes chip, ensuring that the serializer and deserializer can quickly and reliably enter normal working state after initialization.

[0006] The embodiments of this application disclose the following technical solutions:

[0007] The first aspect of this application provides an interactive method for chip power-on initialization, the method being applied to the controller of a serializer, the serializer comprising: the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop, a low-speed signal receiver, and a second phase-locked loop; the method comprising:

[0008] Based on the conversion result of the analog-to-digital converter on the input voltage, the operating rate of the high-speed signal transmitter is determined, and the low-speed signal receiver is activated.

[0009] If the low-speed signal receiver receives the second preset sequence sent by the deserializer, a reset calibration operation is performed on the second phase-locked loop; the second preset sequence is a user-defined digital sequence.

[0010] If the second phase-locked loop is in a locked state after reset and calibration, then a calibration operation is performed on the first phase-locked loop;

[0011] If the first phase-locked loop is locked after calibration, a reset operation is performed on the high-speed signal transmitter and the high-speed signal transmitter is controlled to send a first preset sequence to the deserializer; the first preset sequence is a custom digital sequence that is different from the second preset sequence;

[0012] Based on the switching command received from the deserializer, the high-speed signal transmitter is controlled to switch to idle data mode and send idle data to the deserializer.

[0013] Optionally, after controlling the high-speed signal transmitter to switch to idle data mode based on the received switching instruction sent by the deserializer, and sending idle data to the deserializer, the method further includes:

[0014] Monitor the status of the second phase-locked loop;

[0015] If the second phase-locked loop changes from a locked state to an unlocked state, a reset operation is performed on the first phase-locked loop.

[0016] Optionally, the method further includes:

[0017] If the calibrated first phase-locked loop is in an unlocked state, then repeat the calibration operation on the calibrated first phase-locked loop; if the calibrated first phase-locked loop is in a locked state within a preset number of calibrations, then reset the high-speed signal transmitter and control the high-speed signal transmitter to send a first preset sequence to the deserializer; if the calibrated first phase-locked loop is still in an unlocked state after the preset number of calibrations, then stop the operation.

[0018] Optionally, the method further includes:

[0019] If an adjustment command is received from the deserializer, an adjustment operation is performed on the high-speed signal transmitter; the adjustment operation includes swing adjustment operation or pre-emphasis adjustment operation.

[0020] A second aspect of this application provides yet another interactive method for chip power-on initialization, the method being applied to the controller of a deserializer, the deserializer comprising: the controller, an analog-to-digital converter, a high-speed signal receiver, a low-speed signal transmitter, a system phase-locked loop, and a training module; the method comprising:

[0021] Based on the conversion result of the analog-to-digital converter on the input voltage, the operating rate of the low-speed signal transmitter is determined;

[0022] If the system phase-locked loop is in a locked state, the low-speed signal transmitter is activated, and the low-speed signal transmitter is controlled to send a second preset sequence to the serializer; the second preset sequence is a user-defined digital sequence.

[0023] The high-speed signal receiver is configured based on the frequency of a first preset sequence received from the serializer; the first preset sequence is a custom digital sequence that is different from the second preset sequence.

[0024] If the configured high-speed signal receiver receives the first preset sequence sent by the serializer within a first preset time, it sends a switching command to the serializer; the switching command is used to instruct the high-speed signal transmitter in the serializer to switch to idle data mode.

[0025] If idle data sent by the serializer is detected within the second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning, and the power-on initialization ends; if no idle data sent by the serializer is detected within the second preset time, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0026] Optionally, the method further includes:

[0027] If the configured high-speed signal receiver does not receive the first preset sequence sent by the serializer within the first preset time, then return to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0028] Optionally, if idle data transmitted by the serializer is detected within a second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning. After power-on initialization is completed, the method further includes:

[0029] If the first preset sequence sent by the serializer is received again, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0030] A third aspect of this application provides an interactive device for chip power-on initialization, the device comprising:

[0031] The startup module is used to determine the operating rate of the high-speed signal transmitter and start the low-speed signal receiver based on the conversion result of the analog-to-digital converter on the input voltage.

[0032] The first judgment module is used to perform a reset calibration operation on the second phase-locked loop if the low-speed signal receiver receives a second preset sequence sent by the deserializer; the second preset sequence is a user-defined digital sequence.

[0033] The second judgment module is used to perform a calibration operation on the first phase-locked loop if the second phase-locked loop is in a locked state after reset and calibration.

[0034] The third judgment module is used to perform a reset operation on the high-speed signal transmitter and control the high-speed signal transmitter to send a first preset sequence to the deserializer if the calibrated first phase-locked loop is in a locked state; the first preset sequence is a custom digital sequence that is different from the second preset sequence.

[0035] The switching module is used to control the high-speed signal transmitter to switch to idle data mode based on the switching command sent by the deserializer, and to send idle data to the deserializer.

[0036] A fourth aspect of this application provides yet another interactive device for chip power-on initialization, the device comprising:

[0037] The startup module is used to determine the operating rate of the low-speed signal transmitter based on the conversion result of the analog-to-digital converter on the input voltage.

[0038] The transmitting module is used to activate the low-speed signal transmitter and control the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state; the second preset sequence is a user-defined digital sequence.

[0039] A configuration module is used to configure a high-speed signal receiver based on the frequency of a first preset sequence sent by the serializer; the first preset sequence is a custom digital sequence that is different from the second preset sequence.

[0040] The first judgment module is used to send a switching instruction to the serializer if the configured high-speed signal receiver receives the first preset sequence sent by the serializer within a first preset time; the switching instruction is used to instruct the high-speed signal transmitter in the serializer to switch to idle data mode.

[0041] The second judgment module is used to start the training module and control the training module to perform equalization parameter scanning and power-on initialization if idle data sent by the serializer is detected within a second preset time; if no idle data sent by the serializer is detected within the second preset time, the module returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0042] The fifth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements an interactive method for chip power-on initialization as described in either the first or second aspect.

[0043] Compared with the prior art, this application has the following beneficial effects:

[0044] This application provides an interactive method for chip power-on initialization, applied to the controller of a serializer. The serializer includes: the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop (PLL), a low-speed signal receiver, and a second PLL. The method includes: determining the operating speed of the high-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter, and starting the low-speed signal receiver; if the low-speed signal receiver receives a second preset sequence sent by a deserializer, performing a reset calibration operation on the second PLL; if the reset and calibrated second PLL is in a locked state, performing a calibration operation on the first PLL; if the calibrated first PLL is in a locked state, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send the first preset sequence to the deserializer; and based on a received switching command sent by the deserializer, controlling the high-speed signal transmitter to switch to idle data mode and sending idle data to the deserializer.

[0045] This method automatically determines the operating rate of the serializer after power-on, laying the foundation for subsequent interaction. Throughout the power-on initialization process, the serializer and deserializer verify their receiving and transmitting capabilities through a preset sequence. This automatic interaction mechanism enables the serializer and deserializer to complete their configuration and operating mode matching without interference, significantly shortening the link establishment time and ensuring that the serializer and deserializer can quickly and reliably enter normal operating status after power-on initialization.

[0046] Furthermore, the entire power-on initialization process is based on state judgment and condition triggering, and has fault tolerance capabilities. If a certain stage fails, the power-on initialization process can be restarted by combining the corresponding operation. It has the ability to quickly identify and autonomously recover from abnormal conditions such as chip power failure, loose wires or plugging and unplugging, which greatly enhances the reliability and robustness of the communication link. It can flexibly adapt to various wires and environments, and broaden the application scenarios of the same SerDes chip. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This application provides a schematic diagram of the structure of an interactive system for chip power-on initialization.

[0049] Figure 2 An initialization state transition diagram for a serializer is provided in an embodiment of this application;

[0050] Figure 3 An initialization state transition diagram for a deserializer provided in this application embodiment.

[0051] Figure 4 A flowchart illustrating an interactive method for chip power-on initialization provided in an embodiment of this application;

[0052] Figure 5 A flowchart illustrating another interactive method for chip power-on initialization provided in this application embodiment;

[0053] Figure 6 This is a schematic diagram of the structure of an interactive device for chip power-on initialization provided in an embodiment of this application;

[0054] Figure 7 This is a schematic diagram of the structure of another interactive device for chip power-on initialization provided in an embodiment of this application. Detailed Implementation

[0055] SerDes (Serializer / Deserializer) is a serial communication technology that uses a serializer and a deserializer in pairs. During data serialization and deserialization, the serializer and deserializer must operate in the same mode to achieve reliable data transmission. As data transmission rates continue to increase to tens of gigabits per second, the initialization efficiency of the SerDes chip during link establishment becomes a key factor affecting the overall system performance.

[0056] The current traditional SerDes chip initialization process usually relies on preset fixed parameters or external control logic for configuration. When the two communicating parties are from different manufacturers, use different processes, or have different connection environments, for example, the connection harnesses between the serializer and the deserializer are diverse and the lengths are not uniform. Adjusting the corresponding parameters according to different environments can easily lead to problems such as initialization failure, link establishment delay, or communication interruption.

[0057] In view of the above problems, this application proposes an interactive method for chip power-on initialization and related products. The method is applied to the controller of a serializer, which includes: the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop (PLL), a low-speed signal receiver, and a second PLL. The method includes: determining the operating speed of the high-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter, and starting the low-speed signal receiver; if the low-speed signal receiver receives a second preset sequence sent by a deserializer, performing a reset calibration operation on the second PLL; if the reset and calibrated second PLL is in a locked state, performing a calibration operation on the first PLL; if the calibrated first PLL is in a locked state, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send the first preset sequence to the deserializer; and based on the received switching command sent by the deserializer, controlling the high-speed signal transmitter to switch to idle data mode and sending idle data to the deserializer.

[0058] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0059] See Figure 1 This figure is a schematic diagram of the structure of an interactive system for chip power-on initialization provided in an embodiment of this application. Figure 1 As shown, the interactive system for chip power-on initialization includes a serializer and a deserializer. The serializer includes: a serializer controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop (PLL), a low-speed signal receiver, and a second PLL. The deserializer includes: a deserializer controller, an analog-to-digital converter, a high-speed signal receiver, a low-speed signal transmitter, a system PLL, and a training module.

[0060] Specifically, at the serializer end, the serializer controller integrates and coordinates the status information of multiple functional modules; the high-speed signal transmitter transmits high-speed signals to the deserializer, and the first phase-locked loop provides a clock signal for the high-speed signal transmitter; the low-speed signal receiver receives the low-speed signals sent by the deserializer, and the second phase-locked loop provides a clock signal for the low-speed signal receiver. At the deserializer end, the deserializer controller integrates and coordinates the status information of multiple functional modules; the low-speed signal transmitter sends low-speed signals to the serializer, and the system phase-locked loop provides a clock signal for the low-speed signal transmitter; the high-speed signal receiver receives the high-speed signals sent by the serializer; and the training module performs equalization parameter scanning on the deserializer. After the serializer and deserializer interact via initialization control logic, they enter normal operating mode.

[0061] For example, Figure 2 The initialization state transitions of the serializer are shown. For example... Figure 2 As shown, state 0 indicates that after the system powers on, the analog-to-digital converter locks the configuration value based on the input voltage of the pin or pad, thereby determining the operating rate of the high-speed signal transmitter and enabling the low-speed signal receiver. State 1 indicates detecting whether the low-speed signal receiver has received the second preset sequence. State 2 indicates performing a reset and calibration operation on the second phase-locked loop. State 3 indicates performing repeated calibration of the first phase-locked loop three times in this state. State 4 indicates enabling the high-speed signal generator and starting to send the first preset sequence to the deserializer. State 5 indicates continuously monitoring the locking status of the second phase-locked loop data; if the second phase-locked loop changes from a locked state to an unlocked state, it returns to state 3.

[0062] For example, Figure 3 Demonstrate the initialization state transitions of the serializer. For example... Figure 3 As shown, state 0 indicates an idle state, where the high-speed signal receiver is not activated and preparation work is being done for it. State 1 indicates that the low-speed signal transmitter is started to send the second preset sequence to the serializer. State 2 indicates that the frequency of the second preset sequence sent by the high-speed signal generator is obtained, and the high-speed signal receiver is configured accordingly. After the high-speed signal receiver is configured, it receives high-speed signals normally. State 4 indicates that the high-speed signal receiver is waiting for configuration to complete, and the system checks whether the first preset sequence from the serializer is received within a preset time. If the first preset sequence from the serializer is detected within the preset time, the system enters state 8; otherwise, the timeout occurs, and the system returns to state 1. State 8 indicates that the low-speed signal transmitter sends a switching command, requesting to switch the high-speed signal transmitter from the first preset sequence to idle data. After waiting for the switching to complete, the training module is started, and the training module is controlled to scan the equalization parameters of the deserializer. State 16 indicates that the link is successfully established and the power-on initialization is complete.

[0063] See Figure 4 This figure is a flowchart of an interactive method for chip power-on initialization provided in an embodiment of this application. The method is applied to the controller of a serializer, which includes: the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop, a low-speed signal receiver, and a second phase-locked loop. Figure 4 As shown, the method includes the following steps:

[0064] S401. Based on the conversion result of the analog-to-digital converter on the input voltage, determine the operating speed of the high-speed signal transmitter and start the low-speed signal receiver.

[0065] There are no restrictions on how the input voltage is applied; for example, it can be applied via a pin or an external configuration signal. The value of the input voltage shall not exceed 3.3 volts.

[0066] S402. If the low-speed signal receiver receives the second preset sequence sent by the deserializer, then a reset calibration operation is performed on the second phase-locked loop.

[0067] The second preset sequence is a custom digital sequence, and the second phase-locked loop provides a clock signal for the low-speed signal receiver.

[0068] S403. If the second phase-locked loop is in a locked state after reset and calibration, then perform a calibration operation on the first phase-locked loop.

[0069] The first phase-locked loop provides a clock signal for the high-speed signal transmitter.

[0070] After the second phase-locked loop successfully locks onto the clock signal recovered from the second preset sequence sent by the deserializer, the second phase-locked loop is in a locked state. If the second phase-locked loop is always in an unlocked state, the first phase-locked loop will always be in a reset state.

[0071] This cascaded calibration process avoids the phase-locked loop from blindly starting when the channel is not ready, preventing calibration failure or oscillation caused by clock instability.

[0072] S404. If the first phase-locked loop is in a locked state after calibration, perform a reset operation on the high-speed signal transmitter and control the high-speed signal transmitter to send the first preset sequence to the deserializer.

[0073] The first preset sequence is a custom number sequence that is different from the second preset sequence.

[0074] In one feasible implementation:

[0075] If the calibrated first phase-locked loop is in an unlocked state, a repeat calibration operation is performed on the calibrated first phase-locked loop. If the calibrated first phase-locked loop is in a locked state within a preset number of calibrations, a reset operation is performed on the high-speed signal transmitter and the high-speed signal transmitter is controlled to send a first preset sequence to the deserializer. If the preset number of calibrations is exceeded and the calibrated first phase-locked loop is still in an unlocked state, the operation is terminated.

[0076] There is no limit to the number of preset calibrations here, for example, three times.

[0077] A reset operation is performed on the high-speed signal transmitter only when both the first and second phase-locked loops are locked. Subsequently, the data output by the high-speed signal transmitter changes from 0 to the first preset sequence. If either the first or second phase-locked loop is not locked, the high-speed signal transmitter will continue to output 0.

[0078] S405. Based on the switching command sent by the deserializer, control the high-speed signal transmitter to switch to idle data mode and send idle data to the deserializer.

[0079] In idle data mode, the high-speed signal transmitter continuously sends idle data to the deserializer to maintain link activity but without service data.

[0080] In one feasible implementation, after controlling the high-speed signal transmitter to switch to idle data mode based on the received switching command sent by the deserializer, and sending idle data to the deserializer, the method further includes:

[0081] Monitor the status of the second phase-locked loop.

[0082] If the second phase-locked loop changes from a locked state to an unlocked state, a reset operation is performed on the first phase-locked loop.

[0083] In one feasible implementation:

[0084] If an adjustment command is received from the deserializer, an adjustment operation is performed on the high-speed signal transmitter; the adjustment operation includes swing adjustment operation or pre-emphasis adjustment operation.

[0085] Swing adjustment is used to adjust the voltage swing of the high-speed signal transmitter to compensate for channel insertion loss; pre-emphasis adjustment is used to enhance the signal transition edge to offset high-frequency component attenuation.

[0086] The entire power-on initialization process is based on state judgment and condition triggering, and has fault tolerance. If a certain stage fails, the process can be restarted by combining the corresponding operation. This automated interaction mechanism has the ability to quickly identify and autonomously recover from abnormal conditions such as unexpected power loss of the chip, loose wires or hot plugging, which greatly enhances the reliability and robustness of the communication link.

[0087] This application provides an interactive method for chip power-on initialization, applied to the controller of a serializer. The serializer includes: the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop (PLL), a low-speed signal receiver, and a second PLL. The method includes: determining the operating speed of the high-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter, and starting the low-speed signal receiver; if the low-speed signal receiver receives a second preset sequence sent by a deserializer, performing a reset calibration operation on the second PLL; if the reset and calibrated second PLL is in a locked state, performing a calibration operation on the first PLL; if the calibrated first PLL is in a locked state, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send the first preset sequence to the deserializer; and based on a received switching command sent by the deserializer, controlling the high-speed signal transmitter to switch to idle data mode and sending idle data to the deserializer.

[0088] This method automatically determines the operating rate of the serializer after power-on, laying the foundation for subsequent interaction. Throughout the power-on initialization process, the serializer and deserializer verify their receiving and transmitting capabilities through a preset sequence. This automatic interaction mechanism enables the serializer and deserializer to complete their configuration and operating mode matching without interference, significantly shortening the link establishment time and ensuring that the serializer and deserializer can quickly and reliably enter normal operating status after power-on initialization.

[0089] See Figure 5 This figure is a flowchart of another interactive method for chip power-on initialization provided in an embodiment of this application. The method is applied to the controller of a deserializer, which includes: the controller, an analog-to-digital converter, a high-speed signal receiver, a low-speed signal transmitter, a system phase-locked loop, and a training module. Figure 5 As shown, the method includes the following steps:

[0090] S501. Based on the conversion result of the analog-to-digital converter on the input voltage, determine the operating speed of the low-speed signal transmitter.

[0091] There are no restrictions on how the input voltage is applied; for example, it can be applied via a pin or an external configuration signal. The input voltage value shall not exceed 3.3 volts. The second preset sequence is a user-defined digital sequence.

[0092] The low-speed signal transmitter supports rate adaptive configuration, improving system compatibility and deployment flexibility.

[0093] S502. If the system phase-locked loop is in a locked state, start the low-speed signal transmitter and control the low-speed signal transmitter to send the second preset sequence to the serializer.

[0094] The second preset sequence is a custom number sequence.

[0095] S503. Configure the high-speed signal receiver based on the frequency of the first preset sequence sent by the received serializer.

[0096] The first preset sequence is a custom number sequence that is different from the second preset sequence.

[0097] In one feasible implementation, the parameters of the high-speed signal receiver are configured based on the frequency of a first preset sequence transmitted by the serializer within a preset time window. The parameters of the high-speed signal receiver include receiver physical layer parameters and clock data, etc.

[0098] This configuration method allows for flexible parameter configuration based on actual application requirements, avoiding bit errors or loss of lock caused by mismatch between preset fixed parameters and actual signals, thus improving the robustness of the link.

[0099] S504. If the configured high-speed signal receiver receives the first preset sequence sent by the serializer within the first preset time, then a switching command is sent to the serializer.

[0100] The switching command is used to instruct the high-speed signal transmitter in the serializer to switch to idle data mode. There is no limitation on the first preset time, for example, 10 milliseconds.

[0101] In one feasible implementation:

[0102] If the configured high-speed signal receiver does not receive the first preset sequence sent by the serializer within the first preset time, then return to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0103] By introducing a timeout retry mechanism, the reliability and robustness of the communication link are enhanced.

[0104] S505. If idle data sent by the serializer is detected within the second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning. The power-on initialization ends. If idle data sent by the serializer is not detected within the second preset time, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0105] There is no restriction on the second preset time here.

[0106] The idle data indicates that the serializer has switched to normal operating mode as instructed, and the communication link remains stable.

[0107] In one feasible implementation, if idle data transmitted by the serializer is detected within a second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning. After power-on initialization is completed, the method further includes:

[0108] If the first preset sequence sent by the serializer is received again, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0109] The entire power-on initialization process is based on state judgment and condition triggering, possessing fault tolerance capabilities. If a certain stage fails, the power-on initialization process can be restarted by combining corresponding operations. It has the ability to quickly identify and autonomously recover from abnormal conditions such as chip power loss, loose or unplugged cables, greatly enhancing the reliability and robustness of the communication link. Moreover, it can flexibly adapt to various cables and environments, broadening the application scenarios of the same SerDes chip.

[0110] This application provides an interactive method for chip power-on initialization, applied to the controller of a deserializer. The deserializer includes: the controller, an analog-to-digital converter, a high-speed signal receiver, a low-speed signal transmitter, a system phase-locked loop, and a training module. The method includes: determining the operating rate of the low-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter; if the system phase-locked loop is in a locked state, starting the low-speed signal transmitter and controlling it to send a second preset sequence to the serializer; configuring the high-speed signal receiver based on the frequency of the first preset sequence received from the serializer; and if the configured... If the high-speed signal receiver receives a first preset sequence sent by the serializer within a first preset time, it sends a switching command to the serializer. The switching command instructs the high-speed signal transmitter in the serializer to switch to idle data mode. If idle data sent by the serializer is detected within a second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning. Power-on initialization ends. If no idle data sent by the serializer is detected within the second preset time, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0111] This method automatically determines the operating rate of the serializer after power-on, laying the foundation for subsequent interaction. Throughout the power-on initialization process, the serializer and deserializer verify their receiving and transmitting capabilities through a preset sequence. This automatic interaction mechanism enables the serializer and deserializer to complete their configuration and operating mode matching without interference, significantly shortening the link establishment time and ensuring that the serializer and deserializer can quickly and reliably enter normal operating status after power-on initialization.

[0112] Based on the interactive method for chip power-on initialization described in the preceding embodiments, this application also provides an interactive device for chip power-on initialization. Figure 6 This is a schematic diagram of the device. Figure 6 As shown, the interactive device for chip power-on initialization includes:

[0113] The startup module 601 is used to determine the operating rate of the high-speed signal transmitter and start the low-speed signal receiver based on the conversion result of the analog-to-digital converter on the input voltage.

[0114] The first judgment module 602 is used to perform a reset calibration operation on the second phase-locked loop if the low-speed signal receiver receives the second preset sequence sent by the deserializer; the second preset sequence is a custom digital sequence.

[0115] The second judgment module 603 is used to perform a calibration operation on the first phase-locked loop if the second phase-locked loop is in a locked state after reset and calibration.

[0116] The third judgment module 604 is used to perform a reset operation on the high-speed signal transmitter and control the high-speed signal transmitter to send a first preset sequence to the deserializer if the calibrated first phase-locked loop is in a locked state; the first preset sequence is a custom digital sequence that is different from the second preset sequence.

[0117] The switching module 605 is used to control the high-speed signal transmitter to switch to idle data mode based on the switching command sent by the deserializer, and to send idle data to the deserializer.

[0118] Optionally, the device further includes: a monitoring module;

[0119] The monitoring module is used to monitor the status of the second phase-locked loop.

[0120] If the second phase-locked loop changes from a locked state to an unlocked state, a reset operation is performed on the first phase-locked loop.

[0121] Optionally, the third determination module is further used for;

[0122] If the calibrated first phase-locked loop is in an unlocked state, then repeat the calibration operation on the calibrated first phase-locked loop; if the calibrated first phase-locked loop is in a locked state within a preset number of calibrations, then reset the high-speed signal transmitter and control the high-speed signal transmitter to send a first preset sequence to the deserializer; if the calibrated first phase-locked loop is still in an unlocked state after the preset number of calibrations, then stop the operation.

[0123] Optionally, the device further includes: an adjustment module;

[0124] The adjustment module is used to perform an adjustment operation on the high-speed signal transmitter if it receives an adjustment command sent by the deserializer; the adjustment operation includes an amplitude adjustment operation or a pre-emphasis adjustment operation.

[0125] This application also provides another interactive device for chip power-on initialization. Figure 7 This is a schematic diagram of the device. Figure 7 As shown, the interactive device for chip power-on initialization includes:

[0126] The startup module 701 is used to determine the operating rate of the low-speed signal transmitter based on the conversion result of the analog-to-digital converter on the input voltage.

[0127] The transmitting module 702 is used to start the low-speed signal transmitter and control the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state; the second preset sequence is a user-defined digital sequence.

[0128] The configuration module 703 is used to configure the high-speed signal receiver based on the frequency of the first preset sequence sent by the serializer; the first preset sequence is a custom digital sequence that is different from the second preset sequence.

[0129] The first judgment module 704 is used to send a switching instruction to the serializer if the configured high-speed signal receiver receives the first preset sequence sent by the serializer within a first preset time; the switching instruction is used to instruct the high-speed signal transmitter in the serializer to switch to idle data mode.

[0130] The second judgment module 705 is used to start the training module and control the training module to perform equalization parameter scanning and power-on initialization if idle data sent by the serializer is detected within a second preset time; if no idle data sent by the serializer is detected within the second preset time, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0131] Optionally, the first determination module is further configured to:

[0132] If the configured high-speed signal receiver does not receive the first preset sequence sent by the serializer within the first preset time, then return to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0133] Optionally, if idle data transmitted by the serializer is detected within a second preset time, the training module is started, and the training module is controlled to perform equalization parameter scanning. After power-on initialization is completed, the method further includes:

[0134] If the first preset sequence sent by the serializer is received again, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

[0135] Furthermore, embodiments of this application also provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the interactive method for chip power-on initialization as described in any of the method embodiments.

[0136] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method embodiments. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate. The components indicated as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment solution according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0137] The above description is merely one specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An on-chip power-up initialization interaction method, characterized by, The method is applied to a controller of a serializer, the serializer comprising the controller, an analog-to-digital converter, a high-speed signal transmitter, a first phase-locked loop, a low-speed signal receiver and a second phase-locked loop; the method comprising: determining a working rate of the high-speed signal transmitter based on a conversion result of the analog-to-digital converter on an input voltage, and starting the low-speed signal receiver; if the low-speed signal receiver receives a second preset sequence sent by a deserializer, performing a reset calibration operation on the second phase-locked loop; the second preset sequence is a self-defined digital sequence; if the second phase-locked loop after reset calibration is in a locked state, performing a calibration operation on the first phase-locked loop; if the first phase-locked loop after calibration is in a locked state, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send a first preset sequence to the deserializer; the first preset sequence is a self-defined digital sequence different from the second preset sequence; based on a received switching instruction sent by the deserializer, controlling the high-speed signal transmitter to switch to an idle data mode and sending idle data to the deserializer.

2. The method of claim 1, wherein, After the step of based on a received switching instruction sent by the deserializer, controlling the high-speed signal transmitter to switch to an idle data mode and sending idle data to the deserializer, the method further comprises: monitoring a state of the second phase-locked loop; if the second phase-locked loop is switched from a locked state to an unlocked state, performing a reset operation on the first phase-locked loop.

3. The method of claim 1, wherein, The method further comprises: if the first phase-locked loop after calibration is in an unlocked state, performing a repeated calibration operation on the first phase-locked loop after calibration; if the first phase-locked loop after calibration is in a locked state within a preset calibration number of times, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send a first preset sequence to the deserializer; if the first phase-locked loop after calibration is still in an unlocked state beyond the preset calibration number of times, aborting the operation.

4. The method of claim 1, wherein, The method further comprises: if a received adjustment instruction sent by the deserializer is received, performing an adjustment operation on the high-speed signal transmitter; the adjustment operation comprises a swing adjustment operation or a pre-emphasis adjustment operation.

5. An on-chip power-up initialization interaction method, characterized by, The method is applied to a controller of a deserializer, the deserializer comprising the controller, an analog-to-digital converter, a high-speed signal receiver, a low-speed signal transmitter, a system phase-locked loop and a training module; the method comprising: determining a working rate of the low-speed signal transmitter based on a conversion result of the analog-to-digital converter on an input voltage; if the system phase-locked loop is in a locked state, starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send a second preset sequence to a serializer; the second preset sequence is a self-defined digital sequence; based on a received frequency of a first preset sequence sent by the serializer, configuring the high-speed signal receiver; the first preset sequence is a self-defined digital sequence different from the second preset sequence; if the first phase-locked loop after calibration is in a locked state, performing a reset operation on the high-speed signal transmitter and controlling the high-speed signal transmitter to send a first preset sequence to the deserializer; the first preset sequence is a self-defined digital sequence different from the second preset sequence; If the configured high-speed signal receiver receives the first preset sequence sent by the serializer within a first preset time, a switching instruction is sent to the serializer; the switching instruction is used to instruct the high-speed signal transmitter in the serializer to switch to an idle data mode; If idle data sent by the serializer is detected within a second preset time, a training module is started, and the training module is controlled to perform equalization parameter scanning, and power-on initialization ends; if idle data sent by the serializer is not detected within the second preset time, the step of starting the low-speed signal transmitter to control the low-speed signal transmitter to send a second preset sequence to the serializer is returned.

6. The method of claim 5, wherein, The method further comprises: If the configured high-speed signal receiver does not receive the first preset sequence sent by the serializer within the first preset time, the step of starting the low-speed signal transmitter to control the low-speed signal transmitter to send a second preset sequence to the serializer is returned.

7. The method of claim 5, wherein, After the step of if idle data sent by the serializer is detected within a second preset time, a training module is started, and the training module is controlled to perform equalization parameter scanning, and power-on initialization ends, further comprising: If the first preset sequence sent by the serializer is received again, the step of starting the low-speed signal transmitter to control the low-speed signal transmitter to send a second preset sequence to the serializer is returned.

8. An on-chip power-up initialization interactive device, characterized by Comprise: A starting module is configured to determine the working rate of the high-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter, and start the low-speed signal receiver; A first judging module is configured to perform a reset calibration operation on the second phase-locked loop if the low-speed signal receiver receives the second preset sequence sent by the deserializer; the second preset sequence is a self-defined digital sequence; A second judging module is configured to perform a calibration operation on the first phase-locked loop if the second phase-locked loop after reset calibration is in a locked state; A third judging module is configured to perform a reset operation on the high-speed signal transmitter and control the high-speed signal transmitter to send a first preset sequence to the deserializer if the first phase-locked loop after calibration is in a locked state; the first preset sequence is a self-defined digital sequence different from the second preset sequence; A switching module is configured to control the high-speed signal transmitter to switch to an idle data mode based on the received switching instruction sent by the deserializer, and send idle data to the deserializer.

9. An on-chip power-up initialization interactive device, characterized by Comprise: A starting module is configured to determine the working rate of the low-speed signal transmitter based on the conversion result of the input voltage by the analog-to-digital converter; A sending module is configured to start the low-speed signal transmitter to control the low-speed signal transmitter to send a second preset sequence to the serializer if the system phase-locked loop is in a locked state; the second preset sequence is a self-defined digital sequence; A configuration module is configured to configure the high-speed signal receiver based on the frequency of the received first preset sequence sent by the serializer; The first preset sequence is a self-defined digital sequence different from the second preset sequence; The first judgment module is used to send a switching instruction to the serializer if the configured high-speed signal receiver receives the first preset sequence sent by the serializer within a first preset time; the switching instruction is used to instruct the high-speed signal transmitter in the serializer to switch to idle data mode. The second judgment module is used to start the training module and control the training module to perform equalization parameter scanning if idle data sent by the serializer is detected within a second preset time. Power-on initialization ends. If no idle data is detected by the serializer within the second preset time, the process returns to the step of starting the low-speed signal transmitter and controlling the low-speed signal transmitter to send the second preset sequence to the serializer if the system phase-locked loop is in a locked state.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the interactive method for chip power-on initialization as described in any one of claims 1-7.

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