RS-485 bus anomaly detection and self-recovery method and device, electronic equipment and storage medium

Abstract

The application relates to an RS-485 bus anomaly detection and self-recovery method and device, electronic equipment and a storage medium. The method comprises the following steps: setting a transceiving state machine containing a timeout timer in an MCU in an uninterruptible power supply, controlling the transceiving state of the transceiving state machine and / or the level of a DE pin of the RS-485 based on the monitoring time of the timeout timer; setting a timing protection circuit between the MCU and the DE pin, adjusting the level state of the DE pin based on the first duration that the DE pin maintains a high level and the timing protection circuit; setting a periodic monitoring mechanism in the MCU, monitoring the communication between the uninterruptible power supply and the RS-485 based on the periodic monitoring mechanism to obtain a monitoring result; determining a corresponding hierarchical recovery strategy based on the monitoring result; and the hierarchical recovery strategy is used for recovering the communication between the uninterruptible power supply and the RS-485. In this way, the reliability and stability of the communication link between the UPS and the external monitoring equipment are improved, and the equipment maintenance cost is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, in particular to a RS-485 bus abnormality detection and self-recovery method and device, electronic equipment and storage medium. BACKGROUND

[0002] In critical scenarios such as data centers, communication machine rooms, and industrial control, uninterrupted power supply (UPS) as a core power supply guarantee device needs to realize data interaction with external devices such as host computers, environmental monitoring host computers, building automation systems, and third-party centralized monitoring platforms, to complete UPS operation state monitoring, abnormal alarm reporting, remote parameter control, and other functions, and to guarantee the stable operation and maintenance of the power supply system.

[0003] Among many communication interface solutions, the RS-485 interface has become the mainstream choice for data transmission between UPS and external monitoring devices due to its advantages such as simple wiring, strong anti-electromagnetic interference capability, long transmission distance, and support for multi-node networking. It generally adopts a half-duplex bus communication mode to complete the orderly transmission and reception of data frames in cooperation with master-slave or multi-master polling protocols.

[0004] Due to the communication characteristics of the RS-485 half-duplex bus, only one node is allowed to be in a sending state at any time, and the rest of the nodes must remain in a receiving state. Therefore, the level control and timing coordination of the data enable (DE) signal directly determine the reliability of the entire communication link.

[0005] However, in actual engineering applications, influenced by factors such as complex electromagnetic environment interference, UPS master control program abnormalities, and communication protocol implementation defects, the RS-485 communication link between the UPS and the external monitoring system is prone to problems such as communication deadlock, data reporting interruption, and the ability to recover only through restart. Such faults not only severely reduce the continuous availability of the UPS in unattended scenarios, but also significantly increase the cost of later maintenance of the equipment. SUMMARY

[0006] Therefore, it is necessary to provide a RS-485 bus abnormality detection and self-recovery method, device, electronic equipment and storage medium to solve the above technical problems.

[0007] In a first aspect, the present application provides a RS-485 bus abnormality detection and self-recovery method, which comprises:

[0008] A transceiving state machine containing a timeout timer is set in the MCU in the uninterrupted power supply, and the transceiving state of the transceiving state machine and / or the level of the DE pin of the RS-485 is controlled based on the monitoring time of the timeout timer;

[0009] A timing protection circuit is arranged between the MCU and the DE pin, and the level state of the DE pin is adjusted based on a first duration that the DE pin maintains a high level and the timing protection circuit;

[0010] A periodic monitoring mechanism is arranged in the MCU, and the communication between the uninterruptible power supply and the RS-485 is monitored based on the periodic monitoring mechanism to obtain a monitoring result;

[0011] Based on the monitoring result, a corresponding hierarchical recovery strategy is determined, which is used to recover the communication between the uninterruptible power supply and the RS-485.

[0012] In one of the embodiments, the monitoring time based on the timeout timer controls the transceiving state of the transceiving state machine and / or the level of the DE pin of the RS-485, including:

[0013] After the transceiving state is switched to a sending state, if the second duration of the sending state monitored by the timeout timer is greater than a first preset time, the level state of the DE pin is switched from a high level to a low level, and the transceiving state is switched to an idle state or a receiving state;

[0014] After the communication data is sent, when the third duration of the sending state monitored by the timeout timer is equal to a second preset time, the level state of the DE pin is switched from a high level to a low level.

[0015] In one of the embodiments, the adjustment of the level state of the DE pin based on the first duration that the DE pin maintains a high level and the timing protection circuit, including:

[0016] In the case where the first duration is greater than a continuous reference time, the level state of the DE pin is switched from a high level to a low level by the timing protection circuit, and the communication state of the RS-485 is switched to an idle state or a receiving state.

[0017] In one of the embodiments, the periodic monitoring mechanism arranged in the MCU determines the corresponding hierarchical recovery strategy based on the monitoring result of the communication between the uninterruptible power supply and the RS-485, including:

[0018] The monitoring result is determined based on the successful transceiving time, the communication error count, and / or the idle duration of the communication between the uninterruptible power supply and the RS-485;

[0019] When the monitoring results indicate that communication is abnormal, the MCU determines the graded recovery strategy based on the monitoring results.

[0020] In one embodiment, the tiered recovery strategy includes at least one of the following:

[0021] Level 1: Clear the RS-485 transmit / receive buffer and reset the transmit / receive state of the transmit / receive state machine;

[0022] Level 2: Send a reconnection frame to the external communication device via the RS-485 bus to rebuild the communication link;

[0023] Level 3: The RS-485 is hard reset by outputting a GPIO control signal from the MCU;

[0024] Level 4: Output communication anomaly alarm information.

[0025] In one embodiment, the method further includes:

[0026] Extract key indicators from historical communication data; wherein the key indicators include at least one of signal strength, bit error rate and idle time.

[0027] The time series analysis algorithm is used to analyze the changing trend of the key indicators over time, and a dynamic baseline model is constructed.

[0028] Real-time communication data is input into the dynamic baseline model to obtain anomaly prediction results;

[0029] Based on the monitoring results and the anomaly prediction results, the corresponding graded recovery strategy is matched.

[0030] In one embodiment, matching the corresponding graded recovery strategy based on the monitoring results and the anomaly prediction results includes:

[0031] Using fuzzy logic theory, the target features representing communication anomalies are transformed into fuzzy sets, and the score of recovery urgency is calculated through fuzzy inference process;

[0032] Based on the scoring results, the corresponding graded recovery strategy is matched.

[0033] Secondly, this application also provides an RS-485 bus anomaly detection and self-recovery device, the device comprising:

[0034] The software control module is used to set up a transceiver state machine containing a timeout timer in the MCU within the uninterruptible power supply, and to control the transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 based on the monitoring time of the timeout timer;

[0035] A hardware control module is used to set a timing protection circuit between the MCU and the DE pin, and to adjust the level state of the DE pin based on the first duration of the DE pin maintaining a high level and the timing protection circuit;

[0036] A monitoring module is used to set a periodic monitoring mechanism in the MCU, and to monitor the communication between the uninterruptible power supply and the RS-485 based on the periodic monitoring mechanism to obtain monitoring results;

[0037] The recovery module is used to determine a corresponding graded recovery strategy based on the monitoring results; the graded recovery strategy is used to restore communication between the uninterruptible power supply and the RS-485.

[0038] Thirdly, this application also provides an electronic device, including a processor and a memory; wherein the memory is used to store a computer program; and the processor is configured to, when executing the computer program, implement the steps of the method described in any embodiment of this application.

[0039] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps of the methods described in any embodiment of this application.

[0040] The aforementioned RS-485 bus anomaly detection and self-recovery method employs a three-layer collaborative protection approach: software state machine, hardware timing protection, and a tiered self-healing mechanism. It leverages the transceiver state machine within the MCU with its built-in timeout timer to achieve precise timing control of the RS-485 bus transmit / receive status and the DE pin level. Furthermore, a hardware safety net is provided through a timing protection circuit independent of the MCU, preventing the DE pin from continuously occupies the bus due to MCU program anomalies. Simultaneously, the periodic monitoring mechanism and tiered recovery strategy enable automated identification and step-by-step handling of communication anomalies, significantly reducing the probability of RS-485 bus failures such as jamming and data reporting interruptions caused by electromagnetic interference and program defects. This significantly improves the reliability and stability of the communication link between the UPS and external monitoring equipment in unattended scenarios, reducing equipment maintenance costs. Attached Figure Description

[0041] Figure 1 This is a flowchart illustrating an RS-485 bus anomaly detection and self-recovery method according to an exemplary embodiment;

[0042] Figure 2 This is a schematic diagram of the control flow of a transceiver state machine according to an exemplary embodiment;

[0043] Figure 3 This is a schematic diagram of a timing protection circuit according to an exemplary embodiment;

[0044] Figure 4A This is a schematic diagram illustrating a normal transmission waveform according to an exemplary embodiment;

[0045] Figure 4B This is a schematic diagram of a program runaway timeout protection waveform according to an exemplary embodiment;

[0046] Figure 5 This is a structural block diagram of an RS-485 bus anomaly detection and self-recovery device according to an exemplary embodiment;

[0047] Figure 6 This is an internal structural diagram of an electronic device according to an exemplary embodiment. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0049] The terms "first," "second," and "third" used in the embodiments of this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.

[0050] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0051] In some embodiments, the RS-485 bus anomaly detection and self-recovery method provided in this application can be applied to electronic devices. The electronic device controls communication between the UPS and external communication equipment by executing the RS-485 bus anomaly detection and self-recovery method. The electronic device can be any mobile terminal or fixed terminal. The terminal can be a device that provides voice and / or data connectivity to a user. For example, the terminal can be an IoT terminal, such as a host computer, sensor device, mobile phone or so-called "cellular" phone, and a computer with an IoT terminal; for example, it can be a fixed, portable, pocket-sized, handheld, or computer-embedded device.

[0052] In some embodiments, such as Figure 1 As shown, an RS-485 bus anomaly detection and self-recovery method is provided, applied to a data transceiver system; the data transceiver system includes an uninterruptible power supply and an RS-485 bus; the method includes the following steps:

[0053] S101, A transceiver state machine containing a timeout timer is set in the MCU within the uninterruptible power supply, and the transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 are controlled based on the monitoring time of the timeout timer.

[0054] In this embodiment, the transceiver state machine indicates the software logic control program running in the UPS main control MCU, which includes the transceiver status and status switching rules, and is used to uniformly schedule the entire process of sending and receiving on the RS-485 bus.

[0055] In this embodiment of the application, the transmit / receive status includes three core states: idle, receive, and send.

[0056] Optionally, the transmit state is one of the operating states of the transceiver state machine. In this state, the MCU outputs a high level to the DE pin, and the RS-485 transceiver enters the transmit mode, converting the UPS communication data into differential levels and transmitting it to the RS-485 bus.

[0057] Optionally, the receive state is one of the operating states of the transceiver state machine. In this state, the MCU outputs a low level to the DE pin, and the RS-485 transceiver enters the receive mode, converting the bus differential level to a TTL level for the MCU to read.

[0058] Optionally, the idle state is the initial standby state of the transceiver state machine. In this state, the RS-485 transceiver neither transmits nor receives data, and the RS-485 bus is in a standby state with no data transmission.

[0059] In this embodiment, the timeout timer indicates the timer / counter function module built into the UPS main control MCU, which is used to accurately measure the duration of each state of the transceiver state machine and provide a time basis for state switching.

[0060] In this embodiment, the DE pin indicates the transmit enable control pin of the RS-485 transceiver. A high level enables the transmit function, and a low level disables the transmit function and enables the receive function. Its level state is directly controlled by the UPS main control MCU.

[0061] In some embodiments, controlling the transmit / receive state of the transceiver state machine and / or the level of the DE pin of the RS-485 based on the monitoring time of the timeout timer includes:

[0062] After the transmit / receive state is switched to the transmit state, if the timeout timer detects that the second duration of the transmit state is greater than the first preset time, then the level of the DE pin is switched from high level to low level and the transmit / receive state is switched to idle state or receive state.

[0063] After the communication data is sent, when the timeout timer detects that the third duration of the sending state is equal to the second preset time, the level state of the DE pin is switched from high level to low level.

[0064] In this embodiment, the first preset time indicates the maximum allowable duration threshold set for the transmission state, used to avoid the problem of excessively long transmission states due to program abnormalities, which could monopolize the bus. For example, the first preset time can be 1 second, 2 seconds, etc.

[0065] In this embodiment, the second preset time indicates the transmission protection time (t_guard), which is a threshold value for the duration of delaying the shutdown of the DE pin after the communication data transmission is completed, used to ensure the waveform integrity of the last byte. For example, the second preset time can be 0.5ms, 1ms, or 2ms, etc.

[0066] In this embodiment of the application, the second duration indicates the actual duration for which the transceiver state machine maintains the transmitting state, which is measured in real time by a timeout timer.

[0067] In this embodiment of the application, the third duration indicates the actual duration for which the transceiver state machine maintains the sending state after the communication data is sent, and is precisely measured by the timeout timer.

[0068] In some embodiments, after the UPS main controller is powered on and initialized, the communication module enters the idle state by default; at the same time, the MCU outputs a low level to the DE pin of the RS-485 transceiver and sets the RE pin to a high level. At this time, the RS-485 transceiver is locked in receive mode, the bus is in standby state, and it can listen to the instructions issued by the external monitoring device in real time.

[0069] In some embodiments, when the upper-layer application of the UPS (such as the power status monitoring module) generates a data frame to be sent (such as battery load rate, alarm information) and initiates a transmission request, the communication module immediately switches from the idle state to the transmission preparation state (TX_PREPARE). In this state, the core executes the bus frame interval check logic, that is, reads the timestamp of the most recent data activity on the bus, compares it with the preset frame interval threshold, and if the difference between the current time and the time of the last bus activity does not reach the threshold, a delay waiting mechanism is triggered until the frame interval requirement is met, so as to avoid bus data conflicts caused by concurrent transmission of multiple nodes.

[0070] In some embodiments, after the frame interval check passes, the communication module immediately starts the transmit timeout timer (the first preset time is 500ms) and simultaneously switches the transmit / receive state to transmit state (TX). At this time, the MCU outputs a high-level transmit enable control signal, which is transmitted to the DE pin of the RS-485 transceiver through the hardware timing protection circuit, driving the transceiver to switch to transmit mode. Subsequently, the communication module uses interrupt or DMA transmission to write the data frame to be transmitted byte by byte into the UART transmit register, completing the output of the entire frame of data to the RS-485 bus.

[0071] In some embodiments, during the transmission state, the communication module continuously monitors the "transmission complete" flag bit of the UART. If the flag bit is not detected after the transmission timeout timer (second duration) reaches the first preset time (e.g., due to program lag or bus interference causing data transmission to stop), it is determined to be a transmission abnormality. At this time, the MCU immediately executes the forced exit mechanism, quickly pulls the transmission enable control signal low, drives the DE pin level to switch to low level, and resets the transceiver state machine to the idle state or directly switches to the receive state to avoid long-term bus occupation causing communication deadlock.

[0072] In some embodiments, when the communication module detects that the last byte of data from the UART has been successfully transmitted and triggers the "transmission complete" flag, the transceiver state machine immediately switches from the transmitting state to the transmitting end state (TX_END); a transmit protection timer t_guard (with a preset second preset time, i.e., a protection time of 2ms) is started simultaneously. During this period, the MCU keeps the transmit enable control signal at a high level to ensure that the DE pin remains at a high level, allowing the RS-485 transceiver sufficient time to complete the differential level output of the last byte, completely avoiding waveform distortion or loss of the last byte due to premature shutdown of DE; after the transmit protection timer reaches the threshold, the MCU pulls the transmit enable control signal low, driving the DE pin level to switch to a low level, the RS-485 transceiver switches back to receive mode, and the state machine switches to the receive state accordingly.

[0073] In some embodiments, after the transceiver state machine enters the receive state (RX), the RS-485 transceiver continuously listens for the response frame data of the external monitoring device on the RS-485 bus; the communication module performs integrity and validity checks on the received data according to the preset communication protocol rules, such as frame header verification, frame length matching, and CRC cyclic redundancy check, filters out legal data frames and parses them into instructions or feedback information that can be recognized by the upper layer application, and updates the bus activity timestamp to provide a basis for the frame interval check of the next data transmission.

[0074] For example, such as Figure 2 As shown, Figure 2 This is a schematic diagram of the control flow of the transmit / receive state machine.

[0075] In this embodiment, the frame interval check in the transmit preparation state avoids bus conflicts caused by concurrent transmission from multiple nodes, and the timeout timer in the transmit state implements a forced exit mechanism for transmission in abnormal scenarios, effectively preventing the DE signal from occupying the bus at a high level for a long time. At the same time, the protection time in the transmit end state ensures the complete transmission of the last byte, avoiding waveform distortion or data loss. The multi-dimensional verification in the receive state ensures the validity of the response data. The entire process achieves precise timing control of the entire RS-485 communication link from transmit triggering to receive parsing, completely solving problems such as communication deadlock and data transmission anomalies at the software level. This significantly improves the reliability, stability, and data transmission accuracy of communication between the UPS and external monitoring equipment, adapts to the long-term stable operation requirements in unattended scenarios, and reduces equipment maintenance costs.

[0076] S102, a timing protection circuit is set between the MCU and the DE pin, and the level state of the DE pin is adjusted based on the first duration of the DE pin maintaining a high level and the timing protection circuit.

[0077] In this embodiment, the timing protection circuit is a hardware circuit module independent of the UPS main control MCU software. It is connected in series between the MCU transmit enable control terminal and the DE pin of the RS-485 transceiver. Its core function is to monitor the duration of the high level of the DE pin in real time and automatically force the DE level to go low when the preset threshold is exceeded. Common implementation forms include RC monostable circuit, 555 timer chip or programmable logic device (PLD), etc.

[0078] In this embodiment, the first duration indicator refers to the actual duration for which the DE pin of the RS-485 transceiver remains at a high level. This duration is independently monitored by the timing protection circuit through RC charging and discharging or the chip timing function, without relying on the MCU software timing module.

[0079] In some embodiments, adjusting the level state of the DE pin based on the first duration of the DE pin remaining high and the timing protection circuit includes:

[0080] If the first duration is greater than the continuous reference time, the timing protection circuit switches the level of the DE pin from high to low and switches the communication state of the RS-485 to idle or receive.

[0081] In this embodiment, the maximum allowable high-level duration threshold of the DE pin in the continuous reference time indication timing protection circuit is used to define the bus occupancy safety boundary at the hardware level. The value is usually slightly larger than the software timeout threshold (such as 3s) to ensure that the bus is protected by hardware as a fallback in extreme scenarios.

[0082] In some embodiments, the transmit enable control signal output by the UPS main control MCU is defined as TX_EN_REQ. This signal is not directly connected to the DE pin of the RS-485 transceiver, but is instead preferentially connected to an independent timing protection circuit, such as... Figure 3 As shown, Figure 3 This is a schematic diagram of the timing protection circuit. The output signal of the timing protection circuit is defined as DE_OUT, which is directly connected to the DE pin of the RS-485 transceiver, forming an isolated control link: MCU control signal → hardware timing protection circuit → RS-485 transceiver. After the UPS main controller completes initialization upon power-up, the timing protection circuit automatically enters a steady state: at this time, TX_EN_REQ outputs a low level by default, DE_OUT synchronously remains low, the RS-485 transceiver is locked in receive mode, and the bus is in an unoccupied standby state, ensuring that commands from external monitoring devices can be received normally by the UPS.

[0083] In some embodiments, when the UPS needs to send data to an external monitoring device, the MCU switches TX_EN_REQ from low level to high level; this level change triggers the timing protection circuit to respond immediately, on the one hand pulling DE_OUT high synchronously (making the RS-485 transceiver enter the transmission mode), and on the other hand starting the timing counter module inside the timing protection circuit to start accumulating the duration of the high level of DE_OUT.

[0084] In some embodiments, within the continuous reference time T_max (e.g., 2 seconds) of the timing protection circuit, if the MCU has completed data transmission and actively pulls TX_EN_REQ low (compliant with normal communication procedures), the hardware timing protection circuit will immediately and synchronously pull DE_OUT low, causing the RS-485 transceiver to exit the transmitting state early and switch to the receiving mode, without affecting subsequent bus data interaction; if TX_EN_REQ remains high within T_max, DE_OUT will remain high, ensuring complete data frame transmission. When the timing count of the timing protection circuit, i.e., the first duration, reaches the continuous reference time T_max, regardless of whether the MCU's TX_EN_REQ is still high, the circuit will automatically trigger the monostable cycle end logic, forcibly pulling DE_OUT back to low, forcing the RS-485 transceiver to exit the transmitting state, strictly limiting the maximum duration for a single node to occupy the bus.

[0085] In some embodiments, if the UPS needs to continuously send multiple frames of data (such as batch reporting of battery status and alarm logs), the MCU needs to first pull TX_EN_REQ (transmission enable control signal) low and then pull the signal high again. This triggers the timing protection circuit to start a new monostable cycle, causing DE_OUT (the output signal of the timing protection circuit) to go high again, thus achieving orderly transmission of multiple frames of data and ensuring that each frame transmission is constrained by the T_max duration. For example, as shown... Figure 4A As shown, Figure 4A This is a schematic diagram of a normal transmitted waveform.

[0086] In some embodiments, when the MCU experiences a sudden program crash, GPIO port malfunction, or system freeze, causing TX_EN_REQ (transmit enable control signal) to remain high, the timing protection circuit, operating independently of the MCU program, can still complete the timing count according to the preset T_max, and forcibly pull DE_OUT (output signal of the timing protection circuit) low after the timeout. Even if the software layer (such as the transceiver state machine) does not perform a shutdown operation, the hardware layer can still release the RS-485 bus, reducing the possibility of a single UPS node permanently occupying the bus and causing a deadlock in the entire link communication, thus achieving the final fallback protection at the physical layer. For example, as shown... Figure 4B As shown, Figure 4B This is a schematic diagram of the waveform for program crash timeout protection.

[0087] In this embodiment, under extreme fault scenarios such as MCU crash, program crash, and GPIO port malfunction, DE_OUT is forcibly pulled low according to the preset T_max to prevent a single UPS node from permanently occupying the RS-485 bus. This forms a "hardware and software dual protection" with the software layer transceiver state machine, which not only ensures the flexibility of normal data transmission, but also eliminates the problem of end-to-end communication deadlock caused by single-point software failure. This significantly improves the reliability and fault resistance of UPS communication with external monitoring equipment, adapts to the long-term stable operation requirements of unattended scenarios such as data centers and industrial control, and reduces link maintenance costs.

[0088] S103, a periodic monitoring mechanism is set in the MCU, and the communication between the uninterruptible power supply and the RS-485 is monitored based on the periodic monitoring mechanism to obtain the monitoring results.

[0089] In this embodiment, the periodic monitoring mechanism instructs the software monitoring logic running in the UPS main control MCU to trigger communication status checks at a preset fixed period, thereby sensing the health status of the RS-485 bus communication link in real time. This is the core operating mode of the communication watchdog task.

[0090] In some embodiments, the step of setting a periodic monitoring mechanism in the MCU, and determining a corresponding graded recovery strategy based on the monitoring results of the communication between the uninterruptible power supply and the RS-485 based on the periodic monitoring mechanism, includes:

[0091] The monitoring results are determined based on the successful transmission and reception time, communication error count, and / or idle duration of the communication between the uninterruptible power supply and the RS-485;

[0092] When the monitoring results indicate that communication is abnormal, the MCU determines the graded recovery strategy based on the monitoring results.

[0093] In this embodiment, the successful transmission and reception time indication is the system timestamp recorded by the periodic monitoring mechanism when the UPS and the external monitoring device complete a complete and effective data interaction (valid frame header, successful verification, and normal command response) in one instance. This timestamp is the core basis for determining whether the communication link is interrupted.

[0094] In this embodiment of the application, the communication error count indicates the cumulative number of various faults that occur during RS-485 communication and the classification of fault types, which are recorded by a periodic monitoring mechanism. Fault types include transmit / receive timeout, data verification failure, and missing response frames.

[0095] In this embodiment, the idle duration is measured by a periodic monitoring mechanism and is the continuous duration during which the RS-485 bus has no valid data frame transmission and the UPS has not entered the normal receiving process. This is used to identify bus lag or link disconnection.

[0096] In some embodiments, when deploying a periodic monitoring mechanism in the UPS main control MCU software, a fixed execution cycle can be configured, and three communication anomaly judgment thresholds can be preset. For example, if the difference between the successful transmission and reception time and the current device time exceeds 2 seconds, the continuous communication error count is ≥3 times, and the bus idle duration is ≥15 seconds, the communication anomaly is judged when any of the thresholds is met. At the same time, the successful transmission and reception timestamp is set to the initial time of system power-on, the communication error count is cleared to zero, and the idle duration is initialized to 0, thus completing the initialization and parameter configuration of the periodic monitoring mechanism.

[0097] For example, the periodic monitoring mechanism can be woken up once every 1 second to sequentially perform operations such as reading the current device time and calculating the difference with the most recent successful transmission and reception timestamp, extracting the communication error count and specific type from the RS-485 communication protocol stack, reading the bus status register to determine whether the bus is in a valid transmission or normal reception process and accumulating the idle duration. When the collected data meets the preset abnormal threshold, the monitoring result of the communication abnormality is output and the hierarchical recovery strategy is immediately triggered.

[0098] In some embodiments, the tiered recovery strategy includes at least one of the following:

[0099] Level 1: Clear the RS-485 transmit / receive buffer and reset the transmit / receive state of the transmit / receive state machine;

[0100] Level 2: Send a reconnection frame to the external communication device via the RS-485 bus to rebuild the communication link;

[0101] Level 3: The RS-485 is hard reset by outputting a GPIO control signal from the MCU;

[0102] Level 4: Output communication anomaly alarm information.

[0103] In some embodiments, when the monitoring results indicate a communication anomaly, the MCU can first perform a software-level recovery operation, reset the RS-485 transceiver state machine and restore it to the default receive state, and at the same time clear the unsent data frames in the transmit buffer queue and the invalid data fragments in the receive buffer queue, thereby eliminating the software-level state disorder problem.

[0104] In some embodiments, after completing a software-level reset, the MCU briefly prohibits new data transmission requests for 2 seconds, and then sends a standardized handshake frame containing the UPS device ID, communication reset identifier, and reconnection request instruction to the environmental monitoring host to attempt to rebuild the communication link with the other end. If the handshake is successful and a response frame is received from the other end, the communication error count is cleared, the successful transmission and reception timestamp is updated, and the normal data reporting process is restored.

[0105] In some embodiments, if the handshake request is not responded to, the MCU outputs a reset signal through a dedicated GPIO pin to perform a short 50ms hard reset on the RS-485 transceiver, resolving the hardware lag problem caused by electromagnetic interference. After the reset is completed, the handshake frame is sent again to verify whether the communication link has returned to normal.

[0106] In some embodiments, if communication cannot be restored after multiple (e.g., 4) retries following software reset, link reconnection, and hardware reset, the MCU determines that the communication module is faulty and immediately reports an alarm to the UPS upper-level system. At the same time, it writes the time of the abnormality, the error type, and the recovery operation record into the local communication log to provide data support for subsequent fault diagnosis.

[0107] In this embodiment, by deploying a periodic monitoring mechanism in the MCU, the system can collect and analyze the successful transmission and reception time, error count, and bus idle duration in real time, accurately determining the abnormal state of the RS-485 communication link. Simultaneously, relying on a tiered recovery strategy, recovery operations are performed in a step-by-step process: software reset → link handshake reconnection → hardware reset → fault alarm. Lightweight software methods are prioritized to eliminate communication disorder issues, with hardware reset only initiated when software recovery fails. This avoids excessive intervention affecting normal communication and enables automatic recovery in scenarios such as link interference and protocol stack disorder, requiring no manual intervention. Furthermore, the abnormal log recording function provides data support for subsequent fault tracing, significantly improving the stability, anti-interference capability, and operational efficiency of the communication link between the UPS and external monitoring equipment, adapting to the long-term reliable operation requirements of unattended scenarios such as data centers and industrial control.

[0108] S104, Based on the monitoring results, determine the corresponding graded recovery strategy; the graded recovery strategy is used to restore communication between the uninterruptible power supply and the RS-485.

[0109] The aforementioned RS-485 bus anomaly detection and self-recovery method employs a three-layer collaborative protection approach: software state machine, hardware timing protection, and a tiered self-healing mechanism. It leverages the transceiver state machine within the MCU with its built-in timeout timer to achieve precise timing control of the RS-485 bus transmit / receive status and the DE pin level. Furthermore, a hardware safety net is provided through a timing protection circuit independent of the MCU, preventing the DE pin from continuously occupies the bus due to MCU program anomalies. Simultaneously, the periodic monitoring mechanism and tiered recovery strategy enable automated identification and step-by-step handling of communication anomalies, significantly reducing the probability of RS-485 bus failures such as jamming and data reporting interruptions caused by electromagnetic interference and program defects. This significantly improves the reliability and stability of the communication link between the UPS and external monitoring equipment in unattended scenarios, reducing equipment maintenance costs.

[0110] In some embodiments, the method further includes:

[0111] Extract key indicators from historical communication data; wherein the key indicators include at least one of signal strength, bit error rate and idle time.

[0112] The time series analysis algorithm is used to analyze the changing trend of the key indicators over time, and a dynamic baseline model is constructed.

[0113] Real-time communication data is input into the dynamic baseline model to obtain anomaly prediction results;

[0114] Based on the monitoring results and the anomaly prediction results, the corresponding graded recovery strategy is matched.

[0115] In this embodiment of the application, historical communication data indicates the historical operating data accumulated during the communication between the UPS and the external monitoring equipment via the RS-485 bus, including original records such as data transmission and reception timestamps, signal characteristics, and transmission status.

[0116] In this application embodiment, the time series analysis algorithm refers to the algorithm used to mine the changing patterns of time series data, specifically the algorithm adapted to the time series characteristics of communication indicators (such as ARIMA model, exponential smoothing ES, LSTM, etc.), and its core function is to analyze the trend, periodicity and volatility of key indicators over time.

[0117] In this embodiment of the application, the anomaly prediction result may include normal result, abnormal result, the degree of deviation from the baseline when abnormal, and target indicators characterizing communication anomalies.

[0118] In some embodiments, key indicators may also include signal attenuation rate, error frequency, etc.; for example, they can be obtained based on the average of the absolute differences in signal strength at each moment within a predetermined sliding time window.

[0119] In some embodiments, the extracted key indicator time series data (such as a 6-month signal strength sequence) is subjected to a stationarity test (using the ADF test method). If the test result determines that the sequence is non-stationary (e.g., the P value is greater than 0.05), it is converted into a stationary sequence through first-order or second-order difference operations.

[0120] In one embodiment, an algorithm combining autoregressive integral moving average and exponential smoothing can be used to construct a dynamic baseline model (balancing trend fitting and volatility capture). For the stabilized index sequence, the autoregressive order, differencing order, and moving average order of the model are optimized based on the Akaike Information Criterion to obtain the basic autoregressive integral moving average model for each index. Furthermore, an exponential smoothing algorithm is introduced to correct the prediction error of the autoregressive integral moving average model. The smoothing coefficient can be set to a range of 0.1 to 0.9 and determined by grid search with a step size of 0.1 to minimize the model fitting error.

[0121] In some embodiments, the dynamic baseline model outputs the predicted value (i.e., the baseline center value) and the predicted standard deviation of the indicator at each time moment. The range of the baseline center value plus or minus three times the predicted standard deviation is taken as the normal value range of the indicator at that time moment, forming a dynamic baseline. Real-time communication data within a predetermined time range is periodically added to the historical dataset to retrain the model and update the baseline-related parameters, ensuring that the baseline can adapt to changes in the communication environment (such as changes in electromagnetic interference intensity, link aging, etc.).

[0122] In some embodiments, for each indicator, its deviation from the dynamic baseline is calculated; a dual judgment threshold is set: first, the deviation of any indicator is greater than 3 (hard threshold, corresponding to a low-probability abnormal event); second, the deviation of at least two indicators is greater than 2 (soft threshold, corresponding to multi-indicator collaborative abnormality); if either rule is met, it is judged as abnormal, otherwise it is judged as normal; the abnormality prediction result is output.

[0123] In some embodiments, matching the corresponding graded recovery strategy based on the monitoring results and the anomaly prediction results includes:

[0124] Using fuzzy logic theory, the target features representing communication anomalies are transformed into fuzzy sets, and the score of recovery urgency is calculated through fuzzy inference process;

[0125] Based on the scoring results, the corresponding graded recovery strategy is matched.

[0126] In this embodiment of the application, the target feature indicates the key quantitative parameters that can characterize the degree of communication anomaly and serve as the input basis for fuzzy logic analysis. Specifically, it may include, but is not limited to, error frequency (counting the number of communication errors per minute), signal attenuation rate (reflecting how fast the signal strength decreases), bus idle time (the duration of continuous data transmission without effective data transmission), and deviation level (mild / moderate / severe, determined based on the anomaly prediction results of the dynamic baseline model).

[0127] In this embodiment of the application, fuzzy logic theory indicates that precise numerical features are transformed into fuzzy concepts (such as "high", "medium", "low"), and logical reasoning is performed through preset rules to finally output quantifiable decision results.

[0128] In this embodiment of the application, the fuzzy set refers to the set constructed based on fuzzy logic theory, which is used to describe fuzzy concepts (such as "high error frequency" and "long idle time"). Each target feature corresponds to multiple fuzzy sets. The degree to which the feature belongs to a certain fuzzy set is determined by the membership function (the value ranges from 0 to 1, and the closer it is to 1, the higher the degree of fit).

[0129] In some embodiments, a corresponding fuzzy set and membership function (such as a trapezoidal membership function) are defined for each target feature, and the precise quantized value is converted into the membership degree of the fuzzy set. Based on the experience of experts in the field of communication, fuzzy rules covering all combinations of target features are designed (e.g., 4 features, 3 to 4 fuzzy sets for each feature, totaling 144 rules). The rules adopt the "IF-THEN" form, for example: ① If the error frequency is low, the signal attenuation rate is slow, the bus idle time is short, and the deviation level is low, then the recovery urgency is extremely low; ② If the error frequency is high, the signal attenuation rate is fast, the bus idle time is medium, and the deviation level is medium, then the recovery urgency is high; ③ If the error frequency is extremely high, the signal attenuation rate is fast, the bus idle time is long, and the deviation level is high, then the recovery urgency is extremely high.

[0130] In some embodiments, for each fuzzy rule, the minimum membership degree of the fuzzy sets corresponding to all target features in the rule is taken as the trigger strength of the rule (i.e., the degree to which the rule is effective). For example, if a rule condition is "high error frequency (membership degree 0.7), fast signal attenuation rate (membership degree 0.8), medium bus idle time (membership degree 0.6), medium deviation level (membership degree 1.0)," then the trigger strength of the rule is 0.6. For each triggered rule, the minimum value of the trigger strength and the membership degree of the fuzzy set corresponding to the recovery urgency of the rule is taken to obtain the output membership degree of the single rule. The output membership degree of untriggered rules is 0. Then, the maximum value of the output membership degree of all rules is taken to obtain the global output membership degree of the recovery urgency.

[0131] In some embodiments, the discretized centroid method is used to transform the global output membership degree into an accurate score of recovery urgency. For example, the score can be: Recovery Urgency Score = (Sum of "Score Value × Corresponding Global Output Membership Degree × Sampling Step Size" for all sampled points) ÷ (Sum of "Corresponding Global Output Membership Degree × Sampling Step Size" for all sampled points); where the corresponding global output membership degree indicates the value of each sampled point in the global output membership function; and the sampling step size indicates the value of each sampled point in the global output membership function.

[0132] In some embodiments, the electronic device can preset a graded recovery strategy library, dividing matching rules according to the recovery urgency score range to ensure the targeted execution of the strategy. For example, when the score is 0-20 (very low), a parameter fine-tuning strategy can be matched, such as adjusting the baud rate of RS-485 communication, increasing the receiver sampling window, and optimizing communication parameters to adapt to minor anomalies without interrupting current data transmission; when the score is 20-40 (low), a software reset strategy can be matched, such as resetting the communication state machine to the default receive state, clearing the transmit / receive buffer queue, and restarting the communication protocol stack to quickly eliminate communication disorder at the software level; when the score is 40-60 (medium), a link reconnection strategy can be matched, such as briefly prohibiting new sending requests (for 2 seconds) and monitoring externally. The device sends an encrypted handshake frame to renegotiate communication parameters and establish a link, ensuring the continuity of data transmission. When the score is 60-80 (high), a hardware switching strategy can be matched. For example, switching to a backup RS-485 transceiver activates the electromagnetic shielding enhancement module to resolve hardware-level faults (such as transceiver jamming or severe signal attenuation), while recording hardware fault logs. When the score is 80-100 (extremely high), an emergency bypass strategy can be matched, suspending non-critical data transmission, switching to a backup communication link (such as Ethernet), and reporting alarm information (highest priority) to the UPS upper-level system to ensure that core power supply status data is reported normally.

[0133] In this embodiment, multi-dimensional key indicators are extracted from historical communication data and an adaptive dynamic baseline model is constructed. This breaks through the rigidity of traditional fixed threshold judgment and can update baseline parameters in real time according to changes in the communication environment (such as electromagnetic interference and link aging), significantly reducing the false positive rate of anomalies. At the same time, deviation analysis of real-time communication data is combined to achieve early anomaly prediction, and periodic monitoring results are integrated to form a comprehensive anomaly level, reducing the limitations of a single judgment dimension. Based on this, a graded recovery strategy is matched and executed in a lightweight to heavyweight step-by-step manner from parameter fine-tuning → software reset → hardware switching. This ensures efficient resolution of communication faults while minimizing intervention in normal data transmission. The entire process can complete anomaly identification, strategy matching, and fault recovery without manual intervention, significantly improving the stability, anti-interference capability, and operation and maintenance efficiency of the UPS to RS-485 communication link in unattended scenarios, and reducing equipment maintenance costs.

[0134] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0135] Based on the same inventive concept, this application also provides an RS-485 bus anomaly detection and self-recovery device for implementing the RS-485 bus anomaly detection and self-recovery method described above. The solution provided by this device is similar to the solution described in the above method; therefore, the specific limitations of one or more RS-485 bus anomaly detection and self-recovery device embodiments provided below can be found in the limitations of the RS-485 bus anomaly detection and self-recovery method described above, and will not be repeated here.

[0136] In one embodiment, such as Figure 5 As shown, an RS-485 bus anomaly detection and self-recovery device is provided, applied to a data transceiver system; the data transceiver system includes an uninterruptible power supply and an RS-485 bus; the device includes:

[0137] The software control module 10 is used to set up a transceiver state machine containing a timeout timer in the MCU within the uninterruptible power supply, and to control the transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 based on the monitoring time of the timeout timer.

[0138] The hardware control module 20 is used to set a timing protection circuit between the MCU and the DE pin, and to adjust the level state of the DE pin based on the first duration of the DE pin maintaining a high level and the timing protection circuit;

[0139] The monitoring module 30 is used to set a periodic monitoring mechanism in the MCU, and to monitor the communication between the uninterruptible power supply and the RS-485 based on the periodic monitoring mechanism to obtain monitoring results;

[0140] The recovery module 40 is used to determine a corresponding graded recovery strategy based on the monitoring results; the graded recovery strategy is used to restore communication between the uninterruptible power supply and the RS-485.

[0141] In one embodiment, the software control module 10 is configured to perform the following steps:

[0142] After the transmit / receive state is switched to the transmit state, if the timeout timer detects that the second duration of the transmit state is greater than the first preset time, then the level of the DE pin is switched from high level to low level and the transmit / receive state is switched to idle state or receive state.

[0143] After the communication data is sent, when the timeout timer detects that the third duration of the sending state is equal to the second preset time, the level state of the DE pin is switched from high level to low level.

[0144] In one embodiment, the hardware control module 20 includes:

[0145] If the first duration is greater than the continuous reference time, the timing protection circuit switches the level of the DE pin from high to low and switches the communication state of the RS-485 to idle or receive.

[0146] In one embodiment, the recovery module 40 is configured to perform the following steps:

[0147] The monitoring results are determined based on the successful transmission and reception time, communication error count, and / or idle duration of the communication between the uninterruptible power supply and the RS-485;

[0148] When the monitoring results indicate that communication is abnormal, the MCU determines the graded recovery strategy based on the monitoring results.

[0149] In one embodiment, the graded recovery strategy includes at least one of the following:

[0150] Level 1: Clear the RS-485 transmit / receive buffer and reset the transmit / receive state of the transmit / receive state machine;

[0151] Level 2: Send a reconnection frame to the external communication device via the RS-485 bus to rebuild the communication link;

[0152] Level 3: The RS-485 is hard reset by outputting a GPIO control signal from the MCU;

[0153] Level 4: Output communication anomaly alarm information.

[0154] In one embodiment, the apparatus further includes:

[0155] The indicator extraction module is used to extract key indicators from historical communication data; wherein the key indicators include at least one of signal strength, bit error rate and idle time.

[0156] The model building module is used to analyze the changing trends of the key indicators over time using time series analysis algorithms and to build a dynamic baseline model.

[0157] The prediction module is used to input real-time communication data into the dynamic baseline model to obtain anomaly prediction results;

[0158] The matching and recovery module is used to match the corresponding graded recovery strategy based on the monitoring results and the anomaly prediction results.

[0159] In one embodiment, the first matching recovery module is configured to perform the following steps:

[0160] Using fuzzy logic theory, the target features representing communication anomalies are transformed into fuzzy sets, and the score of recovery urgency is calculated through fuzzy inference process;

[0161] Based on the scoring results, the corresponding graded recovery strategy is matched.

[0162] Each module in the aforementioned RS-485 bus anomaly detection and self-recovery device can be implemented entirely or partially through software, hardware, or a combination thereof. Each module can be embedded in the processor of the electronic device in hardware form or independent of the processor, or stored in the memory of the electronic device in software form, so that the processor can call and execute the corresponding operations of each module.

[0163] In one embodiment, an electronic device is provided, the internal structure of which can be shown as follows: Figure 6 As shown, the electronic device includes a processor, memory, communication interface, display unit, and input device connected via a method bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores operating methods and computer programs. The internal memory provides an environment for the operation of the operating methods and computer programs in the non-volatile storage medium. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When executed by the processor, the computer program implements an RS-485 bus anomaly detection and self-recovery method. The display screen can be an LCD screen or an e-ink display screen. The input device can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the device's casing, or an external keyboard, touchpad, or mouse.

[0164] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the electronic device to which the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements.

[0165] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0166] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps performed by the processor of the electronic device of any of the above.

[0167] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0168] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, compilable logic units, quantum computing-based data processing logic units, etc., and are not limited to these.

[0169] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0170] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for detecting and self-recovering an RS-485 bus anomaly, characterized in that, The method is applied to a data transceiver system; the data transceiver system includes an uninterruptible power supply and an RS-485; the method includes: A transceiver state machine containing a timeout timer is set in the MCU within the uninterruptible power supply. The transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 are controlled based on the monitoring time of the timeout timer. A timing protection circuit is set between the MCU and the DE pin, and the level state of the DE pin is adjusted based on the first duration of the DE pin maintaining a high level and the timing protection circuit. A periodic monitoring mechanism is set in the MCU, and the communication between the uninterruptible power supply and the RS-485 is monitored based on the periodic monitoring mechanism to obtain the monitoring results; Based on the monitoring results, a corresponding graded recovery strategy is determined; the graded recovery strategy is used to restore communication between the uninterruptible power supply and the RS-485.

2. The method according to claim 1, characterized in that, The control of the transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 based on the monitoring time of the timeout timer includes: After the transmit / receive state is switched to the transmit state, if the timeout timer detects that the second duration of the transmit state is greater than the first preset time, then the level of the DE pin is switched from high level to low level and the transmit / receive state is switched to idle state or receive state. After the communication data is sent, when the timeout timer detects that the third duration of the sending state is equal to the second preset time, the level state of the DE pin is switched from high level to low level.

3. The method according to claim 1, characterized in that, The adjustment of the voltage level of the DE pin based on the first duration of the DE pin maintaining a high level and the timing protection circuit includes: If the first duration is greater than the continuous reference time, the timing protection circuit switches the level of the DE pin from high to low and switches the communication state of the RS-485 to idle or receive.

4. The method according to claim 1, characterized in that, The step involves setting a periodic monitoring mechanism in the MCU, and based on the monitoring results of the communication between the uninterruptible power supply and the RS-485, determining a corresponding graded recovery strategy, including: The monitoring results are determined based on the successful transmission and reception time, communication error count, and / or idle duration of the communication between the uninterruptible power supply and the RS-485; When the monitoring results indicate that communication is abnormal, the MCU determines the graded recovery strategy based on the monitoring results.

5. The method according to claim 4, characterized in that, The tiered recovery strategy includes at least one of the following: Level 1: Clear the RS-485 transmit / receive buffer and reset the transmit / receive state of the transmit / receive state machine; Level 2: Send a reconnection frame to the external communication device via the RS-485 bus to rebuild the communication link; Level 3: The RS-485 is hard reset by outputting a GPIO control signal from the MCU; Level 4: Output communication anomaly alarm information.

6. The method according to claim 1, characterized in that, The method further includes: Extract key indicators from historical communication data; wherein, the key indicators include at least one of signal strength, bit error rate and idle time. The time series analysis algorithm is used to analyze the changing trend of the key indicators over time, and a dynamic baseline model is constructed. Real-time communication data is input into the dynamic baseline model to obtain anomaly prediction results; Based on the monitoring results and the anomaly prediction results, the corresponding graded recovery strategy is matched.

7. The method according to claim 6, characterized in that, The step of matching the corresponding graded recovery strategy based on the monitoring results and the anomaly prediction results includes: Using fuzzy logic theory, the target features representing communication anomalies are transformed into fuzzy sets, and the score of recovery urgency is calculated through fuzzy inference process; Based on the scoring results, the corresponding graded recovery strategy is matched.

8. An RS-485 bus anomaly detection and self-recovery device, characterized in that, It is applied to a data transceiver system; the data transceiver system includes an uninterruptible power supply and an RS-485; the device includes: The software control module is used to set up a transceiver state machine containing a timeout timer in the MCU within the uninterruptible power supply, and to control the transceiver state of the transceiver state machine and / or the level of the DE pin of the RS-485 based on the monitoring time of the timeout timer; A hardware control module is used to set a timing protection circuit between the MCU and the DE pin, and to adjust the level state of the DE pin based on the first duration of the DE pin maintaining a high level and the timing protection circuit; A monitoring module is used to set a periodic monitoring mechanism in the MCU, and to monitor the communication between the uninterruptible power supply and the RS-485 based on the periodic monitoring mechanism to obtain monitoring results; The recovery module is used to determine a corresponding graded recovery strategy based on the monitoring results; the graded recovery strategy is used to restore communication between the uninterruptible power supply and the RS-485.

9. An electronic device, characterized in that, The system includes a processor and a memory; wherein the memory is used to store a computer program; and the processor is configured to, when executing the computer program, implement the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it performs the steps of the method according to any one of claims 1 to 7.

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