Output admittance remodeling and robust active damping control method based on passivity theory

Abstract

The invention relates to the technical field of inverter grid connection, and discloses a passivity theory-based output admittance remodeling and robust active damping control method, which comprises the following steps of: establishing an equivalent model of output admittance of an inverter; based on the equivalent model, the output admittance is decomposed into output sub-admittances corresponding to a plurality of active damping loops, and each output sub-admittance corresponds to one active damping loop; and respectively performing delay compensation on each active damping loop through the extended state observer to obtain an optimized output sub-admittance corresponding to each active damping loop. In the invention, the time domain prediction mechanism based on the extended state observer carries out delay compensation on the active damping loop, and the output admittance frequency characteristic of the inverter can be corrected, so that the real part of the inverter shows the positive real part characteristic in the frequency range from 0 to Nyquist, the passivity of the output admittance is improved, and the reliability of the inverter is improved. And stable grid-connected operation of the inverter under wide-range power grid impedance is ensured.

Description

Technical Field

[0001] This invention relates to the field of inverter grid connection technology, and in particular to output admittance reshaping and robust active damping control methods based on passive theory, electronic devices, and computer-readable storage media. Background Technology

[0002] With the rapid development of renewable energy power generation technology, grid-connected inverters, as key equipment for achieving power conversion and stable grid connection, play an increasingly important role in modern power systems due to their flexible and efficient grid connection characteristics. LCL-type grid-connected inverters, with their superior high-frequency harmonic attenuation characteristics, have become the preferred solution for high-power grid-connected inverters. However, their inherent resonant characteristics can introduce resonant spikes into the system, severely affecting system stability. Especially under weak grid operating conditions, the wide range of grid impedance variations can create complex impedance coupling effects with LCL-type grid-connected inverters, thereby increasing the risk of system resonance.

[0003] In existing technologies, current controllers with compensation terms are typically used. Their feedforward design incorporates both low-pass and band-pass filters to improve system dynamic performance. However, this approach faces challenges such as complex parameter configuration and the difficulty in balancing stability and response speed. Furthermore, when the grid impedance changes, filters with fixed parameters lack adaptive capability, potentially leading to harmonic oscillations or insufficient dynamic response. This results in active output admittance, which is particularly problematic under a wide range of grid impedances, making system instability more likely. Summary of the Invention

[0004] This invention aims to at least partially solve one of the technical problems in related technologies. To this end, this invention proposes an output admittance reshaping and robust active damping control method based on passive theory, which can improve the passivity of inverter output admittance.

[0005] In a first aspect, embodiments of the present invention provide an output admittance reshaping and robust active damping control method based on passive theory, applied to an inverter, the method comprising:

[0006] Establish an equivalent model for the output admittance of the inverter;

[0007] Based on the equivalent model, the output admittance is decomposed into multiple output sub-admittances corresponding to active damping loops, wherein each output sub-admittance corresponds to one of the active damping loops.

[0008] By performing delay compensation on each of the active damping loops using an extended state observer, the optimized output sub-admittance corresponding to each of the active damping loops is obtained.

[0009] Optionally, in one embodiment of the present invention, establishing an equivalent model of the inverter's output admittance includes:

[0010] The state equation of the inverter in the frequency domain is obtained as follows:

[0011]

[0012] Where L1 is the inverter-side inductance of the inverter, I1(s) is the inverter-side current, and V i (s) is the output voltage of the inverter, V c (s) represents the voltage across the filter capacitor, C f I2(s) is the filter capacitor of the inverter, I2(s) is the grid-side current, L2 is the grid-side inductance of the inverter, and V pcc (s) represents the voltage at the coupling point;

[0013] The V is determined based on the current loop control system corresponding to the inverter. i (s), the V i The expression for (s) is shown below:

[0014] V i (s)={G c (s)·[I ref [(s)-I2(s)]-G ad (s)·I c (s)+G f (s)·V c (s)}·G d (s);

[0015]

[0016] Among them, I ref (s) is the reference value of the grid-side current, G ad (s) is the first active damping feedback term, I c (s) represents the filter capacitor current, G f (s) is the second active damping feedback term, G d (s) represents the total delay of the current loop control system, k p For proportional gain, k r For the resonant gain, ω i ω0 is the resonant cutoff frequency, and ω0 is the grid angular frequency.

[0017] Based on the V i The expression for I2(s) and the state equation determine I2(s), and the expression for I2(s) is as follows:

[0018] I2(s)=T c(s)·I ref (s)-Y(s)·V pcc (s);

[0019] Among them, T c (s) is V pcc The transfer function of the current loop control system when (s) = 0, Y(s) is I ref The output admittance of the inverter when (s) = 0 is modeled from the coupling point.

[0020] Let I in the expression of I2(s) ref Y(s) is calculated when (s) = 0, and Y(s) is shown below:

[0021]

[0022] Optionally, in one embodiment of the present invention, the step of decomposing the output admittance into multiple output sub-admittances corresponding to active damping loops based on the equivalent model is achieved using the following output admittance decomposition formula:

[0023]

[0024] Where Y2(s) is the output sub-admittance corresponding to the current loop control loop, Y ad (s) is the output sub-admittance corresponding to the active damping control loop with capacitor current feedback, Y f (s) is the output sub-admittance corresponding to the capacitor voltage feedforward active damping control loop.

[0025] Optionally, in one embodiment of the present invention, before performing delay compensation on each of the active damping loops using an extended state observer to obtain the optimized output sub-admittance corresponding to each of the active damping loops, the method further includes:

[0026] The G is obtained according to the following feedback item design formula. ad (s) and the G f (s):

[0027]

[0028] Where, k ad k is the active damping coefficient for capacitor current feedback. f G is the active damping coefficient for capacitor voltage feedforward. LPF (s) represents a low-pass filter, and a represents the preset filter parameters. The calculation delay for the current loop control system;

[0029] The real part of the output admittance decomposition formula is extracted based on the feedback term design formula to obtain the real part of each output sub-admittance, as shown below:

[0030]

[0031] Among them, T d The delay value is H(s) = ωL1 + ωL2 - k p sin(ωT d )-ω 3 L1L2C f Q(s) = k p cos(ωT d ).

[0032] Optionally, in one embodiment of the present invention, the step of performing delay compensation on each of the active damping loops using an extended state observer to obtain the optimized output sub-admittance corresponding to each of the active damping loops includes:

[0033] Determine the gain of the extended state observer for each of the said active damping loops;

[0034] By compensating for the time delay of each active damping loop using the gain of the extended state observer and the forward Euler discretization method, the optimized output sub-admittance corresponding to each active damping loop is obtained.

[0035] Optionally, in one embodiment of the invention, determining the gain of the extended state observer for each of the active damping loops includes:

[0036] Obtain the estimation error of the extended state observer, and determine the state matrix A based on the estimation error. eso ;

[0037] According to A eso The gain of the extended state observer for each of the active damping loops is determined by combining a preset gain configuration formula, which is shown below:

[0038] |λI-A eso |=λ 2 +β1λ+β2=(λ+ω n,eso ) 2 ;

[0039] Where β1 and β2 are the first gain and second gain of the extended state observer, respectively, and β1 = 2ω n,eso β2=ω n,eso ω n,esoω is the natural frequency of the extended state observer, λ is the preset gain adjustment constant, and I is the output current of the inverter; n,eso =ω s / 6,ω s This is the critical resonant frequency.

[0040] Optionally, in one embodiment of the present invention, the step of compensating for the time delay of each of the active damping loops based on the gain of the extended state observer combined with the forward Euler discretization method to obtain the optimized output sub-admittance corresponding to each of the active damping loops includes:

[0041] Applying the forward Euler discretization method to the capacitor current feedback active damping loop and the capacitor voltage feedforward active damping feedforward loop yields the transfer function G corresponding to the extended state observer. eso (s), the G eso (s) is shown below:

[0042]

[0043] Based on the G eso (s) combined with the Y ad (s), the Y f (s) Obtain the optimized output sub-admittance Y corresponding to the active damping control loop with the capacitor current feedback. ad,eso (s) The optimized output sub-admittance Y corresponding to the capacitor voltage feedforward active damping control loop f,eso (s), the Y ad,eso (s), the Y f,eso (s) is shown below:

[0044]

[0045] Among them, G zoh (s) is the transfer function of the zero-order hold.

[0046] In a second aspect, embodiments of the present invention provide an electronic device, comprising:

[0047] At least one processor;

[0048] At least one memory for storing at least one program;

[0049] When at least one of the programs is executed by at least one of the processors, the output admittance reshaping and robust active damping control method based on passive theory as described in the first aspect is implemented.

[0050] Thirdly, embodiments of the present invention provide a computer-readable storage medium storing a processor-executable program, which, when executed by a processor, is used to implement the output admittance reshaping and robust active damping control method based on passive theory as described in the first aspect.

[0051] This invention proposes an output admittance reshaping and robust active damping control method based on passive theory. It establishes an equivalent model of the inverter's output admittance and then decomposes the output admittance into multiple output sub-admittances corresponding to active damping loops based on this model. This identifies time delay in the control system as a crucial factor affecting the passivity of the output admittance. Building upon this, it overcomes the limitations of traditional frequency domain filtering compensation by proposing a time-domain prediction mechanism based on an extended state observer. By applying delay compensation technology based on the extended state observer to the active damping loop, the frequency characteristics of the inverter's output admittance are corrected, ensuring that its real part exhibits positive real part characteristics within the frequency range from 0 to Nyquist. This improves the passivity of the output admittance and ensures stable grid-connected operation of the inverter under a wide range of grid impedances (whether inductive or capacitive). Attached Figure Description

[0052] Figure 1 This is a flowchart of an embodiment of the present invention providing an output admittance reshaping and robust active damping control method based on passive theory;

[0053] Figure 2 This is a circuit topology diagram of an LCL-type grid-connected inverter provided in an embodiment of the present invention;

[0054] Figure 3 This is a schematic diagram of the current loop control system of an LCL-type grid-connected inverter provided in an embodiment of the present invention;

[0055] Figure 4 This is a schematic diagram of the equivalent circuit of the grid-side current of an LCL-type grid-connected inverter provided in an embodiment of the present invention;

[0056] Figure 5(a) shows the Re{Y} provided in an embodiment of the present invention. ad,eso (jω)} and Re{Y ad (jω)} with different feedback coefficients k ad The graph below shows the variation with frequency;

[0057] Figure 5(b) shows the Re{Y} provided in an embodiment of the present invention. f,eso (jω)} and Re{Y f (jω)} with different feedforward coefficients k f The graph below shows the variation with frequency;

[0058] Figure 6 yes Figure 1 The flowchart of step S3000 in the middle;

[0059] Figure 7 yes Figure 6 The flowchart of step S3200 in the process;

[0060] Figure 8 This is a schematic diagram of the simulation waveforms of the coupling point voltage and grid-side current of an LCL-type grid-connected inverter provided in an embodiment of the present invention.

[0061] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0062] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0063] It should be noted that although functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart.

[0064] Currently, the analysis method based on passive theory provides a new research approach for solving resonance problems. Its stability conditions are as follows: 1) The real part of the inverter output admittance must maintain non-negative characteristics; 2) The phase frequency curve of the inverter output admittance is between [-90°, 90°]. However, in practical digital control systems, the computational delay of the control algorithm and the inherent zero-order hold (ZOH) effect introduce significant phase lag, leading to non-passive characteristics. Specifically, within certain frequency bands, the real part of the inverter output admittance becomes negative, or its phase frequency curve exceeds [-90°, 90°] in some frequency bands, thus disrupting the system's passivity and causing instability. Existing technologies employ current controllers with compensation terms, whose feedforward design improves system dynamic performance by simultaneously introducing low-pass and band-pass filters. However, this approach faces challenges such as complex parameter configuration and difficulty in balancing stability and response speed. While low-pass filters effectively suppress high-frequency noise, they introduce phase lag, and band-pass filters can specifically handle resonant frequencies but may induce oscillations in other frequency bands. The coordinated design of both requires precise matching of system parameters to avoid stability degradation. Furthermore, when the grid impedance changes, filters with fixed parameters lack adaptive capability, potentially leading to harmonic oscillations or insufficient dynamic response.

[0065] Based on this, a method for output admittance reshaping and robust active damping control based on passive theory is proposed. Figure 1 The flowchart illustrates an embodiment of the present invention regarding an output admittance reshaping and robust active damping control method based on passive theory. This method can be applied to, but is not limited to, inverters. The type of inverter can be selected according to the actual scenario; for example, it can be, but is not limited to, using an LCL-type grid-connected inverter, but this is not the only limitation. It is still applicable to other inverters. The following explanation mainly uses an LCL-type grid-connected inverter as an example. Figure 1 As shown, the method may include, but is not limited to, steps S1000 to S4000.

[0066] Step S1000: Establish an equivalent model of the inverter's output admittance;

[0067] Step S2000: Based on the equivalent model, decompose the output admittance into multiple output sub-admittances corresponding to the active damping loops, wherein each output sub-admittance corresponds to one of the active damping loops.

[0068] Step S3000: Delay compensation is performed on each active damping loop using the extended state observer to obtain the optimized output sub-admittance corresponding to each active damping loop. The extended state observer (ESO) belongs to the active disturbance rejection control (ADRC) technology. Its core idea is to regard the total disturbance of the system (including model error, nonlinear factors, etc.) as an extended state. The observer simultaneously estimates the original state of the system and the total disturbance, thereby enhancing the robustness of the control system.

[0069] In this step, an equivalent model of the inverter's output admittance is established, and then the output admittance is decomposed into multiple output sub-admittances corresponding to active damping loops based on the equivalent model. This clarifies that time delay in the control system is a crucial factor affecting the passivity of the output admittance. Building upon this, a time-domain prediction mechanism based on ESO is proposed, overcoming the limitations of traditional frequency-domain filtering compensation. By applying ESO-based delay compensation technology to the active damping loops, delay compensation is performed on the active damping loops, thereby correcting the frequency characteristics of the inverter's output admittance. This ensures that the real part exhibits positive real part characteristics within the frequency range from 0 to Nyquist, improving the passivity of the output admittance and ensuring that the inverter can achieve stable grid-connected operation under a wide range of grid impedances (whether inductive or capacitive).

[0070] In one embodiment, the multiple active damping loops may include, but are not limited to, a current loop control loop, a capacitor current feedback active damping control loop, and a capacitor voltage feedforward active damping control loop; each output sub-admittance corresponds to one of the active damping loops, meaning that different output sub-admittances correspond to different active damping loops, thereby enabling the determination of the active damping loop corresponding to each output sub-admittance.

[0071] In one embodiment, the specific structure of the LCL-type grid-connected inverter can be varied. Those skilled in the art can make corresponding settings according to the actual application scenario, and there is no limitation here. For example, the following is a circuit topology diagram of an LCL-type grid-connected inverter as an example. Figure 2 As shown, Figure 2 This is a circuit topology diagram of an LCL-type grid-connected inverter provided in an embodiment of the present invention. This circuit mainly realizes the function of DC-to-AC power conversion, and can also realize AC-to-DC power conversion, possessing bidirectional power flow capability. The circuit topology of this power inverter mainly consists of three parts: a power conversion section, an LCL filter section, and a grid-connected interface. The LCL filter section consists of an inverter-side inductor L1, a grid-side inductor L2, and a filter capacitor C. f Composition, used to filter high-frequency harmonics in grid-connected current, i1, v c i1 and i2 represent the inverter-side current, filter capacitor voltage, and grid-side current, respectively; the grid connection interface is connected through the grid impedance Z. g With the power grid v g Connected, the voltage at the system's point of common coupling (PCC) is v. pcc .

[0072] In one embodiment of the present invention, step S1000 may include, but is not limited to, steps S1100 to S1400.

[0073] Step S1100: Obtain the state equation of the inverter in the frequency domain. Specifically, in conjunction with... Figure 2 When modeling the AC side, the three-phase abc coordinate system is transformed into the αβ two-phase stationary coordinate system, thereby eliminating the zero-sequence component. Therefore, by omitting the subscripts, the following equation (1) can be obtained:

[0074]

[0075] Furthermore, by performing a Laplace transform on equation (1), the following state equation can be obtained, denoted as equation (2), as shown below:

[0076]

[0077] Where L1 is the inverter-side inductance of the LCL-type grid-connected inverter, I1(s) is the inverter-side current, and V i (s) represents the output voltage of the LCL grid-connected inverter, V c (s) represents the voltage across the filter capacitor, C f V is the filter capacitor of the LCL grid-connected inverter, I2(s) is the grid-side current, L2 is the grid-side inductance of the LCL grid-connected inverter, and V is the voltage across the grid. pcc (s) represents the voltage at the coupling point;

[0078] Step S1200: Determine V based on the current loop control system corresponding to the inverter. i (s), specifically, according to Figure 2 The defined current direction is obtained Figure 3 The schematic diagram shown is of the current loop control system of an LCL-type grid-connected inverter. In this digital control system, the system's calculation delay is... The delay introduced by the zero-order hold is Therefore, the total system delay is T d =1.5T s ;

[0079] The proportional resonant controller selected for the current loop control system in this embodiment has a transfer function denoted by equation (3), as shown below:

[0080]

[0081] Where, k p For proportional gain, k r For the resonant gain, ω i ω0 is the resonant cutoff frequency, and ω0 is the grid angular frequency.

[0082] In this control system, the grid-side current reference value i ref The difference between the current i2 and the actual current i2 on the grid side generates a current error signal, which is sent to the proportional resonant controller for adjustment. Then, the controller's output signal is superimposed with the capacitor current feedback active damping control loop and the capacitor voltage feedforward active damping control loop, and through a digital control delay stage, it is used to generate the inverter's output voltage v. i .

[0083] according to Figure 3 The schematic diagram shown indicates that V i The expression for (s) is denoted as equation (4), as shown below:

[0084] V i (s)={G c (s)·[I ref [(s)-I2(s)]-G ad (s)·I c (s)+G f (s)·V c (s)}·G d (s);

[0085] Among them, I ref (s) is the reference value of the grid-side current, G ad (s) is the first active damping feedback term, I c (s) represents the filter capacitor current, G f(s) is the second active damping feedback term, G d (s) represents the total delay of the current loop control system;

[0086] Step S1300, based on V i The expression for (s) and the state equation determine I2(s), which is denoted as equation (5). Specifically, equation (4) is substituted into equation (2), and I2(s) and V are... pcc (s) are defined as the output and the disturbance, respectively, thus obtaining

[0087] I2(s)=T c (s)·I ref (s)-Y(s)·V pcc (s);

[0088] Among them, T c (s) is V pcc The transfer function of the current loop control system when (s) = 0, where Y(s) is I ref Output admittance of LCL grid-connected inverter when (s) = 0, modeled from the coupling point;

[0089] Correspondingly, the equivalent circuit diagram of I2(s) is as follows: Figure 4 As shown, to simulate the worst-case scenario of the system, the mains impedance is treated as a pure inductance, i.e., Z0. g (s) = L2s;

[0090] Step S1400: Let I in the expression of I2(s) ref Given that (s) = 0, its transfer function T is calculated. c Y(s) and Y(s), T c Y(s) is denoted as equation (6), and Y(s) is denoted as equation (7), as shown below:

[0091]

[0092] In one embodiment of the present invention, step S2000 can be implemented, but is not limited to, using the following output admittance decomposition formula:

[0093] Specifically, in order to facilitate the analysis of the impact of system delay on output admittance, the following output admittance decomposition formula is obtained, denoted as equation (8), that is...

[0094]

[0095] Where Y2(s) is the output sub-admittance corresponding to the current loop control loop, Y ad (s) is the output sub-admittance corresponding to the active damping control loop with capacitor current feedback, Y f (s) represents the output sub-admittance corresponding to the capacitor voltage feedforward active damping control loop.

[0096] In one embodiment of the present invention, steps S4000 to S5000 may be included before step S3000, but are not limited to.

[0097] Step S4000: Obtain G according to the following feedback term design formula. ad (s) and G f (s), denoted as equation (9), i.e.

[0098]

[0099] Where, k ad k is the active damping coefficient for capacitor current feedback. f G is the active damping coefficient for capacitor voltage feedforward. LPF (s) represents a low-pass filter used to remove high-frequency components, and a represents preset filtering parameters. The calculation delay for the current loop control system;

[0100] Step S5000: Extract the real part of equation (8) according to equation (9) above to obtain the real part of each output sub-admittance. Specifically, since G c (s) The resonant term has little effect on frequencies other than the fundamental frequency, therefore G c (s) is approximately k p Processing, and to simplify calculations, G f (s) is approximately k f Thus, the real part of each output sub-admittance is obtained as shown in equation (10) below:

[0101]

[0102] Among them, T d The delay value is H(s) = ωL1 + ωL2 - k p sin(ωT d )-ω 3 L1L2C f Q(s) = k p cos(ωT d ).

[0103] Analysis of each output sub-admittance reveals that the sign of the real part of the output admittance is determined by the numerator. For Re{Y2(jω)}, the real part is located at the anti-resonant frequency. and critical resonant frequency ω s / 6 sign changes; for Re{Y ad (jω)}, actually part of which are at the resonant frequency and critical resonant frequency ω s / 6 sign changes; for Re{Y ad(jω)}, when When the conditions are met, the sign of the real part of the output admittance changes. Furthermore, comparing the output sub-admittance curves with frequency shown in Figures 5(a) and 5(b), increasing the active damping coefficient and decreasing the filter capacitor value can also disrupt the system's passivity. Therefore, the sign change of the real part of the output admittance is determined by its resonant frequency and the time delay. When the real part of the output admittance is negative, the output admittance exhibits non-passive behavior, which is detrimental to system stability. That is, time delay is the main reason for disrupting the passivity of the output admittance. Based on this, this embodiment of the invention uses an ESO to compensate for the time delay of each active damping loop, obtaining the optimized output sub-admittance corresponding to each active damping loop to ensure the passivity of the output admittance.

[0104] like Figure 6 As shown, in one embodiment of the present invention, step S3000 may include, but is not limited to, steps S3100 to S3200.

[0105] Step S3100: Determine the gain of ESO for each active damping loop;

[0106] Step S3200: Based on the gain of ESO and the forward Euler discretization method, compensate for the time delay of each active damping loop to obtain the optimized output sub-admittance corresponding to each active damping loop.

[0107] In this step, the gain of the ESO for each active damping loop is determined to achieve zero-error convergence of the ESO. Then, based on this, prediction is performed using the gain of the ESO combined with the forward Euler discretization method to compensate for the time delay of each active damping loop and obtain the optimized output sub-admittance corresponding to each active damping loop.

[0108] In one embodiment of the present invention, step S3100 may include, but is not limited to, steps S3110 to S3120.

[0109] Step S3110: Obtain the estimation error of ESO, and determine the state matrix A of the estimation error based on the estimation error. eso Specifically, first, define the state variable x1 = i1 in equation (1), and the input u = v i The disturbance d = v c Meanwhile, we define x2 = f, where f is an augmented state variable that includes the uncertainty of parameters and external disturbances. From this, we can obtain the state-space equation (11), that is...

[0110]

[0111] Where b0 = 1 / L 1,0φ(t) represents the nominal value of the inverter-side inductance L1; φ(t) represents the rate of change of the lumped disturbance f, which will not increase indefinitely within a specific interval and is a local and finite Lipschitz function.

[0112] By defining a reasonable observer gain, the ESO can achieve zero-error convergence, as shown in equation (12) below.

[0113]

[0114] Where β1 and β2 are the first and second gains of ESO, respectively, and the estimation error is defined. The dynamic matrix of the estimation error can be obtained, as shown in equation (13) below:

[0115]

[0116] Among them, A eso and B eso Let A be the state matrix and the input matrix, respectively, for estimating the error. It can be seen that the state matrix A... eso It is a Hurwitz matrix, which ensures that the control system is stable;

[0117] Step S3120, according to A eso The gain of the ESO for each active damping loop is determined by combining the preset gain configuration formula, which is denoted as (14), as shown below:

[0118] |λI-A eso |=λ 2 +β1λ+β2=(λ+ω n,eso ) 2 ;

[0119] Where β1=2ω n,eso β2=ω n,eso ω n,eso λ is the inherent frequency of the ESO, λ is the preset gain adjustment constant, and I is the output current of the LCL grid-connected inverter; ω is set. n,eso =ω s / 6,ω s =2πf s ω s This is the critical resonant frequency.

[0120] like Figure 7 As shown, in one embodiment of the present invention, step S3200 may include, but is not limited to, steps S3210 to S3220.

[0121] Step S3210: Apply the forward Euler discretization method to the capacitor current feedback active damping loop and the capacitor voltage feedforward active damping feedforward loop to obtain the transfer function G corresponding to ESO. eso (s);

[0122] Specifically, in order to predict the inverter-side current at the next sampling point, the next sampling point is denoted as k+1 compared to the current sampling point k. Based on this, the forward Euler discretization method is adopted, as shown in equation (15) below:

[0123]

[0124] It can be seen that it can be achieved through and v c (k+1) are applied to the capacitor current feedback active damping loop and the capacitor voltage feedforward active damping feedforward loop, respectively, to enhance the passivity of the entire system.

[0125] By designing the input u=0, we can obtain the result from x1 to... transfer function G eso (s), denoted as equation (16), is shown below:

[0126]

[0127] Step S3220, based on G eso (s) combined with Y ad (s), Y f (s) Obtain the optimized output sub-admittance Y corresponding to the active damping control loop with capacitor current feedback. ad,eso (s) Optimized output sub-admittance Y corresponding to the capacitor voltage feedforward active damping control loop f,eso (s);

[0128] Specifically, the prediction method given in equation (15) is used to compensate for the time delay G. s (s), thus obtaining Y ad,eso (s), Y f,eso (s), that is, equation (17) as shown below:

[0129]

[0130] Among them, G zoh (s) is the transfer function of the zero-order hold.

[0131] By extracting the real part of equation (17), the curve of the real part of its output sub-admittance as a function of frequency can be plotted, as shown in Figure 5(a). ad,eso (jω)} and Re{Y ad (jω)} with different feedback coefficients k adThe curve below shows the variation of Re{Y} with frequency, as shown in Figure 5(b). f,eso (jω)} and Re{Y f (jω)} with different feedforward coefficients k f The curves below, showing the frequency variation, have been normalized on both the horizontal and vertical axes. It can be seen that after adopting the output admittance reshaping and robust active damping control method based on passive theory proposed in this embodiment of the invention, the negative real parts of the two sub-admittances are significantly reduced. By treating the unmodeled dynamics of the system and external disturbances as an extended state for real-time observation and estimation, the delay of one sampling period in the active damping loop is compensated. This not only effectively reduces the complexity of parameter design but also has good robustness. Ultimately, the phase frequency characteristic curves of the inverter output admittance are all kept between [-90°, 90°], ensuring the passivity of the output admittance.

[0132] To verify the effectiveness of the output admittance reshaping and robust active damping control method proposed in this invention, the applicant conducted detailed simulation experiments. The simulation results are as follows: Figure 8 As shown, Figure 8 The diagram shows the simulated waveforms of the coupling point voltage and grid-side current of the LCL grid-connected inverter. It can be seen that when the filter capacitor parameters are reduced by 20%, the system operates stably under ESO-based delay compensation, demonstrating strong robustness to changes in active damping circuit parameters and uncertainties in LCL inverter parameters. When disabled, oscillations occur. The experimental results verify the correctness and effectiveness of the theoretical analysis of external stability and the ESO-based delay compensation scheme, which is particularly suitable for the system to operate under weak grid conditions, thus enhancing its external stability.

[0133] Figure 9 This is a schematic diagram of the structure of an electronic device 2000 provided in an embodiment of the present invention. For example... Figure 9 As shown, the electronic device 2000 includes a memory 2100 and a processor 2200. The number of memory 2100 and processor 2200 can be one or more. Figure 9 Taking a memory 2100 and a processor 2200 as an example; the memory 2100 and the processor 2200 in the device can be connected via a bus or other means. Figure 9 Taking the example of a connection between China and Israel via a bus.

[0134] The memory 2100, as a computer-readable storage medium, can be used to store software programs, computer-executable programs, and modules, such as the program instructions / modules corresponding to the output admittance reshaping and robust active damping control method based on passive theory provided in any embodiment of the present invention. The processor 2200 implements the above-mentioned output admittance reshaping and robust active damping control method based on passive theory by running the software programs, instructions, and modules stored in the memory 2100.

[0135] Memory 2100 may primarily include a program storage area and a data storage area, wherein the program storage area may store the operating system and application programs required for at least one function. Furthermore, memory 2100 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other non-volatile solid-state storage device. In some instances, memory 2100 may further include memory remotely located relative to processor 2200, which can be connected to the device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0136] An embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions for performing the output admittance reshaping and robust active damping control method based on passive theory as provided in any embodiment of the present invention.

[0137] An embodiment of the present invention also provides a computer program product, including a computer program or computer instructions, which are stored in a computer-readable storage medium. A processor of a computer device reads the computer program or computer instructions from the computer-readable storage medium and executes the computer program or computer instructions, causing the computer device to perform the output admittance reshaping and robust active damping control method based on passive theory provided in any embodiment of the present invention.

[0138] The electronic devices and application scenarios described in the embodiments of this invention are for the purpose of more clearly illustrating the technical solutions of the embodiments of this invention, and do not constitute a limitation on the technical solutions provided by the embodiments of this invention. As those skilled in the art will know, with the evolution of electronic devices and the emergence of new application scenarios, the technical solutions provided by the embodiments of this invention are also applicable to similar technical problems.

[0139] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0140] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor unit, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0141] The terms “component,” “module,” “system,” etc., used in this specification are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process or execution thread, and components may be located on a single computer or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, or a network, such as the Internet interacting with other systems via signals).

Claims

1. A method for output admittance reshaping and robust active damping control based on passive theory, characterized in that, Applied to inverters, the method includes: Establish an equivalent model for the output admittance of the inverter; Based on the equivalent model, the output admittance is decomposed into multiple output sub-admittances corresponding to active damping loops, wherein each output sub-admittance corresponds to one of the active damping loops. By performing delay compensation on each of the active damping loops using an extended state observer, the optimized output sub-admittance corresponding to each of the active damping loops is obtained.

2. The output admittance reshaping and robust active damping control method based on passive theory according to claim 1, characterized in that, The establishment of an equivalent model for the output admittance of the inverter includes: The state equation of the inverter in the frequency domain is obtained as follows: Where L1 is the inverter-side inductance of the inverter, I1(s) is the inverter-side current, and V i (s) is the output voltage of the inverter, V c (s) represents the voltage across the filter capacitor, C f I2(s) is the filter capacitor of the inverter, I2(s) is the grid-side current, L2 is the grid-side inductance of the inverter, and V pcc (s) represents the voltage at the coupling point; The V is determined based on the current loop control system corresponding to the inverter. i (s), the V i The expression for (s) is shown below: V i (s)={G c (s)·[I ref (s)-I2(s)]-G ad (s)·I c (s)+G f (s)·V c (s)}·G d (s); Among them, I ref (s) is the reference value of the grid-side current, G ad (s) is the first active damping feedback term, I c (s) represents the filter capacitor current, G f (s) is the second active damping feedback term, G d (s) represents the total delay of the current loop control system, k p For proportional gain, k r For the resonant gain, ω i ω0 is the resonant cutoff frequency, and ω0 is the grid angular frequency. Based on the V i The expression for I2(s) and the state equation determine I2(s), and the expression for I2(s) is as follows: I2(s)=T c (s)·I ref (s)-Y(s)·V pcc (s); Among them, T c (s) is V pcc The transfer function of the current loop control system when (s) = 0, Y(s) is I ref The output admittance of the inverter when (s) = 0 is modeled from the coupling point. Let I in the expression of I2(s) ref Y(s) is calculated when (s) = 0, and Y(s) is shown below:

3. The output admittance reshaping and robust active damping control method based on passive theory according to claim 2, characterized in that, The output admittance is decomposed into multiple output sub-admittances corresponding to active damping loops based on the equivalent model, using the following output admittance decomposition formula: Where Y2(s) is the output sub-admittance corresponding to the current loop control loop, Y ad (s) is the output sub-admittance corresponding to the active damping control loop with capacitor current feedback, Y f (s) is the output sub-admittance corresponding to the capacitor voltage feedforward active damping control loop.

4. The output admittance reshaping and robust active damping control method based on passive theory according to claim 3, characterized in that, Before obtaining the optimized output sub-admittance corresponding to each active damping loop by performing delay compensation on each of the active damping loops through the extended state observer, the method further includes: The G is obtained according to the following feedback item design formula. ad (s) and the G f (s): Where, k ad k is the active damping coefficient for capacitor current feedback. f G is the active damping coefficient for capacitor voltage feedforward. LPF (s) represents a low-pass filter, and a represents the preset filter parameters. The calculation delay for the current loop control system; The real part of the output admittance decomposition formula is extracted based on the feedback term design formula to obtain the real part of each output sub-admittance. The real parts of each output sub-admittance are shown below: Among them, T d The delay value is H(s) = ωL1 + ωL2 - k p sin(ωT d )-ω 3 L1L2C f Q(s) = k p cos(ωT d ).

5. The output admittance reshaping and robust active damping control method based on passive theory according to claim 3, characterized in that, The step of performing delay compensation on each of the active damping loops using an extended state observer to obtain the optimized output sub-admittance corresponding to each of the active damping loops includes: Determine the gain of the extended state observer for each of the said active damping loops; By compensating for the time delay of each active damping loop using the gain of the extended state observer and the forward Euler discretization method, the optimized output sub-admittance corresponding to each active damping loop is obtained.

6. The output admittance reshaping and robust active damping control method based on passive theory according to claim 5, characterized in that, The determination of the gain of the extended state observer for each of the active damping loops includes: Obtain the estimation error of the extended state observer, and determine the state matrix A based on the estimation error. eso ; According to A eso The gain of the extended state observer for each of the active damping loops is determined by combining a preset gain configuration formula, which is shown below: |λI-A eso |=λ 2 +β1λ+β2=(λ+ω n,eso ) 2 ; Where β1 and β2 are the first gain and second gain of the extended state observer, respectively, and β1 = 2ω n,eso β2=ω n,eso ω n,eso ω is the natural frequency of the extended state observer, λ is the preset gain adjustment constant, and I is the output current of the inverter; n,eso =ω s / 6,ω s This is the critical resonant frequency.

7. The output admittance reshaping and robust active damping control method based on passive theory according to claim 6, characterized in that, The step of compensating for the time delay of each active damping loop based on the gain of the extended state observer combined with the forward Euler discretization method to obtain the optimized output sub-admittance corresponding to each active damping loop includes: Applying the forward Euler discretization method to the capacitor current feedback active damping loop and the capacitor voltage feedforward active damping feedforward loop yields the transfer function G corresponding to the extended state observer. eso (s), the G eso (s) is shown below: Based on the G eso (s) combined with the y ad (s), the Y f (s) Obtain the optimized output sub-admittance Y corresponding to the active damping control loop with the capacitor current feedback. ad,eso (s) The optimized output sub-admittance Y corresponding to the capacitor voltage feedforward active damping control loop f,eso (s), the Y ad,eso (s), the Y f,eso (s) is shown below: Among them, G zoh (s) is the transfer function of the zero-order hold.

8. An electronic device, characterized in that, include: At least one processor; At least one memory for storing at least one program; When at least one of the programs is executed by at least one of the processors, the output admittance reshaping and robust active damping control method based on passive theory as described in any one of claims 1 to 7 is implemented.

9. A computer-readable storage medium, characterized in that, It stores a processor-executable program, which, when executed by the processor, is used to implement the output admittance reshaping and robust active damping control method based on passive theory as described in any one of claims 1 to 7.

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