Synchronous rectification protection circuit and control method of power supply device

Abstract

The invention relates to a synchronous rectification protection circuit and a control method of a power supply device. The circuit comprises a control chip, a semiconductor power switch tube and a protection branch. The control chip is provided with a voltage detection pin and a grounding pin, wherein the grounding pin is connected to a reference ground. The grid electrode of the semiconductor power switch tube is controlled by the control chip, and the source electrode is connected to the reference ground. The protection branch is connected between the voltage detection pin and the grounding pin and is composed of a Schottky diode and a current-limiting resistor which are connected in series. When the potential of the voltage detection pin is lower than that of the grounding pin, the Schottky diode is conducted in the forward direction, the voltage difference between the voltage detection pin and the grounding pin is limited to the forward conduction voltage drop level of the Schottky diode, and meanwhile the current limiting resistor limits the value of current flowing through the protection branch circuit to be in the milliampere magnitude. Through the Schottky diode clamping structure and the resistor current limiting structure which are connected in series, negative voltage protection of the control chip is achieved, and meanwhile the advantages of being low in cost, small in occupied area, high in reliability and the like are achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of switching power supply, in particular to a synchronous rectification protection circuit and a control method of a power supply device. BACKGROUND

[0002] When a gallium nitride (GaN) device is applied to synchronous rectification, the source negative voltage generated by reverse conduction far exceeds the bearing capacity of a traditional silicon-based control chip, and there is a risk of breakdown. The existing solution is to parallel-connect a large-current Schottky diode at both ends of the GaN to reduce the voltage drop, but this solution is high in cost and large in occupied area, and is difficult to meet the demand for high power density. SUMMARY

[0003] To solve the above problems, the present application provides a synchronous rectification protection circuit, comprising.

[0004] A control chip has a voltage detection pin and a ground pin. The ground pin is connected to a reference ground; A semiconductor power switch tube has a gate controlled by the control chip and a source connected to the reference ground; A protection branch is connected between the voltage detection pin and the ground pin, and the protection branch includes a Schottky diode and a current-limiting resistor connected in series with each other; When the potential of the voltage detection pin is lower than the ground pin, the Schottky diode is forward-biased to limit the voltage difference between the voltage detection pin and the ground pin to the forward-biased voltage drop level of the Schottky diode, and at the same time, the current-limiting resistor limits the current flowing through the protection branch to the order of milliamperes.

[0005] In one embodiment, the anode of the Schottky diode is connected to the reference ground, and the cathode of the Schottky diode is connected to the voltage detection pin through the current-limiting resistor.

[0006] In one embodiment, the resistance value of the current-limiting resistor is configured so that the current flowing through the protection branch does not exceed 50 milliamperes under the maximum expected negative voltage.

[0007] In one embodiment, the semiconductor power switch tube is a gallium nitride field effect transistor.

[0008] In one embodiment, the patch package of the Schottky diode is any one of SOD-523, SOD-323 or SOD-123.

[0009] In one embodiment, the control chip further includes a driving pin, a reset pin, a high-voltage start pin and a power supply pin. The drive pin is connected to the gate of the semiconductor power switch and is used to output a drive signal; The high-voltage start-up pin is configured to connect to a high-voltage DC bus for supplying power to the internal circuitry of the control chip during the start-up phase. An external resistor is provided between the reset pin and the reference ground to set the delay time of the internal reset circuit of the chip. A power supply capacitor is also provided between the power supply pin and the reference ground to store energy and filter for the normal operation of the control chip.

[0010] In one embodiment, the circuit is configured as a low-side synchronous rectifier circuit and includes a transformer, wherein the transformer includes a primary winding and a secondary winding. The primary winding is used to receive input electrical energy; the first end of the secondary winding is connected to the reference ground, and the second end is connected to the drain of the semiconductor power switch.

[0011] In one embodiment, a buffer capacitor is connected in series between the second end of the secondary winding and the drain of the semiconductor power switch.

[0012] In one embodiment, the circuit is configured as a high-side synchronous rectifier circuit and includes a transformer, wherein the transformer includes a primary winding and a secondary winding. The primary winding is used to receive input electrical energy; The first end of the secondary winding is connected to the drain of the semiconductor power switch; the second end of the secondary winding serves as the positive terminal of the DC output; and the source of the semiconductor power switch serves as the negative terminal of the DC output.

[0013] In one embodiment, the source of the semiconductor power switch is connected to a buffer capacitor, and the other end of the buffer capacitor is connected to the positive terminal of the DC output to filter the DC output.

[0014] This application also provides a control method for a power supply device, which utilizes a synchronous rectification protection circuit as mentioned in any of the above embodiments, the method comprising: The control chip drives the semiconductor power switch to perform synchronous rectification operation. During the reverse conduction phase of the semiconductor power switch, when its source voltage becomes negative relative to the ground pin of the control chip, the Schottky diode connected between the voltage detection pin and the ground pin automatically conducts forward. The negative voltage on the voltage detection pin is clamped below a safe threshold by the forward voltage drop of the Schottky diode. The inrush current generated during clamping is limited by a current-limiting resistor connected in series with the Schottky diode.

[0015] In one embodiment, the safety threshold is -1V.

[0016] In one embodiment, the current-limiting resistor limits the surge current to the range of 10 mA to 50 mA.

[0017] This application also provides an electronic device including the circuitry mentioned in any of the above embodiments.

[0018] The technical solutions provided by the embodiments of this application may include the following beneficial effects: As described in the above embodiments, this application relates to a synchronous rectification protection circuit, comprising a control chip, a semiconductor power switch, and a protection branch. The control chip has a voltage detection pin and a ground pin, wherein the ground pin is connected to a reference ground. The gate of the semiconductor power switch is controlled by the control chip, and its source is connected to the reference ground. The protection branch is connected between the voltage detection pin and the ground pin, and consists of a Schottky diode and a current-limiting resistor connected in series. When the potential of the voltage detection pin is lower than that of the ground pin, the Schottky diode conducts forward, limiting the voltage difference between the voltage detection pin and the ground pin to the forward voltage drop level of the Schottky diode. Simultaneously, the current-limiting resistor limits the current flowing through the protection branch to the milliampere level. This application, through a simple Schottky diode clamping and resistor current-limiting structure, provides effective negative voltage protection for the control chip without affecting the normal operation of the circuit. This solution only requires small-sized packaged Schottky diodes and ordinary surface mount resistors. Compared with the traditional solution of parallel high-current Schottky diodes, it has significant advantages such as low cost, small PCB area, and high reliability, perfectly meeting the design requirements of high power density power supplies.

[0019] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this application. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the description are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a circuit diagram of a synchronous rectification protection circuit provided in one embodiment of this application.

[0022] Figure 2This is another circuit diagram of the synchronous rectification protection circuit provided in one embodiment of this application.

[0023] Figure 3 This is a schematic diagram of the voltage clamping effect of the voltage detection pin of a semiconductor power switch provided in one embodiment of this application.

[0024] Figure 4 This is a block diagram of an electronic device provided in one embodiment of this application.

[0025] Figure label: 1. Control chip; 2. Semiconductor power switch; 3. Protection branch; 31. Schottky diode; 32. Current-limiting resistor; 4. Transformer; 5. Buffer capacitor; 6. Power supply capacitor; 7. External resistor. Detailed Implementation

[0026] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, the same numbers in different drawings denote the same or similar elements unless otherwise indicated. Various modifications, variations, and equivalents of the methods, apparatus, and / or circuits described herein will become apparent upon understanding this disclosure. For example, the order of operations described herein is merely illustrative and is not limited to those orders set forth herein, but can be changed as will become apparent upon understanding this disclosure, except for operations that must be performed in a particular order. Furthermore, descriptions of features known in the art may be omitted for clarity and brevity. The modes described in the following exemplary embodiments do not represent all modes consistent with this application. Rather, they are merely examples of apparatuses consistent with some aspects of this application as detailed in the appended claims.

[0027] As described in the background section, with the application of wide-bandgap semiconductor materials such as gallium nitride (GaN) in synchronous rectification, their excellent switching characteristics have improved power supply efficiency and power density. However, when GaN devices are reverse-biased, their source (S) generates a significantly higher negative voltage (V_SD) than that of traditional silicon-based MOSFETs. Most existing synchronous rectification control chips (SR ICs) are based on silicon-based MOSFET ecosystem designs, and their voltage sensing pins (VS) typically have a negative voltage tolerance of only around -1V, which cannot withstand the negative voltage surge of -2V to -3V or even higher when GaN is reverse-biased, posing a risk of damage.

[0028] The current solution is to connect a Schottky diode in parallel across the GaN device to reduce the reverse conduction voltage drop. However, this method requires an additional Schottky diode capable of handling high current, increasing material costs and board area, which contradicts the trend towards high power density.

[0029] Based on this, this application provides a synchronous rectification protection circuit, referring to... Figure 1 or Figure 2 It includes a control chip 1, a semiconductor power switch 2, and a protection branch 3.

[0030] Specifically, control chip 1 is a synchronous rectifier controller, responsible for precisely controlling the turn-on and turn-off timing of semiconductor power switch 2. Control chip 1 has voltage detection pins, ground pins, drive pins, reset pins, high-voltage start pins, and power supply pins.

[0031] Among them, continue to refer to Figure 1 or Figure 2 The voltage detection pin, typically labeled VS, is used to monitor the operating voltage of the source of the switching transistor in real time. The ground pin, typically labeled GND, provides a stable potential reference for the internal circuitry and is connected to a reference ground. The drive pin, typically labeled DRV, is directly connected to the gate of the semiconductor power switch 2 and outputs a precisely timed PWM drive signal to control the switching transistor's on / off state. The reset pin, typically labeled REST, has an external resistor 7 between it and the reference ground. The charging characteristics of this resistor set the delay time of the internal reset circuit, ensuring the stability of the system power-on process. The high-voltage startup pin, typically labeled HV, is configured to connect to the rectified high-voltage DC bus. Through a high-voltage current source integrated within the chip, it charges the VDD capacitor during startup, providing initial operating power to the control chip 1 and achieving efficient system startup. The power supply pin, typically labeled VDD, has a power supply capacitor 6 between it and the reference ground. This capacitor acts as an energy storage element during normal system operation, providing a stable operating voltage to the control chip 1 and effectively filtering high-frequency noise on the power line.

[0032] Specifically, as described above, the gate of semiconductor power switch 2 is connected to the drive pin of control chip 1, and the source of semiconductor power switch 2 is connected to reference ground. Furthermore, semiconductor power switch 2 is configured as a gallium nitride field-effect transistor (GaN FET) and used as a synchronous rectifier.

[0033] Specifically, protection branch 3 is connected between the voltage detection pin and the ground pin, and includes a Schottky diode 31 and a current-limiting resistor 32 connected in series. When the potential of the voltage detection pin is lower than that of the ground pin, the Schottky diode 31 conducts forward, limiting the voltage difference between the voltage detection pin and the ground pin to the forward voltage drop level of the Schottky diode 31. At the same time, the current-limiting resistor 32 limits the current flowing through protection branch 3 to the milliampere level.

[0034] Specifically, the anode of Schottky diode 31 is connected to the reference ground, and the cathode of Schottky diode 31 is connected to the voltage detection pin through a current-limiting resistor 32. When the semiconductor power switch 2 is reverse-biased, the negative voltage generated at its source causes the potential of the voltage detection pin to be lower than the reference ground. Under this potential relationship, the Schottky diode 31 is exactly in a forward-biased state, thereby quickly conducting to form a current discharge path.

[0035] Furthermore, the current-limiting resistor 32 serves a dual function in the circuit: on the one hand, it precisely limits the peak current flowing through the Schottky diode 31 to prevent excessive inrush current during clamping; on the other hand, it and the Schottky diode 31 together form a deterministic voltage-current relationship, making the protection characteristics predictable and designable.

[0036] The specific working principle of the circuit in this application is as follows: 1. Dangerous situation occurs: When the semiconductor power switch 2 is reverse-biased, its source voltage will be lower than its drain voltage, resulting in a large negative voltage at the node connected to the voltage detection pin.

[0037] 2. Protection circuit activation: This negative voltage is applied to protection branch 3. Since the anode of Schottky diode 31 is connected to the reference ground and the cathode is connected to the voltage detection pin through the current-limiting resistor 32, Schottky diode 31 receives a forward bias and quickly turns on.

[0038] 3. Voltage Clamping: After Schottky diode 31 is turned on, a substantially constant forward voltage drop is generated across it. The voltage at the voltage detection pin relative to the reference ground is clamped at the level of the forward voltage drop of Schottky diode 31, successfully limiting the negative voltage amplitude within the safe operating specifications of the control chip 1.

[0039] IV. Current Limitation: There is a significant voltage difference between the reference ground and the voltage detection pin. The current-limiting resistor 32 plays a crucial role in limiting the current, ensuring that the current flowing through the protection branch 3 is limited to the milliampere level, thereby preventing damage to the Schottky diode 31 and the control chip 1 due to overcurrent.

[0040] As can be seen from the above, this application achieves high-reliability protection for the control chip 1 with a simplified circuit structure through a synergistic protection mechanism of Schottky diode 31 clamping and resistor current limiting, ensuring that it operates within a safe voltage range. Secondly, through carefully selected device parameters and topology connections, the discharge current is controlled within a safe range while ensuring the protection effect. In addition, this solution only requires a small-package Schottky diode 31 and ordinary surface mount resistors, which has significant cost and size advantages compared to traditional solutions.

[0041] In some embodiments, the Schottky diode 31 of this application preferably adopts a small outline package such as SOD-523, whose fast recovery characteristics ensure timely response to transient negative voltages. Exemplarily, the surface mount package used for the Schottky diode 31 is any one of SOD-523, SOD-323, or SOD-123, all of which have extremely small footprint and excellent high-frequency characteristics.

[0042] Specifically, the SOD-523 package occupies only about 1.445 mm² of board space, which is negligible in circuit board layout, making it particularly advantageous for high power density power supply designs. Furthermore, this package type of Schottky diode 31 has extremely low cost, typically with a low unit price, and generally does not lead to a significant cost increase in mass production applications. This effectively solves the cost increase problem caused by the need for high-current Schottky diodes 31 in traditional solutions.

[0043] In some implementations, the resistance value of the current-limiting resistor 32 is precisely calculated and configured such that the current flowing through the protection branch 3 does not exceed 50 mA under the maximum expected negative voltage. This configuration effectively limits the inrush current, ensuring the safety of the Schottky diode 31 and the control chip 1, without affecting the normal voltage detection function of the control chip 1. A balance between protection effectiveness and system function is achieved through precise resistance value selection.

[0044] In one embodiment, by appropriately configuring the resistance value of the current-limiting resistor 32, the current flowing through the Schottky diode 31 is limited to less than 10 mA under typical negative voltage conditions. This microamp-level discharge current is sufficient to maintain effective voltage clamping without having a measurable impact on system efficiency.

[0045] Specifically, the current-limiting resistor 32, packaged in a small-size surface-mount package such as 0402 or 0201, together with the Schottky diode 31, forms a compact protection solution. This combination provides reliable protection while minimizing the space occupied on the circuit board.

[0046] In some implementations, refer to Figure 1 The circuit is configured as a low-side synchronous rectifier circuit and includes a transformer 4, which includes a primary winding and a secondary winding; the primary winding is used to receive input electrical energy; the first end of the secondary winding is connected to a reference ground, and the second end is connected to the drain of the semiconductor power switch 2.

[0047] Specifically, in the low-side synchronous rectification configuration, the semiconductor power switch 2 is located on the "low side" of the circuit, that is, its source is directly connected to the reference ground. This topology allows the drive signal of the control chip 1 to be directly output with the reference ground as the reference, which greatly simplifies the design of the drive circuit.

[0048] Specifically, the secondary winding of transformer 4 forms a complete power circuit with reference ground through semiconductor power switch 2. When the primary winding receives a high-frequency AC input, the electrical energy induced in the secondary winding is efficiently converted into DC output through the synchronous rectification operation of semiconductor power switch 2.

[0049] It should be noted that in the low-side configuration, one end of the secondary winding is directly connected to the reference ground. This connection ensures that the source voltage of the semiconductor power switch 2 is always referenced to the reference ground, providing the necessary potential reference conditions for the correct operation of the protection branch 3. When the semiconductor power switch 2 is reverse-biased, the negative voltage generated at its source can be accurately detected and effectively clamped by the protection branch 3.

[0050] Furthermore, this low-side configuration offers advantages such as compact layout, simple driving, and low cost, making it particularly suitable for low- to medium-power applications such as flyback converters. The coordinated operation of transformer 4 with semiconductor power switch 2, control chip 1, and protection branch 3 ensures system reliability while achieving efficient power conversion and effective chip protection.

[0051] Furthermore, continue to refer to Figure 1 A buffer capacitor 5 can also be set in the connection path between the secondary winding and the drain of the semiconductor power switch 2 to suppress voltage spikes caused by the leakage inductance of the transformer 4, thereby further improving the stability and electromagnetic compatibility of the system.

[0052] In some implementations, refer to Figure 2 The circuit is configured as a high-side synchronous rectifier circuit and includes a transformer 4, which includes a primary winding and a secondary winding. The primary winding is used to receive input electrical energy. The first end of the secondary winding is connected to the drain of the semiconductor power switch 2, and the second end serves as the positive terminal of the DC output. The source of the semiconductor power switch 2 serves as the negative terminal of the DC output.

[0053] Specifically, in the high-side synchronous rectification configuration, the semiconductor power switch 2 is located on the "high side" of the circuit, meaning its source is not directly connected to the reference ground, but rather serves as the return terminal for the DC output. This topology requires that the drive signal of the control chip 1 must have a floating source as the reference potential, which typically requires a level shifting circuit or a dedicated high-side driver.

[0054] Specifically, the secondary winding of transformer 4 forms a complete power circuit with the output filter network through semiconductor power switch 2. When the primary winding receives a high-frequency AC input, the electrical energy induced in the secondary winding is rectified by the semiconductor power switch 2 and supplied to the load via the positive and negative terminals of the DC output.

[0055] Furthermore, continue to refer toFigure 2 The source of semiconductor power switch 2 is connected to a buffer capacitor 5, and the other end of the buffer capacitor 5 is connected to the positive terminal of the DC output to filter the DC output. This buffer capacitor 5, together with other filtering components in the output circuit, forms an output filtering network, which effectively smooths the output voltage ripple, improves the dynamic response characteristics of the system, and provides a low-impedance path for high-frequency noise, thereby enhancing the electromagnetic compatibility of the system.

[0056] It should be noted that in the high-side configuration, the source potential of semiconductor power switch 2 fluctuates with the output load. When semiconductor power switch 2 is reverse-biased, the negative voltage generated at its source can be accurately detected and effectively clamped by protection branch 3, ensuring a continuous and reliable protection effect.

[0057] Furthermore, this high-side configuration offers advantages such as a compact power circuit layout and low switching noise, making it suitable for medium-to-high power applications such as LLC resonant converters. The coordinated operation of transformer 4 with semiconductor power switch 2, control chip 1, and protection branch 3 provides comprehensive system protection while achieving efficient power conversion.

[0058] Furthermore, the buffer capacitor 5 can be a ceramic or polymer capacitor with low equivalent series resistance to provide excellent filtering performance and high-frequency characteristics. The capacitance value of the buffer capacitor 5 is precisely calculated based on the output current ripple requirements and system stability needs to ensure that the filtering effect is met without affecting the transient response speed of the system.

[0059] This application also provides a control method for a power supply device, referring to... Figure 3 and Figure 4 The application includes a synchronous rectification protection circuit as described in any of the above embodiments, and the method includes steps S100 to S400.

[0060] Step S100: The semiconductor power switch 2 is driven by the control chip 1 to perform synchronous rectification operation.

[0061] Specifically, the control chip 1 outputs a precisely timed PWM drive signal to the gate of the semiconductor power switch 2 through its drive pin, based on the voltage state of the secondary winding of the transformer 4.

[0062] In one embodiment, the control chip 1 operates at a switching frequency of several hundred kHz. By detecting the zero-crossing moment of the voltage detection pin, it precisely controls the turn-on and turn-off timing of the semiconductor power switch 2, thereby achieving efficient synchronous rectification.

[0063] Step S200: During the reverse conduction phase of the semiconductor power switch 2, when its source voltage becomes negative relative to the ground pin of the control chip 1, the Schottky diode 31 connected between the voltage detection pin and the ground pin automatically conducts in the forward direction.

[0064] Specifically, when the semiconductor power switch 2 enters the reverse conduction state, its source generates a negative voltage of -2V to -3V, which is directly reflected on the voltage detection pin. Since the anode of the Schottky diode 31 is connected to the voltage detection pin through the current-limiting resistor 32, and the cathode is connected to the reference ground, when the negative voltage reaches the forward conduction threshold of the diode, the diode quickly conducts within nanoseconds, forming a current discharge path.

[0065] Step S300: The negative voltage on the voltage detection pin is clamped below a safe threshold by the forward conduction voltage drop of the Schottky diode 31.

[0066] Specifically, after Schottky diode 31 conducts, it generates a forward voltage drop of approximately 0.3V to 0.7V, strictly limiting the negative voltage of the voltage detection pin to within -0.7V. This clamping voltage is significantly lower than the typical withstand voltage of the voltage detection pin of control chip 1, which is -1V. Figure 3 The voltage at the voltage detection pin is clamped to within -1V, meaning the safety threshold is -1V, ensuring continuous operation within a safe range. The clamping voltage level can be precisely controlled by selecting a suitable Schottky diode (model 31).

[0067] Step S400: Limit the inrush current generated during clamping by using the current-limiting resistor 32 connected in series with the Schottky diode 31.

[0068] Specifically, the current-limiting resistor 32 is calculated to obtain a suitable resistance value using the formula: Current = Voltage / Resistance (I = V / R).

[0069] In one specific embodiment, when the expected maximum negative voltage is -3V and the forward voltage drop of the Schottky diode 31 is 0.7V, the current-limiting resistor 32 is designed with a resistance of 1kΩ. The inrush current is then limited to: I = (3 - 0.7) / 1000 = 2.3mA. This design ensures effective voltage clamping while strictly limiting the discharge current to the milliampere level, avoiding overcurrent stress on the Schottky diode 31 and the control chip 1.

[0070] Furthermore, the resistance value of the current-limiting resistor 32 is configured so that the current flowing through the protection branch 3 does not exceed 50 mA under the maximum expected negative voltage. In practical applications, it is usually controlled within the range of 10-30 mA, so as to minimize power consumption while ensuring the protection effect.

[0071] This application also provides an electronic device, which includes the synchronous rectification circuit mentioned in any of the above embodiments. The electronic device includes, but is not limited to: laptops, tablets, smartphones, portable displays, in-vehicle smart terminals, wearable devices, and portable medical devices.

[0072] In the above detailed description, reference has been made to the accompanying drawings, which illustrate specific aspects of how this disclosure can be practiced. In this regard, terms indicating direction or positional relationship, such as “thickness,” “upper,” “lower,” “top,” “bottom,” “inner,” and “outer,” can be used with reference to the orientation of the described figures. Since components of the described device can be positioned in several different orientations, these directional terms are for illustrative purposes and not for limitation. It should be understood that other aspects can be utilized and structural or logical changes can be made without departing from the concept of this disclosure. Therefore, the following detailed description should not be considered limiting.

[0073] It should be understood that, unless otherwise specifically indicated, features of various embodiments of this disclosure described herein can be combined with each other. As used herein, the term “and / or” includes any one of the relevant listed items and any combination of any two or more; similarly, “at least one of…” includes any one of the relevant listed items and any combination of any two or more.

[0074] It should be understood that, unless otherwise expressly specified and limited, the terms "joining," "attaching," "installing," "connecting," "linking," "fixing," etc., used in the embodiments of this disclosure should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms herein based on the specific circumstances.

[0075] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, parts, regions, layers, or sections, these components, parts, regions, layers, or sections are not limited to these terms. Rather, these terms are used only to distinguish one component, part, region, layer, or section from another. Therefore, without departing from the teachings of the examples described herein, the first component, part, region, layer, or section mentioned in the examples may also be referred to as the second component, part, region, layer, or section. Furthermore, the terms “first” and “second” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first” or “second” may explicitly or implicitly include at least one of that feature. In the description herein, “a plurality” means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0076] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A synchronous rectification protection circuit, characterized in that, include: The control chip has a voltage detection pin and a ground pin, the ground pin being connected to a reference ground; A semiconductor power switch, the gate of which is controlled by the control chip, and the source of which is connected to the reference ground; A protection branch is connected between the voltage detection pin and the ground pin, and the protection branch includes a Schottky diode and a current-limiting resistor connected in series. Specifically, when the potential of the voltage detection pin is lower than that of the ground pin, the Schottky diode is forward-biased, limiting the voltage difference between the voltage detection pin and the ground pin to the forward voltage drop level of the Schottky diode. At the same time, the current-limiting resistor limits the current flowing through the protection branch to the milliampere level.

2. The circuit according to claim 1, characterized in that, The anode of the Schottky diode is connected to the reference ground, and the cathode of the Schottky diode is connected to the voltage detection pin through the current-limiting resistor.

3. The circuit according to claim 1, characterized in that, The resistance value of the current-limiting resistor is configured such that the current flowing through the protection branch does not exceed 50 mA under the maximum expected negative voltage.

4. The circuit according to claim 1, characterized in that, The semiconductor power switch is a gallium nitride field-effect transistor.

5. The circuit according to claim 1, characterized in that, The Schottky diode is packaged in a surface mount package of any one of SOD-523, SOD-323, or SOD-123.

6. The circuit according to claim 1, characterized in that, The control chip also includes drive pins, reset pins, high-voltage start pins, and power supply pins; The drive pin is connected to the gate of the semiconductor power switch and is used to output a drive signal; The high-voltage start-up pin is configured to connect to a high-voltage DC bus for supplying power to the internal circuitry of the control chip during the start-up phase. An external resistor is provided between the reset pin and the reference ground to set the delay time of the internal reset circuit of the chip. A power supply capacitor is also provided between the power supply pin and the reference ground to store energy and filter for the normal operation of the control chip.

7. The circuit according to any one of claims 1 to 6, characterized in that, The circuit is configured as a low-side synchronous rectifier circuit and includes a transformer, wherein the transformer includes a primary winding and a secondary winding. The primary winding is used to receive input electrical energy; the first end of the secondary winding is connected to the reference ground, and the second end is connected to the drain of the semiconductor power switch.

8. The circuit according to claim 7, characterized in that, A buffer capacitor is connected in series between the second end of the secondary winding and the drain of the semiconductor power switch.

9. The circuit according to any one of claims 1 to 6, characterized in that, The circuit is configured as a high-side synchronous rectifier circuit; and includes a transformer, wherein the transformer includes a primary winding and a secondary winding; The primary winding is used to receive input electrical energy; The first end of the secondary winding is connected to the drain of the semiconductor power switch; the second end of the secondary winding serves as the positive terminal of the DC output. The source of the semiconductor power switch is used as the negative terminal of the DC output.

10. The circuit according to claim 9, characterized in that, The source of the semiconductor power switch is connected to a buffer capacitor, and the other end of the buffer capacitor is connected to the positive terminal of the DC output to filter the DC output.

11. A control method for a power supply device, characterized in that, The application has a synchronous rectification protection circuit as described in any one of claims 1 to 10, and the method includes: The control chip drives the semiconductor power switch to perform synchronous rectification operation. During the reverse conduction phase of the semiconductor power switch, when its source voltage becomes negative relative to the ground pin of the control chip, the Schottky diode connected between the voltage detection pin and the ground pin automatically conducts forward. The negative voltage on the voltage detection pin is clamped below a safe threshold by the forward voltage drop of the Schottky diode. The inrush current generated during clamping is limited by a current-limiting resistor connected in series with the Schottky diode.

12. The control method according to claim 11, characterized in that, The safety threshold is -1V.

13. The control method according to claim 11, characterized in that, The current-limiting resistor limits the inrush current to the range of 10 mA to 50 mA.

14. An electronic device, characterized in that, Includes the circuit as described in any one of claims 1-10.

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