Partition purification power supply management time sequencer for high-fidelity sound system

Abstract

The invention discloses a partition purification power supply management time sequencer for a high-fidelity sound system, and the time sequencer comprises a relay board, the relay board is provided with a first power supply purification circuit and a second power supply purification circuit, two differential mode capacitors in the second power supply purification circuit are in short circuit, and the second power supply purification circuit is used for supplying power to a post-stage power amplifier. The two differential mode capacitors in the first power supply purification circuit are electrically connected through the common mode inductor, and the first power supply purification circuit is used for supplying power to the access turntable, the multicast, the decoding or the pre-stage power amplifier. By optimizing the filter circuit, the requirements of other sound equipment except the post-stage power amplifier on the current purity can be met, and the phenomena of'soft ', 'weak' and sound lag of bass in the use process of the post-stage power amplifier can be avoided; therefore, the sound heard by a user of the high-fidelity sound system is pure in sound quality and vigorous and powerful in bass, and is rich in impact force and infectivity.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power supply control of sound equipment. Specifically, it is a partitioned purification power management sequencer for high-fidelity sound systems. BACKGROUND

[0002] The power supply sequencer is a device specially used for managing the sequence of power on / off of various devices in a cabinet. It is a time sequencer for controlling the on / off of power-consuming devices, and is one of the indispensable devices for various sound engineering, television broadcasting systems, computer network systems and other electrical engineering. The power supply sequencer can start the power supply in sequence from the front-stage device to the rear-stage device, and when the power supply is turned off, it closes various power-consuming devices in sequence from the rear-stage to the front-stage. In this way, it can effectively manage and control various power-consuming devices, avoid human error operation, and also avoid the impact current generated when all devices are powered on at the same time, and avoid the impact of induced current on the device, ensuring the stability of the entire power system.

[0003] In a sound system, the link of various sound equipment used for sound amplification has a sequence requirement, and the on / off of these devices also has a sequence requirement. For example, the normal specification of the start-up sequence is to first turn on the signal source device, such as a CD player, a computer, etc., then turn on the mixing console, and then turn on the signal processing device, such as an equalizer, an effecter, etc., and finally turn on the power amplifier. The shutdown sequence is just the opposite, i.e., first turn off the power amplifier, then turn off the signal processing device, the mixing console, and finally turn off the signal source device. If the start-up and shutdown are not in the specified sequence, the signal current surge generated by the start-up of other devices will impact the power amplifier, resulting in a large "pop" sound from the speaker, and a jump signal. The same applies to shutdown. Moreover, because the power amplifier is a high-power device, some advanced power amplifiers use DC coupling, and their design safety margin is usually small, and they are not resistant to sudden current impact. The large current impact caused by not following the sequence during start-up and shutdown may damage the power amplifier circuit, and even directly burn out the power amplifier and the speaker of the speaker box.

[0004] A high-fidelity sound system is extremely sensitive to power supply quality. The system usually contains digital devices (such as turntables, digital broadcasting, decoders) and analog devices (such as front-stage and rear-stage power amplifiers), and these devices have different requirements for power supply noise, current purity and instantaneous power demand. Digital devices are usually high-frequency noise sources, while high-power rear-stage power amplifiers require abundant and stable current supply.

[0005] The function implementation of the power timing manager depends on the cooperation of multiple core modules and circuits. When used in a sound system, the sound waves of low-frequency signals (such as drum sounds and bass) in the sound system are longer, and the loudspeaker diaphragm needs to make larger reciprocating motion to push the air vibration, which consumes more energy. Therefore, the power amplifier driving the low-frequency unit (such as a subwoofer or a bass speaker) needs to output more power, and the instantaneous peak value of the power amplifier output power is often much higher than the average power. For example, the “impact force” of drum sound comes from the instantaneous burst energy. However, the power timing manager in the prior art often causes the low-frequency sound of the rear power amplifier to be “soft”, “weak”, and lagging, and loses the burst force.

[0006] The common power timing manager only implements a simple delay on-off function, and the circuit design of all output channels is completely consistent, which has obvious defects, such as: 1. Cross interference: high-frequency noise generated by digital devices can pollute analog devices through common power supply lines, especially for the front and rear power amplifiers which are extremely sensitive to noise, resulting in a decrease in sound quality and an increase in background noise; 2. Insufficient or contaminated power supply: using the same specification of filtering and power supply circuit cannot meet the power supply requirements of small power devices and large power devices at the same time. If the strong filtering circuit designed for digital devices is used for the rear stage, it will compress the dynamic; and if the large current channel designed for the rear stage is used for the front stage, it lacks sufficient noise suppression; 3. Lack of targeted optimization: unable to manage by zones according to the startup characteristics and power consumption characteristics of HIFI devices, the potential of the system cannot be fully utilized. Therefore, there is an urgent need for a professional power timing manager that can manage the power supply of different types of HIFI devices by zones, but so far there has been no related public report. SUMMARY

[0007] Therefore, the technical problem to be solved by the present application is to provide a zoned purification power management timing sequencer for a high-fidelity sound system, which can meet the requirements of other sound devices except for the rear power amplifier for current purity, and can ensure that the rear power amplifier does not produce the phenomenon of “soft” and “weak” low-frequency sound and sound lag during use, so that the sound quality heard by the user of the high-fidelity sound system is pure and the low-frequency sound is full and powerful, with impact and infectivity.

[0008] To solve the above technical problems, the present application provides the following technical solutions:

[0009] A zoned purification power management timing sequencer for a high-fidelity sound system, comprising a relay board, the relay board being provided with a first power purification circuit and a second power purification circuit, two differential mode capacitors in the second power purification circuit being short-circuited and the second power purification circuit being used for supplying power to a rear power amplifier, two differential mode capacitors in the first power purification circuit being electrically connected through a common mode inductor and the first power purification circuit being used for supplying power to an input turntable, a digital broadcast, a decoder or a front power amplifier.

[0010] Preferably, the above further comprises a cabinet and a display control board, the front of the cabinet is equipped with a display screen, an infrared probe and a power switch, the back of the cabinet is equipped with a power switch, a socket, a Direct Out socket, a power control socket, a WiFi interface, a GBA interface, a LINK_IN interface and a LINK_OUT interface, the cabinet is equipped with a display control board connected with the display screen, the power control socket is connected with the relay board and the display control board in the cabinet, the power switch, the WiFi interface, the GBA interface, the LINK_IN interface and the LINK_OUT interface are connected with the display control board through wires respectively, the power switch is connected with the relay board, the Direct Out socket and the socket through wires respectively, and the Direct Out socket is connected with the socket through wires; the display control board is provided with a power conversion circuit and a control circuit, and the power control socket is connected with the control circuit through a first power purification circuit and a second power purification circuit respectively.

[0011] Preferably, the power control socket is provided with a small-power device socket and a large-power device socket, the second power purification circuit corresponding to one of the large-power device sockets is that the 5th pin of the relay KY5 is connected with a 5V power supply, the 6th pin of the relay KY5 is connected with the 14th pin of the integrated circuit chip U33, the 2nd pin of the relay KY5 and the common terminal of the common-mode capacitor CY5 are connected with an L line, the 4th pin of the relay KY5 and the other common terminal of the common-mode capacitor CY5 are connected with two ends of the differential-mode capacitor CX21 and a N line, the two ends of the differential-mode capacitor CX21 are connected with the N line in sequence and are connected with the pressure-sensitive resistor RV5, the transient voltage suppression diode TVS5 and the discharge resistor R77 in parallel, one end of the differential-mode capacitor CX21 is connected with one end of the differential-mode capacitor CX25 and a common terminal of the common-mode capacitor CY17, and is connected with the CH5_L end through the connector CN141, the other end of the differential-mode capacitor CX21 is connected with the other end of the differential-mode capacitor CX25 and a common terminal of the common-mode capacitor CY21, and is connected with the CH5_N end through the connector CN18, and the common terminals of the common-mode capacitor CY17 and the common-mode capacitor CY21 are connected with the ground DGND; wherein the differential-mode capacitor CX21 and the differential-mode capacitor CX25 are selected to be 0.47μF / 275VAC specifications, to suppress differential-mode interference, and the common-mode capacitor CY17 and the common-mode capacitor CY21 are selected to be 2200pF / 1KV specifications, to suppress common-mode interference.

[0012] Preferably, the first power purification circuit corresponding to one of the aforementioned low-power device sockets is as follows: pin 5 of relay KY1 is connected to a 5V power supply; pin 6 of relay KY1 is connected to pin 18 of integrated circuit chip U33; pin 2 of relay KY1 and the common terminal of common-mode capacitor CY1 are connected to the L line; pin 4 of relay KY1 and the other common terminal of common-mode capacitor CY1, together with pins 1 and 3 of common-mode inductor L1, are connected to the N line; and a varistor RV1 and a transient suppression diode T are connected in parallel between pins 1 and 3 of common-mode inductor L1 and the N line. VS1, bleed resistor R33, and differential mode capacitor CX5 are connected together with pin 2 of common mode inductor L1 and one end of differential mode capacitor CX9 to one end of common mode capacitor CY9, and then connected to the CH1_L terminal via connector CN5. Pin 4 of common mode inductor L1 and the other end of differential mode capacitor CX9 are connected together to one end of common mode capacitor CY13, and then connected to the CH1_N terminal via connector CN9. The common terminal between common mode capacitors CY9 and CY13 is grounded to DGND. Among them, differential mode capacitors CX5 and CX9 are selected with a specification of 0.1μF / 275VAC to suppress differential mode interference, and common mode capacitors CY9 and CY13 are selected with a specification of 4700pF / 1KV to suppress common mode interference.

[0013] Preferably, pins 1-8 of the aforementioned integrated circuit chip U33 are connected sequentially to pins 1-8 of connector CN1, and pins 1-8 of connector CN1 are connected sequentially to pins 1-8 of connector CN101 on the display control board. The circuit is connected via connector CN1, pin 9 of connector CN1 is grounded, and pin 10 of connector CN1 is connected to a 5V power supply. Pin 9 of integrated circuit chip U33 is grounded, pin 10 of integrated circuit chip U33 is connected to a 5V power supply, pins 11-13 of integrated circuit chip U33 are connected sequentially to sockets CH8-CH6, and pins 15-17 of integrated circuit chip U33 are connected sequentially to sockets CH4-CH2.

[0014] The relay board is also equipped with a common-mode interference suppression circuit and an AC-DC power conversion circuit. The common-mode interference suppression circuit is as follows: pin 3 of the common-mode inductor U11 is connected to the N line, pin 4 of the common-mode inductor U11 is connected to the L line through resistor R222 and resistor R111 in sequence, pins 1 and 2 of the common-mode inductor U11 are connected to pins 1 and 2 of connector CN22 in sequence, and pins 1 and 2 of connector CN22 are connected to pins 1 and 2 of connector CN2 on the display control board in sequence, and the control circuit of the display control board is connected through connector CN22.

[0015] Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN44 respectively, and are connected to the main power switch via connector CN44. Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN3 on the display control board in sequence, and are connected to the control circuit of the display control board via connector CN33.

[0016] The AC-DC power conversion circuit is as follows: the main power switch is connected to screw terminals S7 and S8, which are connected to the L and N lines respectively; screw terminals S3 and S6 are grounded; pins 1 and 2 of the switching power supply module U22 are connected to the L and N lines of screw terminals S7 and S8 respectively; pins 3 and 4 of the switching power supply module U22 output 5V power through pin 1 of capacitor C1; and pins 5 and 6 of the switching power supply module U22 are grounded together with pin 2 of capacitor C1.

[0017] Preferably, in the above power conversion circuit, pin 1 of the voltage regulator chip U4 is grounded, pin 3 of the voltage regulator chip U4 is connected to 5.5V, pin 2 of the voltage regulator chip U4 outputs 3.3V, and capacitors C18 and C17 are connected in parallel between pins 2 and 1 of the voltage regulator chip U4.

[0018] The control circuit is as follows: pins 1-5, 7, 15, and 16 of microcontroller U2 are connected sequentially to pins 1-8 of connector CN101; pin 6 of microcontroller U2 is connected to the positive terminal of battery V1, and the negative terminal of battery V1 is grounded; pin 10 of microcontroller U2 is grounded; pin 11 of microcontroller U2 is connected to 3.3V along with grounding capacitor C7; pins 8 and 9 of microcontroller U2 are connected to pins 2 and 1 of crystal oscillator Y1, respectively; pins 2 and 1 of crystal oscillator Y1 are grounded via capacitors C8 and C6, respectively; pins 12 and 13 of microcontroller U2 are connected to pins 2 and 1 of crystal oscillator Y2, respectively; pins 2 and 1 of crystal oscillator Y2 are grounded via capacitors C11 and C6, respectively. C9 is grounded; pin 14 of microcontroller U2 and grounding capacitor C14 are connected to 3.3V via resistor R4; pin 17 of microcontroller U2 is connected to pin 8 of connector CN11; pin 18 of microcontroller U2 is connected to 3.3V via LED D1 and resistor R23; pin 19 of microcontroller U2 and grounding capacitor C10 are connected to 3.3V; pin 20 of microcontroller U2 is grounded; pins 21 and 22 of microcontroller U2 and grounding capacitor C12 are connected to 3.3V; pins 23 and 24 of microcontroller U2 are connected to pins 3 and 4 of connector CN4 respectively; pin 25 of microcontroller U2 and pin 21 of the WIFI chip are connected to pin 3 of connector CN12 respectively. The connections are as follows: Pin 26 of microcontroller U2 and pin 22 of the WIFI chip are connected to pin 4 of connector CN12 respectively; pin 27 of microcontroller U2 is grounded, and pin 28 of microcontroller U2 is connected to 3.3V along with grounding capacitor C5; pins 29, 30, 31, and 32 of microcontroller U2 are connected to pins 1, 6, 2, and 5 of memory chip U9 respectively; pin 3 of memory chip U9 is connected to 3.3V, pin 4 of memory chip U9 is grounded, and pins 7 and 8 of memory chip U9 are connected to 3.3V along with grounding capacitor C32; pins 33-36 of microcontroller U2 are connected to pins 7-4 of connector CN11 respectively; pin 37 of microcontroller U2 is grounded. Pins 38-46 of microcontroller U2 are connected to pins 39-31 of connector CN10 in sequence; pins 47 and 48 of microcontroller U2 are connected to pins 3 and 2 of connector CN51 in sequence; pin 1 of connector CN51 is connected to 3.3V, and pin 4 of connector CN51 is grounded; pin 49 of microcontroller U2 is connected to grounding capacitor C13; pin 50 of microcontroller U2 and grounding capacitor C26 are connected to 3.3V; pins 51-53 of microcontroller U2 are connected to pins 3-1 of connector CN11 in sequence; pin 9 of connector CN11 is grounded; pin 54 of microcontroller U2 is connected to pin 1 of connector CN4, and pin 2 of connector CN4 is connected to 3.3V.3V; pin 5 of connector CN4 is grounded; pins 55-57 of microcontroller U2 are connected to pins 30-28 of connector CN10 in sequence; pin 58 of microcontroller U2 is connected to pin 15 of connector CN10; pin 59 of microcontroller U2 is connected to the LCD backlight drive circuit; pin 60 of microcontroller U2 is connected to pin 2 of connector CN12; pin 6 of connector CN12 is connected to 5V; pin 5 of connector CN12 is grounded; pin 2 of connector CN12 is connected to 3.3V through resistor R24; pins 61 and 62 of microcontroller U2 are connected to pins 43 and 42 of connector CN10 respectively; pins 63 and 64 of microcontroller U2 are connected to pins 3 and 2 of connector CN61 respectively; pin 1 of connector CN61... Connected to 3.3V, pin 4 of connector CN61 is grounded; pin 66 of microcontroller U2 is connected to pin 4 of connector CN7 and pin 1 of connector CN12; pin 67 of microcontroller U2 is connected to pin 1 of connector CN7 via resistor R22, pins 2 and 3 of connector CN7 are grounded; pins 68 and 69 of microcontroller U2 are connected to pins 2 and 3 of connector CN14, pin 4 of connector CN14 is connected to 5V, pin 1 of connector CN14 is grounded, pins 4-1 of connector CN13 are connected to pins 1-4 of connector CN14; pins 70 and 71 of microcontroller U2 are connected to pins 23 and 20 of fuel gauge chip U5, respectively; pin 72 of microcontroller U2 is connected to pin 3 of pin header J2; Pin 73 of microcontroller U2 is connected to grounding capacitor C16; pin 74 of microcontroller U2 is grounded; pin 75 of microcontroller U2 and grounding capacitor C27 are connected to 3.3V; pin 75 of microcontroller U2 is connected to pin 2 of pin header J2, pin 4 of pin header J2 is grounded, pin 1 of pin header J2 is connected to 3.3V, pins 1-4 of connector CN8 are connected to pins 1-4 of pin header J2; pins 77-80 of microcontroller U2 are connected to pins 16-14 and pin 12 of touch chip U7 in sequence; pins 81 and 82 of microcontroller U2 are connected to pins 41 and 42 of connector CN10 in sequence, pins 7, 8, and 12 of connector CN10 are connected to 3.3V, pins 9-11, 45, and 47 of connector CN10 are grounded; Pins 83 and 84 of microcontroller U2 are connected to pins 19 and 5 of fuel gauge chip U5, respectively; pins 85-88 of microcontroller U2 are connected to pins 17, 16, 19, and 18 of connector CN10, respectively; pin 89 of microcontroller U2 is connected to pin 6 of fuel gauge chip U5; pin 90 of microcontroller U2 is connected to pin 5 of pin header J3, pin 1 of pin header J3 is grounded, and pin 2 of pin header J3 and grounding capacitor C38 are connected to 5V; pin 91 of microcontroller U2 is connected to pin 7 of pin header J3; pins 92 and 93 of microcontroller U2 are connected to pins 6 and 5 of memory chip U31, respectively, pins 1-4 and pin 7 of memory chip U31 are grounded, and pin 8 of memory chip U31 and grounding capacitor C15 are connected to 3V.3V; Pin 94 of microcontroller U2 is grounded; Pin 95 of microcontroller U2 is connected to the infrared circuit of infrared receiver U8; Pin 96 of microcontroller U2 is connected to the driver circuit of buzzer F1; Pin 97 of microcontroller U2 is connected to pin 7 of fuel gauge chip U5; Pin 98 of microcontroller U2 is connected to pin 11 of touch chip U7; Pin 99 of microcontroller U2 is grounded; Pin 100 of microcontroller U2 and grounding capacitor C28 are connected to 3.3V.

[0019] Preferably, the power metering circuit of the aforementioned fuel gauge chip U5 is as follows: pins 1 and 24 of the fuel gauge chip U5 are connected to pins 1 and 2 of the crystal oscillator Y3, respectively; pin 3 of the fuel gauge chip U5 and grounding capacitor C19 are connected to 3.3V; pin 4 of the fuel gauge chip U5 is grounded; pins 1 and 2 of the connector CN2 are connected to the two ends of a branch consisting of resistor R13 and capacitor C20 in parallel, one end of which is grounded through resistors R7 and R17, and the other end is connected to the two ends of capacitor C21 through resistors R10 and R14, respectively, and the two ends of capacitor C21 are connected to pins 9 and 1 of the fuel gauge chip U5, respectively. Pin 0 is connected; pins 11 and 12 of the fuel gauge chip U5 are connected to grounding capacitor C25 respectively; pin 13 of the fuel gauge chip U5 is grounded; pin 14 of the fuel gauge chip U5 is connected to 5V via grounding capacitors C23 and C25 in sequence; pins 1 and 2 of connector CN3 are connected to the two ends of a branch consisting of resistor R15 and capacitor C22 in parallel, one end of which is grounded via resistors R11 and R18, and the other end is connected to pins 16 and 15 of the fuel gauge chip U5 via resistors R12 and short circuit resistor R16 respectively; pin 17 of the fuel gauge chip U5 is connected to 5V together with grounding resistor R9.

[0020] Preferably, in the WIFI circuit of the above-mentioned WIFI chip, pin 1 of the WIFI chip and grounding capacitor C2 are connected to resistor R1. Resistor R1 is connected to 3.3V filtered by capacitors C2, C3 and C4. Pin 3 of the WIFI chip is connected to the filtered 3.3V through resistor R2. Pin 8 of the WIFI chip is connected to the filtered 3.3V. Pin 16 of the WIFI chip is grounded together with pin 15 of the WIFI chip through resistor R3.

[0021] The touch circuit of touch chip U7 is as follows: pin 1 of touch chip U7 is connected to 3.3V together with grounding capacitor C31; pins 2-5 of touch chip U7 are connected to pins 4, 3, 6 and 5 of connector CN10 in sequence; pins 6-8 of touch chip U7 are grounded; pins 9 and 10 of touch chip U7 are connected to 3.3V; and pin 11 of touch chip U7 is connected to 3.3V through resistor R20.

[0022] Preferably, the driving circuit of the buzzer F1 is as follows: pin 2 of the buzzer F1 is grounded, pin 1 of the buzzer F1 is connected to the collector of the transistor Q1, the emitter of the transistor Q1 is connected to 3.3V, and the base of the transistor Q1 is connected to pin 96 of the microcontroller U2.

[0023] The LCD backlight driving circuit is as follows: pin 1 of power chip U6 is connected to pin 1 of inductor L1 and the common terminal of diode D2; the other end of diode D2, pin 5 of power chip U6, and grounding capacitor C29 are connected to pin 2 of connector CN10; pin 3 of power chip U6 and grounding resistor R5 are connected to pin 1 of connector CN10; pin 2 of power chip U6 is grounded; pin 4 of power chip U6 and resistor R19 are connected to pin 59 of microcontroller U2; the other end of resistor R19 and grounding capacitor C30 are connected to 3.3V; pin 6 of power chip U6 and pin 2 of inductor L1 are connected to 3.3V.

[0024] Preferably, the infrared circuit of the infrared receiver U8 is as follows: pin 1 of the infrared receiver U8 is connected to 3.3V, pin 2 of the infrared receiver U8 is grounded, and a capacitor C37 is connected in parallel between pins 1 and 2 of the infrared receiver U8; pin 3 of the infrared receiver U8 is connected to resistor R21 and the base of transistor Q2, the collector of transistor Q2 is grounded, the transmitter of transistor Q2 is connected to 5V through resistor R6, and is connected to pin 95 of microcontroller U2.

[0025] The technical solution of the present invention achieves the following beneficial technical effects:

[0026] 1. This invention optimizes the power purification circuit and designs a dedicated power purification circuit for high-power devices. By shorting the differential-mode capacitor, the power supply can better handle bass drum beats and low-frequency transient signals, perfectly matching the instantaneous peak power of HiFi amplifiers. The "soft bass" of low-frequency amplifiers is improved by shorting the differential-mode capacitor, resulting in a fuller and more impactful low-frequency signal output. The signal synchronization between the power supply and the amplifier is improved, and the transient changes in music rhythm can be responded to in real time, avoiding a sluggish feeling.

[0027] 2. Based on the different power consumption of high-end audio equipment, this invention designs two output AC anti-interference filter circuits with different power levels using varistors, transient suppression diodes, common-mode inductors, safety capacitors, and bleeder resistors to perform bidirectional interference suppression: preventing interference from the power grid from entering the electrical appliances and affecting their normal operation; and also preventing the switching noise generated by the electrical appliances themselves (especially switching power supplies) from polluting the power grid.

[0028] 3. This invention utilizes differential-mode and common-mode capacitors with different parameters to provide zoned and graded power supplies for low-power audio equipment (less than 500W) and high-power audio equipment (greater than 5KW), and isolates them physically. This completely eliminates the path of digital noise contaminating the analog amplifier circuit through the power lines, significantly reducing the system's noise floor and improving the signal-to-noise ratio. The extreme purification effect of the first four channels ensures the detail reproduction capability of the audio source and preamplifier; the design of the last four channels ensures the dynamics and control of the power amplifier, allowing the system's potential to be fully realized. Attached Figure Description

[0029] Figure 1 This is a front view of the partition purification power management sequencer for a high-fidelity audio system according to the present invention;

[0030] Figure 2 This is a rear view of the present invention;

[0031] Figure 3 This is a schematic diagram of the electrical connection of the present invention;

[0032] Figure 4 This is a partial circuit diagram A of the relay board of the present invention;

[0033] Figure 5 This is circuit diagram B of the relay board of the present invention;

[0034] Figure 6 This is a partial circuit diagram C of the relay board of the present invention;

[0035] Figure 7 This is circuit diagram D of the relay board of the present invention;

[0036] Figure 8 This is circuit diagram A of the display control board of the present invention;

[0037] Figure 9 This is circuit diagram B of the display control board of the present invention;

[0038] Figure 10 This is a partial circuit diagram of the display control board of the present invention (C).

[0039] Figure 11 This is circuit diagram D of the display control board of the present invention;

[0040] Figure 12 This is a circuit diagram E of the display control board of the present invention;

[0041] Figure 13 This is a schematic diagram of the load connection of the power control socket of the present invention.

[0042] The reference numerals in the diagram are as follows: 1-Chassis; 2-Direct Out socket; 3-Main power switch; 4-Socket; 5-Power control socket; 6-Display screen; 7-Power switch; 8-WiFi interface; 9-GBA interface; 10-LINK_IN interface; 11-LINK_OUT interface; 12-Relay board; 13-Display control board; 14-Infrared sensor. Detailed Implementation

[0043] The structure of the zone purification power management sequencer used in this embodiment for a high-fidelity audio system is as follows: Figure 1 , 2 As shown, the front of the chassis 1 is equipped with a display screen 6, an infrared sensor 14, and a power switch 7. The back of the chassis 1 is equipped with a main power switch 3, a socket 4, a Direct Out socket 2, a power control socket 5, a WiFi interface 8, a GBA interface 9, a LINK_IN interface 10, and a LINK_OUT interface 11. The chassis 1 contains a display control board 13 connected to the display screen 6.

[0044] like Figure 3 As shown, the power control socket 5 is connected to the relay board 12 and the display control board 13 inside the chassis 1. The power switch 7, WiFi interface 8, GBA interface 9, LINK_IN interface 10 and LINK_OUT interface 11 are connected to the display control board 13 via wires. The main power switch 3 is connected to the relay board 12, Direct Out socket 2 and socket 4 via wires. The Direct Out socket 2 is connected to socket 4 via wires.

[0045] The display control board 13 is equipped with a power conversion circuit and a control circuit, and the relay board 12 is equipped with a first power purification circuit and a second power purification circuit, which are used to connect devices with power less than 500W and devices with power greater than 5KW, respectively. The power control socket 5 is connected to the control circuit through the first power purification circuit and the second power purification circuit. Figure 13 As shown, the two differential-mode capacitors in the second power purification circuit are shorted together, and the second power purification circuit is used to supply power to the subsequent power amplifier or the system main power strip. The two differential-mode capacitors in the first power purification circuit are connected through a common-mode inductor, and the first power purification circuit is used to supply power to the connected turntable, digital player, decoder, or preamplifier.

[0046] Figures 4-7 This is the circuit diagram on the relay board. Figures 8-12 To display the circuit diagram on the control board, due to size limitations, it is shown in a split format and does not represent the layout or order.

[0047] In the case of this city, such as Figure 1As shown, the power control socket 5 is provided with four low-power device sockets, namely CH1, CH2, CH3 and CH4, and four high-power device sockets, namely CH5, CH6, CH7 and CH8. Sockets CH1, CH2, CH3 and CH4 are connected to the control circuit through the first power purification circuit, and sockets CH5, CH6, CH7 and CH8 are connected to the control circuit through the second power purification circuit.

[0048] like Figure 4 As shown, the first power purification circuit corresponding to socket CH1 is as follows: pin 5 of relay KY1 is connected to a 5V power supply; pin 6 of relay KY1 is connected to pin 18 of integrated circuit chip U33; pin 2 of relay KY1 and the common terminal of common-mode capacitor CY1 are connected to the L line; pin 4 of relay KY1 and the other common terminal of common-mode capacitor CY1, along with pins 1 and 3 of common-mode inductor L1, are connected to the N line; and a varistor RV1, a transient voltage suppressor diode TVS1, and a leakage current filter are connected in parallel between pins 1 and 3 of common-mode inductor L1 and the N line. The resistor R33 and differential-mode capacitor CX5 are connected together. Pin 2 of common-mode inductor L1 and one end of differential-mode capacitor CX9 are connected to one end of common-mode capacitor CY9, and then connected to the CH1_L terminal via connector CN5. Pin 4 of common-mode inductor L1 and the other end of differential-mode capacitor CX9 are connected to one end of common-mode capacitor CY13, and then connected to the CH1_N terminal via connector CN9. The common terminal between common-mode capacitors CY9 and CY13 is grounded to DGND. Among them, differential-mode capacitors CX5 and CX9 are selected with a specification of 0.1μF / 275VAC to suppress differential-mode interference, and common-mode capacitors CY9 and CY13 are selected with a specification of 4700pF / 1KV to suppress common-mode interference. The first power purification circuits corresponding to sockets CH2, CH3 and CH4 are the same as the first filter circuit corresponding to socket CH1.

[0049] like Figure 4As shown, the first power purification circuit corresponding to socket CH2 is as follows: pin 5 of relay KY2 is connected to a 5V power supply; pin 6 of relay KY2 is connected to pin 17 of integrated circuit chip U33; pin 2 of relay KY2 and the common terminal of common-mode capacitor CY2 are connected to the L line; pin 4 of relay KY2 and the other common terminal of common-mode capacitor CY2, together with pins 1 and 3 of common-mode inductor L2, are connected to the N line; and a varistor RV2 and a transient suppressor are connected in parallel between pins 1 and 3 of common-mode inductor L2 and the N line. Diode TVS2, bleeder resistor R44, and differential-mode capacitor CX6 are connected together. Pin 2 of common-mode inductor L2 and one end of differential-mode capacitor CX10 are connected to one end of common-mode capacitor CY10, and then connected to the CH2_L terminal via connector CN71. Pin 4 of common-mode inductor L2 and the other end of differential-mode capacitor CX10 are connected to one end of common-mode capacitor CY14, and then connected to the CH2_N terminal via connector CN111. The common terminal between common-mode capacitors CY10 and CY14 is grounded to DGND. Socket CH2 is connected to the first power purification circuit via connectors CN111 and CN71.

[0050] like Figure 5 As shown, the first power purification circuit corresponding to socket CH3 is as follows: pin 5 of relay KY3 is connected to a 5V power supply; pin 6 of relay KY3 is connected to pin 16 of integrated circuit chip U33; pin 2 of relay KY3 and the common terminal of common-mode capacitor CY3 are connected to the L line; pin 4 of relay KY3 and the other common terminal of common-mode capacitor CY3, together with pins 1 and 3 of common-mode inductor L3, are connected to the N line; and a varistor RV3 and a transient suppressor are connected in parallel between pins 1 and 3 of common-mode inductor L3 and the N line. Diode TVS3, bleeder resistor R55, and differential-mode capacitor CX7 are connected to one end of common-mode capacitor CY11 via pin 2 of common-mode inductor L3 and one end of differential-mode capacitor CX11. This connection is then connected to the CH3_L terminal via connector CN81. Pin 4 of common-mode inductor L3 and the other end of differential-mode capacitor CX11 are connected to one end of common-mode capacitor CY15 via connector CN121. The common terminal between common-mode capacitors CY11 and CY15 is grounded (DGND). Socket CH3 is connected to the first power purification circuit via connectors CN121 and CN81.

[0051] like Figure 5As shown, the first power purification circuit corresponding to socket CH4 is as follows: pin 5 of relay KY4 is connected to a 5V power supply; pin 6 of relay KY4 is connected to pin 15 of integrated circuit chip U33; pin 2 of relay KY4 and the common terminal of common-mode capacitor CY4 are connected to the L line; pin 4 of relay KY4 and the other common terminal of common-mode capacitor CY4, together with pins 1 and 3 of common-mode inductor L4, are connected to the N line; and a varistor RV4 and a transient suppression resistor are connected in parallel between pins 1 and 3 of common-mode inductor L4 and the N line. The circuit consists of diode TVS4, bleeder resistor R66, and differential-mode capacitor CX8. Pin 2 of common-mode inductor L4 and one end of differential-mode capacitor CX12 are connected to one end of common-mode capacitor CY12, and then connected to terminal CH4_L via connector CN6. Pin 4 of common-mode inductor L4 and the other end of differential-mode capacitor CX12 are connected to one end of common-mode capacitor CY16, and then connected to terminal CH4_N via connector CN100. The common terminal between common-mode capacitors CY12 and CY16 is grounded to DGND. Socket CH4 is connected to the first power purification circuit via connectors CN6 and CN100.

[0052] like Figure 6 As shown, the second power purification circuit corresponding to socket CH5 is as follows: pin 5 of relay KY5 is connected to a 5V power supply; pin 6 of relay KY5 is connected to pin 14 of integrated circuit chip U33; pin 2 of relay KY5 and the common terminal of common-mode capacitor CY5 are connected to the L line; pin 4 of relay KY5 and the other common terminal of common-mode capacitor CY5 are connected to the N line along with the two ends of differential-mode capacitor CX21; and a varistor RV5, a transient voltage suppressor diode TVS5, and a bleeder resistor R77 are connected in parallel between the two ends of differential-mode capacitor CX21 and the N line. One end of differential mode capacitor CX21 is connected to one end of differential mode capacitor CX25, which together connects to one end of common mode capacitor CY17. This connection is then connected to the CH5_L terminal via connector CN141. The other end of differential mode capacitor CX21 is connected to the other end of differential mode capacitor CX25, which together connects to one end of common mode capacitor CY21. This connection is then connected to the CH5_N terminal via connector CN18. The common terminal between common mode capacitors CY17 and CY21 is grounded to DGND. Differential mode capacitors CX21 and CX25 are 0.47μF / 275VAC to suppress differential mode interference, while common mode capacitors CY17 and CY21 are 2200pF / 1KV to suppress common mode interference. Socket CH5 is connected to the second power purification circuit via connectors CN141 and CN18. The second power purification circuits corresponding to sockets CH6, CH7, and CH8 are the same as the second filter circuit corresponding to socket CH5.

[0053] like Figure 6As shown, the second power purification circuit corresponding to socket CH6 is as follows: pin 5 of relay KY6 is connected to a 5V power supply; pin 6 of relay KY6 is connected to pin 13 of integrated circuit chip U33; pin 2 of relay KY6 and the common terminal of common-mode capacitor CY6 are connected to the L line; pin 4 of relay KY6 and the other common terminal of common-mode capacitor CY6 are connected to the N line along with the two ends of differential-mode capacitor CX22; a varistor RV6, a transient suppression diode TVS6, and a bleeder resistor R8 are connected in parallel between the two ends of differential-mode capacitor CX22 and the N line; one end of differential-mode capacitor CX22 is connected to one end of differential-mode capacitor CX26, which is connected to one end of common-mode capacitor CY18, and then connected to the CH6_L terminal via connector CN15; the other end of differential-mode capacitor CX22 is connected to the other end of differential-mode capacitor CX26, which is connected to one end of common-mode capacitor CY22, and then connected to the CH6_N terminal via connector CN19; the common terminal between common-mode capacitor CY18 and common-mode capacitor CY22 is grounded to DGND. The socket CH6 is connected to the first power purification circuit via connectors CN15 and CN19.

[0054] like Figure 7 As shown, the second power purification circuit corresponding to socket CH7 is as follows: pin 5 of relay KY7 is connected to 5V power supply; pin 6 of relay KY7 is connected to pin 12 of integrated circuit chip U33; pin 2 of relay KY7 and the common terminal of common mode capacitor CY7 are connected to the L line; pin 4 of relay KY7 and the other common terminal of common mode capacitor CY7 are connected to the N line along with the two ends of differential mode capacitor CX23; a varistor RV7, a transient suppression diode TVS7, and a bleeder resistor R99 are connected in parallel between the two ends of differential mode capacitor CX23 and the N line; one end of differential mode capacitor CX23 is connected to one end of differential mode capacitor CX27 and is connected to one end of common mode capacitor CY19, and connected to the CH7_L terminal via connector CN131; the other end of differential mode capacitor CX23 is connected to the other end of differential mode capacitor CX27 and is connected to one end of common mode capacitor CY23, and connected to the CH7_N terminal via connector CN17; the common terminal between common mode capacitor CY19 and common mode capacitor CY23 is grounded to DGND. The socket CH7 is connected to the second power purification circuit via connectors CN17 and CN131.

[0055] like Figure 7As shown, the second power purification circuit corresponding to socket CH8 is as follows: pin 5 of relay KY8 is connected to 5V power supply; pin 6 of relay KY8 is connected to pin 11 of integrated circuit chip U33; pin 2 of relay KY8 and the common terminal of common mode capacitor CY8 are connected to the L line; pin 4 of relay KY8 and the other common terminal of common mode capacitor CY8 are connected to the N line along with the two ends of differential mode capacitor CX24; a varistor RV8, a transient suppression diode TVS8, and a bleeder resistor R100 are connected in parallel between the two ends of differential mode capacitor CX24 and the N line; one end of differential mode capacitor CX24 is connected to one end of differential mode capacitor CX28 and is connected to one end of common mode capacitor CY20, and is connected to the CH8_L terminal via connector CN16; the other end of differential mode capacitor CX24 is connected to the other end of differential mode capacitor CX28 and is connected to one end of common mode capacitor CY24, and is connected to the CH8_N terminal via connector CN20; the common terminal between common mode capacitor CY20 and common mode capacitor CY24 is grounded to DGND. Socket CH8 is connected to the second power purification circuit via connectors CN20 and CN16. The common-mode capacitors are grounded to DGND to discharge common-mode interference to protective ground. The common-mode capacitors handle the common-mode current of the L and N lines respectively, suppressing common-mode interference on the power lines. The differential-mode capacitors filter out differential-mode interference between the L and N lines. The moving contact of the relay is connected to the L line. When the relay coil is energized, the contact closes, and the L line connects to the filter circuit through the contact. The relay controls the power supply, and the filtered L and N lines supply power to the power control socket 5 through the connectors.

[0056] The first power purification circuit corresponding to the above sockets CH1, CH2, CH3, and CH4 is used for low-power audio equipment with a power of up to 500W. The X capacitor (differential mode capacitor) is selected as 0.1μF / 275VAC to suppress differential mode interference. High-end audio-grade German WIMA capacitors are used. The Y capacitor (common mode capacitor) is selected as 4700pF / 1KV to suppress common mode interference.

[0057] The varistor selected is V10471U, which suppresses transient pulses (such as lightning surges and voltage spikes caused by switching operations). It limits the voltage amplitude by quickly conducting and shunting current, protecting the downstream circuitry. The transient suppression diode is a BR211-240 imported from the Netherlands, the PHI BR211 transient suppression diode, which also provides lightning protection. The bleeder resistor is a 1MΩ / 2W resistor connected in parallel across capacitor X. It is used to quickly release the charge stored on capacitor X after power failure, preventing electric shock and also preventing electromagnetic noise generated during power-on and power-off from interfering with the microcontroller of the power sequence manager.

[0058] In the secondary power purification circuits corresponding to sockets CH5, CH6, CH7, and CH8, for devices with power greater than 5KW, the X capacitor should be 0.47μF / 275VAC to suppress differential-mode interference. As power increases, the generated noise energy may be greater; therefore, the X capacitor capacitance can be appropriately increased to enhance the differential-mode filtering effect. The Y capacitor should be 2200pF / 1KV to suppress common-mode interference. While increasing power is recommended, increasing the Y capacitor capacitance is not advised; instead, leakage current should be strictly ensured to be within safe standards (usually <0.75mA). 2200pF is a more conservative and safer choice.

[0059] The varistor selected is V10471U, which suppresses transient pulses (such as lightning surges and voltage spikes caused by switching operations). It limits the voltage amplitude through rapid conduction and current shunting, protecting the downstream circuitry. The transient suppression diode is a BR211-240 imported Dutch PHI BR211 transient suppression diode, which also provides lightning protection. A 1MΩ / 2W bleeder resistor is connected in parallel across the X capacitor to quickly release the charge stored in the X capacitor after power failure, preventing electric shock and also preventing electromagnetic noise generated during power-on and power-off from interfering with the microcontroller of the power sequencer. The last four channels are used for 5kW high-power audio equipment, employing an electrical interference filtering scheme to prevent magnetic saturation. The X capacitor's capacitance has also been increased to better filter differential-mode interference.

[0060] like Figure 4 As shown, pins 1-8 of integrated circuit chip U33 are connected to pins 1-8 of connector CN1 in sequence. Pins 1-8 of connector CN1 are connected to pins 1-8 of connector CN101 on display control board 13 in sequence. Relay board 12 is connected to display control board 13 through connectors CN1 and CN101. Pin 9 of connector CN1 is grounded, and pin 10 of connector CN1 is connected to a 5V power supply. Pin 9 of integrated circuit chip U33 is grounded, pin 10 of integrated circuit chip U33 is connected to a 5V power supply, pins 11-13 of integrated circuit chip U33 are connected to the second power purification circuit of sockets CH8-CH6 in sequence, and pins 15-17 of integrated circuit chip U33 are connected to the first power purification circuit of sockets CH4-CH2 in sequence.

[0061] The relay board 12 also includes a common-mode interference suppression circuit and an AC-DC power conversion circuit. The common-mode interference suppression circuit consists of common-mode inductor U11, pin 3 of which is connected to the N line, and common-mode inductor U11, pin 4 of which is connected to the L line via resistors R222 and R111. Common-mode inductor U11, pins 1 and 2 are connected to connector CN22, pins 1 and 2 of connector CN22, respectively. Connect connector CN22 to connector CN2 on display control board 13, and then to the control circuit of display control board 13 via connector CN22. The core function of the common-mode inductor in the circuit is to suppress common-mode electromagnetic interference (EMI), improve electromagnetic compatibility (EMC) by filtering out common-mode noise, and maintain the normal transmission of differential-mode signals.

[0062] Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN44 respectively, and are connected to the main power switch 3 via connector CN44. Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN3 on display control board 13 in sequence, and are connected to the control circuit of display control board 13 via connector CN33.

[0063] The AC-DC power conversion circuit is as follows: the main power switch 3 is connected to screw terminals S7 and S8, which are connected to the L and N lines respectively. Screw terminals S3 and S6 are grounded. Pins 1 and 2 of the switching power supply module U22 are connected to the L and N lines of screw terminals S7 and S8 respectively. Pins 3 and 4 of the switching power supply module U22 output 5V power through pin 1 of capacitor C1. Pins 5 and 6 of the switching power supply module U22 are grounded together with pin 2 of capacitor C1. The 220V AC power provided by screw terminals S7 and S8 is converted into 5V DC output by the switching power supply module U22, and then filtered by capacitor C2 to provide a stable 5V DC power supply for the subsequent circuit load.

[0064] The display control board 13 is equipped with a power conversion circuit and a control circuit, such as Figures 8-9 The diagram shows the connection of the microcontroller U2 and some circuitry.

[0065] like Figure 10 As shown, the power conversion circuit consists of a voltage regulator chip U4 with pin 1 grounded, pin 3 connected to 5.5V, and pin 2 outputting 3.3V. Capacitors C18 and C17 are connected in parallel between pins 2 and 1 of the voltage regulator chip U4. This power conversion circuit converts the 5V power supply to 3.3V to meet the needs of low-voltage devices, and the capacitor filtering ensures a cleaner output.

[0066] The control circuit is as follows: pins 1-5, 7, 15, and 16 of the microcontroller U2 are connected to pins 1-8 of the connector CN101 in sequence; pin 6 of the microcontroller U2 is connected to the positive terminal of the battery V1; the negative terminal of the battery V1 is grounded; pin 10 of the microcontroller U2 is grounded; and pin 11 of the microcontroller U2 and the grounding capacitor C7 are connected to 3.3V.

[0067] Pins 8 and 9 of microcontroller U2 are connected to pins 2 and 1 of crystal oscillator Y1, respectively. Pins 2 and 1 of crystal oscillator Y1 are grounded via capacitors C8 and C6, respectively. Pins 12 and 13 of microcontroller U2 are connected to pins 2 and 1 of crystal oscillator Y2, respectively. Pins 2 and 1 of crystal oscillator Y2 are grounded via capacitors C11 and C9, respectively. Two clock oscillation circuits are connected to provide a precise time reference signal for microcontroller U2.

[0068] Pin 14 of microcontroller U2 is connected to 3.3V via resistor R4, along with grounding capacitor C14; pin 17 of microcontroller U2 is connected to pin 8 of connector CN11; pin 18 of microcontroller U2 is connected to 3.3V via LED D1 and resistor R23; pin 19 of microcontroller U2 is connected to 3.3V via grounding capacitor C10; pin 20 of microcontroller U2 is grounded; pins 21 and 22 of microcontroller U2 are connected to 3.3V via grounding capacitor C12; pins 23 and 24 of microcontroller U2 are connected to pins 3 and 4 of connector CN4, respectively; pin 25 of microcontroller U2 and pin 21 of the WIFI chip are connected to pin 3 of connector CN12, respectively; pin 26 of microcontroller U2 and the WIFI chip... Pin 22 is connected to pin 4 of connector CN12; pin 27 of microcontroller U2 is grounded, and pin 28 of microcontroller U2 is connected to 3.3V together with grounding capacitor C5; pins 29, 30, 31, and 32 of microcontroller U2 are connected to pins 1, 6, 2, and 5 of memory chip U9 in sequence; pin 3 of memory chip U9 is connected to 3.3V, pin 4 of memory chip U9 is grounded, and pins 7 and 8 of memory chip U9 are connected to 3.3V together with grounding capacitor C32; pins 33-36 of microcontroller U2 are connected to pins 7-4 of connector CN11 in sequence; pin 37 of microcontroller U2 is grounded; pins 38-46 of microcontroller U2 are connected to pins 39-31 of connector CN10 in sequence.

[0069] Pins 47 and 48 of the microcontroller U2 are connected to pins 3 and 2 of connector CN51, respectively. Pin 1 of connector CN51 is connected to 3.3V, and pin 4 of connector CN51 is grounded. LINK_IN interface 10 is connected to the control circuit through connector CN51.

[0070] Pin 49 of microcontroller U2 is connected to grounding capacitor C13; pin 50 of microcontroller U2 and grounding capacitor C26 are connected to 3.3V; pins 51-53 of microcontroller U2 are connected to pins 3-1 of connector CN11 in sequence; pin 9 of connector CN11 is grounded.

[0071] Pin 54 of microcontroller U2 is connected to pin 1 of connector CN4. Pin 2 of connector CN4 is connected to 3.3V, and pin 5 of connector CN4 is grounded. GBA interface 9 is connected to the control circuit through connector CN4.

[0072] Pins 55-57 of microcontroller U2 are connected to pins 30-28 of connector CN10 in sequence; pin 58 of microcontroller U2 is connected to pin 15 of connector CN10; pin 59 of microcontroller U2 is connected to the LCD backlight drive circuit; pin 60 of microcontroller U2 is connected to pin 2 of connector CN12; pin 6 of connector CN12 is connected to 5V; pin 5 of connector CN12 is grounded; pin 2 of connector CN12 is connected to 3.3V through resistor R24; pins 61 and 62 of microcontroller U2 are connected to pins 43 and 42 of connector CN10 in sequence.

[0073] Pins 63 and 64 of the microcontroller U2 are connected to pins 3 and 2 of connector CN61, respectively. Pin 1 of connector CN61 is connected to 3.3V, and pin 4 of connector CN61 is grounded. LINK_OUT interface 11 is connected to the control circuit through connector CN61.

[0074] Pin 66 of microcontroller U2 is connected to pin 4 of connector CN7 and pin 1 of connector CN12. Pin 67 of microcontroller U2 is connected to pin 1 of connector CN7 via resistor R22. Pins 2 and 3 of connector CN7 are grounded. Power switch 7 is connected to the control circuit via connector CN7.

[0075] Pins 68 and 69 of microcontroller U2 are connected to pins 2 and 3 of connector CN14, respectively. Pin 4 of connector CN14 is connected to 5V, and pin 1 of connector CN14 is grounded. Pins 4-1 of connector CN13 are connected to pins 1-4 of connector CN14 in sequence. Pins 70 and 71 of microcontroller U2 are connected to pins 23 and 20 of fuel gauge chip U5, respectively. Pin 72 of microcontroller U2 is connected to pin 3 of pin header J2. Pin 73 of microcontroller U2 is connected to grounding capacitor C16. Pin 74 of microcontroller U2 is grounded. Pin 75 of microcontroller U2 is connected to grounding capacitor C27. All pins are connected to 3.3V; pin 75 of microcontroller U2 is connected to pin 2 of pin header J2, pin 4 of pin header J2 is grounded, pin 1 of pin header J2 is connected to 3.3V, and pins 1-4 of connector CN8 are connected to pins 1-4 of pin header J2; pins 77-80 of microcontroller U2 are connected to pins 16-14 and pin 12 of touch chip U7 in sequence; pins 81 and 82 of microcontroller U2 are connected to pins 41 and 42 of connector CN10 in sequence, pins 7, 8, and 12 of connector CN10 are connected to 3.3V, and pins 9-11, 45, and 47 of connector CN10 are grounded; Pins 83 and 84 of microcontroller U2 are connected to pins 19 and 5 of fuel gauge chip U5, respectively; pins 85-88 of microcontroller U2 are connected to pins 17, 16, 19, and 18 of connector CN10, respectively; pin 89 of microcontroller U2 is connected to pin 6 of fuel gauge chip U5; pin 90 of microcontroller U2 is connected to pin 5 of pin header J3, pin 1 of pin header J3 is grounded, and pin 2 of pin header J3 is connected to 5V along with grounding capacitor C38; pin 91 of microcontroller U2 is connected to pin 7 of pin header J3; pins 92 and 93 of microcontroller U2 are connected to pins 6 and 5 of memory chip U31, respectively. The pins are connected as follows: pins 1-4 and pin 7 of memory chip U31 are grounded; pin 8 of memory chip U31 and grounding capacitor C15 are connected to 3.3V; pin 94 of microcontroller U2 is grounded; pin 95 of microcontroller U2 is connected to the infrared circuit of infrared receiver U8; pin 96 of microcontroller U2 is connected to the driver circuit of buzzer F1; pin 97 of microcontroller U2 is connected to pin 7 of fuel meter chip U5; pin 98 of microcontroller U2 is connected to pin 11 of touch chip U7; pin 99 of microcontroller U2 is grounded; pin 100 of microcontroller U2 and grounding capacitor C28 are connected to 3.3V.

[0076] like Figure 10As shown, the power metering circuit of the fuel gauge chip U5 is as follows: pins 1 and 24 of the fuel gauge chip U5 are connected to pins 1 and 2 of the crystal oscillator Y3, respectively; pin 3 of the fuel gauge chip U5 and grounding capacitor C19 are connected to 3.3V; pin 4 of the fuel gauge chip U5 is grounded; pins 1 and 2 of connector CN2 are connected to the two ends of a branch consisting of resistor R13 and capacitor C20 in parallel. One end of the parallel branch is grounded through resistors R7 and R17, and the other end is connected to the two ends of capacitor C21 through resistors R10 and R14, respectively. The two ends of capacitor C21 are connected to pins 9 and 10 of the fuel gauge chip U5, respectively. The circuit consists of several terminals connected together. Pins 11 and 12 of the power meter chip U5 are connected to grounding capacitor C25, pin 13 of the power meter chip U5 is grounded, and pin 14 of the power meter chip U5 is connected to 5V via grounding capacitors C23 and C25. Pins 1 and 2 of connector CN3 are connected to the two ends of a branch consisting of resistor R15 and capacitor C22 in parallel. One end of the parallel branch is grounded via resistors R11 and R18, and the other end is connected to pins 16 and 15 of the power meter chip U5 via resistors R12 and short-circuit resistor R16. Pin 17 of the power meter chip U5 is connected to 5V along with grounding resistor R9. The power metering circuit samples, filters, and performs AD conversion on the AC voltage (CN2 input) and AC current (CN3 input). The data is then uploaded to the microcontroller U2 via the interface to monitor or measure power parameters.

[0077] like Figure 10 As shown, the Wi-Fi circuit of the Wi-Fi chip is as follows: pin 1 of the Wi-Fi chip and grounding capacitor C2 are connected to resistor R1. Resistor R1 is connected to a 3.3V supply filtered by capacitors C2, C3, and C4. Pin 3 of the Wi-Fi chip is connected to the filtered 3.3V supply via resistor R2. Pin 8 of the Wi-Fi chip is also connected to the filtered 3.3V supply. Pin 16 of the Wi-Fi chip is grounded via resistor R3 and pin 15 of the Wi-Fi chip. Through this Wi-Fi circuit, the Wi-Fi chip can communicate with the microcontroller U2 via serial port, enabling Wi-Fi data transmission and reception, thus realizing the device's networking function.

[0078] like Figure 11 As shown, the touch circuit of touch chip U7 is as follows: pin 1 of touch chip U7 is connected to 3.3V along with grounding capacitor C31; pins 2-5 of touch chip U7 are connected to pins 4, 3, 6, and 5 of connector CN10 in sequence; pins 6-8 of touch chip U7 are grounded; pins 9 and 10 of touch chip U7 are connected to 3.3V; and pin 11 of touch chip U7 is connected to 3.3V via resistor R20. The touch function circuit enables touch operation of display screen 6.

[0079] like Figure 8As shown, the driving circuit of buzzer F1 is as follows: pin 2 of buzzer F1 is grounded, pin 1 of buzzer F1 is connected to the collector of transistor Q1, the emitter of transistor Q1 is connected to 3.3V, and the base of transistor Q1 is connected to pin 96 of microcontroller U2.

[0080] like Figure 11 As shown, the LCD backlight driving circuit is as follows: pin 1 of power chip U6 is connected to the common terminal of inductor L1 and diode D2; the other end of diode D2, along with pin 5 of power chip U6 and grounding capacitor C29, is connected to pin 2 of connector CN10; pin 3 of power chip U6 and grounding resistor R5 are connected to pin 1 of connector CN10; pin 2 of power chip U6 is grounded; pin 4 of power chip U6 and resistor R19 are connected to pin 59 of microcontroller U2; the other end of resistor R19 and grounding capacitor C30 are connected to 3.3V; pin 6 of power chip U6 and pin 2 of inductor L1 are connected to 3.3V. By controlling the inductor's operation through power chip U6, a boost voltage is achieved, which, together with diodes, capacitors, and other components, provides a stable driving power supply for the LCD backlight.

[0081] like Figure 11 As shown, the infrared circuit of infrared receiver U8 is as follows: pin 1 of infrared receiver U8 is connected to 3.3V, pin 2 of infrared receiver U8 is grounded, and capacitor C37 is connected in parallel between pins 1 and 2 of infrared receiver U8; pin 3 of infrared receiver U8 is connected to resistor R21 and the base of transistor Q2, the collector of transistor Q2 is grounded, the transmitter of transistor Q2 is connected to 5V through resistor R6, and is connected to pin 95 of microcontroller U2. Infrared probe 14 is connected to the control circuit through the infrared circuit.

[0082] In this embodiment, the display screen 6 of the partition purification power management sequencer for the high-fidelity audio system is a high-definition color 4-inch display screen (resolution 480*800), which can display the date and time, voltage, current, power, power factor, channel switch status, MAC address and local ID, and has resistive touch screen control; the socket 4 adopts a high-power 20A gold-plated power socket, the main power switch 3 adopts an imported leakage current protection main switch, and a high-grade copper American standard socket.

[0083] The built-in WiFi chip U1 supports 2.4G WiFi network connection, enabling remote and synchronous control via mobile APP, allowing one mobile phone to control multiple devices.

[0084] Supports 100 network-timed tasks, 8 channels can be controlled individually via timed settings, and supports local two-group cyclic power on / off control. Built-in power meter (U5 power meter chip) displays voltage, current, power, and power factor in real time and uploads data to a mobile phone for remote viewing.

[0085] It features 14 infrared sensors supporting infrared control; RF433 control is also supported; overvoltage, overcurrent, and undervoltage protection with adjustable thresholds are included. It supports RS485 and RS232 central control with an adjustable baud rate (4800-921600, default 9600), and supports inverse encoding of all device data. Multiple devices can be cascaded via RS232 (maximum distance 10 meters), requiring a dB9 male-to-male 23 crossover cable. It includes power-off memory (data is automatically saved when the device suddenly loses power), and power-on auto-start (all channels will activate 10 seconds after power-on). It has 8 switch output channels, each with EMI electronic filtering, and each channel has an individually configurable power-on / off delay of 1-999 seconds (default 1 second), plus 2 direct-through outputs. It supports simultaneous Chinese and English display. It supports cumulative working time in minutes and single / multiple electricity consumption accumulation in kilowatt-hours.

[0086] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of the claims of this patent application.

Claims

1. A zone-controlled power management sequencer for a high-fidelity audio system, characterized in that, Includes a relay board (12), on which a first power purification circuit and a second power purification circuit are provided. The two differential-mode capacitors in the second power purification circuit are short-circuited and the second power purification circuit is used to supply power to the subsequent power amplifier. The two differential-mode capacitors in the first power purification circuit are connected through a common-mode inductor and the first power purification circuit is used to supply power to the connected turntable, digital player, decoder or preamplifier.

2. The zone purification power management sequencer for a high-fidelity audio system according to claim 1, characterized in that, It also includes a chassis (1) and a display control board (13). The front of the chassis (1) is equipped with a display screen (6), an infrared sensor (14), and a power switch (7). The back of the chassis (1) is equipped with a main power switch (3), a socket (4), a Direct Out socket (2), a power control socket (5), a WiFi interface (8), a GBA interface (9), a LINK_IN interface (10), and a LINK_OUT interface (11). The chassis (1) contains a display control board (13) connected to the display screen (6). The power control socket (5) is connected to the display control board (13) via a relay board (12) inside the chassis (1). The power switch (7), WiFi interface (8), GBA interface (9), LINK_IN interface (10), and LINK_OUT interface (11) are connected to the display control board (13) via wires. The main power switch (3) is connected to the relay board (12), the Direct Out socket (2), and the socket (4) via wires. Out socket (2) is connected to socket (4) via a wire; the display control board (13) is equipped with a power conversion circuit and a control circuit, and the power control socket (5) is connected to the control circuit via the first power purification circuit and the second power purification circuit respectively.

3. The zone purification power management sequencer for a high-fidelity audio system according to claim 2, characterized in that, The power control socket (5) is equipped with a low-power device socket and a high-power device socket. The second power purification circuit corresponding to one of the high-power device sockets is as follows: pin 5 of relay KY5 is connected to a 5V power supply; pin 6 of relay KY5 is connected to pin 14 of integrated circuit chip U33; pin 2 of relay KY5 and the common terminal of common-mode capacitor CY5 are connected to the L line; pin 4 of relay KY5 and the other common terminal of common-mode capacitor CY5 are connected to the N line along with the two ends of differential-mode capacitor CX21; and a varistor RV5 and a transient suppression resistor are connected in parallel between the two ends of differential-mode capacitor CX21 and the N line. The system includes a TVS5 diode and a bleeder resistor R77. One end of the differential mode capacitor CX21 is connected to one end of the differential mode capacitor CX25, which together connects to one end of the common mode capacitor CY17. This connection is then connected to the CH5_L terminal via connector CN141. The other end of the differential mode capacitor CX21 is connected to the other end of the differential mode capacitor CX25, which together connects to one end of the common mode capacitor CY21. This connection is then connected to the CH5_N terminal via connector CN18. The common terminal between the common mode capacitors CY17 and CY21 is grounded to DGND. The differential mode capacitors CX21 and CX25 are 0.47μF / 275VAC to suppress differential mode interference, while the common mode capacitors CY17 and CY21 are 2200pF / 1KV to suppress common mode interference.

4. The zone purification power management sequencer for a high-fidelity audio system according to claim 3, characterized in that, The first power purification circuit corresponding to one of the low-power device sockets is as follows: pin 5 of relay KY1 is connected to a 5V power supply; pin 6 of relay KY1 is connected to pin 18 of integrated circuit chip U33; pin 2 of relay KY1 and the common terminal of common-mode capacitor CY1 are connected to the L line; pin 4 of relay KY1 and the other common terminal of common-mode capacitor CY1, together with pins 1 and 3 of common-mode inductor L1, are connected to the N line; a varistor RV1 and a transient voltage suppressor diode TVS are connected in parallel between pins 1 and 3 of common-mode inductor L1 and the N line.

1. The bleeder resistor R33 and differential mode capacitor CX5 are connected together with one end of the common mode inductor L1 and one end of the differential mode capacitor CX9 to one end of the common mode capacitor CY9, and then connected to the CH1_L terminal via connector CN5. The other end of the common mode inductor L1 and the other end of the differential mode capacitor CX9 are connected together to one end of the common mode capacitor CY13, and then connected to the CH1_N terminal via connector CN9. The common terminal between the common mode capacitors CY9 and CY13 is grounded to DGND. Among them, the differential mode capacitors CX5 and CX9 are selected with a specification of 0.1μF / 275VAC to suppress differential mode interference, and the common mode capacitors CY9 and CY13 are selected with a specification of 4700pF / 1KV to suppress common mode interference.

5. The zone purification power management sequencer for a high-fidelity audio system according to claim 3, characterized in that, Pins 1-8 of the integrated circuit chip U33 are connected to pins 1-8 of connector CN1 in sequence. Pins 1-8 of connector CN1 are connected to pins 1-8 of connector CN101 on the display control board (13) in sequence. The circuit is connected to the control circuit through connector CN1. Pin 9 of connector CN1 is grounded and pin 10 of connector CN1 is connected to a 5V power supply. Pin 9 of integrated circuit chip U33 is grounded and pin 10 of integrated circuit chip U33 is connected to a 5V power supply. Pins 11-13 of integrated circuit chip U33 are connected to sockets CH8-CH6 in sequence. Pins 15-17 of integrated circuit chip U33 are connected to sockets CH4-CH2 in sequence. The relay board (12) is also provided with a common-mode interference suppression circuit and an AC-DC power conversion circuit. The common-mode interference suppression circuit is as follows: pin 3 of the common-mode inductor U11 is connected to the N line, pin 4 of the common-mode inductor U11 is connected to the L line through resistor R222 and resistor R111 in sequence, pins 1 and 2 of the common-mode inductor U11 are connected to pins 1 and 2 of the connector CN22 in sequence, and pins 1 and 2 of the connector CN22 are connected to pins 1 and 2 of the connector CN2 on the display control board (13) in sequence, and the control circuit of the display control board (13) is connected through the connector CN22. Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN44 respectively, and are connected to the main power switch (3) via connector CN44. Pins 1 and 2 of connector CN33 are connected to pins 1 and 2 of connector CN3 on the display control board (13) in sequence, and are connected to the control circuit of the display control board (13) via connector CN33. The AC-DC power conversion circuit is as follows: the main power switch (3) is connected to screw terminals S7 and S8, screw terminals S7 and S8 are connected to L line and N line respectively, screw terminals S3 and S6 are grounded, pin 1 and pin 2 of the switching power module U22 are connected to L line and N line of screw terminals S7 and S8 respectively, pin 3 and pin 4 of the switching power module U22 output 5V power through pin 1 of capacitor C1, and pin 5 and pin 6 of the switching power module U22 are grounded together with pin 2 of capacitor C1.

6. The zone purification power management sequencer for a high-fidelity audio system according to claim 1, characterized in that, The power conversion circuit is as follows: pin 1 of voltage regulator chip U4 is grounded, pin 3 of voltage regulator chip U4 is connected to 5.5V, pin 2 of voltage regulator chip U4 outputs 3.3V, and capacitors C18 and C17 are connected in parallel between pin 2 and pin 1 of voltage regulator chip U4. The control circuit is as follows: pins 1-5, 7, 15, and 16 of the microcontroller U2 are connected to pins 1-8 of the connector CN101 in sequence; pin 6 of the microcontroller U2 is connected to the positive terminal of the battery V1; the negative terminal of the battery V1 is grounded; pin 10 of the microcontroller U2 is grounded; and pin 11 of the microcontroller U2 and the grounding capacitor C7 are connected to 3.3V. Pins 8 and 9 of the microcontroller U2 are connected to pins 2 and 1 of the crystal oscillator Y1, respectively. Pins 2 and 1 of the crystal oscillator Y1 are connected to ground via capacitors C8 and C6, respectively. Pins 12 and 13 of the microcontroller U2 are connected to pins 2 and 1 of the crystal oscillator Y2, respectively. Pins 2 and 1 of the crystal oscillator Y2 are connected to ground via capacitors C11 and C9, respectively. Pin 14 of microcontroller U2 is connected to 3.3V via resistor R4, together with grounding capacitor C14; pin 17 of microcontroller U2 is connected to pin 8 of connector CN11; pin 18 of microcontroller U2 is connected to 3.3V via LED D1 and resistor R23; pin 19 of microcontroller U2 is connected to 3.3V via grounding capacitor C10; pin 20 of microcontroller U2 is grounded; pins 21 and 22 of microcontroller U2 are connected to 3.3V via grounding capacitor C12. Pins 23 and 24 of microcontroller U2 are connected to pins 3 and 4 of connector CN4, respectively; pin 25 of microcontroller U2 and pin 21 of the WIFI chip are connected to pin 3 of connector CN12, respectively; pin 26 of microcontroller U2 and pin 22 of the WIFI chip are connected to pin 4 of connector CN12, respectively; pin 27 of microcontroller U2 is grounded, and pin 28 of microcontroller U2 and grounding capacitor C5 are connected to 3.3V. Pins 29, 30, 31, and 32 of the microcontroller U2 are connected to pins 1, 6, 2, and 5 of the storage chip U9, respectively. Pin 3 of the storage chip U9 is connected to 3.3V, pin 4 of the storage chip U9 is grounded, and pins 7 and 8 of the storage chip U9 are connected to 3.3V together with the grounding capacitor C32. Pins 33-36 of microcontroller U2 are connected to pins 7-4 of connector CN11 in sequence; pin 37 of microcontroller U2 is grounded. Pins 38-46 of microcontroller U2 are connected to pins 39-31 of connector CN10 in sequence; pins 47 and 48 of microcontroller U2 are connected to pins 3 and 2 of connector CN51 in sequence; pin 1 of connector CN51 is connected to 3.3V, and pin 4 of connector CN51 is grounded; pin 49 of microcontroller U2 is connected to grounding capacitor C13; pin 50 of microcontroller U2 and grounding capacitor C26 are both connected to 3.3V. Pins 51-53 of microcontroller U2 are connected to pins 3-1 of connector CN11 in sequence; pin 9 of connector CN11 is grounded; pin 54 of microcontroller U2 is connected to pin 1 of connector CN4; pin 2 of connector CN4 is connected to 3.3V; and pin 5 of connector CN4 is grounded. Pins 55-57 of microcontroller U2 are connected to pins 30-28 of connector CN10 in sequence; pin 58 of microcontroller U2 is connected to pin 15 of connector CN10; pin 59 of microcontroller U2 is connected to the LCD backlight drive circuit. Pin 60 of microcontroller U2 is connected to pin 2 of connector CN12. Pin 6 of connector CN12 is connected to 5V, pin 5 of connector CN12 is grounded, and pin 2 of connector CN12 is connected to 3.3V through resistor R24. Pins 61 and 62 of microcontroller U2 are connected to pins 43 and 42 of connector CN10, respectively; pins 63 and 64 of microcontroller U2 are connected to pins 3 and 2 of connector CN61, respectively; pin 1 of connector CN61 is connected to 3.3V; and pin 4 of connector CN61 is grounded. Pin 66 of microcontroller U2 is connected to pin 4 of connector CN7 and pin 1 of connector CN12 respectively; pin 67 of microcontroller U2 is connected to pin 1 of connector CN7 through resistor R22, and pins 2 and 3 of connector CN7 are grounded. Pins 68 and 69 of microcontroller U2 are connected to pins 2 and 3 of connector CN14, respectively. Pin 4 of connector CN14 is connected to 5V, pin 1 of connector CN14 is grounded, and pins 4-1 of connector CN13 are connected to pins 1-4 of connector CN14 in sequence. Pins 70 and 71 of microcontroller U2 are connected to pins 23 and 20 of fuel gauge chip U5, respectively; pin 72 of microcontroller U2 is connected to pin 3 of pin header J2; pin 73 of microcontroller U2 is connected to grounding capacitor C16; pin 74 of microcontroller U2 is grounded; pin 75 of microcontroller U2 and grounding capacitor C27 are connected to 3.3V. Pin 75 of microcontroller U2 is connected to pin 2 of pin header J2, pin 4 of pin header J2 is grounded, pin 1 of pin header J2 is connected to 3.3V, and pins 1-4 of connector CN8 are connected to pins 1-4 of pin header J2. Pins 77-80 of microcontroller U2 are connected to pins 16-14 and pin 12 of touch chip U7 in sequence; pins 81 and 82 of microcontroller U2 are connected to pins 41 and 42 of connector CN10 in sequence; pins 7, 8, and 12 of connector CN10 are connected to 3.3V; pins 9-11, 45, and 47 of connector CN10 are grounded. Pins 83 and 84 of the microcontroller U2 are connected to pins 19 and 5 of the fuel meter chip U5, respectively; Pins 85-88 of the microcontroller U2 are connected to pins 17, 16, 19 and 18 of the connector CN10, respectively. Pin 89 of microcontroller U2 is connected to pin 6 of fuel meter chip U5; pin 90 of microcontroller U2 is connected to pin 5 of pin header J3; pin 1 of pin header J3 is grounded; pin 2 of pin header J3 and grounding capacitor C38 are connected to 5V. Pin 91 of microcontroller U2 is connected to pin 7 of header J3; pins 92 and 93 of microcontroller U2 are connected to pins 6 and 5 of memory chip U31 respectively; pins 1-4 and pins 7 of memory chip U31 are grounded respectively; pin 8 of memory chip U31 and grounding capacitor C15 are connected to 3.3V. Pin 94 of microcontroller U2 is grounded; pin 95 of microcontroller U2 is connected to the infrared circuit of infrared receiver U8; pin 96 of microcontroller U2 is connected to the drive circuit of buzzer F1. Pin 97 of microcontroller U2 is connected to pin 7 of fuel gauge chip U5; pin 98 of microcontroller U2 is connected to pin 11 of touch chip U7; pin 99 of microcontroller U2 is grounded; pin 100 of microcontroller U2 and grounding capacitor C28 are connected to 3.3V.

7. The zone purification power management sequencer for a high-fidelity audio system according to claim 5, characterized in that, The power metering circuit of the power meter chip U5 is as follows: pin 1 and pin 24 of the power meter chip U5 are connected to pin 1 and pin 2 of the crystal oscillator Y3, respectively; pin 3 of the power meter chip U5 and the grounding capacitor C19 are connected to 3.3V. Pin 4 of the fuel gauge chip U5 is grounded; pins 1 and 2 of connector CN2 are connected to the two ends of a branch consisting of resistor R13 and capacitor C20 in parallel. One end of the parallel branch is grounded via resistors R7 and R17, and the other end is connected to the two ends of capacitor C21 via resistors R10 and R14. The two ends of capacitor C21 are also connected to pins 9 and 10 of the fuel gauge chip U5; pins 11 and 12 of the fuel gauge chip U5 are connected to the grounded capacitor C25. Pin 13 of U5 is grounded; pin 14 of the fuel gauge chip U5 is connected to 5V via grounding capacitors C23 and C25; pins 1 and 2 of connector CN3 are connected to the two ends of a branch consisting of resistor R15 and capacitor C22 in parallel, one end of which is grounded via resistors R11 and R18, and the other end is connected to pins 16 and 15 of the fuel gauge chip U5 via resistors R12 and R16; pin 17 of the fuel gauge chip U5 is connected to 5V together with grounding resistor R9.

8. The zone purification power management sequencer for a high-fidelity audio system according to claim 5, characterized in that, The WIFI circuit of the WIFI chip is as follows: pin 1 of the WIFI chip and grounding capacitor C2 are connected to resistor R1. Resistor R1 is connected to 3.3V filtered by capacitors C2, C3 and C4. Pin 3 of the WIFI chip is connected to the filtered 3.3V through resistor R2. Pin 8 of the WIFI chip is connected to the filtered 3.3V. Pin 16 of the WIFI chip is grounded together with pin 15 of the WIFI chip through resistor R3. The touch circuit of touch chip U7 is such that pin 1 of touch chip U7 and ground capacitor C31 are connected to 3.3V. Pins 2-5 of touch chip U7 are connected to pins 4, 3, 6 and 5 of connector CN10 in sequence; pins 6-8 of touch chip U7 are grounded; pins 9 and 10 of touch chip U7 are connected to 3.3V; pin 11 of touch chip U7 is connected to 3.3V through resistor R20.

9. The zone purification power management sequencer for a high-fidelity audio system according to claim 5, characterized in that, The driving circuit of the buzzer F1 is as follows: pin 2 of the buzzer F1 is grounded, pin 1 of the buzzer F1 is connected to the collector of the transistor Q1, the emitter of the transistor Q1 is connected to 3.3V, and the base of the transistor Q1 is connected to pin 96 of the microcontroller U2. The LCD backlight driving circuit is as follows: pin 1 of power chip U6 is connected to pin 1 of inductor L1 and the common terminal of diode D2; the other end of diode D2, pin 5 of power chip U6, and grounding capacitor C29 are connected to pin 2 of connector CN10; pin 3 of power chip U6 and grounding resistor R5 are connected to pin 1 of connector CN10; pin 2 of power chip U6 is grounded; pin 4 of power chip U6 and resistor R19 are connected to pin 59 of microcontroller U2; the other end of resistor R19 and grounding capacitor C30 are connected to 3.3V. Pin 6 of the power chip U6 and pin 2 of the inductor L1 are both connected to 3.3V.

10. The zone purification power management sequencer for a high-fidelity audio system according to claim 5, characterized in that, The infrared circuit of the infrared receiver U8 is as follows: pin 1 of the infrared receiver U8 is connected to 3.3V, pin 2 of the infrared receiver U8 is grounded, and a capacitor C37 is connected in parallel between pins 1 and 2 of the infrared receiver U8; pin 3 of the infrared receiver U8 is connected to resistor R21 and the base of transistor Q2, the collector of transistor Q2 is grounded, the transmitter of transistor Q2 is connected to 5V through resistor R6, and is connected to pin 95 of microcontroller U2.

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