STS parallel system wiring state detection method and STS parallel system

Abstract

The invention discloses an STS parallel system wiring state detection method and an STS parallel system, and relates to the technical field of energy storage systems, and the method comprises the following steps: S1, after the system installation is completed, the STS parallel system is connected to a three-phase power grid; s2, accessing a three-phase power grid based on the STS parallel system, acquiring phase information of an STS module, and judging phase sequences of R, S and T commercial power; s3, according to signal transmission between the host STS module and the slave STS module, the matching condition between the detection result and a first preset condition is judged; and S4, after signal transmission between the host STS module and the slave STS module is completed, obtaining a final detection result. In an industrial and commercial storage three-phase power grid system, under the condition that a plurality of STSs are connected in parallel, the risk that three-phase R, S and T access does not correspond exists, short-circuit tripping is easily caused, and then a fire disaster is caused; according to the scheme, the safety degree of the system can be remarkably improved, and then the situation of short-circuit tripping caused by misoperation is avoided.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of energy storage systems, in particular to a STS parallel system wiring state detection method and a STS parallel system. BACKGROUND

[0002] The industrial and commercial energy storage system belongs to an energy storage solution designed for industrial or commercial terminals, which is referred to as an industrial and commercial storage system. The STS module in the system is an important module. However, in the industrial and commercial three-phase power grid system, there is a risk of three-phase R, S and T access not corresponding in the case of multiple STS parallel connection, which is easy to cause short-circuit tripping and even fire. Based on this, the industry needs to design a solution to avoid the occurrence of short-circuit tripping and even fire. SUMMARY

[0003] The inventor found that in the actual operation process of the STS parallel system, the risk mainly comes from the unfamiliarity of the operator to the system. In actual work, it is generally first measured by manual measurement to confirm whether the wiring is normal. This method has disadvantages, for example, the design and production of the system are completed by the R&D team, and the members of the R&D team are familiar with the characteristics of the system. However, the actual operators on site are customers of the R&D team or installation personnel found by the customers, who are "first contact" with the current parallel system device and are not familiar with the characteristics. In the process of confirming the wiring, it is easy to overlook and cause short-circuit tripping. Based on this, the inventor proposes a STS phase sequence detection scheme to solve the above technical problems, which can significantly improve the safety of the system and avoid the occurrence of short-circuit tripping due to misoperation.

[0004] In order to solve the above technical problems, the application provides a STS parallel system wiring state detection method, which comprises the following steps: S1, after the system is installed, the STS parallel system is connected to the three-phase power grid; S2, based on the STS parallel system connected to the three-phase power grid, the phase information of the STS module is obtained, and the phase sequence of the R, S and T power is judged; S3, according to the signal transmission between the master STS module and the slave STS module, the matching between the detection result and the first preset condition is judged; S4, after the signal transmission between the master STS module and the slave STS module is completed, the final detection result is obtained.

[0005] Further technical solutions are that the step S2 comprises: all STS modules in the STS parallel system obtain the state of the R, S and T power zero-crossing capture signals, periodically collect and calculate the voltage and frequency of the R, S and T power, obtain the R phase information, S phase information and T phase information of the STS module, and judge whether the R, S and T power connected by each module is positive sequence or negative sequence according to the preset judgment basis.

[0006] Further, in the step S2, the preset judgment basis is that, in positive sequence, R phase leads S phase by 120 degrees, S phase leads T phase by 120 degrees, and T phase leads R phase by 120 degrees; and the preset judgment basis also includes that, in negative sequence, R phase lags S phase by 120 degrees, S phase lags T phase by 120 degrees, and T phase lags R phase by 120 degrees.

[0007] Further, in the step S3, the step includes: when the host STS module detects that the level of the zero-crossing capture signal of the hardware R phase of the host STS module is a rising edge, the host STS module sends a high-level signal to the slave STS module through Sign; when the host STS module detects that the level of the zero-crossing capture signal of the hardware R phase of the host STS module is a falling edge, that is, the rising edge is reversed by 180 degrees, Sign sends a low-level signal to the slave STS module; and when the time difference between the first time and the second time is within the first preset time, it is determined that the R phase connection is correct, otherwise, it is determined that the R phase sequence detection is abnormal.

[0008] Further, the first preset time is one millisecond; and when the time difference between the first time and the second time is within the first preset time, it is determined that the R phase connection is correct, otherwise, it is determined that the R phase sequence detection is abnormal, which includes: when the slave STS module receives the Sign signal from the host from the low level to the high level signal, and starts timing until the slave STS module generates the rising edge signal from the hardware zero-crossing signal of the commercial power R phase, the time difference between the two is within one millisecond, at this time, it is determined that the R phase connection is correct, and if the timing of at least one slave STS module in all parallel STS modules exceeds one millisecond, it is determined that the R phase sequence detection is abnormal.

[0009] Further, the STS parallel system connection state detection method also includes: in the case that the R phase sequence detection is abnormal, the slave STS module reports the R phase sequence detection failure.

[0010] Further, in the step S4, the step includes: when all slave STS modules complete the sequence detection, the host STS module receives the sequence detected by all slave STS modules, and all slave STS modules and the host STS module itself perform consistency judgment on the detected sequence to obtain the final detection result.

[0011] Further technical solutions are that, in the step of S4: under the premise that the time difference is within one millisecond and the R-phase connection is determined to be correct, when the determination result is that all slave STS modules and master STS modules simultaneously exist positive sequence and negative sequence phase sequences, a phase sequence detection abnormality is reported; under the premise that the time difference is within one millisecond and the R-phase connection is determined to be correct, when the determination result is that all slave STS modules and master STS modules do not simultaneously exist positive sequence and negative sequence phase sequences, a phase sequence detection normality is reported; wherein, all STS relays of the STS parallel system do not attract the relays, to avoid phase sequence abnormal tripping; when the STS parallel system is all positive sequence or negative sequence, the phase sequence detection passes, and the STS relays of the STS parallel system start to work.

[0012] Compared with the prior art, the STS parallel system wiring state detection method and the STS parallel system have the following beneficial technical effects: the STS parallel system wiring state detection method and the STS parallel system can discover the installation wiring abnormality problem in time through phase sequence detection of the three-phase power grid in the power-on process of the STS, the system actively warns the installer to recheck the phase sequence wiring, avoids the tripping problem caused by the phase sequence wiring error in the system starting process, and avoids the fire, and the abnormality is discovered faster, so that the warning is more timely.

[0013] In summary, in the current industrial and commercial storage three-phase power grid system, in the case of multiple STS parallel connection, there is a risk of three-phase R, S and T connection not corresponding, which is easy to cause short-circuit tripping and further cause fire; the scheme can significantly improve the safety of the system, and further avoid the short-circuit tripping caused by misoperation. BRIEF DESCRIPTION OF DRAWINGS

[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0015] Fig. 1 The flowchart of the STS parallel system wiring state detection method is shown.

[0016] Fig. 2 The waveform diagram of the STS parallel system wiring state detection method is shown.

[0017] Fig. 3 The schematic diagram of the STS parallel system is shown. DETAILED DESCRIPTION

[0018] Embodiments of the present application are described below in detail with reference to the accompanying drawings, wherein the same or similar components or components having the same or similar functions are denoted by the same or similar reference numerals throughout the drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and cannot be understood as a limitation of the present application.

[0019] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first", "second" can be explicitly or implicitly included one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified and limited.

[0020] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected. It can be mechanically connected or electrically connected. It can be directly connected or indirectly connected through an intermediate medium. It can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0021] As shown in Figs. 1 to 3 A STS parallel system wiring state detection method, comprising the following steps: S1, after the system is installed, the STS parallel system accesses the three-phase power grid; S2, based on the STS parallel system accessing the three-phase power grid, acquiring the phase information of the STS module and judging the phase sequence of the R, S and T power supply; S3, according to the signal transmission between the master STS module and the slave STS module, judging the matching between the detection result and the first preset condition; S4, after the signal transmission between the master STS module and the slave STS module is completed, acquiring the final detection result.

[0022] Further technical solutions of the application are as follows: the step S2 comprises: acquiring the states of R, S and T power zero-crossing capture signals by all STS modules in the system, periodically collecting and calculating the voltage and frequency of R, S and T power, acquiring R phase information, S phase information and T phase information of the STS module, and judging whether the R, S and T power connected by the respective module is positive sequence or negative sequence according to a preset judgment basis.

[0023] Further technical solutions of the application are as follows: in the step S2, the preset judgment basis is that the R phase leads the S phase by 120 degrees, the S phase leads the T phase by 120 degrees, and the T phase leads the R phase by 120 degrees in the positive sequence; and the preset judgment basis further comprises that the R phase lags behind the S phase by 120 degrees, the S phase lags behind the T phase by 120 degrees, and the T phase lags behind the R phase by 120 degrees in the negative sequence.

[0024] Further technical solutions of the application are as follows: the step S3 comprises: when the host STS module detects that the level of the zero-crossing capture signal of the R phase of the host STS module is a rising edge, the host STS module sends a high-level signal to the slave STS module through Sign; when the host STS module detects that the level of the zero-crossing capture signal of the R phase of the host STS module is a falling edge, that is, the rising edge is reversed by 180 degrees, the Sign sends a low-level signal to the slave STS module; and when the time difference between the first time and the second time is within a first preset time, it is determined that the R phase connection is correct, otherwise it is determined that the R phase sequence detection is abnormal.

[0025] Further technical solutions of the application are as follows: the first preset time is one millisecond; and when the time difference between the first time and the second time is within the first preset time, it is determined that the R phase connection is correct, otherwise it is determined that the R phase sequence detection is abnormal, which comprises: starting timing when the slave STS module receives the Sign signal from the host from low level to high level signal until the slave STS module generates a rising edge signal from the hardware zero-crossing signal of the R phase of the power supply, and if the time difference between the first time and the second time is within one millisecond, it is determined that the R phase connection is correct, otherwise it is determined that the R phase sequence detection is abnormal. In the above solution, the slave STS module itself knows the phase sequence of the slave STS module itself; the time when the slave STS module receives the Sign signal from the host from low level to high level signal is the first time, and the timing starts at the first time until the slave STS module generates a rising edge signal from the hardware zero-crossing signal of the R phase of the power supply, and if the time difference between the first time and the second time is within one millisecond, it is determined that the R phase connection is correct.

[0026] Further, the STS parallel system wiring state detection method further comprises: in the case of determining that the R-phase sequence detection is abnormal, reporting the R-phase sequence detection failure of the slave STS module.

[0027] Further, the step S4 comprises: after all the slave STS modules complete the sequence detection and the master STS module receives the sequence detected by all the slave STS modules, all the slave STS modules and the master STS module perform consistency judgment on the sequence detected by themselves to obtain the final detection result.

[0028] Further, in the step S4: under the premise that the time difference is within one millisecond and the R-phase wiring is correct, when the judgment result is that all the slave STS modules and the master STS module simultaneously exist positive sequence and negative sequence, the sequence detection is reported to be abnormal; under the premise that the time difference is within one millisecond and the R-phase wiring is correct, when the judgment result is that all the slave STS modules and the master STS module do not simultaneously exist positive sequence and negative sequence, the sequence detection is reported to be normal; wherein, all the STS relays of the STS parallel system do not attract the relay to avoid sequence abnormal tripping; when the STS parallel system is positive sequence or negative sequence, the sequence detection is passed, and the STS relays of the STS parallel system start to work.

[0029] Further, the STS parallel system comprises at least three STS modules connected in parallel.

[0030] The inventor finds that, in the actual operation process of the STS parallel system, the risk mainly comes from the unfamiliarity of the operator with the system; in actual work, it is generally confirmed whether the wiring is normal through manual measurement, which has disadvantages, for example, the design and production of the system are completed by the R&D team, the members of the R&D team are familiar with the characteristics of the system, while the actual operators on site are customers of the R&D team or installation personnel found by the customers, who are "firstly contacted" with the current parallel system device and are not familiar with the characteristics, and are easy to overlook in the process of confirming the wiring and cause short-circuit tripping; based on this, the inventor proposes a STS sequence detection scheme to solve the above technical problems.

[0031] In summary, in the current industrial and commercial three-phase power grid system, in the case of multiple STS parallel connection, there is a risk that the three-phase R, S and T do not correspond to each other, which is easy to cause short-circuit tripping and further cause fire; the scheme can significantly improve the safety of the system and avoid the short-circuit tripping caused by misoperation.

[0032] It should be noted that the above only describes the preferred embodiments of the present application and is not intended to limit the present application. Although the present application has been described in detail with reference to the embodiments, modifications or equivalent replacements to the technical solutions described in the foregoing embodiments can be made by those skilled in the art. Obviously, various modifications and changes can be made to the present application without departing from the spirit and scope of the present application. Thus, the modifications and changes of the present application are intended to be included within the scope of the present application and equivalent technologies.

[0033] In several embodiments provided by the present application, it should be understood that the disclosed apparatus and method can be implemented in other ways. For example, the apparatus embodiments described above are merely schematic. For example, the division of each unit is merely a logical function division, and actual implementation can have another division manner. For example, a unit or component can be combined or integrated into another system, or some features can be ignored or not executed.

[0034] The above describes the specific embodiments of the present application, but the protection scope of the present application is not limited to this. Any skilled person in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for detecting the wiring status of an STS parallel system, characterized in that, The method includes the following steps: S1, After the system installation is completed, the STS parallel system is connected to the three-phase power grid; S2, based on the STS parallel system, connects to the three-phase power grid, obtains the phase information of the STS module, and determines the phase sequence of the R, S, and T mains power; S3, based on the signal transmission between the host STS module and the slave STS module, determine the matching status between the detection result and the first preset condition; S4: After the signal transmission between the host STS module and the slave STS module is completed, the final detection result is obtained.

2. The method for detecting the wiring status of an STS parallel system according to claim 1, characterized in that, The steps in S2 include: In the STS parallel system, all STS modules acquire the status of the zero-crossing capture signals of the R, S, and T mains power, periodically collect and calculate the voltage and frequency of the R, S, and T mains power, obtain the R phase information, S phase information, and T phase information of the STS modules, and determine whether the R, S, and T mains power connected to each module's STS is in positive or negative sequence according to preset judgment criteria.

3. The method for detecting the wiring status of an STS parallel system according to claim 2, characterized in that, In step S2: The preset judgment criteria are as follows: positive sequence corresponds to R phase leading S phase by 120 degrees, S phase leading T phase by 120 degrees, and T phase leading R phase by 120 degrees; the preset judgment criteria also include: negative sequence corresponds to R phase lagging behind S phase by 120 degrees, S phase lagging behind T phase by 120 degrees, and T phase lagging behind R phase by 120 degrees.

4. The method for detecting the wiring status of an STS parallel system according to claim 3, characterized in that, The steps in S3 include: When the master STS module detects that the zero-crossing capture signal of its own hardware R phase is a rising edge, the master STS module sends a high-level signal to the slave STS module via Sign. When the master STS module detects that the level of its own hardware R-phase zero-crossing capture signal is a falling edge (i.e., the rising edge is reversed by 180 degrees), Sign sends a low-level signal to the slave STS module. If the time difference between the first moment and the second moment is within a first preset time, the R-phase wiring is determined to be correct; otherwise, the R-phase sequence detection is determined to be abnormal.

5. The method for detecting the wiring status of an STS parallel system according to claim 4, characterized in that, The first preset time is one millisecond; the step of determining that the R-phase wiring is correct within the first preset time interval between the first moment and the second moment, otherwise determining that the R-phase phase sequence detection is abnormal, includes: When the slave STS module receives the master's Sign signal from low to high, it starts timing until the slave STS module receives the rising edge signal from the hardware zero-crossing signal of the R phase of the mains power. The time difference between the two is within one millisecond. At this time, the R phase wiring is determined to be correct. If the timing of at least one slave STS module among all parallel STS modules exceeds one millisecond, the R phase sequence detection is determined to be abnormal.

6. The method for detecting the wiring status of an STS parallel system according to claim 5, characterized in that, The STS parallel system wiring status detection method also includes: If the R-phase sequence detection is found to be abnormal, report an R-phase sequence detection fault in the slave STS module.

7. The method for detecting the wiring status of an STS parallel system according to claim 6, characterized in that, The steps in S4 include: Once all slave STS modules have completed phase sequence detection, the master STS module receives the phase sequence data detected by all slave STS modules. Then, all slave STS modules and the master STS module perform a consistency check on the phase sequence data detected by themselves to obtain the final detection result.

8. The method for detecting the wiring status of an STS parallel system according to claim 7, characterized in that, In step S4: Under the premise that the time difference is within one millisecond and the R phase wiring is determined to be correct, when the judgment result shows that all slave STS modules and master STS modules have both positive and negative phase sequence, an abnormal phase sequence detection is reported. Under the premise that the time difference is within one millisecond and the R phase wiring is determined to be correct, when the judgment result is that no positive and negative phase sequence exists simultaneously in all slave STS modules and master STS modules, the phase sequence detection is reported as normal. In the STS parallel system, all STS relays will not be activated to avoid tripping due to abnormal phase sequence; when all STS parallel systems are in positive or negative sequence and the phase sequence detection passes, the STS relays activating the STS parallel system will start working.

9. A parallel STS system, characterized in that, The system applies the STS parallel system wiring status detection method according to any one of claims 1-8, wherein the STS parallel system includes at least three STS modules connected in parallel with each other.

10. The STS parallel system according to claim 9, characterized in that, In the STS parallel system, each of the at least three STS modules connected in parallel includes three STS relays.

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