Supercapacitor equalization system and method based on shunt resistance network and adaptive control
By using a shunt resistor network and an adaptive control supercapacitor balancing system, the voltage imbalance problem caused by inconsistent individual parameters in the supercapacitor module is solved, achieving fast balancing and low-power voltage management, thus improving the overall performance and stability of the module.
Patent Information
- Application Number
- CN202511556630.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-29
- Publication Date
- 2026-02-17
AI Technical Summary
The voltage imbalance caused by inconsistent individual parameters in existing supercapacitor modules during series connection affects the overall performance and lifespan. Furthermore, traditional passive balancing technology cannot adaptively adjust, resulting in low balancing efficiency.
A supercapacitor equalization system based on shunt resistor network and adaptive control is adopted. The voltage acquisition unit monitors the individual cell voltage in real time, the data processing unit calculates the difference and generates a control signal, and controls the electronic switch to connect shunt resistors with different resistance values to perform graded discharge equalization of high voltage cells. The voltage distribution is optimized by combining the voltage divider resistor network.
It achieves dynamic adaptive voltage balancing of supercapacitor modules, improving overall performance and lifespan, and reducing standby power consumption, making it particularly suitable for high-reliability energy storage scenarios.
Smart Images

Figure CN121546760A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of power meter reading and supercapacitor energy storage, specifically to a supercapacitor balancing system and method based on a shunt resistor network and adaptive control. Background Technology
[0002] Supercapacitors, as a novel energy storage device characterized by high power density, long cycle life, and fast charge / discharge rates, have been widely used in electric vehicles, rail transportation, smart grids, and renewable energy systems. To meet the demands of high voltage and large capacity applications, multiple supercapacitor cells are typically connected in series to form a module in engineering practice. However, due to limitations in manufacturing processes and batch variations in materials, each cell exhibits inherent inconsistencies in key parameters such as capacity, equivalent series resistance (ESR), and self-discharge rate. This leads to voltage imbalances during charging and discharging, and in series charging and discharging, results in voltage imbalances among the cells. This severely affects the overall performance and lifespan of the supercapacitor module and can even cause safety issues.
[0003] Currently, supercapacitor equalization technologies are mainly divided into two categories: active equalization and passive equalization. While active equalization technology has high equalization efficiency, it suffers from problems such as complex circuit structure, high cost, and low reliability. Traditional passive equalization technology typically uses a fixed-value shunt resistor to discharge individual supercapacitor cells. Although this method has a simple circuit structure and low cost, the equalization speed is slow, and it cannot adaptively adjust according to the actual state of the individual supercapacitor cells, resulting in low equalization efficiency and making it difficult to meet practical application requirements. Summary of the Invention
[0004] The purpose of this invention is to address the voltage imbalance problem caused by inconsistent individual parameters in existing supercapacitor modules used in series, and to propose a supercapacitor balancing system and method based on shunt resistor network and adaptive control.
[0005] The technical solution of this invention is: This invention provides a supercapacitor equalization system based on a shunt resistor network and adaptive control, comprising: The voltage acquisition unit is used to acquire the terminal voltage of each supercapacitor cell in the supercapacitor module in real time and transmit it to the data processing unit; the supercapacitor module is composed of n supercapacitor cells connected in series and is powered by a charging power supply. The voltage equalization unit is connected in parallel with each corresponding supercapacitor cell, and divides the charging voltage to a set value through a voltage divider resistor network connected in parallel across the supercapacitor cells. The resistor shunt unit is connected in parallel with each corresponding supercapacitor cell and consists of several parallel resistor branches. Each branch includes a shunt resistor element with a different resistance value and an electronic switch connected in series with it. The electronic switch is controlled by the data processing unit to turn on or off the corresponding resistor branch. The data processing unit is used to receive the terminal voltage of each supercapacitor cell acquired by the voltage acquisition unit, calculate the average voltage Vavg of all supercapacitor cells and the difference ΔV between the voltage of each supercapacitor cell and the average voltage Vavg, compare the difference ΔV with a preset threshold to generate a control signal, control the on / off state of the electronic switch of the corresponding branch of the resistor shunt unit to connect shunt resistors with different resistance values, and perform graded discharge equalization of the supercapacitor cells with higher voltage to the average voltage Vavg.
[0006] Furthermore, the voltage equalization unit includes a reference voltage source U1, a current-limiting resistor Rx3, and a voltage-dividing resistor network composed of voltage-dividing resistors Rx1 and Rx2. The current-limiting resistor Rx3 is connected in series with the reference voltage source. The voltage-dividing resistors Rx1 and Rx2 are connected in series and then in parallel across the current-limiting resistor Rx3 and the reference voltage source U1. After that, an electronic switch is connected in series and then in parallel across the two ends of a single supercapacitor cell. The voltage across the supercapacitor cell is divided and then connected to the reference terminal of the reference voltage source U1. The equalization voltage Vo across the supercapacitor cell is (1 + Rx1 / Rx2) * Vref, where Vref is the reference voltage of the reference voltage source U1.
[0007] A supercapacitor equalization method based on shunt resistor network and adaptive control includes: S1. The voltage acquisition unit collects the voltage across each supercapacitor cell in the supercapacitor module in real time and transmits the collected voltage to the data processing unit. S2. The data processing unit receives the voltage and calculates the average voltage Vavg of all supercapacitor cells and the difference ΔV between the voltage of each supercapacitor cell and the average voltage Vavg. S3. A control signal is generated based on the comparison between the difference ΔV and the preset threshold to control the on / off state of the electronic switch in the resistor shunt unit to connect shunt resistors with different resistance values, and to perform graded discharge equalization of the supercapacitor cells with higher voltage to the average voltage Vavg. S4. After detecting that the charging power supply has stopped, a control signal is generated to turn off all the electronic switches, and to cut off the voltage equalization unit and the resistor shunt unit to stop equalization.
[0008] Furthermore, S1 includes: The voltage acquisition unit is connected to both ends of each supercapacitor cell and transmits the real-time acquired voltage value to the data processing unit via a bus. The data processing unit acquires the voltage value and performs preliminary filtering to obtain a stable voltage signal for subsequent calculations.
[0009] Furthermore, S2 includes: The data processing unit summarizes the voltage values of all the supercapacitor cells and calculates the average voltage Vavg by summing them and dividing by the number of cells. For each supercapacitor cell, the difference ΔV between its voltage and the average voltage Vavg is calculated, and all differences ΔV are sorted to determine the supercapacitor cell that should be prioritized for equalization.
[0010] Furthermore, S3 includes: The data processing unit compares the difference ΔV with n preset thresholds, where the first threshold Vth1 > the second threshold Vth2 > ... > the nth threshold Vthn; If ΔV ≥ Vth1, a control signal is generated and connected to all shunt resistors to perform equalization with the first equalization current; if Vth1 > ΔV ≥ Vth2, a control signal is generated and connected to some shunt resistors to perform equalization with the first equalization current. Similarly, if Vthn-1 > ΔV ≥ Vthn, a control signal is generated to connect to the shunt resistors to achieve equalization with the (n-1)th equalization current; if Vthn > ΔV, a control signal is generated to turn off all electronic switches and stop connecting to all shunt resistors; from the first equalization current to the last, the resistance value of the connected shunt resistors increases sequentially. The data processing unit periodically repeats the comparison process to dynamically adjust the control signal.
[0011] Furthermore, the resistor shunt unit consists of several parallel resistor branches, each shunt resistor being connected in series with a corresponding electronic switch and in parallel across the corresponding supercapacitor cell; wherein, the shunt resistor values of each resistor branch are different to provide graded discharge current; the electronic switch is a MOS transistor, whose control terminal is connected to the data processing unit to receive control signals to determine the on / off state.
[0012] Furthermore, the voltage equalization unit divides the charging voltage to a set value by connecting a voltage divider resistor network in parallel across the supercapacitor cell; The voltage equalization unit includes a reference voltage source U1, a current-limiting resistor Rx3, and a voltage divider resistor network. The voltage divider resistor network consists of series-connected voltage divider resistors Rx1 and Rx2 connected in parallel across the two ends of the supercapacitor cell. The voltage divider resistor network divides the voltage of the supercapacitor cell and connects it to the reference terminal of the reference voltage source U1. The equalization voltage Vo across the supercapacitor cell is (1 + Rx1 / Rx2) * Vref, where Vref is the reference voltage of the reference voltage source U1. The current-limiting resistor is connected in series with the reference voltage source to provide a stable operating current to the reference voltage source; if the charging voltage is present, the voltage equalization unit maintains the voltage division operation, otherwise the connection is disconnected after the charging power supply stops.
[0013] Furthermore, S4 includes: The data processing unit monitors the charging power supply status in real time and determines whether the charging power supply has stopped supplying power through voltage detection. If the charging power supply stops, the data processing unit generates a global control signal and transmits it to the resistor shunt unit and voltage equalization unit to turn off all the electronic switches and disconnect the circuit connection to reduce standby power consumption. After being disconnected, it enters a low-power mode and periodically checks whether charging has resumed in order to restart the equalization process.
[0014] The beneficial effects of this invention are: This invention discloses a voltage equalization technology for supercapacitor modules. Addressing the issues of capacity decay and shortened lifespan caused by uneven voltage distribution among individual cells in traditional supercapacitor systems, the technology integrates a voltage equalization unit, a resistor shunt unit, a voltage acquisition unit, and a data processing unit to achieve dynamic adaptive voltage equalization. Specifically, it acquires the voltage of each individual cell in real time and calculates the difference ΔV between the voltage and the average voltage. Combined with multi-level threshold comparisons, it controls the connection of shunt resistors with different resistance values to rapidly equalize high-voltage cells using graded current. Simultaneously, it shuts down all electronic switches after charging stops to reduce standby power consumption.
[0015] This invention optimizes equalization efficiency and avoids over-discharge by using a voltage divider resistor network and a resistor shunting mechanism controlled by a MOSFET, thereby significantly improving the overall performance and lifespan of the supercapacitor module, making it particularly suitable for high-reliability energy storage scenarios.
[0016] The system structure of this invention is simple, low in cost, easy to implement and maintain. At the same time, it adopts an adaptive control strategy to avoid problems such as over-discharge or insufficient equalization caused by fixed-value shunt resistors. Furthermore, it optimizes the static power consumption problem that always exists in the equalization circuit of the supercapacitor bank in standby mode, effectively extending the service life of the supercapacitor module.
[0017] Other features and advantages of the present invention will be described in detail in the following detailed description section. Attached Figure Description
[0018] The above and other objects, features and advantages of the present invention will become more apparent from the more detailed description of exemplary embodiments of the invention in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments of the invention.
[0019] Figure 1 A schematic diagram of the supercapacitor equalization system based on shunt resistor network and adaptive control of the present invention is shown.
[0020] Figure 2 This is a schematic diagram of a supercapacitor voltage equalization system according to an embodiment of the present invention.
[0021] Figure 3 This is a flowchart illustrating a supercapacitor voltage equalization method according to an embodiment of the present invention. Detailed Implementation
[0022] Preferred embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While preferred embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.
[0023] Figure 1 A schematic diagram of the supercapacitor equalization system based on shunt resistor network and adaptive control of the present invention is shown.
[0024] like Figure 1 As shown, this invention provides a supercapacitor equalization system based on a shunt resistor network and adaptive control, comprising: The voltage acquisition unit is used to acquire the terminal voltage of each supercapacitor cell in the supercapacitor module in real time and transmit it to the data processing unit; the supercapacitor module is composed of n supercapacitor cells connected in series and is powered by a charging power supply. The voltage equalization unit is connected in parallel with each corresponding supercapacitor cell, and divides the charging voltage to a set value through a voltage divider resistor network connected in parallel across the supercapacitor cells. The resistor shunt unit is connected in parallel with each corresponding supercapacitor cell and consists of several parallel resistor branches. Each branch includes a shunt resistor element with a different resistance value and an electronic switch connected in series with it. The electronic switch is controlled by the data processing unit to turn on or off the corresponding resistor branch. The data processing unit is used to receive the terminal voltage of each supercapacitor cell obtained by the voltage acquisition unit, calculate the average voltage Vavg of all supercapacitor cells and the difference ΔV between the voltage of each supercapacitor cell and the average voltage Vavg, compare the difference ΔV with a preset threshold to generate a control signal, control the on / off of the electronic switch of the corresponding branch of the resistor shunt unit to connect shunt resistors with different resistance values, and perform graded discharge equalization of the supercapacitor cells with higher voltage to the average voltage Vavg. Specifically, the data processing unit summarizes the voltage values of all the supercapacitor cells, calculates the average voltage Vavg by summing and dividing by the number of cells; for each supercapacitor cell, it calculates the difference ΔV between its voltage and the average voltage Vavg, and sorts all the differences ΔV to determine the supercapacitor cells that should be prioritized for equalization.
[0025] For any single supercapacitor cell, the data processing unit compares the difference ΔV with n preset thresholds, where the first threshold Vth1 > the second threshold Vth2 > ... > the nth threshold Vthn; If ΔV ≥ Vth1, a control signal is generated and connected to all shunt resistors to perform equalization with the first equalization current; if Vth1 > ΔV ≥ Vth2, a control signal is generated and connected to some shunt resistors to perform equalization with the first equalization current. Similarly, if Vthn-1 > ΔV ≥ Vthn, a control signal is generated to connect to the shunt resistors to achieve equalization with the (n-1)th equalization current; if Vthn > ΔV, a control signal is generated to turn off all electronic switches and stop connecting all shunt resistors; from the first equalization current to the last, the resistance value of the connected shunt resistors increases sequentially.
[0026] The data processing unit monitors the charging power supply status in real time and determines whether the charging power supply has stopped supplying power through voltage detection. If the charging power supply stops, the data processing unit generates a global control signal and transmits it to the resistor shunt unit and voltage equalization unit to turn off all the electronic switches and disconnect the circuit connection to reduce standby power consumption. After disconnection, it enters a low-power mode and checks periodically whether charging has resumed to restart the equalization process.
[0027] like Figure 2 , 3 As shown, the supercapacitor module consists of two supercapacitor cells C1 and C2 connected in series and is powered by a charging power supply. The voltage equalization unit includes reference voltage sources U1 and U2 (TL431 voltage regulator chips), current limiting resistors R9 and R12, and voltage divider resistors R7, R8, R10, and R11. The current limiting resistors are connected in series with the reference voltage power supply to provide a stable operating current to the reference voltage source. The voltage divider resistor network divides the voltage across each supercapacitor cell and connects it to the reference terminal of the reference voltage source. The equalization voltage of the supercapacitor cell Vo = (1 + R7 / R8) * Vref.
[0028] The shunt resistor unit includes an electronic switch Q1 connected in series with a shunt resistor R1, an electronic switch Q2 connected in series with a shunt resistor R2, an electronic switch Q3 connected in series with a shunt resistor R3, and an electronic switch Q4 connected in series with a shunt resistor R4. The shunt resistor unit is connected in parallel across the two ends of the supercapacitor cell, and the control terminal of the electronic switch is connected to the data processing unit.
[0029] The voltage acquisition unit collects the voltage across the supercapacitor in real time and transmits the collected voltage to the data processing unit. The data processing unit processes the received voltage data and calculates the average voltage of all individual supercapacitor cells. and the average voltage of a single supercapacitor cell The difference ΔV is used to generate a corresponding control signal based on the preset equalization threshold and equalization rules.
[0030] In one example, taking the voltage across a single supercapacitor cell C1 as an example, when the voltage of the single supercapacitor cell is greater than the average voltage of all supercapacitor cells... When the difference between the two values ΔV is greater than the system's preset first threshold Vth1, the data processing unit closes electronic switches Q1 and Q2, connects all shunt resistors to the circuit, and the system uses the maximum preset current to equalize the voltage of the supercapacitors to the average voltage of all supercapacitors. When ΔV is greater than the system's preset second threshold Vth2 and less than the first threshold Vth1, the data processing unit closes the electronic switch Q1, and the shunt resistor R1 is connected to the network. The system will then use the second preset current to equalize the supercapacitor voltage to an average voltage. When ΔV is greater than the system's preset third threshold Vth3 and less than the first threshold Vth2, the data processing unit closes the electronic switch Q2, and the shunt resistor R2 is connected to the network. The system will then use the third preset current to equalize the supercapacitor voltage to an average voltage. When ΔV is less than the system's preset third threshold Vth3, the system controls all electronic switches to turn off, and the shunt resistor unit stops connecting to the circuit. After waiting for a period of time, it re-enters the equalization process. When the system charging voltage is absent, all electronic switches of the shunt resistors are turned off, and the system stops equalization. At the same time, the data processing unit turns off the electronic switch Q2 connected in series with the reference voltage source.
[0031] In this embodiment, the data processing unit can precisely control the working state of the shunt resistor unit through a preset balancing strategy and voltage threshold, so that the voltage of each individual cell in the supercapacitor module can quickly reach a balanced state, thereby improving the overall performance and stability of the supercapacitor module.
[0032] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.
Claims
1. A supercapacitor equalization system based on shunt resistance network and adaptive control, characterized in that, The application relates to a super capacitor module voltage equalization system, comprising: a voltage acquisition unit for acquiring the terminal voltage of each super capacitor cell in a super capacitor module in real time and transmitting the terminal voltage to a data processing unit; the super capacitor module is composed of n super capacitor cells connected in series and is powered by a charging power supply; a voltage equalization unit is connected in parallel with each super capacitor cell and is connected in parallel with the super capacitor cell through a voltage dividing resistor network to divide the charging voltage to a set value; a resistor shunt unit is connected in parallel with each super capacitor cell and is composed of a plurality of parallel resistor branches, each branch comprising a shunt resistor element with different resistance values and an electronic switch connected in series with the shunt resistor element, and the electronic switch is controlled by the data processing unit to turn on or turn off the corresponding resistor branch; the data processing unit receives the terminal voltage of each super capacitor cell acquired by the voltage acquisition unit, calculates the average voltage Vavg of all super capacitor cells and the difference AV between the voltage of each super capacitor cell and the average voltage Vavg, compares the difference AV with a preset threshold to generate a control signal, controls the on-off of the electronic switch of the corresponding resistor branch of the resistor shunt unit to access the shunt resistor with different resistance values, and performs graded discharge equalization on the super capacitor cell with higher voltage to the average voltage Vavg.
2. The system of claim 1, wherein The voltage equalization unit comprises a reference voltage source U1, a current limiting resistor Rx3 and a voltage dividing resistor network composed of voltage dividing resistors Rx1 and Rx2, the current limiting resistor Rx3 is connected in series with the reference voltage source, the voltage dividing resistors Rx1 and Rx2 are connected in series and then connected in parallel at the two ends of the current limiting resistor Rx3 and the reference voltage source U1, and then the whole is connected in parallel with the electronic switch at the two ends of the super capacitor cell, the voltage at the two ends of the super capacitor cell is divided and then connected to the reference end of the reference voltage source U1, and the equalization voltage Vo at the two ends of the super capacitor cell is (1+Rx1 / Rx2)*Vref, wherein Vref is the reference voltage of the reference voltage source U1.
3. A method for balancing supercapacitors based on a shunt resistance network and adaptive control, applying the system of any of claims 1-2, characterized in that, The application relates to a super capacitor module voltage equalization system, comprising: S1, a voltage acquisition unit acquires the voltage at the two ends of each super capacitor cell in a super capacitor module in real time, and transmits the acquired voltage to a data processing unit; S2, the data processing unit receives the voltage and calculates the average voltage Vavg of all super capacitor cells and the difference AV between the voltage of each super capacitor cell and the average voltage Vavg; S3, a control signal is generated according to the comparison between the difference AV and a preset threshold, the on-off of the electronic switch in the resistor shunt unit is controlled to access the shunt resistor with different resistance values, and the super capacitor cell with higher voltage is subjected to graded discharge equalization to the average voltage Vavg; S4, a control signal is generated to turn off all the electronic switches after detecting that the charging power supply stops, and the voltage equalization unit and the resistor shunt unit are cut off to stop equalization.
4. The method of claim 3, wherein S1 comprises: the voltage acquisition unit is connected at the two ends of each super capacitor cell, and transmits the voltage value acquired in real time to the data processing unit through a bus; the data processing unit acquires the voltage value and performs preliminary filtering processing to obtain a stable voltage signal for subsequent calculation.
5. The method of claim 3, wherein S2 The application relates to a super capacitor module voltage equalization system, comprising: the data processing unit sums up the voltage values of all the super capacitor cells and calculates the average voltage Vavg by summing and dividing by the number of cells; For each super capacitor cell, calculate the difference ΔV between its voltage and the average voltage Vavg, sort all the differences ΔV to determine the priority of the super capacitor cell for balancing.
6. The method of claim 3, wherein S3 Comprise: The data processing unit compares the difference ΔV with preset n threshold values, the first threshold value Vth1 > the second threshold value Vth2 >... > the n threshold value Vthn; If ΔV ≥ Vth1, generate a control signal to access all shunt resistors for balancing at the first balancing current; if Vth1 > ΔV ≥ Vth2, generate a control signal to access part of the shunt resistors for balancing at the first balancing current; By analogy, if Vthn-1 > ΔV ≥ Vthn, generate a control signal to access part of the shunt resistors for balancing at the n-1 balancing current; If Vthn > ΔV, generate a control signal to close all electronic switches to stop accessing all shunt resistors; from the first balancing current to the last, the resistance value of the accessed shunt resistor increases in turn; The data processing unit periodically repeats the comparison process to dynamically adjust the control signal.
7. The method of claim 3, wherein, The resistance shunt unit is composed of a plurality of parallel resistance branches, each shunt resistor is connected in series with a corresponding electronic switch and is connected in parallel across the corresponding super capacitor cell; wherein the resistance values of the shunt resistors in each resistance branch are different to provide graded discharge currents; the electronic switch is a MOS tube, the control end of which is connected to the data processing unit to receive a control signal to determine the on-off state.
8. The method of claim 3, wherein, The voltage balancing unit divides the charging voltage to a set value through a voltage dividing resistor network connected in parallel across the super capacitor cell; The voltage balancing unit comprises a reference voltage source U1, a current limiting resistor Rx3 and a voltage dividing resistor network, wherein the voltage dividing resistor network is composed of series-connected voltage dividing resistors Rx1 and Rx2 connected in parallel across the super capacitor cell; the voltage dividing resistor network is connected to the reference end of the reference voltage source U1 after dividing the voltage of the super capacitor cell, and the balancing voltage Vo across the super capacitor cell is (1+Rx1 / Rx2)*Vref, wherein Vref is the reference voltage of the reference voltage source U1; The current limiting resistor is connected in series with the reference voltage source to provide a stable working current for the reference voltage source; if the charging voltage exists, the voltage balancing unit maintains the voltage dividing operation, otherwise it is disconnected after the charging power supply stops.
9. The method of claim 3, wherein S4 Comprise: The data processing unit monitors the state of the charging power supply in real time and determines whether the charging power supply stops by voltage detection; If the charging power supply stops, the data processing unit generates a global control signal to transmit to the resistance shunt unit and the voltage balancing unit, closes all the electronic switches, and cuts off the circuit connection to reduce standby power consumption; After cutting off, enter low power consumption mode and check whether the charging is restored to restart the balancing process.