Neural signal processing method and system, electronic equipment and storage medium

Abstract

The invention discloses a neural signal processing method and system, electronic equipment and a storage medium. The method comprises the following steps: acquiring a neural signal to be processed; performing sliding window division on the to-be-processed neural signal to obtain a divided neural signal; the divided neural signal is input to a preset compression network to obtain a compressed neural signal, the preset compression network is used for compressing the divided neural signal in a spatial dimension and a time dimension in sequence, the preset compression network comprises a convolution layer, and the convolution layer adopts additive operation; and inputting the compressed neural signal to a preset reconstruction network to obtain a target neural signal, the preset reconstruction network being used for reconstructing the compressed neural signal in a time dimension and a space dimension in sequence. According to the invention, the technical problem of low efficiency and quality of a signal compression and reconstruction method in the prior art is solved.

Description

Technical Field

[0001] This invention relates to the field of neural signal processing, and more specifically, to a neural signal processing method, system, electronic device, and storage medium. Background Technology

[0002] The intersection of neuroscience and information technology is rapidly developing, and brain-computer interface (BCI) technology has become an important bridge connecting the human brain with external devices. One of the key aspects of BCI technology is the efficient processing of complex neural signals generated by the brain. These signals carry a wealth of bioelectrical activity information and can be used to analyze brain function, diagnose diseases, and control peripheral devices. However, with advancements in neural signal acquisition technology, especially the widespread application of high-density neural electrode arrays, the amount of neural signal data collected has exploded.

[0003] To address the limitations of wired systems in terms of spatial adaptability, wireless transmission technology has been gradually introduced into BCI systems. Wireless transmission enables remote monitoring and data transmission of freely moving individuals, greatly expanding the application scenarios of BCI. However, wireless transmission technology faces challenges such as low transmission efficiency and excessive energy consumption when dealing with high-throughput data, as well as the relatively low efficiency of existing signal compression and reconstruction methods.

[0004] There is currently no effective solution to the above problems. Summary of the Invention

[0005] This invention provides a neural signal processing method, system, electronic device, and storage medium to at least solve the technical problems of low efficiency and quality in existing signal compression and reconstruction methods.

[0006] According to one aspect of the present invention, a signal processing method is provided, comprising: The process involves: acquiring the neural signal to be processed; dividing the neural signal into segments using a sliding window to obtain segmented neural signals; inputting the segmented neural signals into a preset compression network to obtain compressed neural signals, wherein the preset compression network is used to compress the segmented neural signals sequentially in the spatial and temporal dimensions, and the preset compression network includes convolutional layers that employ addition operations; and inputting the compressed neural signals into a preset reconstruction network to obtain the target neural signal, wherein the preset reconstruction network is used to reconstruct the compressed neural signals sequentially in the temporal and spatial dimensions.

[0007] Optionally, the preset compression network includes a temporal compression subnetwork and a spatial compression subnetwork. The temporal compression subnetwork includes an input layer, a first convolutional layer, a second convolutional layer, a third convolutional layer, a fully connected layer, and an output layer connected in sequence. The spatial compression subnetwork includes an input layer, a first fully connected layer, a second fully connected layer, a third fully connected layer, a fourth fully connected layer, and an output layer connected in sequence.

[0008] Optionally, the first, second, and third convolutional layers in the temporally compressed subnetwork are depthwise separable convolutions, which include depthwise convolutions and pointwise convolutions.

[0009] Optionally, by using a preset algorithm, the multiplication operation in the convolution algorithm of the first, second, and third convolutional layers in the time-compressed subnetwork can be replaced with an addition operation; the large input feature vector in the preset algorithm can also be decomposed into a small input feature vector, and the large convolutional kernel can be decomposed into a small convolutional kernel.

[0010] Optionally, the preset reconstruction network includes a temporal reconstruction subnetwork and a spatial reconstruction subnetwork. The temporal reconstruction subnetwork includes an input layer, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence. The spatial reconstruction subnetwork includes an input layer, a long short-term memory network, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence.

[0011] Optionally, inputting the segmented neural signal into the compression network to obtain the compressed neural signal includes: inputting the segmented neural signal into the spatial compression sub-network to obtain the spatial compression signal; and inputting the spatial compression signal into the temporal compression sub-network to obtain the compressed neural signal.

[0012] Optionally, inputting the compressed neural signal into a preset reconstruction network to obtain the target neural signal includes: inputting the compressed neural signal into a temporal reconstruction subnetwork to obtain a temporal reconstruction signal; and inputting the temporal reconstruction signal into a spatial reconstruction subnetwork to obtain the target neural signal.

[0013] According to another aspect of the present invention, a neural signal processing system is also provided, comprising: The host end is used to acquire the neural signal to be processed, perform sliding window partitioning on the neural signal to be processed, obtain the partitioned neural signal, and send the partitioned neural signal to the programmable gate array platform; the host end is also used to receive the compressed neural signal transmitted by the programmable gate array platform, and input the compressed neural signal into the preset reconstruction network to obtain the target neural signal; the programmable gate array platform is used to input the partitioned neural signal into the preset compression network to obtain the compressed neural signal, and send the compressed neural signal to the host end.

[0014] Optionally, the programmable gate array platform includes a master control module, accelerator circuitry, input memory, and result memory that are interconnected.

[0015] Optionally, the accelerator circuit includes an accelerator controller, an input queue group, an accelerator arithmetic unit, and an activation function unit connected in sequence; wherein, the accelerator controller is connected to the input queue group, the accelerator arithmetic unit, and the activation function unit respectively, and the accelerator controller is used to control the input queue group, the accelerator arithmetic unit, and the activation function unit.

[0016] Optionally, the accelerator computing unit includes a vector multiplication and accumulation unit and an input gating.

[0017] According to another aspect of the present invention, an electronic device is also provided, comprising: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods of various embodiments of the present invention during runtime.

[0018] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium including a stored executable program, wherein, when the executable program is executed, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.

[0019] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0020] According to another aspect of the present invention, a computer program product is also provided, including a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0021] According to another aspect of the present invention, a computer program is also provided, which, when executed by a processor, implements the methods of the various embodiments of the present invention.

[0022] In this embodiment of the invention, a neural signal to be processed is acquired; the neural signal to be processed is divided into segments using a sliding window to obtain segmented neural signals; the segmented neural signals are input into a preset compression network to obtain compressed neural signals, wherein the preset compression network is used to compress the segmented neural signals sequentially in the spatial and temporal dimensions; the compressed neural signals are input into a preset reconstruction network to obtain the target neural signal, wherein the preset reconstruction network is used to reconstruct the compressed neural signals sequentially in the temporal and spatial dimensions. This invention first utilizes the temporal continuity and spatial redundancy of the signal by dividing the neural signal into segments using a sliding window; the preset compression network performs efficient compression in both the spatial and temporal dimensions, significantly reducing the amount of neural signal data while maintaining the key features and the integrity of the time sequence; the preset reconstruction network follows the reverse process, using a decompression algorithm to gradually reconstruct the signal in the temporal and spatial dimensions, achieving high-precision signal reconstruction. This technical solution effectively balances the efficiency of neural signal compression with the accuracy of reconstruction, significantly improving the real-time performance and accuracy of data processing, thereby solving the technical problem of low efficiency and quality in existing signal compression and reconstruction methods. Attached Figure Description

[0023] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings: Figure 1 This is a schematic flowchart of a signal processing method provided according to an embodiment of the present invention; Figure 2 This is a first structural example diagram provided according to an embodiment of the present invention; Figure 3 This is a second structural example diagram provided according to an embodiment of the present invention; Figure 4 This is a schematic diagram of vector decomposition provided according to an embodiment of the present invention; Figure 5 This is a schematic diagram of a convolution operation provided according to an embodiment of the present invention; Figure 6 This is an example diagram of the structure of a neural signal processing system provided according to an embodiment of the present invention; Figure 7 This is an example diagram of the third structure provided according to an embodiment of the present invention; Figure 8 This is a fourth structural example diagram provided according to an embodiment of the present invention. Detailed Implementation

[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0026] According to an embodiment of the present invention, a signal processing method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0027] Figure 1 This is a method according to an embodiment of the present invention, such as... Figure 1 As shown, the method includes the following steps: Step S101: Obtain the neural signal to be processed.

[0028] The neural signals to be processed are the raw electroencephalogram (EEG) signals acquired from neural electrodes. These signals carry electrophysiological information about brain activity, including but not limited to cortical electroencephalogram (ECoG), local field potentials (LFP), or action potentials (AP). In this embodiment, these signals are the starting point for subsequent processing, the purpose of which is to achieve efficient signal transmission and storage.

[0029] It should be noted that the method provided in this application embodiment can process multi-channel neural signals acquired by multi-channel electrodes.

[0030] Step S101 is the starting point of the processing flow, where raw neural signals are extracted from the neural electrode array. Acquiring neural signals may include signal amplification, filtering, and analog-to-digital conversion processes to ensure that the acquired data accurately reflects the brain's bioelectrical activity.

[0031] Step S102: Perform sliding window segmentation on the neural signal to be processed to obtain segmented neural signals.

[0032] In this embodiment, sliding window partitioning is a technique for preprocessing neural signals. By setting a fixed-length window and sliding it across the time series, continuous neural signals are divided into a series of fixed-length time segments, i.e., neural signal segmentation. This process allows signal processing to be performed in segments, facilitating subsequent compression algorithms to operate on fixed-size data, thus improving processing efficiency and algorithm feasibility.

[0033] Understandably, step S102 uses a sliding window technique to segment the continuous neural signals, with each segment containing a certain number of time-point data points, facilitating subsequent compression network processing. Sliding window segmentation ensures the integrity of the time series while improving the parallelism and efficiency of the algorithm.

[0034] Step S103: Input the segmented neural signal into a preset compression network to obtain a compressed neural signal. The preset compression network is used to compress the segmented neural signal in the spatial and temporal dimensions in sequence. The preset compression network includes convolutional layers, and the convolutional layers use addition operations.

[0035] The preset compression network in this embodiment is a deep learning-based neural network model specifically designed for compressing neural signals. This network performs data dimensionality reduction sequentially in both the spatial (multi-channel data) and temporal (time-series data) dimensions. Its core function is to mine the spatial and temporal feature correlations of neural signals and achieve efficient signal encoding through a deep autoencoder model, thus compressing the neural signals. The preset compression network employs a two-stage processing flow, including a multi-channel feature extraction network and a temporal encoding network, ensuring that the compressed signal retains the key information of the original data while reducing the data volume, which helps to reduce the requirements for transmission bandwidth and storage space.

[0036] In this stage, a multi-channel feature extraction network is first used to reduce the spatial dimension of the segmented neural signals, and then a temporal coding network is used to compress the temporal dimension. Neural signals are sparse in space but continuous in time. First, spatial compression extracts active regions or source signals, and then temporal compression conforms to the physiological logic of localization followed by dynamic compression, enabling more efficient, faithful, and robust compression of neural signals while preserving their spatiotemporal characteristics. This two-stage processing flow of the pre-designed compression network fully considers the spatial redundancy and temporal correlation of neural signals, significantly reducing data redundancy while preserving core signal features, thus achieving efficient data compression.

[0037] Step S104: The compressed neural signal is input into a preset reconstruction network to obtain the target neural signal. The preset reconstruction network is used to reconstruct the compressed neural signal in the time dimension and the spatial dimension in sequence.

[0038] Preset reconstruction networks are a set of deep learning models corresponding to preset compression networks. They are used to decode compressed neural signals into approximations of the original signals, i.e., the target neural signals. The reconstruction network also follows a two-stage processing flow: first, decompression is performed in the temporal dimension, and then reconstruction is performed in the spatial dimension to restore the temporal and spatial characteristics of the signal. The design purpose of the preset reconstruction network is to restore the compressed neural signals as closely as possible to the original neural signals while ensuring the quality of signal reconstruction, thereby achieving complete signal transmission and lossless storage.

[0039] The compressed neural signal is fed into a pre-defined reconstruction network, which first reconstructs the signal in the temporal dimension, followed by reconstruction in the spatial dimension, to restore the original characteristics of the signal. This process achieves high-quality reconstruction of the compressed signal, ensuring the integrity of signal transmission and the accuracy of reconstruction.

[0040] In this embodiment of the invention, a neural signal to be processed is acquired; the neural signal to be processed is divided into segments using a sliding window to obtain segmented neural signals; the segmented neural signals are input into a preset compression network to obtain compressed neural signals, wherein the preset compression network is used to compress the segmented neural signals sequentially in the spatial and temporal dimensions; the compressed neural signals are input into a preset reconstruction network to obtain the target neural signal, wherein the preset reconstruction network is used to reconstruct the compressed neural signals sequentially in the temporal and spatial dimensions. This invention first utilizes the temporal continuity and spatial redundancy of the signal by dividing the neural signal into segments using a sliding window; the preset compression network performs efficient compression in both the spatial and temporal dimensions, significantly reducing the amount of neural signal data while maintaining the key features and the integrity of the time sequence; the preset reconstruction network follows the reverse process, using a decompression algorithm to gradually recover the signal in the temporal and spatial dimensions, achieving high-precision signal reconstruction. This technical solution effectively balances the efficiency of neural signal compression with the accuracy of reconstruction, significantly improving the real-time performance and accuracy of data processing, thereby solving the technical problem of low efficiency and quality in existing signal compression and reconstruction methods.

[0041] Optionally, the preset compression network includes a temporal compression subnetwork and a spatial compression subnetwork. The temporal compression subnetwork includes an input layer, a first convolutional layer, a second convolutional layer, a third convolutional layer, a fully connected layer, and an output layer connected in sequence. The spatial compression subnetwork includes an input layer, a first fully connected layer, a second fully connected layer, a third fully connected layer, a fourth fully connected layer, and an output layer connected in sequence.

[0042] Reference Figure 2 Time compression subnetwork ( Figure 2 The temporal compression network (TMN) is part of a pre-defined compression network that focuses on compressing the temporal dimension of neural signals. Its structure includes a sequentially connected input layer, a first convolutional layer, a second convolutional layer, a third convolutional layer, a fully connected layer, and an output layer. Through this combination of multi-layered convolutions and fully connected layers, the temporal compression subnetwork can extract and encode key features of neural signals over time while reducing data volume, thus achieving temporal compression of the signal.

[0043] Reference Figure 2 Spatial compression subnetwork ( Figure 2 The spatial compression network (SCR) is another part of the pre-defined compression network, compressing neural signals in the spatial dimension. This sub-network structure includes an input layer, a first fully connected layer, a second fully connected layer, a third fully connected layer, a fourth fully connected layer, and an output layer connected sequentially. Through the computation of multiple fully connected layers, the spatial compression sub-network effectively eliminates redundancy between signals from different channels, achieving efficient compression of neural signals in the spatial dimension.

[0044] The design of the first, second, and third convolutional layers in the temporal compression subnetwork allows deep learning models to capture both local and global temporal features of neural signals, thereby achieving temporal compression of the signal without compromising signal quality. Compared to compression methods using a single fully connected layer, the multi-layer convolutional structure can extract correlations within the time series more precisely, significantly improving the compression ratio and the reconstruction quality of the compressed signal.

[0045] The spatial compression subnetwork, through the cascading of the first to fourth fully connected layers, effectively reduces data redundancy in the spatial dimension of multi-channel neural signals without disrupting the original signal structure. Compared to traditional single-layer fully connected compression methods, the multi-layer fully connected architecture of this embodiment can gain a deeper understanding of the multi-channel structure of the signal, achieving more efficient and accurate spatial dimension compression while preserving the temporal characteristics of the signal.

[0046] In this embodiment, the workflow of the temporal compression subnetwork is as follows: the neural signal enters the input layer, and then undergoes preliminary feature extraction through the first convolutional layer; the second convolutional layer further refines the temporal features; the third convolutional layer further deepens this process; the fully connected layer organizes and fuses the features of all temporal dimensions, and finally outputs the compressed signal, i.e., the temporally compressed neural signal. The processing flow of the spatial compression subnetwork is as follows: the neural signal first passes through the input layer, and then sequentially passes through the first to fourth fully connected layers. Each layer is dedicated to reducing data redundancy in the spatial dimension of the signal, while maintaining the feature correlation between channels, and finally outputs the spatially compressed neural signal.

[0047] In this embodiment, the pre-compression network achieves efficient compression of neural signals in both temporal sequence and spatial layout through a dual-network architecture—a temporal compression sub-network and a spatial compression sub-network. This technical solution not only significantly reduces the bandwidth requirements and storage space for data transmission but also maintains the key biological characteristics of the neural signals, ensuring the high quality and integrity of the compressed signals. The multi-layer convolutional design of the temporal compression sub-network ensures the preservation of the signal's temporal characteristics, while the stacked fully connected layers of the spatial compression sub-network effectively eliminate redundancy in multi-channel data, achieving spatial dimension compression of the signal without destroying its temporal structure. Overall, this technical effect of the pre-compression network provides strong support for real-time transmission of neural signals and large-scale data processing, significantly improving the performance and practicality of wireless brain-computer interface systems in various application scenarios.

[0048] Optionally, the first, second, and third convolutional layers in the temporally compressed subnetwork are depthwise separable convolutions.

[0049] Depthwise separable convolution is an efficient convolutional operation designed to reduce the computational cost and number of parameters in neural networks while maintaining model performance. It comprises depthwise convolution and pointwise convolution, essentially breaking down the standard convolution operation into two steps: depthwise convolution and pointwise convolution. The depthwise convolution performs convolution independently on each channel of the input feature map, while the pointwise convolution, following the depthwise convolution, linearly combines the outputs of each channel. This reduces computational resource consumption while preserving the model's feature extraction capabilities.

[0050] In this embodiment, depthwise separable convolution is used as the implementation method for the first, second, and third convolutional layers in the temporal compression sub-network. The key to this convolutional structure lies in decomposing the convolution operation, thereby significantly reducing the number of weights required by the neural network, lowering computational complexity and power consumption. This feature ensures the quality of the compressed signal while significantly improving compression efficiency and real-time performance. Especially on resource-constrained hardware platforms, such as FPGAs, this optimization can greatly reduce on-chip storage requirements and increase computational speed, which is of great value for achieving fast compressed transmission of neural signals.

[0051] In the temporal compression subnetwork, the use of depthwise separable convolution involves the following technical steps: When a neural signal enters the first convolutional layer, it is first subjected to depthwise convolution, which independently convolves the input features of each channel to extract spatial features within a single channel. Then, in the second and third convolutional layers, depthwise convolution is repeated to further refine and abstract the temporal dimension features.

[0052] Following depthwise convolution, pointwise convolution is applied to the output of each channel, fusing features from different channels using a 1x1 convolution kernel to achieve the integration of cross-channel information.

[0053] The above operations all follow the principle of depthwise separable convolution, which uses less computational resources to simulate the standard convolution process. This allows the compression of time-series neural signal data to maintain the temporal characteristics of the signal while significantly reducing computational and memory requirements.

[0054] This application's embodiments achieve efficient compression of neural signals in the temporal dimension by employing depthwise separable convolutions in the temporal compression sub-network, while ensuring the preservation of key signal features. This technique not only reduces computational complexity and power consumption but also decreases on-chip storage resource consumption, thereby improving the overall energy efficiency of the compression network. Specifically, the use of depthwise separable convolutions enables the pre-defined compression network to quickly and accurately compress the temporal sequence features of neural signals with limited hardware resources, providing an efficient data format for subsequent signal transmission and reconstruction, significantly improving the real-time performance and energy efficiency of the wireless brain-computer interface system in processing neural signals.

[0055] Optionally, the preset algorithm in this embodiment transforms the multiplication operations in the convolution algorithms of the first, second, and third convolutional layers in the time-compressed subnetwork into addition operations. The preset algorithm can be the Winograd algorithm, which, through specific matrix transformations, simplifies the convolution process, which originally required a large number of multiplication operations, into fewer multiplications and more additions, thereby significantly reducing computational cost and power consumption. For the time-compressed subnetwork, this means that when processing the temporal characteristics of neural signals, it can not only effectively reduce the amount of computation but also preserve the temporal characteristics of the signal, thus improving the efficiency and real-time performance of neural signal compression.

[0056] For example, consider the following 2x3 convolution kernel: A total of 6 multiplications and 4 additions are used.

[0057] By performing the following transformation: get: The computational workload is reduced to 8 additions and 4 multiplications. In terms of both complexity and time consumption, multiplication is far more complex than addition. Therefore, the Winograd algorithm essentially replaces some multiplication operations with addition, thereby reducing computational complexity.

[0058] The Winograd algorithm is only suitable for small convolutions, while larger-scale convolutions involve larger input feature vectors and longer kernel lengths, leading to more complex computation matrices. To be applicable to convolutions of different scales, this invention can further decompose the large input feature vectors into smaller input feature vectors and the large convolution kernels into smaller convolution kernels in the preset algorithm; that is, to improve the Winograd algorithm by decomposing the large input feature vectors into smaller input feature vectors and the large convolution kernels into smaller convolution kernels.

[0059] To decompose a large input feature vector into smaller input feature vectors, it can be decomposed in blocks. (See reference...) Figure 4 This decomposes the input vector into overlapping segments. Convolving each small feature vector is equivalent to convolving the entire large input feature vector.

[0060] To decompose a large convolution kernel into smaller convolution kernels, the relationship between convolution operations and polynomial multiplication is mainly utilized. (See reference...) Figure 5 Convolution operations can be written in polynomial form, with each number in the convolution corresponding to a polynomial coefficient.

[0061]

[0062] Because of the correspondence between convolution operations and polynomial calculations, the convolution operation can be decomposed using polynomial factorization, thereby decomposing the convolution kernel. After decomposing the convolution kernel, the input feature vector and all the decomposed convolution kernels can be calculated one by one, and finally added together according to the weights in a staggered manner, which is equivalent to performing convolution calculation using the original convolution kernel.

[0063] In the time-compression subnetwork, the specific steps for replacing multiplication with addition using a pre-defined algorithm are as follows: The neural signal passes through the first convolutional layer, where a pre-defined algorithm transforms and reassembles the convolutional kernel and input features, allowing addition to replace multiplication operations. This same technique is repeated in the second and third convolutional layers to continuously optimize the computation and reduce the reliance on multiplication. Each convolutional layer, by performing this transformation, achieves efficient encoding of the time-series features of the neural signal while significantly reducing the computational load and power consumption associated with multiplication operations.

[0064] By replacing multiplication operations with addition operations in the first, second, and third convolutional layers of the time-compression subnetwork using a preset algorithm, this embodiment successfully reduces the computational complexity and power consumption in the neural signal compression process. This technical action directly reduces the dependence on hardware resources, especially reducing the need for high-power units such as multipliers. Specifically, the application of the preset algorithm enables the preset compression network to significantly improve real-time processing capabilities and reduce energy consumption while ensuring signal quality when performing signal compression tasks, thus providing a solid foundation for efficient processing of neural signals in wireless transmission environments.

[0065] Optionally, the preset reconstruction network includes a temporal reconstruction subnetwork and a spatial reconstruction subnetwork. The temporal reconstruction subnetwork includes an input layer, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence. The spatial reconstruction subnetwork includes an input layer, a long short-term memory network, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence.

[0066] Reference Figure 3 The temporal reconstruction subnetwork focuses on restoring the temporal characteristics of neural signals. Its architecture includes an input layer, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence. By adjusting the weights and biases, it gradually decodes the compressed signal and reconstructs the dynamic changes of the signal in the time series.

[0067] Reference Figure 3 The goal of the spatial reconstruction subnetwork is to recover the spatial characteristics of the signal, i.e., the relationships between multiple channels. It consists of an input layer, a Long Short-Term Memory (LSTM) network, a first fully connected layer, a second fully connected layer, and an output layer connected in sequence. The LSTM captures and recovers the long-term dependencies of the signal, and then the fully connected layers perform detailed optimization, finally outputting the signal with reconstructed spatial characteristics.

[0068] Long Short-Term Memory (LSTM) networks are a special type of recurrent neural network (RNN) designed to overcome the problem of learning long-term dependencies as traditional RNNs deepen. In the spatial reconstruction subnetwork of this application embodiment, LSTM is used to handle long-term correlations between channel data, ensuring accurate recovery of the spatial characteristics of the signal even after compression.

[0069] Fully connected layers act as nodes in a neural network for signal processing. Each node (neuron) is connected to all nodes in the previous and next layers, used for signal integration and feature mapping. Fully connected layers are present in both temporal reconstruction and spatial reconstruction subnetworks, responsible for detailed signal reconstruction and feature recovery.

[0070] In this embodiment, the dual-sub-network structure of the pre-defined reconstruction network—a temporal reconstruction sub-network and a spatial reconstruction sub-network—not only demonstrates its originality but also brings substantial improvements. By separating the temporal and spatial reconstruction processes of the signal, this embodiment can precisely control the recovery of the signal in each dimension, ensuring high-quality reconstruction of compressed neural signals. In particular, the LSTM layer introduced in the spatial reconstruction sub-network overcomes the limitations of traditional reconstruction methods in handling long-term dependencies between channels, allowing the spatial characteristics of the signal to be fully preserved and recovered even after high-ratio compression. This structural arrangement not only improves the integrity of the reconstructed signal but also increases the flexibility and efficiency of the system, as reconstructions in different dimensions can be optimized and processed in parallel according to their respective characteristics, thereby improving the overall reconstruction speed and quality.

[0071] In the temporal reconstruction subnetwork, the compressed neural signal first enters the input layer, then the first fully connected layer begins the decompression process of the signal in the time dimension, the second fully connected layer further refines the temporal characteristics, and finally the reconstructed time series signal is output through the output layer.

[0072] After receiving the compressed neural signal, the spatial reconstruction subnetwork first passes through the input layer, and then the signal enters the LSTM layer. This layer captures and recovers the long-term spatial dependencies of the signal. The signal is then optimized in detail through the first and second fully connected layers to ensure that the information of each channel is accurately recovered. Finally, the reconstructed spatial feature signal is output through the output layer.

[0073] In this embodiment, by pre-designing a reconstruction network including a temporal reconstruction subnetwork and a spatial reconstruction subnetwork, efficient and high-fidelity reconstruction of compressed neural signals in both temporal sequence and spatial layout is achieved. This technique, by subdividing the reconstruction process and specifically designing network modules for recovering temporal and spatial characteristics, ensures that the compressed signal can recover its key biological information after decompression without sacrificing signal integrity and dynamic characteristics. Both the meticulous adjustment of fully connected layers in the temporal reconstruction subnetwork and the introduction of LSTM in the spatial reconstruction subnetwork directly contribute to a significant improvement in signal quality.

[0074] Optionally, inputting the segmented neural signal into the compression network to obtain the compressed neural signal includes: inputting the segmented neural signal into the spatial compression sub-network to obtain the spatial compression signal; and inputting the spatial compression signal into the temporal compression sub-network to obtain the compressed neural signal.

[0075] The segmented neural signals are first fed into a spatial compression subnetwork, where a multi-channel feature extraction network compresses the spatial dimension of the signals, outputting a spatially compressed signal. This process utilizes structures such as fully connected layers to perform feature analysis and dimensionality reduction on the multi-channel signals at each time point, reducing the amount of data in the spatial dimension of the signals while preserving the key spatial characteristics of the signals.

[0076] Subsequently, the spatially compressed signal is fed as input to the temporal compression sub-network. This sub-network compresses the temporal sequence information of the signal through a temporal coding network, producing a compressed neural signal. The temporal compression sub-network utilizes structures such as convolutional layers to identify and encode the temporal characteristics and correlations of the signal, further reducing the amount of signal data while ensuring that the temporal dynamic information of the signal is preserved.

[0077] Through the implementation of the above technical steps, this embodiment of the application achieves efficient compression of neural signals in both spatial and temporal dimensions. First, the segmented neural signal is input into a spatial compression subnetwork. Dimensionality reduction processing of multi-channel data generates a spatially compressed signal. Subsequently, the spatially compressed signal enters a temporal compression subnetwork to eliminate redundancy in the signal's temporal sequence, ultimately outputting a compressed neural signal. This process not only significantly reduces the amount of signal data but also preserves the key spatial and temporal characteristics of the signal, providing a high-quality compressed signal for wireless transmission and improving data transmission efficiency and energy consumption performance, without relying on other components of this embodiment. The direct technical effect of this two-stage compression strategy is that in wireless brain-computer interface systems, it enables rapid and efficient transmission of multi-channel neural signals under limited bandwidth, while ensuring signal integrity and reconstruction quality, providing strong support for subsequent data analysis and applications.

[0078] Optionally, inputting the compressed neural signal into a preset reconstruction network to obtain the target neural signal includes: inputting the compressed neural signal into a temporal reconstruction subnetwork to obtain a temporal reconstruction signal; and inputting the temporal reconstruction signal into a spatial reconstruction subnetwork to obtain the target neural signal.

[0079] When the compressed neural signal arrives at the pre-defined reconstruction network, it is first fed into the temporal reconstruction subnetwork. The signal passes through a series of fully connected layers, progressively increasing the resolution of the time series to recover its temporal characteristics. The temporally reconstructed signal generated by the temporal reconstruction subnetwork is then used as input to the spatial reconstruction subnetwork. In this stage, the signal passes through a Long Short-Term Memory (LSTM) network and fully connected layers to reconstruct the relationships between different channels, further recovering the signal's spatial characteristics.

[0080] In this embodiment, the pre-defined reconstruction network achieves efficient and high-fidelity neural signal reconstruction through sequential processing by a temporal reconstruction subnetwork and a spatial reconstruction subnetwork. The temporal reconstruction subnetwork first decompresses the compressed neural signal, restoring its temporal sequence details to generate a temporally reconstructed signal. Subsequently, the spatial reconstruction subnetwork receives the temporally reconstructed signal and further reconstructs the spatial layout features of the signal, ultimately obtaining the target neural signal. Through this dual-subnetwork reconstruction strategy, this embodiment maintains signal integrity and reconstruction accuracy in a wireless transmission environment, providing effective assurance for subsequent signal processing and analysis.

[0081] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0082] Reference Figure 6 According to another aspect of the present invention, a neural signal processing system is also provided, comprising: The host terminal 610 is used to acquire the neural signal to be processed, perform sliding window partitioning on the neural signal to be processed to obtain the partitioned neural signal, and send the partitioned neural signal to the programmable gate array platform 620; the host terminal 610 is also used to receive the compressed neural signal transmitted by the programmable gate array platform 620, and input the compressed neural signal into a preset reconstruction network to obtain the target neural signal; the programmable gate array platform 620 is used to input the partitioned neural signal into a preset compression network to obtain the compressed neural signal, and send the compressed neural signal to the host terminal.

[0083] In the system framework of this application embodiment, the host 610 can refer to a central processing unit (CPU), graphics processing unit (GPU), or any high-performance computing platform, responsible for controlling the start and end points of the entire neural signal processing flow. First, the host 610 receives the raw neural signal data and then performs necessary preprocessing on the data, including but not limited to sliding window partitioning, which divides continuous signal data into a series of fixed-size windows to facilitate subsequent compression processing. After processing, the host 610 transmits the partitioned neural signal to the programmable gate array platform 620 for compression via a high-speed data interface. Furthermore, the host 610 also needs to receive the signal compressed by the programmable gate array platform 620 and input it into a preset reconstruction network for decompression, ultimately obtaining a target neural signal close to its original state for subsequent analysis and application.

[0084] The programmable gate array platform 620, or FPGA (Field Programmable Gate Array), serves as a key hardware facility for neural signal compression in this embodiment. Upon receiving the segmented neural signal, it immediately initiates a preset compression network. Through hardware computation optimized by deep learning algorithms, the FPGA 620 efficiently performs signal compression, generating compressed neural signals. This process fully considers power consumption and real-time requirements, ensuring compression efficiency while maintaining the core characteristics of the signal. After compression, the FPGA 620 sends the compressed neural signal back to the host terminal 610, completing a full compression and transmission cycle.

[0085] In this embodiment, the host 610 and the programmable gate array platform 620 work collaboratively. By assigning signal preprocessing and sliding window partitioning tasks to the host 610, the burden on the FPGA is reduced, allowing it to focus on core compression calculations, while also ensuring high efficiency and real-time performance of signal transmission. Furthermore, the design of the preset compression network and preset reconstruction network, utilizing a spatiotemporal joint coding method based on deep learning, achieves high precision and efficiency in signal compression and reconstruction. In particular, the two-stage processing flow introduces spatial and temporal optimizations in signal compression and reconstruction, respectively. This is a relatively novel processing method in the prior art, significantly reducing the amount of data transmitted while restoring the spatial and temporal characteristics of the signal during the reconstruction stage, thus improving the energy efficiency of neural signal processing in wireless transmission environments.

[0086] Reference Figure 7 As shown, in some embodiments of the present invention, the programmable gate array platform 620 includes a PCIe controller, a storage unit, a number system conversion interface, an intra-channel compression module, an inter-channel compression module, and a main controller. The host terminal 610 consists of an application program (inference program), an inference task API, a PCIe driver, and interfaces. The neural network algorithm is mainly deployed in the intra-channel / inter-channel compression module, and the relevant weight parameters are stored in the FPGA memory. Its operation flow is as follows: After startup, the host application initiates the inference task. The main program sequentially reads neural signals in a specific format for data arrangement and batch processing, with each batch of data transmitted via the inference task API. The inference task API achieves transparent calls by encapsulating underlying hardware operations, converting the raw data into PCIe data packets and transmitting them to the FPGA via a driver. The FPGA-side PCIe controller converts the protocol to the AXI4 bus protocol, and the data is stored in the on-chip memory via the bus. The FP32 to FXP format conversion and address remapping are automatically completed through the number system conversion interface. When the main controller detects that the compression conditions are met, it performs two levels of compression sequentially: the intra-channel compression module scans channel by channel to compress the timing data, and the inter-channel compression module eliminates spatial redundancy in cross-channel data at synchronous time points. The compression results and intermediate data are cached in memory according to address space distribution. After compression, the main control module sends the data back to the host via the PCIe interface and completes the inverse number system conversion from FXP to FP32. The host-side decoding network reconstructs the compressed data, and the main program automatically compares the raw and reconstructed data, calculating quantitative indicators such as signal-to-noise ratio and reconstruction accuracy.

[0087] Optionally, the programmable gate array platform 620 includes a master control module, accelerator circuitry, input memory, and result memory that are interconnected.

[0088] On the 620 programmable gate array platform, the modules are connected through high-speed, low-latency communication protocols such as the AXI bus, ensuring that signal data and control commands can be seamlessly transmitted between the main control module, accelerator circuit, input memory and result memory.

[0089] The neural signals are first sent from the host computer to the input memory, where they are stored as the input data source for the accelerator circuitry. This operation leverages the advantages of the FPGA's internal high-speed cache, reducing external access latency.

[0090] The main control module invokes the accelerator circuitry according to the task requirements to begin the computation of the compressed network. During the computation, the accelerator circuitry reads data from the input memory, processes it, and stores the intermediate results or the final compressed neural signal in the result memory.

[0091] The compressed neural signals are stored in the results memory, awaiting further transmission to the host computer for decompression and subsequent processing. The results memory is designed with high-speed data read / write capabilities in mind to ensure real-time data transmission.

[0092] In this embodiment, the programmable gate array platform 620, including a main control module, accelerator circuitry, input memory, and result memory, achieves efficient processing of neural signal compression tasks and rapid data storage and transmission through mutual communication connections. This architecture design ensures the real-time performance of signal compression while reducing power consumption by optimizing hardware resource utilization, providing reliable hardware support for the wireless transmission of neural signals.

[0093] Optionally, in some embodiments of the present invention, after the programmable gate array platform 620 control module is powered on and reset, it first monitors the DMA transfer input data process by monitoring the AXI Transaction. After a batch of data transfers is detected to be complete, the computation phase begins, including intra-channel compression and inter-channel compression. The results are written to the memory, and after writing is complete, the read request blocking sent by PCIe is released. When it is detected that PCIe has read all the computation data, the read data blocking is restored, and the result space in the memory is protected to avoid misreading.

[0094] For reference Figure 8 In some embodiments of the present invention, the programmable gate array platform 620 includes a PCIe main controller, an AXI interconnect, a BRAM controller 0, a BRAM controller 1, an accelerator circuit, an input memory, and a result memory. Through the cooperation of these modules, neural signal compression is achieved.

[0095] Optionally, the accelerator circuit includes an accelerator controller, an input queue group, an accelerator arithmetic unit, and an activation function unit connected in sequence; wherein, the accelerator controller is connected to the input queue group, the accelerator arithmetic unit, and the activation function unit respectively, and the accelerator controller is used to control the input queue group, the accelerator arithmetic unit, and the activation function unit.

[0096] As the central hub of the accelerator circuit, the accelerator controller is responsible for coordinating and scheduling the various computing units. It manages the data flow through control signals, ensuring that data is input to the accelerator computation units and activation function units in the correct order and at the correct time. At the same time, it monitors and responds to the status feedback of each unit to maintain the stable operation of the entire circuit.

[0097] The input queue is a first-in-first-out (FIFO) data buffer used to temporarily store neural signal data to be processed. The purpose of the input queue is to smooth the data input and output rates, ensuring that the accelerator processing unit can continuously receive enough data for processing even under unstable data transmission conditions.

[0098] The accelerator operation unit, referring to the VVMAC PE, implements vector multiplication and accumulation functions. It is the core computing unit of the accelerator circuit, used to perform multiplication and addition operations in neural networks. The design of the accelerator operation unit focuses on achieving high parallelism and low power consumption to meet the real-time and energy efficiency requirements of neural signal processing.

[0099] The activation function unit is used to perform nonlinear transformations on the output data of the accelerator computation unit to increase the expressive and learning capabilities of the neural network. In this embodiment, the activation function unit is specifically optimized for the activation function, providing accurate and efficient activation calculations through hardware-implemented piecewise linear approximation and table lookup.

[0100] The neural signal data is first preprocessed by the host unit 610, such as by sliding window segmentation, and then sent to the input queue group of the accelerator circuit. The input queue group temporarily stores this data, ready to be input sequentially to the accelerator processing unit.

[0101] Data is transmitted from the input queue to the accelerator computing unit, where VVMAC PE performs efficient vector-to-vector multiplication and addition operations. This process quickly completes weight multiplication and activation value accumulation in the neural network, generating preliminary calculation results.

[0102] The data output from the accelerator's computing unit then enters the activation function unit to calculate the activation function, transforming the linear calculation result into a nonlinear feature, thereby increasing the learning ability of the neural network model.

[0103] The processed signal data is output by the activation function unit, while the accelerator controller receives feedback signals and adjusts the working status of the input queue group, accelerator operation unit and activation function unit according to the processing progress to ensure smooth process and optimized resource utilization.

[0104] In this embodiment, the modular design of the accelerator circuit includes an accelerator controller, an input queue group, an accelerator arithmetic unit, and an activation function unit, achieving high efficiency and real-time performance in neural signal processing. The introduction of the accelerator controller optimizes data flow management and computation scheduling, enabling the system to quickly respond to changing computational demands. The cooperation between the input queue group and the accelerator arithmetic unit ensures the continuity of data processing and the efficiency of computation. Finally, the hardware implementation of the activation function unit improves the accuracy of signal processing, allowing the entire accelerator circuit to significantly accelerate data processing speed and reduce power consumption while maintaining signal quality, providing strong hardware support for the compression and transmission of neural electrical signals.

[0105] Optionally, the accelerator computation unit VVMAC PE includes a vector multiplication accumulator and an input gating.

[0106] The vector multiplication and accumulation unit (VMU) is a component of the accelerator's computation unit. It performs vector multiplication and accumulation calculations, which is crucial for implementing fully connected and convolutional layers in neural networks. By performing parallel multiplication and accumulation operations on multiple input vectors and weights, the VMU significantly improves the computation speed of neural networks.

[0107] Input gating is a flow control mechanism used to control data input to the accelerator's computational units. Input gating determines when data is allowed to enter the vector multiply-accumulate unit based on the system state, preventing unnecessary data flipping and transmission, thereby effectively reducing dynamic power consumption. It intelligently adjusts the data input rate by monitoring the system's operating state and the occupancy of the vector multiply-accumulate unit, ensuring that the unit operates efficiently while maintaining a low power consumption level.

[0108] In the accelerator's computing unit, neural signal data is divided into vectors, which are then input into vector multiply-accumulate units for multiplication and addition operations, enabling rapid calculation of neural network weights. Each vector multiply-accumulate unit performs a multiplication operation between a vector and the weight vector of a specific output node within a single clock cycle, and accumulates the result with the previous result to ultimately generate the output value of a fully connected layer or convolutional layer.

[0109] Input gating determines whether to allow data inflow based on the operating status of the accelerator's computational units, such as the activity level and computational demands of the vector multiplication and accumulation units. This prevents unnecessary flipping of data signals in subsequent circuits when the accelerator is not in operation, thereby effectively reducing dynamic power consumption. During computationally intensive phases, input gating allows data to pass through smoothly; while during idle or low-computation periods, it closes the data entry point to save power.

[0110] It's important to note that the vector multiplication and accumulation unit completes the calculation of an input vector and the weights of a specific output node within each clock cycle, accumulating the results with the previous ones. After a certain number of clock cycles, the value of the fully connected layer's output node can be calculated. When there are many output nodes, multiple multiplications of the input vector and weight matrix are required, thus a single vector multiplication and accumulation unit requires multiple clock cycles to complete the operation. To improve parallelism, multiple unit modules are used to perform calculations simultaneously, enabling multiple matrix multiplication operations to be completed within a single clock cycle. In practical applications, the weight matrix is ​​first divided according to the configured number of parallel modules (e.g., 32). Calculations can be performed in parallel within a matrix block, while calculations between matrix blocks must be performed sequentially. This allows for a flexible balance between system real-time performance and power consumption.

[0111] In this embodiment, the accelerator computing unit integrates a vector multiplication-accumulation unit and input gating to achieve efficient execution of neural network computations and effective control of dynamic power consumption. The high-speed parallel computing capability of the vector multiplication-accumulation unit ensures the real-time performance and accuracy of neural signal processing, while the input gating mechanism further optimizes energy utilization, enabling the system to maintain high-performance computing under low power conditions. This design not only improves computational efficiency but also reduces energy consumption, providing a robust hardware solution for the wireless transmission and processing of cortical EEG signals. In particular, combined with neural network algorithm optimization, the accelerator computing unit can maintain a balance between computational efficiency and power consumption while processing large amounts of data, meeting the stringent requirements for real-time signal processing and energy efficiency in wireless transmission environments.

[0112] In some embodiments of the present invention, for the activation function unit, a piecewise function scheme is adopted, and a scheme combining linear approximation and table lookup is used to calculate the activation value.

[0113] For example, the activation function used is the tanh activation function. Since the tanh activation function has a small value and a large rate of change near 0, while it tends to remain unchanged far from 0, the chosen approach is to use the first-order Taylor expansion of the function at 0 near 0, ensuring the minimum error through calculation. In the middle section, a lookup table method is used, and a fixed value is directly assigned in the equilibrium section. The formula for the overall scheme is as follows: Understandably, the system provided by the invention improves system efficiency by parallelizing task processing, decomposing a complex task into multiple sequentially executed subtasks or sub-stages, and allowing different hardware units to process tasks at different stages simultaneously.

[0114] All MAC PEs are processed in parallel, and the results are stored in the MAC Result Register. The multiplexer at the output layer sequentially inputs each node into the activation function calculation module, starting from the first node of the output layer, until all calculations are completed. The calculated activation data is then fed into a FIFO as input for the next layer. Using pipelining allows the activation function calculations of the previous layer and the MAC calculations of the next layer to occur simultaneously, improving efficiency and reducing the number of activation function modules required.

[0115] For example, the accelerator controller mentioned above is based on an instruction stream. The instructions are mainly divided into three types: loading data from external sources, calculating data, and saving data. The format of each instruction is shown in Table 1 below: Table 1 The instruction is 80 bits in total, represented in hexadecimal, and consists of a 16-bit preamble, 32 bits of input / output dimension information, 16 bits of bias base address information, 16 bits of weight base address information, and 16 bits of input / output base address information.

[0116] Embodiments of this application also provide an electronic device, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of the present invention during runtime.

[0117] Optionally, in this embodiment, the processor in the above-described electronic device can be configured to run an executable program to perform the following steps: Step S101: Acquire the neural signal to be processed; Step S102: Perform sliding window segmentation on the neural signal to be processed to obtain segmented neural signals; Step S103: Input the segmented neural signal into a preset compression network to obtain a compressed neural signal. The preset compression network is used to compress the segmented neural signal in the spatial and temporal dimensions in sequence. The preset compression network includes convolutional layers, and the convolutional layers use addition operations. Step S104: The compressed neural signal is input into a preset reconstruction network to obtain the target neural signal. The preset reconstruction network is used to reconstruct the compressed neural signal in the time dimension and the spatial dimension in sequence.

[0118] Optionally, in this embodiment, the executable program can be configured to store an executable program for performing the following steps: Step S101: Acquire the neural signal to be processed; Step S102: Perform sliding window segmentation on the neural signal to be processed to obtain segmented neural signals; Step S103: Input the segmented neural signal into a preset compression network to obtain a compressed neural signal. The preset compression network is used to compress the segmented neural signal in the spatial and temporal dimensions in sequence. The preset compression network includes convolutional layers, and the convolutional layers use addition operations. Step S104: The compressed neural signal is input into a preset reconstruction network to obtain the target neural signal. The preset reconstruction network is used to reconstruct the compressed neural signal in the time dimension and the spatial dimension in sequence.

[0119] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0120] Optionally, in this embodiment, the computer program, when executed by the processor, performs the following steps: Step S101: Acquire the neural signal to be processed; Step S102: Perform sliding window segmentation on the neural signal to be processed to obtain segmented neural signals; Step S103: Input the segmented neural signal into a preset compression network to obtain a compressed neural signal. The preset compression network is used to compress the segmented neural signal in the spatial and temporal dimensions in sequence. The preset compression network includes convolutional layers, and the convolutional layers use addition operations. Step S104: The compressed neural signal is input into a preset reconstruction network to obtain the target neural signal. The preset reconstruction network is used to reconstruct the compressed neural signal in the time dimension and the spatial dimension in sequence.

[0121] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of the present invention.

[0122] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of the present invention.

[0123] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0124] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0125] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0126] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0127] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0128] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method of processing neural signals, the method comprising: The method comprises the following steps: acquiring a neural signal to be processed; performing sliding window division on the neural signal to be processed to obtain a divided neural signal; inputting the divided neural signal into a preset compression network to obtain a compressed neural signal, wherein the preset compression network is used to sequentially compress the divided neural signal in a spatial dimension and a time dimension, and the preset compression network comprises a convolution layer using addition operation; inputting the compressed neural signal into a preset reconstruction network to obtain a target neural signal, wherein the preset reconstruction network is used to sequentially reconstruct the compressed neural signal in the time dimension and the spatial dimension.

2. The neural signal processing method according to claim 1, characterized by, The preset compression network comprises a time compression sub-network and a spatial compression sub-network, the time compression sub-network comprises an input layer, a first convolution layer, a second convolution layer, a third convolution layer, a full connection layer and an output layer connected in sequence, and the spatial compression sub-network comprises an input layer, a first full connection layer, a second full connection layer, a third full connection layer, a fourth full connection layer and an output layer connected in sequence.

3. The neural signal processing method of claim 2, wherein, The first convolution layer, the second convolution layer and the third convolution layer in the time compression sub-network are depth separable convolution, and the depth separable convolution comprises depth convolution and point-by-point convolution.

4. The neural signal processing method of claim 2, wherein, The preset algorithm is used to replace multiplication operation in convolution algorithm in the first convolution layer, the second convolution layer and the third convolution layer in the time compression sub-network with addition operation, and the preset algorithm is also used to decompose a large input feature vector into a small input feature vector and decompose a large convolution kernel into a small convolution kernel.

5. The neural signal processing method of claim 1, wherein, The preset reconstruction network comprises a time reconstruction sub-network and a spatial reconstruction sub-network, the time reconstruction sub-network comprises an input layer, a first full connection layer, a second full connection layer and an output layer connected in sequence, and the spatial reconstruction sub-network comprises an input layer, a long short-term memory network, a first full connection layer, a second full connection layer and an output layer connected in sequence.

6. The neural signal processing method according to claim 2, wherein, The inputting the divided neural signal into a preset compression network to obtain a compressed neural signal comprises: inputting the divided neural signal into the spatial compression sub-network to obtain a spatial compressed signal; inputting the spatial compressed signal into the time compression sub-network to obtain a compressed neural signal.

7. The neural signal processing method of claim 5, wherein, The inputting the compressed neural signal into a preset reconstruction network to obtain a target neural signal comprises: inputting the compressed neural signal into the time reconstruction sub-network to obtain a time reconstructed signal; inputting the time reconstructed signal into the spatial reconstruction sub-network to obtain a target neural signal.

8. A neural signal processing system, characterized by, The method comprises the following steps: a host end is used to acquire a neural signal to be processed, perform sliding window division on the neural signal to be processed to obtain a divided neural signal, and send the divided neural signal to a programmable gate array platform; the host end is also used to receive a compressed neural signal transmitted by the programmable gate array platform, and input the compressed neural signal into a preset reconstruction network to obtain a target neural signal; the programmable gate array platform is used to input the divided neural signal into a preset compression network to obtain a compressed neural signal, and send the compressed neural signal to the host end, wherein the preset compression network comprises a convolution layer using addition operation.

9. The neural signal processing system of claim 8, wherein, The programmable gate array platform comprises a master module, an accelerator circuit, an input memory and a result memory which are connected in communication with each other.

10. The neural signal processing system of claim 9, wherein, The accelerator circuit comprises an accelerator controller, an input queue group connected in sequence, an accelerator operation unit and an activation function unit. The accelerator controller is connected with the input queue group, the accelerator operation unit and the activation function unit respectively, and is configured to control the input queue group, the accelerator operation unit and the activation function unit.

11. The neural signal processing system of claim 10, wherein, The accelerator operation unit comprises a vector multiply-accumulate unit and an input gate.

12. An electronic device, comprising: The computer readable storage medium comprises a stored executable program, wherein the executable program, when executed, controls a device where the storage medium is located to perform the method of any one of claims 1 to 7. The computer readable storage medium comprises a stored executable program, wherein the executable program, when executed, controls a device where the storage medium is located to perform the method of any one of claims 1 to 7. The computer readable storage medium comprises a stored executable program, wherein the executable program, when executed, controls a device where the storage medium is located to perform the method of any one of claims 1 to 7.

13. A computer-readable storage medium, characterized in that, ​ 14. A computer program product, characterised in that, ​

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