Turn-off converter valve and control method thereof

Abstract

The invention discloses a turn-off converter valve and a control method thereof, and belongs to the technical field of high-voltage direct-current transmission, the turn-off converter valve comprises at least two semiconductor assemblies connected in series, each semiconductor assembly comprises a power semiconductor device, and the semiconductor assembly further comprises a voltage-sharing circuit which comprises at least one controllable switch; the gate driving unit is configured to transmit the voltage information of the power semiconductor device and the working state of the voltage equalizing circuit to the control unit; wherein the gate driving unit controls the working state of the controllable switch according to the received control instruction. The converter valve effectively solves the problems of commutation failure and non-uniform pressure bearing of each stage of assembly of a traditional converter valve, greatly improves the reliability of the converter valve, and guarantees the reliable and stable operation of a power system.

Description

Technical Field

[0001] This application relates to the field of high voltage direct current transmission technology, and in particular to a shut-off converter valve and its control method. Background Technology

[0002] High-voltage direct current (HVDC) transmission based on semi-controlled phase-commutation converters is widely used in long-distance, high-capacity power transmission applications due to its low cost and rapid power regulation. However, this type of converter suffers from commutation failure, which can cause voltage and power drops in the grid. Repeated commutation failures can even lead to grid collapse, resulting in incalculable economic losses. Adding controllable turn-off devices to the original converter valve bridge arm can achieve forced commutation and thus avoid commutation failure. However, due to the inconsistent turn-off of controllable turn-off power semiconductor devices, the series-connected components will experience different voltages depending on the turn-off sequence. The earlier a single-stage component turns off, the higher the voltage it will experience. If no corresponding measures are taken, this will cause the power semiconductor devices to break down and fail, leading to commutation failure of the converter valve. Summary of the Invention

[0003] This invention provides a shut-off converter valve and its control method, which can solve the problem of converter valve commutation failure, improve the reliability of the converter valve and the stability of the power system.

[0004] In a first aspect, a shut-off commutator valve is provided, comprising at least two semiconductor components connected in series, each semiconductor component including a power semiconductor device, and the semiconductor components further comprising:

[0005] A voltage equalization circuit, which includes at least one controllable switch;

[0006] The gate drive unit is configured to transmit voltage information of the power semiconductor device and the operating state of the voltage equalization circuit to the control unit.

[0007] The gate drive unit controls the operating state of the controllable switch according to the received control commands.

[0008] In some embodiments, the gate drive unit includes a data acquisition module, a signal transmission module, and a trigger module;

[0009] The acquisition module is configured to acquire the voltage across the power semiconductor device and the operating status of the voltage equalization circuit, and send the data to the trigger module.

[0010] The signal transmission module is configured to communicate with both the control unit and the trigger module.

[0011] The trigger module is configured to process the data sent by the acquisition module and then send it to the control unit via the signal transmission module; and to control the controllable switch of the voltage equalization circuit according to the control instructions transmitted by the control unit via the signal transmission module.

[0012] In some embodiments, the semiconductor component further includes a sampling resistor, a first end of which is connected to the high-potential side of the power semiconductor device, and a second end of which is connected to the gate drive unit.

[0013] In some embodiments, the semiconductor component further includes: a power harvesting branch, the power harvesting branch including a power harvesting resistor and a power harvesting capacitor connected in series, a first end of the power harvesting resistor being connected to the high-potential side electrode of the power semiconductor device, a second end of the power harvesting resistor being connected to the first end of the power harvesting capacitor, and a second end of the power harvesting capacitor being connected to one end of the gate driving unit.

[0014] In some embodiments, the voltage equalization circuit includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device, the second end of the first resistor is connected to the first end of the first capacitor, the second end of the first capacitor is connected to the first end of the first controllable switch, the second end of the first controllable switch is connected to one end of the gate drive unit, and the control terminal of the first controllable switch is connected to the gate drive unit.

[0015] In some embodiments, the voltage equalization circuit includes a first resistor, a first capacitor, a first controllable switch, and a second controllable switch; the first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device, the second end of the first resistor is connected to the first end of the first capacitor and the first end of the second controllable switch, the second end of the first capacitor is connected to the first end of the first controllable switch, the second end of the first controllable switch is connected to the gate drive unit, and the second end of the second controllable switch is connected to the second end of the power extraction resistor; the control terminals of both the first and second controllable switches are connected to the gate drive unit.

[0016] In some embodiments, the voltage equalization circuit includes a first resistor, a first capacitor, a second capacitor, a first controllable switch, a second controllable switch, and a third controllable switch; the first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device; the second end of the first resistor is connected to the first end of the first capacitor, the first end of the second capacitor, and the first end of the second controllable switch; the second end of the first capacitor is connected to the first end of the first controllable switch; the second end of the first controllable switch is connected to the gate drive unit; the second end of the second capacitor is connected to the first end of the third controllable switch; the second end of the third controllable switch is connected to the gate drive unit; and the second end of the second controllable switch is connected to the power extraction resistor; the control terminals of the first, second, and third controllable switches are all connected to the gate drive unit.

[0017] In some embodiments, the voltage equalization circuit includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device, the second end of the first resistor is connected to the first end of the first capacitor, the second end of the first capacitor is connected to the first end of the first controllable switch, the second end of the first controllable switch is connected to the low-potential side electrode of the power semiconductor device, and the control terminal of the first controllable switch is connected to the gate drive unit.

[0018] In some embodiments, a voltage protection branch is also included, which is connected in parallel with at least two series-connected semiconductor components.

[0019] On the other hand, a control method for a shut-off converter valve is provided. The shut-off converter valve includes at least two semiconductor components connected in series, each semiconductor component including a power semiconductor device for controlling the semiconductor components. The control method includes:

[0020] The gate drive unit transmits the voltage information of the power semiconductor device and the operating status of the voltage equalization circuit to the control unit;

[0021] The voltage equalization circuit includes at least one controllable switch;

[0022] The gate drive unit controls the operating state of the controllable switch according to the received control commands.

[0023] In some embodiments, the method for obtaining control commands includes the following steps:

[0024] The overvoltage level of the corresponding semiconductor component is obtained based on the voltage information of the power semiconductor device;

[0025] Under the preset overvoltage level, the number ratio of semiconductor components and the corresponding operating status of the voltage equalization circuit are obtained to determine the control command.

[0026] In some embodiments, the overvoltage level includes a first overvoltage level, a second overvoltage level, and a third overvoltage level;

[0027] The first overvoltage level is configured as a level between the voltage value across the power semiconductor device and a first voltage threshold and a second voltage threshold.

[0028] The second overvoltage level is configured as a level between the voltage value across the power semiconductor device and the second voltage threshold and the third voltage threshold.

[0029] The third overvoltage level is configured as a level where the voltage across the power semiconductor device is between the third voltage threshold and the fourth voltage threshold.

[0030] In some embodiments, a method for determining control commands includes...

[0031] When the number of semiconductor components in the first overvoltage level is less than the first proportion, and the corresponding voltage equalization circuits are all in the off state, the control command for all semiconductor components is configured to exit the voltage equalization circuit.

[0032] When the number of semiconductor components in the first overvoltage level is less than the first proportion, and at least some of the corresponding voltage equalization circuits are in the activated state, the control commands of at least some of the remaining semiconductor components are configured to be activated in the voltage equalization circuit.

[0033] The number of semiconductor components in the first overvoltage level shall not be less than the first proportion, and the control commands of all semiconductor components shall be configured to be applied to the voltage equalization circuit.

[0034] In some embodiments, when the number of semiconductor components at the first overvoltage level is less than a first proportion, and at least some of the corresponding voltage equalization circuits are in operation, control commands for at least some of the remaining semiconductor components are configured to be applied to the voltage equalization circuits, including:

[0035] When the number of semiconductor components in the voltage equalization circuit of the first overvoltage level that are in the activated state is less than the first quantity threshold, the control command of the corresponding semiconductor component is configured to activate the voltage equalization circuit.

[0036] When the number of semiconductor components in the voltage equalization circuit of the first overvoltage level is not less than a first quantity threshold, control commands for at least a portion of the semiconductor components are configured to be put into the voltage equalization circuit; the proportion of the number of at least a portion of the semiconductor components is a second ratio, and the at least a portion of the semiconductor components includes all semiconductor components of the first overvoltage level.

[0037] In some embodiments, a method for determining control commands includes...

[0038] When the number of semiconductor components in the second overvoltage level is less than that in the third level, and the corresponding voltage equalization circuits are all in the off state, the corresponding control command is configured to activate the voltage equalization circuit.

[0039] When the number of semiconductor components in the second overvoltage level is less than that in the third level, and the corresponding voltage equalization circuit is engaged at least in some places, the control commands for at least some of the remaining semiconductor components are configured to be engaged in the voltage equalization circuit.

[0040] The number of semiconductor components in the second overvoltage level shall not be less than the third proportion, and the control commands of all semiconductor components shall be configured to be applied to the voltage equalization circuit.

[0041] In some embodiments, when the number of semiconductor components at the second overvoltage level is less than the third proportion, and at least some of the corresponding voltage equalization circuits are in operation, control commands for at least some of the remaining semiconductor components are configured to be applied to the voltage equalization circuits; including,

[0042] When the number of semiconductor components in the voltage equalization circuit of the second overvoltage level that are in the activated state is less than the second quantity threshold, the control command of the corresponding semiconductor component is configured to activate the voltage equalization circuit.

[0043] When the number of semiconductor components in the voltage equalization circuit of the second overvoltage level is not less than the second quantity threshold, control commands for at least a portion of the semiconductor components are configured to be put into the voltage equalization circuit; the proportion of the number of at least a portion of the semiconductor components is the fourth ratio, and the at least a portion of the semiconductor components includes all semiconductor components of the second overvoltage level.

[0044] In some embodiments, a method for determining control commands includes...

[0045] When the number of semiconductor components in the third overvoltage level is less than that in the fifth level, and the corresponding voltage equalization circuits are all in the off state, the corresponding control command is configured to exit the voltage equalization circuit.

[0046] When the number of semiconductor components in the third overvoltage level is less than that in the fifth level, and at least some of the corresponding voltage equalization circuits are in operation, the control commands for all semiconductor components are configured to be applied to the voltage equalization circuits.

[0047] When the number of semiconductor components in the third overvoltage level is less than that in the fifth level, the control commands for all semiconductor components are configured to be applied to the voltage equalization circuit.

[0048] In some embodiments, the method for determining control commands further includes, if the time a semiconductor component of the third overvoltage level is in the overvoltage level exceeds a time threshold, then the corresponding semiconductor component automatically engages the voltage equalization circuit.

[0049] In some embodiments, the method for determining the control command further includes controlling the power semiconductor device to be turned on when the voltage value across the power semiconductor device exceeds a fourth voltage threshold and the voltage equalization circuit cannot be activated.

[0050] This application controls the operating state of the voltage equalization circuit by using the voltage information of power semiconductor devices; it effectively solves the problem of commutation failure in traditional converter valves. This application has advantages such as simplified topology and high reliability; the shut-off converter valve adopts the method of precise voltage equalization control based on overvoltage level provided in this application, which solves the problem of uneven pressure on the shut-off converter valve, greatly improves the reliability of the converter valve, and ensures the reliable and stable operation of the power system. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0053] Figure 1 A schematic diagram of a shut-off converter valve provided for the implementation of this application;

[0054] Figure 2 A schematic diagram of the gate drive unit provided for the application implementation;

[0055] Figure 3 A topological schematic diagram of one embodiment of the shut-off converter valve provided for application implementation;

[0056] Figure 4 A topological schematic diagram of one embodiment of the shut-off converter valve provided for application implementation;

[0057] Figure 5 A topological schematic diagram of one embodiment of the shut-off converter valve provided for application implementation;

[0058] Figure 6 A topological schematic diagram of one embodiment of the shut-off converter valve provided for application implementation;

[0059] Figure 7 A topological schematic diagram of one embodiment of the shut-off converter valve provided for application implementation;

[0060] Reference numerals: 10-Semiconductor component, 101-Power semiconductor device, 102-Voltage equalization circuit, 103-Gate drive unit, 1031-Power supply module, 1032-Acquisition module, 1033-Signal transmission module, 1034-Trigger module, 104-Sampling resistor, 105-Power extraction branch, 20-Control unit, 1-Semiconductor component segment, 30-Voltage protection branch. Detailed Implementation

[0061] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0062] In the embodiments of this application, "at least one" refers to one or more; "multiple" refers to two or more. In the description of this application, the terms "first," "second," "third," etc., are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance, nor should they be construed as indicating or implying order.

[0063] References such as “one embodiment” or “some embodiments” as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the terms “comprising,” “including,” “having,” and variations thereof, as used in this specification, mean “including, but not limited to,” unless otherwise specifically emphasized.

[0064] It should be noted that in the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after it are in an "or" relationship.

[0065] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components.

[0066] Some studies have shown that surge arresters are introduced into various components to absorb overvoltages on power semiconductor devices. However, since the fault current lasts for several hundred milliseconds or more, surge arresters are at risk of exploding, which reduces the reliability of the converter valve. In addition, a large number of surge arresters also increases the cost of the converter valve.

[0067] To address the aforementioned issues, this application provides a shut-off converter valve and its control method, which solves the problems of commutation failure in traditional converter valves and uneven pressure distribution in shut-off converter valves, greatly improving the reliability of the converter valve and ensuring the reliable and stable operation of the power system.

[0068] Figure 1 A schematic diagram of a shut-off converter valve provided for the implementation of this application is shown below. Figure 1 As shown, the shut-off converter valve includes at least two semiconductor components 10 connected in series. Each semiconductor component 10 includes a power semiconductor device 101, a voltage equalization circuit 102, and a gate drive unit 103. The low-potential electrode of the power semiconductor device 101 in one semiconductor component 10 is connected to the high-potential electrode of the power semiconductor device 101 in an adjacent semiconductor component 10. The semiconductor components 10 are connected sequentially to form a semiconductor component string. The gate drive unit 103 transmits the voltage information of the power semiconductor devices and the operating status of the voltage equalization circuit to a control unit 20. The gate drive unit 103 controls the operation of the voltage equalization circuit 102 according to received control commands. The control unit 20 receives information uploaded by all semiconductor components 10 in the semiconductor component string.

[0069] In some embodiments, the control unit 20 is used to process the received information and issue control commands to each semiconductor component 10 respectively.

[0070] In some embodiments, the control unit 20 may be located inside the shut-off converter valve and communicate with each semiconductor component 10 respectively; specifically, the control unit 20 uses a microcontroller, a field-programmable gate array (FPGA) or a complex programmable logic device (CPLD) as the main control chip and integrates other functional chips.

[0071] In some embodiments, the control unit 20 may be located outside the shut-off converter valve and communicate with each semiconductor component 10 respectively; the specific control unit 20 may be a computer, controller or other device.

[0072] In some embodiments, the power semiconductor device 101 is one of an integrated gate commutated thyristor (IGCT), an insulated gate transistor (IGBT), an injection enhancement gate transistor (IEGT), and a metal-oxide-semiconductor field-effect transistor (MOSFET).

[0073] In some embodiments, Figure 2 A schematic diagram of the gate drive unit provided for the application implementation is shown below. Figure 2 As shown, the gate drive unit 103 includes a power supply module 1031, a data acquisition module 1032, a signal transmission module 1033, and a trigger module 1034.

[0074] Power module 1031 supplies power to acquisition module 1032, signal transmission module 1033, and trigger module 1034. Acquisition module 1032 is connected to power semiconductor device 101, voltage equalization circuit 102, and trigger module 1034. Acquisition module 1032 acquires the voltage across power semiconductor device 101 and the operating status of voltage equalization circuit 102, and sends this data to trigger module 1034. Signal transmission module 1033 is communicatively connected to control unit 20 and trigger module 1034. Trigger module 1034 processes the data sent by acquisition module 1032 and sends it to control unit 20 via signal transmission module 1033. It also controls the operation of voltage equalization circuit 102 according to control commands transmitted by control unit 20 via signal transmission module 1033, i.e., controls the controllable switch in voltage equalization circuit 102. Trigger module 1034 is also connected to the control terminal of power semiconductor device 101. Trigger module 1034 can also perform simple logic analysis and data comparison.

[0075] The gate driver unit 103 uses an FPGA or CPLD as the main control chip and integrates other functional chips.

[0076] In some embodiments, the first terminal of the sampling resistor 104 is connected to the high-potential side of the power semiconductor device 101, and the second terminal of the sampling resistor 104 is connected to the acquisition module 1032 in the gate drive unit 103. The sampling resistor 104, in conjunction with the gate drive unit 103, samples the high-potential side voltage of the power semiconductor device that can be turned off.

[0077] In some embodiments, the power extraction branch 105 includes a power extraction resistor and a power extraction capacitor connected in series. The first end of the power extraction resistor is connected to the high-potential side electrode of the power semiconductor device 101, the second end of the power extraction resistor is connected to the first end of the power extraction capacitor, and the second end of the power extraction capacitor is connected to the power module 1031 in the gate drive unit 103. The power extraction branch 105 is used to supply power to the gate drive unit 103.

[0078] Figure 3 A topological schematic diagram of one embodiment of the shut-off converter valve provided for the application is shown below. Figure 3 As shown, the semiconductor component 10 includes a power semiconductor device 101, a voltage equalization circuit 102, a gate drive unit 103, a sampling resistor 104, and an energy harvesting branch 105.

[0079] The voltage equalization circuit 102 includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device 101. The second end of the first resistor is connected to the first end of the first capacitor. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to the power module 1031 in the gate drive unit 103. The control terminal of the first controllable switch is connected to the trigger module 1034 in the gate drive unit 103. Specifically, the first controllable switch controls its first and second ends to be turned on or off according to the control signal received from the control terminal.

[0080] In some embodiments, the first controllable switch may be one of IGCT, IGBT, IEGT, silicon controlled rectifier (hereinafter referred to as SCR) and MOSFET.

[0081] Figure 4 A topological schematic diagram of one embodiment of the shut-off converter valve provided for the application is shown below. Figure 4 As shown, the voltage equalization circuit 102 includes a first resistor, a first capacitor, a first controllable switch, and a second controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device 101. The second end of the first resistor is connected to the first end of the first capacitor and the first end of the second controllable switch. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to the power module 1031 in the gate drive unit 103. The second end of the second controllable switch is connected to the second end of the energy-harvesting resistor. The control terminals of both the first and second controllable switches are connected to the trigger module 1034 of the gate drive unit 103. Specifically, the second controllable switch controls its first and second ends to be turned on or off according to the control signal received from the control terminal. Using such a voltage equalization circuit allows for flexible adjustment of the charging and discharging speed of the voltage equalization branch and the response time of the voltage equalization branch, reducing the voltage equalization time of each stage of the components and further improving the reliability of the converter valve.

[0082] In some embodiments, the second controllable switch may be one of IGCT, IGBT, IEGT, SCR, and MOSFET.

[0083] Figure 5 A topological schematic diagram of one embodiment of the shut-off converter valve provided for the application is shown below. Figure 5As shown, the voltage equalization circuit includes a first resistor, a first capacitor, a second capacitor, a first controllable switch, a second controllable switch, and a third controllable switch. The first terminal of the first resistor is connected to the high-potential side electrode of the power semiconductor device 101. The second terminal of the first resistor is connected to the first terminal of the first capacitor, the first terminal of the second capacitor, and the first terminal of the second controllable switch. The second terminal of the first capacitor is connected to the first terminal of the first controllable switch. The second terminal of the first controllable switch is connected to the power module 1031 in the gate drive unit 103. The second terminal of the second capacitor is connected to the first terminal of the third controllable switch. The second terminal of the third controllable switch is connected to the power module 1031 in the gate drive unit 103. The second terminal of the second controllable switch is connected to the power extraction resistor. The control terminals of the first, second, and third controllable switches are all connected to the trigger module 1034 of the gate drive unit 103. The third controllable switch controls its first and second terminals to be on or off according to the control signal received from its control terminal. By adopting such a voltage equalization circuit, the capacitance value of the voltage equalization branch can be flexibly switched, so as to realize the adjustable voltage equalization capability of each stage of the components, and to distribute and precisely adjust the voltage equalization capability coefficient of each stage of the components, thereby further improving the reliability of the converter valve.

[0084] In some embodiments, the third controllable switch may be one of IGCT, IGBT, IEGT, SCR, and MOSFET.

[0085] Figure 6 A topological schematic diagram of one embodiment of the shut-off converter valve provided for the application is shown below. Figure 6 As shown, the voltage equalization circuit 102 includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device 101. The second end of the first resistor is connected to the first end of the first capacitor. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to the low-potential side electrode of the power semiconductor device. The control terminal of the first controllable switch is connected to the trigger module 1034 in the gate drive unit 103. Specifically, the first controllable switch controls its first and second ends to be turned on or off according to the control signal received from the control terminal.

[0086] Figure 7 A topological schematic diagram of one embodiment of the shut-off converter valve provided for implementation of this application is shown below. Figure 7As shown, in some embodiments, all the series-connected semiconductor components 10 in the shut-off converter valve are divided into multiple segments, with N1 semiconductor components 10 forming a semiconductor component segment 1. A voltage protection branch 30 is connected in parallel across both ends of each semiconductor component segment 1. When the voltage across the voltage protection branch 30 exceeds the protection voltage, the voltage protection branch conducts, suppressing overvoltage in the shut-off converter valve. Specifically, the voltage protection branch is typically a surge arrester (MOV). The protection voltage is generally 0.8 to 0.9 times the total rated voltage of all power semiconductor devices 101 in each semiconductor component segment 1.

[0087] like Figures 3-6 As shown, in some embodiments, a voltage protection branch 30 is connected in parallel across the two ends of the semiconductor component string consisting of all the series-connected semiconductor components 10. When the voltage across the voltage protection branch 30 exceeds the protection voltage, the voltage protection branch is activated to suppress overvoltage of the turn-off converter valve. Specifically, the voltage protection branch is usually a surge arrester (MOV), and the protection voltage is generally 0.8 to 0.9 times the total rated voltage of all power semiconductor devices 101 connected in parallel with one voltage protection branch 30.

[0088] This application provides a control method for a shut-off converter valve. The method controls the shut-off converter valve and specifically includes:

[0089] The gate drive unit 103 collects the voltage across the power semiconductor device 101 and the operating status of the voltage equalization circuit 102 in real time.

[0090] The gate drive unit 103 transmits the collected voltage information of the power semiconductor device 101 and the operating status of the voltage equalization circuit 102 to the control unit 20 for processing;

[0091] The gate drive unit 103 controls the operating state of the voltage equalization circuit 102 according to the control command issued by the control unit 20. If the control command is to activate the voltage equalization circuit, the gate drive unit 103 controls the controllable switch in the voltage equalization circuit 102 to be in the on state; if the control command is to deactivate the voltage equalization circuit, the gate drive unit 103 controls the controllable switch in the voltage equalization circuit 102 to be in the off state.

[0092] The voltage information can be the voltage across the power semiconductor device 101 and the overvoltage level of the semiconductor component 10.

[0093] In some embodiments, the control unit 20 obtains the overvoltage level of the corresponding semiconductor component 10 by referring to the voltage across the power semiconductor device 101 and a set overvoltage level range; it also obtains the proportion of semiconductor components 10 with the same overvoltage level in the entire semiconductor component string, and the operating state of the voltage equalization circuit 102 in the semiconductor components 10 with the same overvoltage level, and determines the control command. The proportion of semiconductor components 10 with the same overvoltage level represents the ratio of the number of semiconductor components 10 with the same overvoltage level to the total number of all semiconductor components 10 connected in series.

[0094] In some embodiments, the gate drive unit 103 compares the voltage across the power semiconductor device 101 with a set overvoltage level range to obtain the overvoltage level of the corresponding semiconductor component 10. This comparison process can be performed in the trigger module of the gate drive unit 103. The gate drive unit 103 sends the overvoltage level of the semiconductor component 10 to the control unit 20. The control unit 20 counts the number of semiconductor components 10 with the same overvoltage level in the entire semiconductor component string, obtains the proportion of semiconductor components 10 with the same overvoltage level, and then determines the control command by combining the operating state of the voltage equalization circuit 102 in the semiconductor components 10 with the same overvoltage level.

[0095] In some embodiments, the overvoltage level includes a first overvoltage level, a second overvoltage level, and a third overvoltage level;

[0096] The first overvoltage level is the level of the voltage value across the power semiconductor device that is between the first voltage threshold and the second voltage threshold.

[0097] The second overvoltage level is configured as a level between the voltage value across the power semiconductor device and the second voltage threshold and the third voltage threshold.

[0098] The third overvoltage level is configured as a level where the voltage value across the power semiconductor device is between a third voltage threshold and a fourth voltage threshold. Specifically, the first voltage threshold < the second voltage threshold < the third voltage threshold < the fourth voltage threshold.

[0099] Specifically, the fourth voltage threshold is the protective trigger threshold of the semiconductor component 10. That is, if the voltage across the power semiconductor device 101 is higher than the fourth voltage threshold, the trigger module in the gate drive unit 103 will turn on the power semiconductor device 101 to prevent the power semiconductor device 101 from being damaged due to overvoltage. At the same time, the gate drive unit 103 will send an overvoltage protection trigger signal to the control unit 20.

[0100] When the voltage across the power semiconductor device 101 is less than the first voltage threshold, it indicates that the power semiconductor device 101 is under normal voltage conditions. In this case, the gate drive unit 103 controls the controllable switch in the voltage equalization circuit 102 to open and exit the voltage equalization circuit.

[0101] In some embodiments, the first voltage threshold is 0.8U. 额定 The second voltage threshold is 0.85U. 额定 The third voltage threshold is 0.9U. 额定 The fourth voltage threshold is 0.95U. 额定 , among which, U 额定 This indicates the rated voltage of the power semiconductor device 101.

[0102] In some embodiments, the method for determining the control command is as follows: when the proportion of the number of semiconductor components in the first overvoltage level is less than a first ratio, and the voltage equalization circuits in the semiconductor components in the first overvoltage level are all in the exit state, the control command received by all semiconductor components is to exit the voltage equalization circuit.

[0103] When the number of semiconductor components in the first overvoltage level is less than the first proportion, and the voltage equalization circuit is engaged in at least some of the semiconductor components in the first overvoltage level, the control command received by some of the semiconductor components is configured to engage the voltage equalization circuit.

[0104] In some embodiments, when the number of semiconductor components in the first overvoltage level whose voltage equalization circuit is in the activated state is less than a first quantity threshold, the control command received by the semiconductor components in the first overvoltage level is to activate the voltage equalization circuit. As some implementations, the first quantity threshold can be an integer not greater than 5.

[0105] When the number of semiconductor components in the first overvoltage level where the voltage equalization circuit is in the activated state is not less than a first quantity threshold, at least some of the semiconductor components receive a control command to activate the voltage equalization circuit; the proportion of the number of at least some semiconductor components 10 is a second ratio, and at least some semiconductor components include all semiconductor components in the first overvoltage level.

[0106] In one implementation, the preferred range of the second ratio is 40% to 50%, and at least a portion of the semiconductor components 10 includes all semiconductor components 10 of the first overvoltage level and normally pressure-bearing semiconductor components 10 adjacent to the semiconductor components 10 of the first overvoltage level.

[0107] The number of semiconductor components 10 in the first overvoltage level is not less than the first proportion, and the control commands received by all semiconductor components 10 are configured to be put into the voltage equalization circuit.

[0108] As one implementation method, the preferred range of the first proportion is 20% to 30%.

[0109] In some embodiments, the method for determining the control command is as follows: when the number of semiconductor components 10 in the second overvoltage level is less than the third ratio, and the voltage equalization circuits 102 in the semiconductor components 10 in the second overvoltage level are all in the off state, the control command received by the semiconductor components 10 in the second overvoltage level is to activate the voltage equalization circuit.

[0110] When the number of semiconductor components 10 in the second overvoltage level is less than the third ratio, and the voltage equalization circuit 102 is engaged in at least some of the semiconductor components 10 in the second overvoltage level, the control command received by at least some of the remaining semiconductor components 10 is to engage the voltage equalization circuit.

[0111] In some embodiments, when the number of semiconductor components in the second overvoltage level semiconductor component 10 with the voltage equalization circuit 102 in the activated state is less than a second quantity threshold, the control command received by the second overvoltage level semiconductor component 10 is to activate the voltage equalization circuit; as some embodiments, the second quantity threshold can be an integer not greater than 4.

[0112] When the number of semiconductor components in the second overvoltage level semiconductor components 10 with the voltage equalization circuit 102 in the activated state is not less than the second quantity threshold, the control command received by at least a portion of the semiconductor components 10 is to activate the voltage equalization circuit; the quantity ratio of at least a portion of the semiconductor components 10 is the fourth ratio, and at least a portion of the semiconductor components 10 includes all semiconductor components in the second overvoltage level.

[0113] In one implementation, the preferred range of the fourth ratio is 50% to 60%, and at least a portion of the semiconductor components 10 includes all the semiconductor components 10 of the second overvoltage level and the normally pressure-bearing semiconductor components 10 adjacent to the semiconductor components 10 of the second overvoltage level.

[0114] The number of semiconductor components in the second overvoltage level shall not be less than the third proportion, and all control commands received by semiconductor components 10 shall be configured to be put into the voltage equalization circuit.

[0115] As one implementation method, the preferred range for the third ratio is 10% to 20%.

[0116] In some embodiments, the method for determining the control command is as follows: when the number of semiconductor components 10 in the third overvoltage level is less than the fifth ratio, and the voltage equalization circuits 102 in the semiconductor components 10 in the third overvoltage level are all in the exit state, the control command received by the semiconductor components 10 in the third overvoltage level is to exit the voltage equalization circuit.

[0117] When the number of semiconductor components 10 in the third overvoltage level is less than that in the fifth level, and the voltage equalization circuit in at least some of the semiconductor components 10 in the third overvoltage level is in the activated state, the control command received by all semiconductor components 10 is to activate the voltage equalization circuit.

[0118] When the number of semiconductor components 10 in the third overvoltage level is less than that in the fifth level, the control command received by all semiconductor components 10 is to activate the voltage equalization circuit.

[0119] As one implementation method, the preferred range for the fifth ratio is 5% to 10%.

[0120] In some embodiments, if a signal interruption occurs in the connection between the control unit 20 and the gate drive unit 103, this embodiment provides a backup voltage equalization control method integrated within the gate drive unit:

[0121] If the semiconductor component 10 of the third overvoltage level remains in the overvoltage level for a period exceeding a time threshold, the corresponding semiconductor component 10 automatically engages the voltage equalization circuit. In some embodiments, the time threshold is typically 5–15 ms, preferably 10 ms.

[0122] In some embodiments, when the voltage across the power semiconductor device 101 exceeds a fourth voltage threshold and the corresponding voltage equalization circuit cannot operate, the gate drive unit 103 controls the power semiconductor device 101 to be turned on, thereby preventing damage to the power semiconductor device 101 due to overvoltage.

[0123] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0124] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Although this application has disclosed preferred embodiments as above, it is not intended to limit this application. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this application. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A shut-off switching valve, characterized in that, The shut-off converter valve includes at least two semiconductor components connected in series, each semiconductor component including a power semiconductor device, and the semiconductor component further includes: A voltage equalization circuit, the voltage equalization circuit including at least one controllable switch; A gate drive unit, configured to transmit voltage information of the power semiconductor device and the operating state of the voltage equalization circuit to a control unit; The gate drive unit controls the operating state of the controllable switch according to the received control command.

2. The shut-off switching valve according to claim 1, characterized in that, The gate drive unit includes a data acquisition module, a signal transmission module, and a trigger module; The acquisition module is configured to acquire the voltage experienced by the power semiconductor device and the operating status of the voltage equalization circuit, and send them to the trigger module; The signal transmission module is configured to communicate with both the control unit and the trigger module. The trigger module is configured to process the data sent by the acquisition module and then send it to the control unit via the signal transmission module; and to control the controllable switch of the voltage equalization circuit according to the control instructions transmitted by the control unit via the signal transmission module.

3. The shut-off switching valve according to claim 1, characterized in that, The semiconductor component further includes a sampling resistor, the first end of which is connected to the high-potential side of the power semiconductor device, and the second end of which is connected to the gate drive unit.

4. The shut-off switching valve according to claim 1, characterized in that, The semiconductor component further includes a power harvesting branch, which includes a power harvesting resistor and a power harvesting capacitor connected in series. The first end of the power harvesting resistor is connected to the high-potential side electrode of the power semiconductor device, the second end of the power harvesting resistor is connected to the first end of the power harvesting capacitor, and the second end of the power harvesting capacitor is connected to one end of the gate drive unit.

5. The shut-off switching valve according to claim 1, characterized in that, The voltage equalization circuit includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device. The second end of the first resistor is connected to the first end of the first capacitor. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to one end of the gate drive unit. The control terminal of the first controllable switch is connected to the gate drive unit.

6. The shut-off switching valve according to claim 4, characterized in that, The voltage equalization circuit includes a first resistor, a first capacitor, a first controllable switch, and a second controllable switch; the first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device, the second end of the first resistor is connected to the first end of the first capacitor and the first end of the second controllable switch, the second end of the first capacitor is connected to the first end of the first controllable switch, the second end of the first controllable switch is connected to the gate drive unit, and the second end of the second controllable switch is connected to the second end of the energy harvesting resistor; the control terminals of both the first and second controllable switches are connected to the gate drive unit.

7. The shut-off switching valve according to claim 4, characterized in that, The voltage equalization circuit includes a first resistor, a first capacitor, a second capacitor, a first controllable switch, a second controllable switch, and a third controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device. The second end of the first resistor is connected to the first end of the first capacitor, the first end of the second capacitor, and the first end of the second controllable switch. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to the gate drive unit. The second end of the second capacitor is connected to the first end of the third controllable switch. The second end of the third controllable switch is connected to the gate drive unit. The second end of the second controllable switch is connected to the energy-harvesting resistor. The control terminals of the first, second, and third controllable switches are all connected to the gate drive unit.

8. The shut-off switching valve according to claim 1, characterized in that, The voltage equalization circuit includes a first resistor, a first capacitor, and a first controllable switch. The first end of the first resistor is connected to the high-potential side electrode of the power semiconductor device. The second end of the first resistor is connected to the first end of the first capacitor. The second end of the first capacitor is connected to the first end of the first controllable switch. The second end of the first controllable switch is connected to the low-potential side electrode of the power semiconductor device. The control terminal of the first controllable switch is connected to the gate drive unit.

9. The shut-off switching valve according to claim 1, characterized in that, It also includes a voltage protection branch, which is connected in parallel with at least two series-connected semiconductor components.

10. A control method for a shut-off converter valve, characterized in that, The shut-off commutator valve includes at least two semiconductor components connected in series, each semiconductor component including a power semiconductor device for controlling the semiconductor components, the control method including: The gate drive unit transmits the voltage information of the power semiconductor device and the operating status of the voltage equalization circuit to the control unit; The voltage equalization circuit includes at least one controllable switch; The gate drive unit controls the operating state of the controllable switch according to the received control commands.

11. The control method for the shut-off converter valve according to claim 10, characterized in that, The method for obtaining the control command includes the following steps: The overvoltage level of the corresponding semiconductor component is obtained based on the voltage information of the power semiconductor device; Under the preset overvoltage level, the proportion of semiconductor components and the corresponding operating state of the voltage equalization circuit are obtained to determine the control command.

12. The control method for the shut-off converter valve according to claim 11, characterized in that, The overpressure levels include a first overpressure level, a second overpressure level, and a third overpressure level; The first overvoltage level is configured as a level between a first voltage threshold and a second voltage threshold, where the voltage value across the power semiconductor device is between a first voltage threshold and a second voltage threshold. The second overvoltage level is configured as a level between a second voltage threshold and a third voltage threshold, where the voltage value across the power semiconductor device is between a second voltage threshold and a third voltage threshold. The third overvoltage level is configured as a level where the voltage value across the power semiconductor device is between a third voltage threshold and a fourth voltage threshold.

13. The control method for the shut-off converter valve according to claim 12, characterized in that, The method for determining the control command includes, When the number of semiconductor components of the first overvoltage level is less than the first proportion, and the corresponding voltage equalization circuits are all in the off state, the control command of all semiconductor components is configured to exit the voltage equalization circuit. When the number of semiconductor components of the first overvoltage level is less than the first proportion, and at least some of the corresponding voltage equalization circuits are in the activated state, the control commands of at least some of the remaining semiconductor components are configured to be activated in the voltage equalization circuit. The number of semiconductor components in the first overvoltage level is not less than a first proportion, and the control commands of all semiconductor components are configured to be applied to the voltage equalization circuit.

14. The control method for the shut-off converter valve according to claim 13, characterized in that, When the number of semiconductor components at the first overvoltage level is less than a first proportion, and at least some of the corresponding voltage equalization circuits are in operation, the control commands for at least some of the remaining semiconductor components are configured to be activated in the voltage equalization circuits, including: When the number of semiconductor components in the voltage equalization circuit of the first overvoltage level that are in the activated state is less than a first quantity threshold, the control command of the corresponding semiconductor component is configured to activate the voltage equalization circuit. When the number of semiconductor components in the voltage equalization circuit of the first overvoltage level that are in the activated state is not less than a first quantity threshold, the control command of at least a portion of the semiconductor components is configured to be activated in the voltage equalization circuit. At least a portion of the semiconductor components account for a second proportion, and at least a portion of the semiconductor components include all semiconductor components of the first overvoltage level.

15. The control method for the shut-off converter valve according to claim 12, characterized in that, The method for determining the control command includes, When the number of semiconductor components in the second overvoltage level is less than the third ratio, and the corresponding voltage equalization circuits are all in the off state, the corresponding control command is configured to activate the voltage equalization circuit. When the number of semiconductor components in the second overvoltage level is less than the third ratio, and at least some of the corresponding voltage equalization circuits are in operation, the control commands of at least some of the remaining semiconductor components are configured to be activated by the voltage equalization circuits. In the case where the number of semiconductor components in the second overvoltage level is not less than the third proportion, the control commands of all said semiconductor components are configured to be applied to the voltage equalization circuit.

16. The control method for the shut-off converter valve according to claim 14, characterized in that, When the number of semiconductor components in the second overvoltage level is less than the third ratio, and at least some of the corresponding voltage equalization circuits are in operation, the control commands of at least some of the remaining semiconductor components are configured to be activated by the voltage equalization circuits. include, When the number of semiconductor components in the voltage equalization circuit of the second overvoltage level that are in the activated state is less than the second quantity threshold, the control command of the corresponding semiconductor component is configured to activate the voltage equalization circuit. When the number of semiconductor components in the voltage equalization circuit of the second overvoltage level is not less than the second quantity threshold, the control command of at least a portion of the semiconductor components is configured to be put into the voltage equalization circuit; the proportion of the number of at least a portion of the semiconductor components is the fourth ratio, and the at least a portion of the semiconductor components includes all semiconductor components of the second overvoltage level.

17. The control method for the shut-off converter valve according to claim 12, characterized in that, The method for determining the control command includes, When the number of semiconductor components in the third overvoltage level is less than that in the fifth level, and the corresponding voltage equalization circuits are all in the off state, the corresponding control command is configured to exit the voltage equalization circuit. When the number of semiconductor components at the third overvoltage level is less than that at the fifth level, and at least some of the corresponding voltage equalization circuits are in operation, the control commands for all semiconductor components are configured to be activated in the voltage equalization circuit. When the number of semiconductor components in the third overvoltage level is less than that in the fifth level, the control commands for all said semiconductor components are configured to be applied to the voltage equalization circuit.

18. The control method for the shut-off converter valve according to claim 12, characterized in that, The method for determining the control command further includes, if the semiconductor component of the third overvoltage level is in the overvoltage level for a period of time exceeding a time threshold, then the corresponding semiconductor component automatically engages the voltage equalization circuit.

19. The control method for the shut-off converter valve according to claim 12, characterized in that, The method for determining the control command further includes controlling the power semiconductor device to be turned on when the voltage value across the power semiconductor device exceeds a fourth voltage threshold and the voltage equalization circuit cannot be activated.

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