Electrostatic chuck with high density plasma barrier coating

By coating the electrostatic chuck with a high-density plasma blocking coating, the problem of substrate contamination by the electrostatic chuck material in HDP-CVD processing is solved, resulting in higher film deposition uniformity and reduced contaminants, which is suitable for SOI equipment manufacturing.

CN121569063APending Publication Date: 2026-02-24LAM RES CORP
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Patent Information

Application Number
CN202480048080.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-21
Filing Date
2024-07-19
Publication Date
2026-02-24

AI Technical Summary

Technical Problem

During high-density plasma chemical vapor deposition (HDP-CVD) processes, the material of the electrostatic chuck may contaminate the substrate, especially in the fabrication of silicon-on-insulator (SOI) devices, causing contaminants such as aluminum to migrate from the electrostatic chuck into the substrate and affecting device performance.

Method used

A high-density plasma barrier coating (HDP barrier coating) is applied to the substrate contact area of ​​the electrostatic chuck. This coating is composed of materials such as silicon oxide and fluorine-doped silicon oxide, with a thickness of 3-5 micrometers and good thickness uniformity, which can effectively prevent the electrostatic chuck material from migrating into the substrate.

Benefits of technology

The use of HDP barrier coating significantly reduces substrate contamination by electrostatic chuck material, improves film deposition uniformity and conformality, reduces the migration rate of metal contaminants, and maintains appropriate substrate clamping force.

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Abstract

An electrostatic chuck includes a substrate facing surface that includes one or more substrate contact regions. The electrostatic chuck also includes a high density plasma (HDP) barrier coating on at least a portion of the one or more substrate contact regions.
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Description

Background Technology

[0001] Plasma-enhanced chemical vapor deposition (PECVD) is a technique used to deposit thin films or coatings onto a substrate. A precursor gas is introduced into a vacuum chamber where a plasma is formed. The plasma then converts the precursor gas into reactive chemical substances. These reactive chemicals can adsorb onto the substrate surface to form a solid film on the substrate.

[0002] PECVD typically utilizes capacitively coupled plasma formed between the nozzle and substrate of a PECVD tool. Compared to conventional PECVD, a related film deposition method known as high-density plasma (HDP) CVD increases the ion flux density exposed to the substrate by using inductively coupled plasma. The higher ion flux results in the formation of a denser film on the substrate. Summary of the Invention

[0003] This invention is provided to introduce the chosen concepts in a simplified form, which will be further described in the following detailed implementations. This invention is not intended to identify key or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that address any or all of the shortcomings mentioned in any part of this disclosure.

[0004] The disclosed examples relate to protecting a substrate from contamination from an electrostatic chuck during high-density plasma (HDP) chemical vapor deposition (CVD) processes. One example provides an electrostatic chuck comprising a substrate-facing surface including one or more substrate contact regions. The electrostatic chuck further includes an HDP barrier coating located on at least a portion of the one or more substrate contact regions.

[0005] In some such examples, the HDP barrier coating comprises one or more of the following: silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

[0006] Additionally or alternatively, in some such examples, the HDP barrier coating has a thickness of 3 to 5 micrometers.

[0007] Additionally or alternatively, in some such examples, the interpeak variation of the thickness of the HDP barrier coating is less than or equal to 10% of the average thickness.

[0008] Additionally or alternatively, in some such examples, the electrostatic chuck contains aluminum nitride.

[0009] Another example provides a method for operating a vapor deposition tool. The method includes placing a substrate on an electrostatic chuck containing an HDP barrier coating. The method also includes depositing an HDP film onto the substrate using HDP-CVD.

[0010] In some such examples, depositing the HDP film onto the substrate using HDP-CVD involves forming an oxide layer during a fully depleted insulator-on-silicon substrate fabrication process.

[0011] Additionally or alternatively, in some such examples, the HDP barrier coating comprises one or more of the following: silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

[0012] Additionally or alternatively, in some such examples, the HDP barrier coating has a thickness of 3 to 5 micrometers.

[0013] Additionally or alternatively, in some such examples, the method includes, after depositing an HDP oxide film on a plurality of substrates including the substrate, removing the pre-coating and the HDP barrier coating, and then applying a new pre-coating and a new HDP barrier coating on the electrostatic chuck.

[0014] Additionally or alternatively, in some such examples, removing the pre-coating and the HDP barrier coating involves using fluoride plasma to remove the pre-coating and the HDP barrier coating.

[0015] Additionally or alternatively, in some such examples, the HDP barrier coating is applied to the electrostatic chuck using a vapor deposition tool.

[0016] Additionally or alternatively, in some such examples, the method includes adjusting the process gas mixture before applying the HDP barrier coating.

[0017] Another example provides a method for operating an HDP-CVD tool. This method involves applying an HDP barrier coating to the electrostatic chuck.

[0018] In some such examples, the method includes applying a pre-coating to the surface of the processing chamber of the HDP-CVD tool before applying the HDP barrier coating to the electrostatic chuck, covering the top surface of one or more substrate contact areas of the electrostatic chuck with a protective cover, and then exposing the top surface of the one or more substrate contact areas of the electrostatic chuck.

[0019] Additionally or alternatively, in some such examples, the method includes adjusting the process gas mixture between applying the pre-coating and applying the HDP barrier coating to the electrostatic chuck.

[0020] Additionally or alternatively, in some such examples, the HDP barrier coating comprises one or more of the following: silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

[0021] Additionally or alternatively, in some such examples, depositing the HDP barrier coating involves depositing an HDP barrier coating having a thickness of 3 to 5 micrometers.

[0022] Additionally or alternatively, in some such examples, the method includes removing the HDP blocking coating and then applying a new HDP blocking coating to the electrostatic chuck.

[0023] Additionally or alternatively, in some such examples, removing the HDP barrier coating involves using fluoride plasma to remove the HDP barrier coating. Attached Figure Description

[0024] Figure 1 shows an example of an HDP-CVD (High-Density Plasma Chemical Vapor Deposition) tool.

[0025] Figure 2 shows a flowchart describing an exemplary method for forming an HDP barrier coating on an electrostatic chuck.

[0026] Figure 3 shows a flowchart describing an exemplary method for operating the HDP-CVD tool.

[0027] Figure 4 shows a flowchart describing another exemplary method for operating the HDP-CVD tool.

[0028] Figures 5A-5F schematically show cross-sectional views of the substrate at various stages of an exemplary HDP-CVD process.

[0029] Figure 6 shows an example of a silicon-on-insulator (SOI) wafer and a fully depleted SOI (FDSOI) device, which can be produced using the HDP-CVD tool shown in Figure 1.

[0030] Figure 7 shows a graph illustrating the exemplary degree of Al contamination of an HDP-CVD film deposited using an uncoated electrostatic chuck compared to an HDP-CVD film deposited using an electrostatic chuck coated with an HDP-CVD barrier coating.

[0031] Figure 8 shows a flowchart describing another exemplary method for operating the HDP-CVD tool.

[0032] Figure 9 shows a schematic diagram of an exemplary computing system. Detailed Implementation

[0033] The term "chemical vapor deposition" (CVD) generally refers to a process in which a gas stream of one or more precursor gases is directed onto a substrate surface under conditions configured to chemically convert precursor gases into a solid film, thereby forming a solid film on the substrate. The term "plasma-enhanced chemical vapor deposition" (PECVD) generally refers to a CVD process in which plasma is used to induce the chemical conversion of one or more precursor gases into a solid film on the substrate. The term "high-density plasma CVD" (HDP-CVD) generally refers to a CVD process that uses inductively coupled plasma to form a higher density of plasma compared to conventional PECVD. The terms "growth," "deposition," and variations thereof can also be used to refer to film formation.

[0034] The term "electrostatic chuck" typically refers to a physical structure configured to hold a substrate securely during processing by the application of electrostatic forces.

[0035] The term "flow control hardware" typically refers to components configured to connect one or more chemical sources to a fluid processing chamber. For example, flow control hardware may include one or more mass flow controllers and / or valves.

[0036] The term "fully depleted silicon-on-insulator" (FDSOI) generally refers to a semiconductor processing technique that utilizes a substrate having a bottom silicon layer, a thin "buried" oxide layer, and a top silicon layer covering the buried oxide layer. FDSOI transistor devices include channels constructed above the buried oxide layer. Because of the buried oxide layer, these channels can be undoped. The term "silicon-on-insulator" (SOI) generally refers to a substrate comprising a bottom silicon layer, a buried oxide layer, and a top silicon layer.

[0037] The term "HDP barrier coating" generally refers to a film applied to an electrostatic chuck via HDP-CVD. Exemplary HDP barrier coatings include SiO2, fluorine-doped SiO2, and silicon oxynitride (SiO2). x N y ), silicon oxide carbide (SiO) x C y ), silicon oxide carbonitride (SiO) x C y N z ), and silicon carbide (SiC).

[0038] The term "HDP film" typically refers to a film deposited using HDP-CVD. Compared to similar films formed using PECVD, which utilizes capacitively coupled plasma, HDP films have a higher density.

[0039] The term "oxide layer" generally refers to a layer of material containing oxygen and oxidized substances. Examples of oxide layers include SiO2 and SiO2. x N y SiO x C y SiO x C y N z and metal oxides (e.g., hafnium oxide (HfO) x ), titanium oxide (TiO) x ), tungsten oxide (WO x ), tin oxide (SnO x ), and molybdenum oxide (MoO) x )).

[0040] The term "plasma generator" generally refers to a device configured to generate plasma, thereby providing reactive materials and / or high-energy ions for substrate processing in a processing chamber.

[0041] The term "pre-coating" generally refers to a process used to deposit a film onto the surface of a processing chamber prior to performing substrate processing. Exemplary films that can be deposited during pre-coating include SiO2, fluorine-doped SiO2, and SiO2. x N y SiO x C y SiO x C y N z And SiC.

[0042] The term "processing chamber" typically refers to a housing in which chemical and / or physical processing is performed on a substrate. The pressure, temperature, and atmospheric composition within the processing chamber are controllable to perform the chemical and / or physical processing.

[0043] The term "protective cover" typically refers to a structure placed over an electrostatic chuck during the pre-coating process to protect the substrate contact area of ​​the electrostatic chuck from the effects of the pre-coating process.

[0044] The term "substrate" generally refers to any object on which a film can be deposited.

[0045] As described above, PECVD is a technique for depositing thin films or coatings onto a substrate. Conventional PECVD utilizes capacitively coupled plasma formed between a nozzle and the substrate in a processing chamber to provide the energy for the CVD process. Compared to conventional PECVD, HDP-CVD increases the plasma density by using inductively coupled plasma. Compared to capacitively coupled plasma, inductively coupled plasma can provide a higher ion flux at the substrate surface. This results in a denser film formation on the substrate compared to conventional PECVD. HDP-CVD can also produce films with higher uniformity and conformal properties compared to conventional PECVD. As an example, HDP-CVD can be used to produce uniform thin oxide films (<250 Å thickness) on a silicon substrate for use as a buried oxide layer in a silicon-on-insulator (SOI) substrate. Such substrates can be used to fabricate fully depleted silicon-on-insulator (FDSOI) devices.

[0046] Contamination within the processing chamber can cause problems during semiconductor device manufacturing processes. Potential sources of contamination may include chamber materials. To help prevent substrate contamination during film deposition, a pre-coating film can be applied to the surfaces within the processing chamber before performing HDP-CVD. This pre-coating helps prevent substrate contamination caused by processing chamber materials.

[0047] Generally, in HDP-CVD processing tools, an electrostatic chuck (ESC) within the processing chamber is covered with a protective cap during the pre-coating process. The protective cap helps prevent pre-coating material from coating the substrate contact area on the ESC. Therefore, during HDP-CVD processing, the substrate contact area of ​​the ESC is in direct contact with the substrate held on the ESC. Due to this direct contact between the substrate and the ESC, ESC material may potentially migrate from the ESC into the substrate during HDP processing. For example, some ESCs contain aluminum nitride substrate contact areas. Therefore, aluminum may potentially migrate into the substrate during HDP processing. This could potentially lead to contamination of the manufactured SOI substrate. Furthermore, uncoated portions of the ESC may also be sputtered and etched during HDP-CVD processing. This can also pose a risk of contaminating the processed substrate.

[0048] Therefore, the disclosed examples relate to assisting in preventing substrate contamination from ESC material during HDP-CVD processing. In short, embodiments of the disclosed invention describe an ESC with an HDP barrier coating, and the application of the HDP barrier coating to the ESC. The HDP barrier coating is a denser layer than pre-coated layers deposited on other surfaces of the chamber. The HDP barrier coating helps reduce the rate of electromigration of ESC material into the substrate without adversely affecting substrate holding forces. The HDP barrier coating also helps prevent contamination from sputtering etching of the ESC material during HDP deposition. This provides further protection against contamination from the ESC material.

[0049] In some examples, the HDP barrier coating on the ESC comprises a silicon oxide coating. Exemplary silicon oxide coatings include SiO2, doped SiO2 (e.g., fluorine-doped SiO2), and SiO2. x N y SiO x C y , and / or SiO x C y N z In other examples, the HDP barrier coating may contain any other suitable material. Another example of a suitable HDP barrier coating material is SiC.

[0050] In some examples, the HDP barrier coating has a thickness ranging from 1 to 5 micrometers. In some more specific examples, the thickness ranges from 3 to 5 micrometers. In even more specific examples, the thickness ranges from 3 to 4.2 micrometers. In other examples, the HDP barrier coating has any other suitable thickness. Other examples include thicknesses greater than 5 micrometers and less than 1 micrometer. This thickness of the HDP barrier coating helps reduce metal contamination of HDP films deposited on the substrate (e.g., HDP-CVD films deposited using HDP-CVD tools) while still providing suitable substrate holding power.

[0051] The thickness of the HDP barrier coating can be highly uniform across the entire substrate-facing surface of the ESC. In some examples, the thickness may have a peak-to-peak variation of less than or equal to 10% of the average thickness. In some more specific examples, when the average thickness is 4000 Å, the thickness variation may reach 250 Å or less. In other examples, the peak-to-peak variation is less than or equal to 1% of the average thickness. In this way, the HDP barrier coating provides adequately uniform protection across the entire substrate. Such HDP barrier coatings and the methods used to form them are discussed in more detail below.

[0052] Figure 1 shows a schematic diagram of an exemplary HDP-CVD tool 100 for depositing an HDP barrier coating and / or HDP film as disclosed. The HDP-CVD tool 100 includes a processing chamber 102. The processing chamber 102 surrounds various other components of the reactor and is used to contain the plasma. The HDP-CVD tool 100 also includes an ESC 104 for holding the substrate during HDP-CVD processing. Although described herein in the context of HDP-CVD, it should be understood that an HDP-CVD coated ESC can be used in any other suitable tool. Other examples of suitable tools include ALD and non-plasma-enhanced CVD tools.

[0053] ESC104 includes a movable base 108. In some examples, the bipolar electrodes of ESC104 use inner and outer electrodes to provide clamping capability. Temperature uniformity can be tuned by adjusting the offset voltage. In this way, the temperature of substrate 106 and ESC104 can be controlled.

[0054] The HDP-CVD tool 100 also includes a gas loop 110 for introducing process gases into the processing chamber. Alternatively or additionally, the HDP-CVD tool 100 may include other process gas inlets besides the gas loop 110. The processing tool 100 also includes flow control hardware 112. The flow control hardware 112 connects process gas sources to the processing chamber 102. In the depicted example, the flow control hardware 112 connects a silicon precursor source 114, an oxidant source 116, an optional hydrogen gas source 118, an inert gas source 120, and an optional additive source 122 to the processing chamber 102. The flow control hardware 112 may include any suitable components. Examples include mass flow controllers, valves, and piping.

[0055] The Si-containing precursor source 114 comprises any suitable Si-containing precursor material. Some examples of suitable Si-containing precursor materials include silanes and disilanes. In other examples, the Si-containing precursor source 114 comprises SiF4, which causes the formation of a fluorine-doped silicon oxide layer.

[0056] Oxidant source 116 may contain any suitable oxidant that can be introduced into the processing chamber to oxidize the Si-containing precursor. Examples include water, molecular oxygen (O2), and oxygen-containing organic molecules (e.g., alcohols). Exemplary alcohols include methanol, ethanol, 1-propanol, 2-propanol, isobutanol, tert-butanol, 1-butanol, and 2-butanol. In some examples, the oxidant may be in a condensed phase at standard pressure and temperature. In such examples, oxidant source 116 may include a flow-over vapor delivery system, an evaporator delivery system, a charged volume delivery system, a molar delivery device, or other suitable delivery system to volatilize the condensed-phase oxidant.

[0057] An optional hydrogen gas source 118 can be used to create a reducing environment for plasma processing. Exemplary hydrogen gases include molecular hydrogen (H2) and ammonia (NH3).

[0058] The inert gas source 120 may contain any suitable inert gas. Examples include He, Ne, Ar, Kr, and Xe. In some examples, one or more additional inert gas sources may be included, each providing a different inert gas.

[0059] Optional additive source 122 may contain any suitable additive. Examples include F2 and volatile metal-containing precursors that can be used to deposit doped HDP films. In other examples, additive source 122 includes a nitrogen-containing gas source, such as N2 or N2O. Nitrogen-containing gases can be used to form nitride or nitrogen-doped HDP films.

[0060] The HDP-CVD tool 100 in Figure 1 includes two plasma sources: a top RF coil 124 and a side RF coil 126. The top RF coil 124 is a mid-frequency (MFRF) coil, while the side RF coil 126 is a low-frequency (LFRF) coil. The power applied using the LFRF coil helps ionize the precursor gas to initiate plasma formation. In some examples, the LF power is contained in frequencies ranging from 300 to 400 kHz. In some more specific examples, the LF power is contained in frequencies ranging from 325 to 375 kHz. In still more specific examples, the LF power is contained in frequencies ranging from 340 to 370 kHz. In some examples, the LF power is applied at 0.5–8 kW. In some more specific examples, the LF power is applied at 5 kW.

[0061] The power applied using an MFRF coil generates a magnetic field to confine and control the plasma. This results in higher plasma density and higher ionization efficiency compared to conventional PECVD. In some examples, the MF power is contained in frequencies ranging from 400 to 500 kHz. In some more specific examples, the MF power is contained in frequencies ranging from 425 to 475 kHz. In still more specific examples, the MF power is contained in frequencies ranging from 430 to 470 kHz. In some examples, the MF power is applied at 0.5–5 kW. In some more specific examples, the MF power is applied at 5 kW. However, the methods and apparatus disclosed herein are not limited to operation in a reaction chamber with dual-source plasma sources, at these frequencies, or with RF plasma sources. Any suitable plasma source can be used.

[0062] A high-frequency (HFRF) source 128 is used to electrically bias the substrate 106 and guide charged reactive materials onto the substrate for deposition. For example, electrical power from the HFRF source 128 is coupled to the substrate 106 using electrodes or capacitive coupling. In some examples, the HF power encompasses frequencies in the range of 10 MHz to 10 GHz. In some more specific examples, the HF power encompasses frequencies in the range of 10–15 MHz. In some examples, the HF power is applied at 0.5–10 kW. In some more specific examples, the HF power is applied at over 10 kW. Note that the bias applied to the substrate does not have to be an RF bias. Other frequencies with DC bias can also be used.

[0063] An injector may be connected to the main gas ring 110 to direct at least some of the gas or gas mixture into the processing chamber 102 and toward the ESC 104. In other examples, any other suitable processing gas delivery system may be used.

[0064] In some examples, additionally or alternatively, one or more inlets 130 are used to introduce the process gas. The component gases of the process gas may or may not be premixed. In some examples, the process gas is introduced via a gas supply inlet mechanism including orifices. In some examples, at least some orifices orient the process gas along an injection axis that intersects the exposed surface of the substrate at an acute angle.

[0065] The process gas exits chamber 102 through outlet 123. A vacuum pump (e.g., a turbomolecular pump) typically extracts the process gas and maintains a suitable low pressure within the reactor.

[0066] The HDP-CVD tool 100 also includes a robot 132 for moving the substrate 106 into and out of the processing chamber 102. The robot 132 is configured to transfer the substrate 106 without contaminating the substrate 106 or the processing chamber 102.

[0067] The HDP-CVD tool 100 also includes a controller 134. The controller 134 is operatively coupled to a movable base 108, flow control hardware 112, an LFRF source 126, an MFRF source 124, and / or an HFRF source 128. The controller 134 is configured to control various functions of the HDP-CVD tool 100 to perform thin film deposition processes, such as HDP-CVD. For example, the controller 134 is configured to manipulate the height of the movable base 108 to maintain the ESC 104 and / or the substrate 106 at a desired temperature. The controller 134 is also configured to manipulate the flow control hardware 112 to allow a selected gas or gas mixture to flow into the processing chamber 102 at a selected rate. The controller 134 is also configured to remove gas from the processing chamber 102 by controlling the exhaust flow through the outlet 123. The controller 134 is also configured to manipulate the top RF coil 124, the side RF coil 126, and the HFRF source 128.

[0068] Controller 134 may include one or more memory devices and one or more processors. The processor may include a CPU or computer, analog and / or digital input / output connections, a stepper motor controller board, etc. Controller 134 may include any suitable computing system. An exemplary computing system is illustrated below with reference to Figure 9.

[0069] Controller 134 controls all activities of the deposition apparatus. System controller 134 executes system control software, which includes a set of instructions for controlling the following: timing of specific processes, mixing of process chemicals, chamber pressure, chamber temperature, substrate temperature, radio frequency (RF) power level for plasma pretreatment, substrate chuck or pedestal positioning, and other parameters. In some examples, additional computer programs stored on a memory device associated with controller 134 may be used.

[0070] In some examples, controller 134 includes a user interface. The user interface may include a display screen, a graphical software display of the device and / or processing conditions, and user input devices (e.g., pointing devices, keyboards, touchscreens, microphones, etc.).

[0071] The controller parameters are related to the processing conditions. Examples of such processing conditions include the composition and flow rate of the processing gas, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe and can be input via a user interface. Signals for monitoring the processing can be provided through the analog and / or digital input connections of the system controller 134. Signals for controlling the processing are output through the analog and digital output connections of the processing tool 100.

[0072] The system software can be designed or constructed in many different ways. For example, various chamber component subroutines or control objects can be written to control the operation of the chamber components required to achieve ESC pre-coating and HDP-CVD barrier coating, according to the methods and processes described herein. Examples of programs or program segments used for this purpose include substrate positioning codes, process gas control codes, pressure control codes, and heater control codes. An exemplary hardware for controller 134 is illustrated below with reference to Figure 9.

[0073] Figure 2 shows a flowchart depicting an exemplary method 200 for operating an HDP-CVD tool (e.g., HDP-CVD tool 100 of Figure 1). Method 200 may optionally include depositing a pre-coating in a chamber before forming an HDP barrier coating on the ESC. In such an example, at 202, method 200 may include covering the ESC within the processing chamber of the HDP-CVD tool to protect the substrate contact area of ​​the ESC from the effects of the pre-coating process. This is shown in Figure 5A, which schematically shows a cross-sectional view of an exemplary processing chamber 500. The processing chamber 500 contains an ESC 502. A protective cover 504 is positioned over the substrate-facing surface 506 of the ESC 502. For example, the protective cover 504 may be placed on the ESC 502 by a robot prior to performing the pre-coating process. The ESC 502 contains a dielectric material with finite resistance. In some examples, the dielectric material may contain aluminum nitride (AlN). The current conducted through the bipolar electrodes and the substrate generates a charge layer at the dielectric-substrate interface. This charge layer generates an attractive electrostatic force to hold the substrate in the substrate contact region 507 of the ESC. In some examples, the protective cover 504 is held in a similar manner. In other examples, the protective cover 504 is held in place by gravity without using electrostatic clamping force. In some examples, other protective mechanisms may be used to shield the top surface of the substrate contact region 507.

[0074] Referring again to Figure 2, in an example that includes the optional application of a pre-coating, after covering the ESC at 202, method 200 includes, at 204, applying the pre-coating to the surface within the processing chamber of the HDP-CVD tool. For example, Figure 5B schematically illustrates a pre-coating 508 within the processing chamber 500 of Figure 5A. In the example of Figure 5B, the pre-coating 508 is deposited on the inner chamber surface, including the exposed surfaces of the ESC 502 and the protective cover 504. The pre-coating 508 is also deposited on the walls of the processing chamber 500 and other structures within the processing chamber.

[0075] A pre-coating 508 can be formed by introducing a suitable precursor gas into the processing chamber and simultaneously igniting the plasma. In some examples, the pre-coating comprises SiO2, fluorine-doped SiO2, or SiO2. x N y SiOx C y SiO x C y N z One or more of SiO2, and / or SiC. The pre-coating is used to prevent substrate contamination caused by materials from components in the processing chamber. As a more specific example, a SiO2 pre-coating can be formed by introducing a Si-containing precursor gas (e.g., silane) into an oxygen-containing plasma.

[0076] Referring again to Figure 2, after the pre-coating is deposited, method 200 includes 206, exposing the electrostatic chuck. Figure 5C shows the processing tool 500 after pre-coating is performed and the protective cap 504 is removed. As illustrated in the example of Figure 5C, the protective cap 504 prevents the pre-coating 508 from depositing on the substrate contact areas (SCAs) 507 of the ESC 502.

[0077] At 208, method 200 of Figure 1 includes applying an HDP barrier coating to the electrostatic chuck of an HDP-CVD tool. Figure 5D shows an example of an HDP barrier coating 510 on the substrate-facing surface of an ESC502. In some examples, the HDP barrier coating 510 comprises silicon oxide. Exemplary silicon oxides include SiO2, doped SiO2 (e.g., fluorine-doped SiO2), SiO... x N y SiO x C y , and / or SiO x C y N z In other examples, the HDP barrier coating 510 comprises any other suitable material. Another example of a suitable HDP barrier coating material includes SiC.

[0078] In some examples, the resulting HDP barrier coating 510 has a thickness 512 ranging from 1 to 5 micrometers. In some more specific examples, the thickness 512 ranges from 3 to 5 micrometers. In even more specific examples, the thickness 512 ranges from 3 to 4.2 micrometers. In other examples, the HDP barrier coating 510 has any other suitable thickness. Other examples include thicknesses greater than 5 micrometers and less than 1 micrometer. A relatively thin HDP barrier coating (e.g., less than 2.7 micrometers) may allow more metal-contaminated film to be deposited on the substrate compared to a relatively thick HDP barrier coating. Therefore, the extent of contaminants introduced into the substrate by the ESC during the HDP-CVD process may vary with the thickness of the HDP barrier coating. However, once a threshold thickness (e.g., 5 micrometers) is reached, the contaminant level may stabilize. Therefore, increasing the thickness beyond such a threshold thickness may provide little or no additional benefit for contamination protection. Furthermore, forming a relatively thick HDP barrier coating on the ESC takes more time than forming a relatively thin HDP barrier coating on the ESC. If significant degradation is observed on the HDP barrier layer, a thickness greater than 5 micrometers may be reasonable for some applications.

[0079] The thickness 512 can be uniform across the entire substrate-facing surface 506. In some examples, the thickness 512 may have an inter-peak variation of less than or equal to 10% of the average thickness 512. In some more specific examples, when the average thickness 512 is 4000 Å, the thickness 512 may vary by 250 Å or less. In other examples, the inter-peak variation is less than or equal to 1% of the average thickness 512. In this way, when the substrate is placed on ESC502, the HDP barrier coating 510 provides adequately uniform protection across the entire substrate. The uniform thickness of the HDP barrier coating also generates adequately uniform clamping force across the entire surface of ESC502.

[0080] As described above, HDP-CVD uses inductively coupled plasma, which provides a higher ion flux at the substrate surface than capacitively coupled plasma. Therefore, the HDP barrier coating 510 can be denser than a film with a similar composition deposited using capacitively coupled plasma. In this way, the HDP barrier coating 510 reduces / prevents metal diffusion or migration from the ESC, which could otherwise contaminate the substrate.

[0081] The HDP barrier coating 510 can be formed using any suitable processing conditions. For example, depending on the target thickness of the HDP barrier coating 510, the deposition of the HDP barrier coating can have a duration ranging from 10 seconds to 10 minutes. All ranges described herein include endpoints. Furthermore, in some examples, the deposition of the HDP barrier coating 510 can be carried out at a pressure of approximately 10 millitors (mTorr) and includes an inert gas in addition to the precursor gas for the HDP barrier coating. Exemplary inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), and / or xenon (Xe). In other examples, the inert gas is omitted.

[0082] In some examples, the HDP barrier coating 510 has a different composition and / or properties than the pre-coating 508. This can be achieved by adjusting the processing conditions between applying the pre-coating 508 to an electrostatic chuck and applying the HDP barrier coating 510 to an electrostatic chuck. Adjustable processing conditions include HF, MF, and LFRF power, substrate temperature, processing gas mixture composition, pressure, and gas flow rate. For example, the HDP barrier coating 510 can be formed in the presence of a higher concentration of Ar than the pre-coating 508. Ar is a relatively heavy gas. Ar ions in the plasma can bombard the growing HDP barrier coating 510 with more kinetic energy than, for example, helium atoms. Bombarding the surface of the growing HDP barrier coating increases its density. Therefore, using a higher concentration of Ar than the pre-coating to form the HDP barrier coating 510 allows the HDP barrier coating 510 to form a film with a higher density than the pre-coating 508.

[0083] Figure 3 shows a flowchart describing an exemplary method 300 for processing a substrate. In some examples, the substrate is processed in the same tool used for depositing the HDP barrier coating (e.g., the HDP-CVD tool 100 of Figure 1). In other examples, the substrate is processed in a different tool than the tool used for depositing the HDP barrier coating, which may be located in the same or a different position.

[0084] At 310, method 300 includes placing a substrate on an ESC containing an HDP barrier coating. The substrate can be placed on the ESC by a robot (e.g., robot 132). Method 300 also includes, at 312, depositing an HDP film on the substrate using HDP-CVD. Figure 5E shows an example of a substrate 514 on an ESC 502 of Figures 5A-5D. In the example of Figure 5F, an HDP film 516 is deposited on substrate 514.

[0085] In some examples, substrate 514 comprises the bottom layer of the SOI wafer. In some such examples, HDP film 516 comprises an oxide layer of the SOI wafer. Figure 6 shows an example of an SOI wafer 600 that can be produced using the methods and processing tools described herein. Figure 6 also shows an example of an FD-SOI device 602 that can be produced from SOI wafer 600. FD-SOI device 602 comprises a device layer 604 and an insulating layer 606 on substrate 608. Device layer 604 comprises a source 610 and a drain 612 separated by a fully depleted channel region 614. FD-SOI device 602 also includes a gate 616 with a gate insulator 618. For example, insulating layer 606 may be silicon oxide formed using HDP-CVD.

[0086] Referring again to Figure 5F, in some examples, the HDP film 516 has a different composition and / or physical properties (e.g., thickness, density, and / or electrical permittivity) than the HDP barrier coating 510 and / or pre-coating 508. Some examples of suitable materials for the HDP film 516 include SiO2 and fluorine-doped SiO2. As described above, different compositions of the HDP film 516 can be achieved by adjusting the process gas mixture between applying the pre-coating 508 and applying the HDP barrier coating 510.

[0087] In the experiments, the presence of the HDP barrier coating resulted in a four-fifths reduction in aluminum (Al) contamination from the AlN ESC in the HDP film compared to the HDP film deposited in the presence of a bare ESC. Figure 7 shows an exemplary graph of the Al content of the HDP film. As shown in Figure 7, the HDP film deposited using a bare ESC exhibits higher back-side and intra-film Al contamination compared to the HDP film deposited using an ESC with an HDP barrier coating.

[0088] Referring again to Figure 3, steps 310 and 312 of method 300 can be repeated any suitable number of cycles 314 to deposit HDP films on multiple substrates. After several depositions of HDP films on the substrates, the pre-coating and HDP barrier coating can be removed and reapplied.

[0089] Figure 4 shows a flowchart illustrating an exemplary method 400 for operating an HDP-CVD tool (e.g., HDP-CVD tool 100 of Figure 1) to remove and reapply an HDP barrier coating. Method 400 includes, at 416, removing a pre-coating and an HDP barrier coating after depositing an HDP film onto multiple substrates. In some examples, fluoride plasma is used to remove the pre-coating and HDP barrier coating. In other examples, any other suitable cleaning treatment may be used. Other examples of suitable cleaning treatments include oxygen plasma cleaning and hydrogen plasma cleaning. After removing the pre-coating and the HDP barrier coating, the pre-coating and a new HDP barrier coating may be applied to the ESC.

[0090] The cleaning process used to remove the HDP barrier coating can also remove the pre-coating from the processing chamber. Therefore, at 418, method 400 includes covering the ESC. At 420, method 400 includes optionally applying a new pre-coating. After applying the new pre-coating, method 400 includes forming a new HDP barrier coating in step 422. In this way, the ESC can be cleaned and renewed for an additional cycle of substrate processing.

[0091] Figure 8 shows a flowchart describing an exemplary method 800 for operating an HDP-CVD device. The following description of method 800 is based on Figures 1-7 above. It should be understood that method 800 can also be performed in other contexts.

[0092] In some examples, at 802, method 800 includes covering the electrostatic chuck with a protective cap before applying the HDP barrier coating to the electrostatic chuck, applying the pre-coating to the surface within the processing chamber of the HDP-CVD tool, and then exposing the electrostatic chuck. For example, the ESC502 of FIG5A is covered by a protective cap 504. The protective cap 504 prevents the pre-coating 508 from accumulating on the substrate contact surface of the ESC502.

[0093] In some examples, 804, method 800 includes adjusting the process gas mixture between applying the pre-coating and applying the HDP barrier coating to the electrostatic chuck. For example, the HDP barrier coating can be deposited using a more Ar-rich process gas mixture compared to the pre-coating. This results in a heavier process gas mixture and a denser HDP film.

[0094] Method 800 further includes, at 806, applying an HDP barrier coating to the electrostatic chuck of an HDP-CVD tool. For example, the ESC502 of Figure 5D is coated with an HDP barrier coating 510. In some examples, at 808, the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide. This helps prevent sputtering or migration of the ESC material during processing.

[0095] In some examples, depositing an HDP barrier coating involves depositing an HDP barrier coating with a thickness of 3 to 5 micrometers. For example, the thickness 512 of the HDP barrier coating 510 in Figure 5D can be in the range of 3 to 5 micrometers. A relatively thick HDP barrier coating allows for the production of products with higher purity compared to a relatively thin HDP barrier coating. However, purity may reach a stable level as the thickness increases (e.g., at thicknesses greater than 5 micrometers).

[0096] Method 800 further includes, at 812, placing the substrate on an electrostatic chuck containing an HDP barrier coating. For example, Figure 5E shows an example of a substrate 514 disposed on an ESC 502 and an HDP barrier coating 510.

[0097] In step 814, method 800 further includes depositing an HDP film onto a substrate using HDP-CVD. Figure 5F shows an exemplary HDP film 516 deposited on substrate 514.

[0098] In some examples, at 816, the step of depositing an HDP film onto a substrate using HDP-CVD is included in the formation of an oxide layer during the SIO wafer fabrication process. For example, Figure 6 shows an example of an FD-SOI device including an insulating layer 606. The insulating layer 606 can be formed using the processes and tools disclosed herein.

[0099] In 818, method 800 optionally includes, after depositing an HDP oxide film on a plurality of substrates including the substrate, removing a pre-coating and an HDP-CVD barrier coating, and then applying a new pre-coating and a new HDP barrier coating on an electrostatic chuck. For example, the pre-coating and HDP barrier coating 510 can be removed, the processing chamber 500 can be cleaned, and the pre-coating and HDP barrier coating 510 can be reconstructed on ESC 502.

[0100] In some examples, at 820, the step of removing the HDP barrier coating involves using fluoride plasma to remove the HDP barrier coating. In other examples, any other suitable cleaning technique may be used. For example, oxygen plasma or hydrogen plasma may be used to clean the processing chamber 102 of Figure 1.

[0101] Figure 9 schematically shows a non-limiting example of a computing system 900 that can formulate one or more of the above-described methods and processes. The computing system 900 is shown in a simplified form. The computing system 900 may take the form of one or more personal computers, workstations, computers integrated with substrate processing tools, and / or network-accessible server computers.

[0102] The computing system 900 includes a logic machine 902 and a storage machine 904. The computing system 900 may optionally include a display subsystem 906, an input subsystem 908, a communication subsystem 910, and / or other components not shown in FIG. 9. The controller 134 is an example of the computing system 900.

[0103] The logic machine 902 includes one or more physical devices configured to execute instructions. For example, the logic machine may be configured to execute instructions belonging to one or more application programs, services, programs, routines, libraries, objects, components, data structures, or other logical structures. Such instructions may be implemented to perform work, implement data types, change the state of one or more components, achieve technical effects, or otherwise achieve desired results.

[0104] The logical machine may include one or more processors configured to execute software instructions. Additionally or alternatively, the logical machine may include one or more hardware or firmware logical machines configured to execute hardware or firmware instructions. The processor of the logical machine may be single-core or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and / or distributed processing. Individual components of the logical machine may be distributed across two or more individual devices, which may be remotely set up and / or configured to coordinate processing. Aspects of the logical machine may be virtualized and executed via remotely accessible network computing devices configured in a cloud computing architecture.

[0105] Storage machine 904 includes one or more physical devices configured to accommodate instructions 912, which can be executed by a logic machine to implement the methods and processes described herein. When such methods and processes are implemented, the state of storage machine 904 can be changed—for example, to accommodate different data.

[0106] Storage machine 904 may include removable and / or built-in devices. Storage machine 904 may include optical memory (e.g., CD, DVD, HD-DVD, Blu-ray disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic memory (e.g., hard disk drive, floppy disk drive, magnetic tape drive, MRAM, etc.). Storage machine 904 may include volatile, non-volatile, dynamic, static, read / write, read-only, random access, sequential access, location-addressable, file-addressable, and / or content-addressable devices.

[0107] It should be understood that storage machine 904 includes one or more physical devices. However, aspects of the instructions described herein may alternatively be transmitted via a communication medium (e.g., electromagnetic signals, optical signals, etc.) that is not permanently retained by the physical devices.

[0108] The aspects of logic machine 902 and storage machine 904 can be integrated into one or more hardware logic components. Such hardware logic components may include field-programmable gate arrays (FPGAs), application-specific integrated circuits (PASICs / ASICs), application-specific standard products (PSSPs / ASSPs), system-on-a-chip (SoCs), and complex programmable logic devices (CPLDs).

[0109] When included, the display subsystem 906 can be used to present a visual representation of the data stored on the storage machine 904. This visual representation may take the form of a graphical user interface (GUI). When the methods and processes described herein change the data stored on the storage machine, and thus change the state of the storage machine, the state of the display subsystem 906 may also change to visually represent the potential data change. The display subsystem 906 may include one or more display devices that virtually utilize any kind of technology. Such display devices may be integrated with the logic machine 902 and / or the storage machine 904 in a shared enclosure, or such display devices may be peripheral display devices.

[0110] When included, the input subsystem 908 may include or interact with one or more user input devices, such as a keyboard, mouse, or touchscreen. In some examples, the input subsystem may include or interact with a selected Natural User Input (NUI) component. Such components may be integrated or peripheral, and the translation and / or processing of input actions may be performed on-board or off-board. Exemplary NUI components may include a microphone for speech and / or voice recognition, and infrared, color, stereo, and / or depth cameras for machine vision and / or gesture recognition.

[0111] When included, the communication subsystem 910 can be configured to communicatively couple the computing system 900 to one or more other computing devices. The communication subsystem 910 may include wired and / or wireless communication devices compatible with one or more different communication protocols. As a non-limiting example, the communication subsystem may be configured to communicate using a wireless telephone network, or a wired or wireless local area network or wide area network. In some examples, the communication subsystem may allow the computing system 900 to send messages to and / or receive messages from other devices via a network such as the Internet.

[0112] This disclosure is presented by way of example and references the accompanying drawings. In one or more drawings, substantially identical parts, processing steps, and other elements may be identified coordinately and described with minimal repetition. However, it should be noted that the coordinately identified elements may also differ to some extent. It should also be noted that some drawings may be schematic and not to scale. Different drawing scales, aspect ratios, and the number of parts shown in the drawings may be intentionally distorted to make particular features or relationships easier to observe.

[0113] The “and / or” used here is defined as including or ∨, as listed in the truth table below: The term "one or more of A or B" as used herein includes: A, B, or a combination of A and B. The term "one or more of A, B, or C" is equivalent to A, B, and / or C. Therefore, "one or more of A, B, or C" as used herein includes: A alone, B alone, C alone, a combination of A and B, a combination of A and C, a combination of B and C, or a combination of A, B, and C.

[0114] It should be understood that the configurations and / or methods described herein are exemplary in nature, and these specific examples or illustrations should not be considered limiting, as many variations are possible. The specific routines or methods described herein may represent one or more of any number of strategies. Therefore, the various actions shown and / or described may be performed in the order shown and / or described, in another order, in parallel, or omitted. Similarly, the order of the above processes may be changed.

[0115] The subject matter of this disclosure includes all novel and non-obvious combinations and sub-combinations of various processes, systems and configurations, as well as other features, functions, behaviors and / or characteristics disclosed herein, and any and all equivalent schemes thereof.

Claims

1. An electrostatic chuck, comprising: Facing the substrate surface, it includes one or more substrate contact regions; and A high-density plasma (HDP) barrier coating is located on at least a portion of the one or more substrate contact areas.

2. The electrostatic chuck according to claim 1, wherein the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

3. The electrostatic chuck according to claim 1, wherein the HDP barrier coating has a thickness of 3 micrometers to 5 micrometers.

4. The electrostatic chuck according to claim 1, wherein the interpeak variation of the thickness of the HDP barrier coating is less than or equal to 10% of the average value of the thickness.

5. The electrostatic chuck according to claim 1, wherein the electrostatic chuck comprises aluminum nitride.

6. A method for operating a vapor deposition tool, the method comprising: The substrate is placed on an electrostatic chuck containing a high-density plasma (HDP) barrier coating; and HDP films were deposited on the substrate using high-density plasma chemical vapor deposition (HDP-CVD).

7. The method of claim 6, wherein depositing the HDP film on the substrate using HDP-CVD comprises: forming an oxide layer in a fully depleted silicon-on-insulator fabrication process.

8. The method of claim 6, wherein the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

9. The method of claim 6, wherein the HDP barrier coating has a thickness of 3 micrometers to 5 micrometers.

10. The method of claim 6, further comprising, after depositing an HDP oxide film on a plurality of substrates including the substrate, removing the pre-coating and the HDP barrier coating, and then applying a new pre-coating and a new HDP barrier coating on the electrostatic chuck.

11. The method of claim 10, wherein removing the pre-coating and the HDP barrier coating comprises: using fluoride plasma to remove the pre-coating and the HDP barrier coating.

12. The method of claim 6, further comprising applying the HDP barrier coating to the electrostatic chuck using the vapor deposition tool.

13. The method of claim 12, further comprising adjusting the process gas mixture prior to applying the HDP barrier coating.

14. A method for operating a high-density plasma (HDP) chemical vapor deposition (CVD) tool, the method comprising the following steps: An HDP barrier coating is applied to the electrostatic chuck.

15. The method of claim 14, further comprising, before applying the HDP barrier coating to the electrostatic chuck, covering the top surface of one or more substrate contact areas of the electrostatic chuck with a protective cap, applying a pre-coating to the surface of the processing chamber of the HDP-CVD tool, and then exposing the top surface of the one or more substrate contact areas of the electrostatic chuck.

16. The method of claim 15, further comprising adjusting the process gas mixture between applying the pre-coating to the electrostatic chuck and applying the HDP barrier coating to the electrostatic chuck.

17. The method of claim 14, wherein the HDP barrier coating comprises one or more of silicon oxide, fluorine-doped silicon oxide, silicon oxynitride, silicon oxycarbide, silicon oxycarbonitride, or silicon carbide.

18. The method of claim 14, wherein depositing the HDP barrier coating comprises: depositing an HDP barrier coating having a thickness of 3 micrometers to 5 micrometers.

19. The method of claim 14, further comprising removing the HDP blocking coating and then applying a new HDP blocking coating on the electrostatic chuck.

20. The method of claim 19, wherein removing the HDP barrier coating comprises: using fluoride plasma to remove the HDP barrier coating.