Power diode degradation test method

Abstract

The invention belongs to the technical field of electronic circuits, and discloses a power diode degradation test method. The method comprises the following steps: applying a heating current to enable a diode to be automatically heated to a target junction temperature, stopping heating, and cooling to an equivalent junction temperature not higher than 40 DEG C to form a thermal cycle; the IOL equipment automatically records cycle data, and collects VF for 3-4 times in each cycle; every 50 cycles, the device is taken down to be subjected to static parameter testing, and the testing environment temperature is 25 + / -5 DEG C; when IR < gt >; 2 * USL or VF gt; when 1.1 * USL, determining that the device is invalid; when the device reaches the failure criterion, the test is not stopped, circulation is continued until the device is completely damaged, the complete evolution process is recorded, and the data is identified as failure stage data; all data are stored in a CSV format and comprise timestamps, cycle times and stage identification information; and meanwhile, 20 brand new devices and 20 devices which are used for 500 hours are tested, strictly distinguished and recorded.

Description

Technical Field

[0001] This invention belongs to the field of electronic circuit technology, and specifically relates to a method for testing the degradation of power diodes. Background Technology

[0002] Power diodes play crucial roles in high-reliability applications such as aviation, aerospace, and rail transportation, performing functions including rectification, freewheeling, and protection. With increasing system complexity and the rise of extreme operating environments, traditional reliability assessment methods based on failure statistics are no longer sufficient, making lifetime prediction techniques based on degradation data a hot research topic.

[0003] Predictive Health Management (PHM) technology can analyze the current status of components, equipment, or systems based on degradation patterns and real-time monitoring data, issuing alerts before failures occur to remind users to repair or replace "sub-healthy" or failing components, thereby preventing failures. The foundation of PHM technology lies in its ability to monitor and record system status parameters in real time, based on a complete understanding of device degradation patterns, and to analyze and judge these parameters using known degradation models to provide timely alarm information.

[0004] In practical applications, power diodes are primarily subjected to a combination of thermal, electrical, and mechanical stresses. Among these, thermal cycling stress under intermittent operating mode is the main factor leading to diode degradation and failure. Thermal cycling causes thermal fatigue at the chip-package interface, resulting in failure modes such as bond wire detachment, solder layer cracking, and interface delamination. Ultimately, this manifests as degradation of electrical parameters, including increased forward voltage drop, increased reverse leakage current, and increased thermal resistance.

[0005] Developing accurate lifetime prediction models requires a large amount of real-world full-lifecycle degradation data. Because there are many types of power diodes, a degradation model for one type cannot be directly applied to different types. Furthermore, even power diodes of the same model can exhibit individual differences due to factors such as batch production materials and manufacturing process consistency. Therefore, large-scale degradation testing is necessary.

[0006] Currently, reliability testing and lifespan prediction studies for power diodes mainly focus on factory quality inspection and lifespan assessment, while research on full-lifecycle degradation testing of diodes under operating conditions, especially continued testing after failure until complete damage, is limited. Existing diode degradation testing methods have the following drawbacks: Disadvantage 1: Data missing throughout the failure process Existing testing methods typically test devices when they meet failure criteria (such as I). R >Specifications upper limit or V FThe experiment was stopped immediately after reaching 1.1 times the upper limit of the specifications, and only data from the normal state to the failure boundary was recorded, lacking evolution data from failure to complete damage. This resulted in: the inability to establish a complete failure physical model; poor extrapolation ability of the lifetime prediction model, with large prediction errors when approaching failure; inability to identify precursory features of catastrophic failure; and limited accuracy of residual lifetime prediction (RUL) algorithms based on degradation data.

[0007] Disadvantage 2: The experimental parameters lack scientific rigor. Existing methods typically employ fixed test parameters (temperature, current, etc.), failing to consider the following factors: differences in thermal properties between different device batches (K-coefficient may differ by 10%–20%); the accurate correlation between heating current and junction temperature; the influence of test current on device condition; and the impact of heating / cooling time on thermal fatigue accumulation. This results in test conditions that differ significantly from actual application conditions, making it difficult to accurately calculate the acceleration factor and leading to poor repeatability of test results.

[0008] Disadvantage 3: Disconnect between dynamic and static data Traditional methods completely separate dynamic testing (heating / cooling cycles) from static testing (parameter measurement), with dynamic process data not recorded and static testing only performed at fixed intervals. This leads to: failure to capture transient degradation characteristics; omission of sudden failure information (such as thermal breakdown); inaccurate junction temperature calculations; and inability to track the evolution of thermal resistance.

[0009] Disadvantage 4: Lack of verification of device history Existing testing methods only use brand-new devices and do not consider the impact of the device's historical usage on degradation patterns. This results in: the inability to verify the applicability of the testing methods to in-service devices; the inability to establish a correlation model between historical load and current state; and the limitation of the application value of the testing methods in practical maintenance decisions.

[0010] Disadvantage 5: The failure criteria and test termination standards are unclear. Existing methods lack a unified definition of failure criteria; some use V... F Some tests exceed 1.2 times the initial value, while others exceed the upper limit specified in the datasheet, lacking a unified standard. Moreover, the test termination conditions are often vague, such as "reaching the predetermined number of cycles or device failure," without considering the need to obtain post-failure evolution data. Summary of the Invention

[0011] Purpose of the invention: This invention, based on the application of PHM technology in the operation of power diodes, proposes a power diode degradation test method to achieve at least one of the following objectives: Objective 1: To obtain data on the entire failure process evolution. After the device reaches the failure criterion, the test is not stopped, but cyclical test is continued until the device is completely damaged. Complete failure evolution process data (including failure heating stage data, failure cooling stage data, and failure off-machine test stage data) are recorded to provide a data foundation for establishing a complete failure physical model and improving the accuracy of life prediction.

[0012] Objective 2: To establish a scientific procedure for setting experimental parameters. The accurate correlation between forward voltage drop and junction temperature was established through K-coefficient testing. The current required to bring the device to the target junction temperature (between 170℃ and 190℃) is determined by heating current, ensuring the scientific validity and repeatability of the test parameters.

[0013] Objective 3: To achieve collaborative acquisition of dynamic and static data During the dynamic cycle, key parameters (V) are collected at the end of heating and cooling of each cycle. F (Junction temperature, case temperature), the IOL device automatically records data for each cycle (3-4 data acquisitions per cycle). F Combined with periodic static testing (V testing every 50 cycles) F I R R th (Testing) to form a complete data chain that complements high-frequency dynamic data and low-frequency static data.

[0014] Objective 4: To introduce a comparative verification mechanism between new and old devices. Simultaneously, tests were conducted on 20 brand-new devices and 20 devices that had been used for 500 hours. The results were recorded and analyzed to verify the universality of the protocol for devices with different service histories, providing a basis for assessing the remaining lifespan of in-service devices.

[0015] Objective 5: To clarify failure criteria and test termination standards The failure criterion is clearly defined as: I R >2×USL (USL is the upper limit of the specification) or V F >1.1×USL; The test termination criteria are: after reaching the maximum number of cycles (expected 5000 cycles) or after all samples fail, continue the test until complete damage. At the same time, it is required that the proportion of test samples terminated during the test is not less than 50% to ensure sufficient failure data is obtained.

[0016] Objective 6: To provide cost-effective and efficient experimental methods. We selected relevant parameters that are easy to monitor and can characterize the degradation of diodes, and constructed an experimental system that can support the simultaneous degradation test of multiple diodes (40 in this experiment). This reduces the test cost and improves the test efficiency, providing a method for quickly obtaining full-lifecycle degradation data of diodes and constructing degradation models that are easy to embed into PHM controllers.

[0017] Technical solution A method for testing the degradation of power diodes, comprising the following steps: (1) Conduct a comprehensive initial test of the device and record the device model, environmental conditions, and initial electrical parameters; (2) Establish positive pressure drop V F With junction temperature T vj To obtain the accurate correspondence between the K and B values; (3) Determine the heating current IF required to bring the device to the target junction temperature, and determine the appropriate heating and cooling times; (4) Apply heating current to heat the diode to the target junction temperature, then stop heating and cool it to the equivalent junction temperature of no more than 40°C to form a thermal cycle; the IOL equipment automatically records the cycle data, and collects VF 3 to 4 times per cycle; (5) Every 50 cycles, the device is taken off the machine for static parameter testing. The test environment temperature is 25±5℃. (6)When I R >2×USL or V F When the value is greater than 1.1 × USL, the device is considered to have failed. (7) When the device reaches the failure criterion, the test is not stopped, but continues to cycle until it is completely damaged. The complete evolution process is recorded and the data is identified as failure stage data. (8) All data is stored in CSV format, including timestamps, number of cycles, and stage identifier information; (9) Simultaneously test 20 brand-new devices and 20 devices that have been used for 500 hours, strictly distinguish and record them.

[0018] Furthermore, in step (1), a comprehensive initial test was conducted on 20 brand-new devices and 20 devices that had been used for 500 hours, and the following information was recorded: 1) Basic device information: model, package type, device status: new device or old device; 2) Environmental conditions: Temperature 25±5℃, relative humidity recorded as actual value; 3) Initial electrical parameters were tested using static testing equipment; 4) Timestamp: Record the test time, accurate to the second; all initial test data are saved in CSV format, and the data identifier field is filled with "device initial test data" and included in the test file.

[0019] Furthermore, the initial electrical parameters include: Forward voltage drop V F0 : in I F = 120A, T a = Measured at 25±5℃; Reverse current IR0 : In V R = 800V, T a = Measured at 25±5℃; Thermal resistance R th0 Measured according to GB / T 4023-2015 method 7.2.2.2.

[0020] Furthermore, in step (2), the forward pressure drop V F With junction temperature T vj There is a linear relationship between them:

[0021] in: V F : In the test current I m The forward voltage drop (V) of the diode was measured below; T vj : Chip junction temperature (°C), which is equivalent to the stable chamber temperature during the K-coefficient test phase; K: Temperature coefficient (V / ℃), slope; B: Intercept (V); During the formal experiment, by monitoring V F The chip junction temperature is then calculated by reverse engineering based on the measured K and B values.

[0022] Multiple samples were taken for K-coefficient testing; Multiple temperature points are set to cover the expected operating temperature range, including: 25℃, 50℃, 75℃, 100℃, and 125℃; Testing process: For each temperature point, place the diode under test in the temperature chamber, set the chamber temperature to the target temperature, wait for the temperature to stabilize for at least 30 minutes, and then apply the specified test current I. m The test current I is not higher than 100mA. m The forward voltage drop V is set to one-thousandth of the device's rated current. After the parameters stabilize, an IOL device is used to measure the forward voltage drop V. F Record the temperature T and the corresponding V. F value; Based on the (T, V) at each temperature point F Take the data and perform linear fitting to obtain the K and B values. Check the correlation coefficient R², which should be ≥ 0.99; otherwise, retest.

[0023] Furthermore, in step (3), the testing process is as follows: Based on the device specifications, set the target maximum junction temperature T. vjmax The temperature requirement is between 170℃ and 190℃; Estimate the initial heating current I based on the device's rated current and expected power loss. F ; Apply initial heating current I F Continuous heating, with periodic brief switches to the test current I during the heating process. m , measuring V F Calculate the junction temperature based on the K coefficient, observe the junction temperature change curve, determine whether it has reached a stable state, and record the highest junction temperature T after stabilization. vjmax ; If T vjmax <170℃, increase heating current I F ; If T vjmax >190℃, reduce heating current I F ; Repeat the test until you find the one that makes T vjmax I that is stable between 170℃ and 190℃ F value; Record the time from the start of heating to the junction temperature reaching the target value, which must not exceed 6 minutes; After the device is heated to the target junction temperature, heating is stopped. The device is then cooled by natural convection and forced air cooling. A test current I is applied at regular intervals. m Measure V F Calculate the junction temperature and record the time required for the junction temperature to drop to no higher than 40°C, with the cooling time required to be no more than 8 minutes; If the cooling time is too long, adjust the fan speed or improve the heat dissipation conditions; record the final determined heating current IF, heating time, and cooling time parameters for use in subsequent cycle tests.

[0024] Furthermore, in step (4), the single-loop process is as follows: 1) During the heating phase, the duration shall not exceed 6 minutes: IOL device outputs heating current I F The diode chip self-heats, and as the temperature rises, the IOL device automatically collects V during the heating process. F Data is collected 3-4 times per cycle; Acquisition method: Briefly switch to test current I m 1 second, measure V F Calculate the junction temperature T based on the K coefficient. vj Then continue heating; 2) Data recording at the end of heating: After heating for the specified time: remove the heating current I. F Calculate the highest junction temperature T vjmax Record V at this time F and T vjmax Simultaneously, the shell temperature data is recorded; 3) Cooling phase, lasting no more than 8 minutes: With the heating current off, the device cools down gradually through natural convection and forced air cooling. 4) Cooling end data recording: Before starting the next cycle: Apply test current I m , measuring V F Calculate the minimum junction temperature T vjmin T is required vjmin Record V at a temperature not exceeding 40℃. F and T vjmin Simultaneously, the shell temperature data is recorded; 5) Cycle counting: After completing one heating-cooling process, the number of cycles is N plus 1.

[0025] Furthermore, in step (6), when I R >2×USL or V F When the value is greater than 1.1×USL, the device is considered to have failed. USL is the upper limit of the datasheet corresponding to the relevant parameter.

[0026] Furthermore, in step (7), after the device fails, the heating-cooling cycle test is continued as in step (4), and the data for each cycle is automatically recorded. The data label is changed to "failure heating stage data" / "failure cooling stage data". Static testing has been adjusted to run once every 20 cycles.

[0027] Furthermore, in step (7), the test termination conditions are as follows: Normal termination conditions: The predetermined maximum number of cycles has been reached, and all test samples have been completely destroyed; Test sample termination ratio requirement: The termination ratio of the test sample shall not be less than 50% during the test, and at least 50% of the devices shall fail and continue the test until they are completely damaged; Abnormal termination conditions: The IOL test equipment or static test equipment malfunctions and cannot continue, or the device poses a safety risk.

[0028] Furthermore, in step (4), the cyclic test circuit includes: Series-connected power diodes; The IOL devices are connected to the two ends of the power diodes connected in series; The test current Im is connected in parallel with the IOL device; Each power diode is connected in parallel with a voltage acquisition unit to collect the forward voltage drop VF of each power diode.

[0029] In summary, the beneficial effects of the present invention are as follows: (1) Advantages of data integrity Acquire full lifecycle data of the device from normal operation to failure and then to complete damage, including evolution data of the failure heating stage, failure cooling stage, and failure off-machine testing stage.

[0030] (2) Advantages of scientific parameter settings The K-coefficient test establishes an accurate correspondence between VF and Tvj, and the heating current is used to determine the current required to reach the target junction temperature. This ensures that the test conditions are repeatable, the test results of different batches of devices can be compared, and the acceleration factor is accurately calculated, closely matching the actual application conditions.

[0031] (3) Data quality advantages High-frequency dynamic data captures transient degradation characteristics, while low-frequency static data provides accurate electrical parameters, ensuring no sudden failure information is missed and allowing for the tracking of thermal resistance evolution patterns.

[0032] (4) Advantages of universality verification Simultaneously, 20 new devices and 20 old devices were tested. The applicability of the record verification protocol to devices with different service histories was strictly distinguished. A correlation model between historical load and current status was established to provide a basis for the assessment of the remaining life of in-service devices and improve the generalization ability of the life prediction model. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. The drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a circuit diagram for a diode degradation test; Figure 2 This is the circuit diagram for the reverse current I_R test; Figure 3 It is a forward voltage Test circuit diagram; Figure 4 This is a circuit diagram for testing the static thermal resistance of a diode. Figure 5 This is a diagram illustrating the aging process. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] The features and illustrative embodiments of various aspects of the present invention will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention. The invention is by no means limited to any specific setups and methods set forth below, but covers any improvements, substitutions, and modifications to structures, methods, and devices without departing from the spirit of the invention. Well-known structures and techniques are not shown in the drawings and the following description to avoid unnecessarily obscuring the invention.

[0037] In the description of this invention, it should be noted that the directions or positional relationships indicated by terms such as "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer" are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing and simplifying the invention, and should not be construed as limiting the invention. Furthermore, the use of ordinal numbers (e.g., "first and second," etc.) is for distinguishing objects and is not limited to this order, and should not be construed as indicating or implying relative importance.

[0038] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly, encompassing both direct connection and indirect connection via an intermediate medium. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0039] It should be noted that, unless otherwise specified, the embodiments of the present invention and the features thereof can be combined with each other, and the various embodiments can be referenced and cited in each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0040] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0041] This invention provides a power diode degradation test protocol that uses the IOL (Intermittent Operation Life) test method to collect degradation data of the device throughout its entire life cycle, from normal operation to failure and then to complete damage.

[0042] The core technical solutions of this agreement include: (1) Pre-test preparation stage: Conduct a comprehensive initial test of the device and record complete information such as device model, environmental conditions, and initial electrical parameters.

[0043] (2) K coefficient testing stage: Establishing the positive pressure drop V F With junction temperature T vj To obtain the accurate correspondence between the K and B values, we can determine the K and B values.

[0044] (3) Parameter estimation stage: Determine the heating current IF required to bring the device to the target junction temperature (between 170℃ and 190℃), and determine the appropriate heating time (not exceeding 6 minutes) and cooling time (not exceeding 8 minutes).

[0045] (4) Cyclic test phase: Apply heating current to heat the diode to the target junction temperature, then stop heating and cool it to an equivalent junction temperature not higher than 40°C to form a thermal cycle. The IOL equipment automatically records the data for each cycle (3~4 VF samples are collected per cycle).

[0046] (5) Periodic static testing: Every 50 cycles, the device is taken off the machine for static parameter testing (V). F I R R th The test environment temperature was 25±5℃.

[0047] (6) Failure determination: When I R >2×USL or V F When the value is greater than 1.1×USL, the device is considered to have failed.

[0048] (7) Continue testing after failure: When the device reaches the failure criterion, the test is not stopped, but continues to cycle until it is completely damaged. The complete evolution process is recorded and the data is identified as failure stage data.

[0049] (8) Data standardization records: All data is stored in CSV format, including timestamps, number of cycles, stage identifiers and other information.

[0050] (9) Comparison of new and old devices: At the same time, test 20 brand new devices and 20 devices that have been used for 500 hours, strictly distinguish and record them.

[0051] Test apparatus and circuit connection Experimental apparatus composition The power diode degradation test apparatus consists of the following parts: the diode under test, IOL test equipment, and static test equipment.

[0052] Circuit connection scheme 1. Diode degradation test circuit like Figure 1 As shown, the diode degradation test circuit includes two current outputs. Multiple diodes under test can be connected in series in the current loop, and each diode is connected to a separate voltage acquisition line to independently acquire the forward voltage drop VF of each device.

[0053] Circuit working principle: Heating stage: The IOL device outputs a heating current IF, which flows through the series-connected diodes, generating power loss to heat the chip itself. Due to the series connection, all devices flow with the same current, achieving synchronous heating.

[0054] Testing phase: During and at the end of the heating process, the IOL device automatically switches to the test current Im (not higher than 100mA). At this time, the forward voltage drop VF of each device is measured, and the junction temperature is calculated based on the K coefficient.

[0055] Cooling phase: Stop outputting heating current and allow the device to cool naturally. Before cooling is complete, apply test current Im again to measure VF and calculate the minimum junction temperature.

[0056] Independent data acquisition: Although multiple devices are connected in series, the forward voltage drop VF of each device is acquired independently to ensure data accuracy.

[0057] 2. Static test circuit The static test includes three circuits, used to test the reverse current IR, forward voltage drop VF, and thermal resistance Rth, respectively: (1) Reverse current measurement circuit like Figure 2 As shown, the circuit is connected according to the national standard GB / T 4023-2015: the voltage source outputs a reverse voltage V. R =V ROE = V RRM = 800V (maximum reverse withstand voltage), ambient temperature T a = 25±5℃, microammeter measures reverse current I R Indicator value: I R <100μA (normal), failure criterion: I R >2×USL.

[0058] (2) Forward voltage drop test circuit like Figure 3 As shown, the circuit is connected according to the national standard GB / T 4023-2015: the current source outputs a positive current I.F =120A, ambient temperature T a = 25±5℃, millivoltmeter measures forward voltage drop V F Indicator value: V F <1.6V (ZX1974H specification), Failure criterion: V F >1.1×USL.

[0059] (3) Thermal resistance test circuit like Figure 4 As shown, the circuit is connected according to method 7.2.2.2 of the national standard GB / T 4023-2015: a known power is applied to heat the chip, and the junction temperature T is measured. vj (via V) F Calculate the thermal resistance R based on the estimated temperature and shell temperature. th = (T vj - Casing temperature) / Power, Specification: R th <1.1℃ / W.

[0060] Example A method for testing the degradation of power diodes, the specific process of which is as follows: Step 1: Comprehensive Initial Testing of Devices Before the test began, a comprehensive initial test was conducted on all 40 devices under test (including 20 brand-new devices and 20 devices that had been used for 500 hours), and the following information was recorded: (1) Basic device information: Model: ZX1974H, Package: TO247, Device status: New device (0 hours) or old device (500 hours of use).

[0061] (2) Environmental conditions: Temperature 25±5℃, relative humidity recorded as actual value. (3) Initial electrical parameters (using static test equipment): according to Figure 2 , Figure 3 , Figure 4 The circuit shown was tested: Forward pressure drop VF0: Measured under the conditions of IF = 120A and Ta = 25±5℃. Reverse current IR0: Measured under the conditions of VR = 800V and Ta = 25±5℃. Thermal resistance Rth0: Measured according to GB / T 4023-2015 method 7.2.2.2. (4) Timestamp: Records the test time, accurate to the second.

[0062] All initial test data are saved in CSV format, with the data identifier field filled in as "device initial test data" and included in the test file.

[0063] Step 2: K-coefficient test The K coefficient is used to establish a linear relationship between the forward voltage drop VF and the junction temperature Tvj, and is the basis for accurately calculating the junction temperature.

[0064] Test principle: There is a linear relationship between the forward voltage drop VF and the junction temperature Tvj:

[0065] in: VF: Diode forward voltage drop (V) measured at test current Im. Tvj: Chip junction temperature (°C), equivalent to the stable chamber temperature during the K-coefficient testing phase. K: Temperature coefficient (V / ℃), slope B: Intercept (V) During the formal experiment, the chip junction temperature was calculated by monitoring VF and inversely based on the measured K and B values.

[0066] Test steps: Sample selection: Take multiple samples (3 to 5 representative samples are recommended) for K coefficient testing.

[0067] Temperature point settings: Set multiple temperature points (at least 5 points are recommended) to cover the expected operating temperature range. For example: 25℃, 50℃, 75℃, 100℃, 125℃.

[0068] Testing process: For each temperature point, place the diode under test in the temperature chamber, set the temperature chamber temperature to the target temperature (e.g., 25°C), wait for the temperature to stabilize (at least 30 minutes is recommended), apply the specified test current Im (not higher than 100mA, the default is one-thousandth of the device's rated current), and after the parameters stabilize, use an IOL device to measure the forward voltage drop VF, and record the temperature T and the corresponding VF value.

[0069] Data processing: Based on the (T, VF) data at each temperature point, perform linear fitting to obtain the K and B values. Check the correlation coefficient R², which should be ≥ 0.99; otherwise, repeat the test.

[0070] Step 3: Determine the heating current Objective: To determine the heating current IF required to bring the device to the target junction temperature (between the maximum rated equivalent junction temperature Tjmax 190℃ and (Tjmax-20℃) 170℃), and to determine the appropriate heating and cooling times.

[0071] Test steps: (1) Target junction temperature setting: Based on the device specifications, the target maximum junction temperature Tvjmax is set between 170℃ and 190℃. This solution targets 185℃.

[0072] (2) Initial current estimation: Estimate the initial heating current IF based on the device's rated current and expected power loss. For example, for a device with a rated current of 120A, you can start by trying 30A to 50A.

[0073] (3) Heating test: Apply an initial heating current IF and continue heating. During the heating process, periodically (e.g., every 1 minute) briefly switch to the test current Im, measure VF, calculate the junction temperature based on the K coefficient, observe the junction temperature change curve, determine whether it has reached stability (change <3℃ in 3 consecutive measurements), and record the highest junction temperature Tvjmax after stabilization.

[0074] (4) Current adjustment: If Tvjmax < 170℃, increase the heating current IF (e.g., increase by 5A). If Tvjmax > 190℃, reduce the heating current IF (e.g., reduce it by 5A). Repeat the test until an IF value is found that makes Tvjmax stable between 170℃ and 190℃.

[0075] (5) Confirm heating time: Record the time from the start of heating to the point where the junction temperature reaches the target value; this time should not exceed 6 minutes. If the heating time is too long, the heating current needs to be increased.

[0076] (6) Cooling time test: After the device is heated to the target junction temperature, heating is stopped (heating current is turned off). The device is cooled by natural convection and forced air cooling. At regular intervals (e.g., every 30 seconds), a test current Im is applied to measure VF and the junction temperature is calculated. The time required for the junction temperature to drop to no higher than 40℃ (Ta + 10℃, Ta = 25±5℃) is recorded. The cooling time should not exceed 8 minutes. (7) Parameter optimization: If the cooling time is too long, adjust the fan speed or improve heat dissipation. Record the final determined parameters such as heating current IF, heating time, and cooling time for use in subsequent cycle tests.

[0077] Step 4: Intermittent Work Cycle Test (IOL Test) Single loop process: (1) Heating stage (duration not exceeding 6 minutes): The IOL device outputs a heating current IF (determined based on preliminary results). The diode chip self-heats, and the temperature rises. The IOL device automatically collects VF data during the heating process (3-4 times per cycle). Acquisition method: Briefly switch to the test current Im (about 1 second), measure VF, calculate the junction temperature Tvj based on the K coefficient, and then continue heating.

[0078] (2) Data recording at the end of heating: After heating for the specified time: remove the heating current IF (the switch is turned on, the equipment automatically measures the voltage across the diode (Im test), calculates the maximum junction temperature Tvjmax, records VF and Tvjmax at this time, and simultaneously records the case temperature data (if a case temperature sensor is available). (3) Cooling phase (duration not exceeding 8 minutes): With the heating current off, the device cools down gradually through natural convection and forced air cooling. (4) Cooling end data recording: Just before starting the next cycle (after cooling for about 8 minutes): Apply the test current Im, measure VF, calculate the minimum junction temperature Tvjmin, which should not exceed 40℃ (Ta + 10℃), record VF and Tvjmin, and simultaneously record the case temperature data. (5) Cyclic counting: After completing one heating-cooling process, the number of cycles is N plus 1.

[0079] Step 5: Regular static testing Triggering condition: When the number of loops N is a multiple of 50 (N = 50, 100, 150, …, until the end of the experiment).

[0080] Test steps: (1) Device removal: After completing the 50th, 100th, 150th... cooling cycles, the device is removed from the IOL test setup.

[0081] (2) Stable environment: Place the device in an environment with an ambient temperature of Ta = 25±5℃ and humidity ≤70% for at least 30 minutes to stabilize it and ensure uniform device temperature.

[0082] (3) Static testing: Using static testing equipment, perform the following tests according to the requirements in Table 2:

[0083] Step 6: Failure Determination After each periodic static test, check whether the device meets the failure criteria. After each offline static test, compare the measured IR and VF with the failure criteria. If any failure criterion is met, the device is considered to have failed.

[0084] Step 7: Continue testing until complete damage occurs after failure. Unlike traditional methods, this invention requires that the test not be stopped after the device reaches the failure criterion, but to continue the cycle until the device is completely damaged. All data from the device from failure to damage should be recorded in accordance with the requirements of Tables 3 and 4, and the relevant data should be distinguished.

[0085] Table 3 Diode Dynamic Test Parameters

[0086] Table 4. Test parameters for diode static testing.

[0087] Failure stage data identifier: This section of data serves as the data for the failure phase of the test, including: failure heating phase data, failure cooling phase data, and failure off-machine test phase data.

[0088] Continue the experimental procedure: Once the device meets the failure criteria, it is reinstalled into the IOL test apparatus. The heating-cooling cycle test is then performed following the procedure in step 4. The IOL equipment continues to automatically record data for each cycle, but the data label is changed to "Failure Heating Phase Data" / "Failure Cooling Phase Data".

[0089] The interval for periodic static testing can be adjusted as appropriate. Original plan: Perform once every 50 cycles After failure: the interval can be shortened to once every 20 cycles for more intensive monitoring of the failure evolution process; the data is labeled as "failure shutdown test phase data". Step 8: Trial Termination Conditions Normal termination conditions: The predetermined maximum number of cycles (estimated at 5000) has been reached, and all test samples have been completely destroyed. Test sample termination ratio requirement: The test implementer must ensure that the test sample termination ratio is not less than 50% during the test. That is, at least 50% of the devices must reach failure and continue the test until complete damage, in order to ensure that sufficient data on the entire failure process are obtained.

[0090] Abnormal termination conditions: The IOL testing equipment or static testing equipment malfunctions and cannot continue; the device poses a safety risk (such as smoke, fire, or explosion hazard); the test plan has a major defect that requires correction; or all three parties agree to terminate the test. Test parameter adjustment: If the device does not show obvious degradation trend during the cycle test, the test parameters can be adjusted appropriately according to the specific test conditions (such as increasing the heating current, increasing the target junction temperature, etc.), and the adjusted parameter values ​​should be clearly recorded.

[0091] 4.4 Data Acquisition and Recording Standards 4.4.1 Data File Format The CSV file format is used uniformly to facilitate subsequent data analysis and machine learning model training.

[0092] 4.4.2 Dynamic Test Data Table According to Table 3, the IOL device automatically records data for each cycle, collecting V data 3-4 times per cycle. F .

[0093] 4.4.3 Static Test Data Table According to Table 4, a static test is performed every 50 cycles.

[0094] 4.4.4 Stage Identification Explanation To facilitate subsequent data analysis, all data must be clearly labeled with stage identifiers:

[0095] 4.5 Test Environment Requirements (1) Ambient temperature: IOL cycle test: No limit (natural heat dissipation), Static test: 25±5℃ (2) Relative humidity: ≤70% (3) Atmospheric pressure: 86 kPa~106 kPa (4) Power supply requirements: Voltage: 220V±10%, Frequency: 50Hz±2Hz - Good grounding (5) Ventilation requirements: Good ventilation to ensure heat dissipation of components. (6) Safety requirements: Fire extinguishers shall be provided, over-temperature protection and over-current protection shall be provided, and unauthorized personnel shall be prohibited from entering the test area. 1. This invention uses a forward high current IF to self-heat the diode to the target junction temperature, which can be replaced by external heating chamber, resistance heating plate, laser or infrared heating. 2. This invention utilizes the K coefficient and V... F Junction temperature calculation can be replaced by infrared thermal imager temperature measurement, thermocouple temperature measurement, or junction temperature calculation using the thermal resistance method. 3. This invention, using 20 new components plus 20 components that have been used for 500 hours, can replace components using only brand new components, components aged through multiple stages, or components using only old components. 4. The model number of this invention, ZX1974H, can be replaced by BZX84-C8V2, MMBZ5237B, etc. Comparison with existing technologies

[0096] This invention has the following characteristics: 1. After failure, continue testing until complete damage to obtain the complete physical evolution process of failure, identify the precursor characteristics of catastrophic failure, improve the extrapolation capability of the lifetime prediction model, and increase the accuracy of the RUL algorithm to over 85%. 2. A K-coefficient-based method for accurate junction temperature measurement eliminates the need for additional temperature sensors, reducing costs. It directly measures the chip junction temperature, rather than the case temperature or ambient temperature, enabling real-time calculation, fast response, and high accuracy (±2℃). 3. The method for determining the heating current and setting the target junction temperature is scientific and repeatable, the acceleration factor is accurately calculated, and the test results of different batches of devices can be compared, closely resembling actual application conditions. 4. A collaborative acquisition mechanism for dynamic and static data: high-frequency dynamic data captures transient degradation characteristics, while low-frequency static data provides accurate electrical parameters, ensuring no sudden failures are missed and allowing for the tracking of thermal resistance evolution. 5. A comparison and verification mechanism between new and old devices is established to verify the applicability of the protocol to devices with different service histories, and to establish a correlation model between historical load and current status, providing a basis for the assessment of the remaining life of in-service devices and improving the generalization ability of the life prediction model.

Claims

1. A method for testing the degradation of a power diode, characterized in that: The steps are as follows: (1) Conduct a comprehensive initial test of the device and record the device model, environmental conditions, and initial electrical parameters; (2) Establish positive pressure drop V F With junction temperature T vj To obtain the accurate correspondence between the K and B values; (3) Determine the heating current IF required to bring the device to the target junction temperature, and determine the appropriate heating and cooling times; (4) Apply heating current to heat the diode to the target junction temperature, then stop heating and cool it to the equivalent junction temperature of no more than 40°C to form a thermal cycle; the IOL equipment automatically records the cycle data and collects VF 3 to 4 times per cycle; (5) Every 50 cycles, the device is taken off the machine for static parameter testing. The test environment temperature is 25±5℃. (6)When I R > 2×USL or V F When the value exceeds 1.1 × USL, the device is considered to have failed. (7) When the device reaches the failure criterion, the test is not stopped, but continues to cycle until it is completely damaged. The complete evolution process is recorded and the data is identified as failure stage data. (8) All data is stored in CSV format, including timestamps, number of cycles, and stage identifier information; (9) Simultaneously test 20 brand-new devices and 20 devices that have been used for 500 hours, strictly distinguish and record them.

2. The method according to claim 1, characterized in that: In step (1), a comprehensive initial test was performed on 20 brand-new devices and 20 devices that had been used for 500 hours, and the following information was recorded: 1) Basic device information: model, package type, device status: new device or old device; 2) Environmental conditions: Temperature 25±5℃, relative humidity recorded as actual value; 3) Initial electrical parameters were tested using static testing equipment; 4) Timestamp: Record the test time, accurate to the second; all initial test data are saved in CSV format, and the data identifier field is filled with "device initial test data" and included in the test file.

3. The method according to claim 2, characterized in that: Initial electrical parameters include: Forward voltage drop V F0 : in I F = 120A, T a = Measured at 25±5℃; Reverse current I R0 : In V R = 800V, T a = Measured at 25±5℃; Thermal resistance R th0 Measured according to GB / T 4023-2015 method 7.2.2.

2.

4. The method according to claim 3, characterized in that: In step (2), the forward pressure drop V F With junction temperature T vj There is a linear relationship between them: in: V F : In the test current I m The forward voltage drop of the diode measured below; T vj The chip junction temperature, during the K-coefficient testing phase, is equivalent to the stable chamber temperature. K: Temperature coefficient; B: Intercept; During the formal experiment, by monitoring V F The chip junction temperature is then calculated by reverse engineering based on the measured K and B values. Multiple samples were taken for K-coefficient testing; Multiple temperature points are set to cover the expected operating temperature range, including: 25℃, 50℃, 75℃, 100℃, and 125℃; Testing process: For each temperature point, place the diode under test in the temperature chamber, set the chamber temperature to the target temperature, wait for the temperature to stabilize for at least 30 minutes, and then apply the specified test current I. m The test current I is not higher than 100mA. m The forward voltage drop V is set to one-thousandth of the device's rated current. After the parameters stabilize, an IOL device is used to measure the forward voltage drop V. F Record the temperature T and the corresponding V. F value; Based on the (T, V) at each temperature point F Take the data and perform linear fitting to obtain the K and B values; check the fitting correlation coefficient R², which should be ≥ 0.99, otherwise retest.

5. The method according to claim 4, characterized in that: In step (3), the testing process is as follows: Based on the device specifications, set the target maximum junction temperature T. vjmax The temperature requirement is between 170℃ and 190℃; Estimate the initial heating current I based on the device's rated current and expected power loss. F ; Apply initial heating current I F Continuous heating, with periodic brief switches to the test current I during the heating process. m , measuring V F Calculate the junction temperature based on the K coefficient, observe the junction temperature change curve, determine whether it has reached a stable state, and record the highest junction temperature T after stabilization. vjmax ; If T vjmax <170℃, increase heating current I F ; If T vjmax >190℃, reduce heating current I F ; Repeat the test until you find the one that makes T vjmax I that is stable between 170℃ and 190℃ F value; Record the time from the start of heating to the junction temperature reaching the target value, which must not exceed 6 minutes; After the device is heated to the target junction temperature, heating is stopped. The device is then cooled by natural convection and forced air cooling. A test current I is applied at regular intervals. m Measure V F Calculate the junction temperature and record the time required for the junction temperature to drop to no higher than 40°C, with the cooling time required to be no more than 8 minutes; If the cooling time is too long, adjust the fan speed or improve the heat dissipation conditions; record the final determined heating current IF, heating time, and cooling time parameters for use in subsequent cycle tests.

6. The method according to claim 5, characterized in that: In step (4), the single-loop process is as follows: 1) During the heating phase, the duration shall not exceed 6 minutes: IOL device outputs heating current I F The diode chip self-heats, and as the temperature rises, the IOL device automatically collects V during the heating process. F Data is collected 3-4 times per cycle; Acquisition method: Briefly switch to test current I m 1 second, measure V F Calculate the junction temperature T based on the K coefficient. vj Then continue heating; 2) Data recording at the end of heating: After heating for the specified time: remove the heating current I. F Calculate the highest junction temperature T vjmax Record V at this time F and T vjmax Simultaneously, the shell temperature data is recorded; 3) Cooling phase, lasting no more than 8 minutes: With the heating current off, the device cools down gradually through natural convection and forced air cooling. 4) Cooling end data recording: Before starting the next cycle: Apply test current I m , measuring V F Calculate the minimum junction temperature T vjmin T is required vjmin Record V at a temperature not exceeding 40℃. F and T vjmin Simultaneously, the shell temperature data is recorded; 5) Cycle counting: Once one heating-cooling process is completed, the number of cycles is N plus 1.

7. The method according to claim 6, characterized in that: In step (6), when I R > 2×USL or V F When the value is greater than 1.1×USL, the device is considered to have failed. USL is the upper limit of the datasheet corresponding to the relevant parameter.

8. The method according to claim 7, characterized in that: In step (7), after the device fails, the heating-cooling cycle test is continued as in step (4), and the data for each cycle is automatically recorded. The data label is changed to "failure heating stage data" / "failure cooling stage data"; Static testing has been adjusted to run once every 20 cycles.

9. The method according to claim 8, characterized in that: In step (7), the test termination conditions are as follows: Normal termination conditions: The predetermined maximum number of cycles has been reached, and all test samples have been completely destroyed; Test sample termination ratio requirement: The termination ratio of the test sample shall not be less than 50% during the test, and at least 50% of the devices shall fail and continue the test until they are completely damaged; Abnormal termination conditions: The IOL test equipment or static test equipment malfunctions and cannot continue, or the device poses a safety risk.

10. The method according to claim 9, characterized in that: In step (4), the cyclic test circuit includes: Series-connected power diodes; The IOL devices are connected to the two ends of the power diodes connected in series; The test current Im is connected in parallel with the IOL device; Each power diode is connected in parallel with a voltage acquisition unit to collect the forward voltage drop VF of each power diode.

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