Two-dimensional electron gas charge density control

Abstract

The invention relates to two-dimensional electron gas charge density control. Structures and related techniques for controlling two-dimensional electron gas (2DEG) charge density in gallium nitride (GaN) devices are disclosed. In one aspect, a GaN device includes a compound semiconductor substrate, a source region formed in the compound semiconductor substrate, a drain region formed in the compound semiconductor substrate and separated from the source region, a 2DEG layer formed in the compound semiconductor substrate and extending between the source region and the drain region, a gate region formed on the compound semiconductor substrate and positioned between the source region and the drain region, and a plurality of isolated charge control structures disposed between the gate region and the drain region.

Description

[0001] This application is a divisional application of the invention patent application with application number 202210706855.0, application date June 21, 2022, entitled "Two-dimensional electron gas charge density control". Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 213,655, filed June 22, 2021, entitled “Two-Dimensional Electron Gas Charge Density Control,” the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0003] The described embodiments generally relate to compound semiconductor devices, and more specifically, embodiments of the present invention relate to two-dimensional electron gas charge density control in gallium nitride (GaN) devices. Background Technology

[0004] In semiconductor technology, gallium nitride (GaN) is a compound semiconductor material used to form various devices, such as high-power and / or high-voltage transistors. These devices can be formed by growing epitaxial layers on silicon, silicon carbide, sapphire, gallium nitride, or other substrates. Often, these devices are formed using heteroepitaxial junctions of aluminum gallium nitride (AlGaN) and GaN. This structure is known to form a two-dimensional electron gas (2DEG) with high electron mobility at the interface of the two materials. The electron gas can have a charge density in the 2DEG. In many applications, it may be necessary to control the charge density in the 2DEG. Summary of the Invention

[0005] In some embodiments, a gallium nitride (GaN) device is disclosed. The GaN device includes a compound semiconductor substrate, a source region formed in the compound semiconductor substrate, a drain region formed in the compound semiconductor substrate and separated from the source region, a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate and extending between the source region and the drain region, a gate region formed on the compound semiconductor substrate and positioned between the source region and the drain region, and a plurality of isolated charge control structures disposed between the gate region and the drain region.

[0006] In some embodiments, each of the plurality of isolated charge control structures is arranged to selectively reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures.

[0007] In some embodiments, each of the plurality of isolated charge control structures is disposed on the compound semiconductor substrate.

[0008] In some embodiments, each of the plurality of isolated charge control structures comprises a GaN layer.

[0009] In some embodiments, the GaN layer comprises a P-type GaN layer.

[0010] In some embodiments, each of the plurality of isolated charge control structures is disposed within the compound semiconductor substrate.

[0011] In some embodiments, each of the plurality of isolated charge control structures includes an isolated injection region.

[0012] In some embodiments, each of the plurality of isolated charge control structures includes an isolation injection region formed through a p-type GaN layer.

[0013] In some embodiments, each of the plurality of isolated charge control structures is formed in the shape of an island.

[0014] In some embodiments, the plurality of isolated charge control structures are disposed near the gate region.

[0015] In some embodiments, the plurality of isolated charge control structures are arranged to reduce the electric field near the gate region.

[0016] In some embodiments, the pattern density of the plurality of isolated charge control structures is constant in the region near the gate region and the region near the drain region.

[0017] In some embodiments, each of the plurality of isolated charge control structures is formed in a trapezoidal shape extending from the gate region toward the drain region.

[0018] In some embodiments, each of the plurality of isolated charge control structures is formed in an elliptical shape extending from the gate region toward the drain region.

[0019] In some embodiments, a method for controlling the charge density in a two-dimensional electron gas (2DEG) layer in a gallium nitride (GaN) device is disclosed. The method includes: providing a compound semiconductor substrate comprising a first layer and a second layer, the compound semiconductor substrate further comprising a 2DEG layer formed between the first layer and the second layer; forming an active region; forming a gate region on the compound semiconductor substrate and across the active region; and forming a plurality of isolated charge control structures on the active region, wherein each of the plurality of isolated charge control structures is arranged to selectively reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures.

[0020] In some embodiments, in the disclosed method, each of the plurality of isolated charge control structures comprises a p-type GaN layer.

[0021] In some embodiments, in the disclosed method, each of the plurality of isolated charge control structures includes an isolated injection region.

[0022] In some embodiments, a gallium nitride (GaN) device is disclosed. The GaN device includes: a compound semiconductor substrate; a two-dimensional electron gas (2DEG) layer formed in the compound semiconductor substrate; a resistor formed in the compound semiconductor substrate, the resistor including an active region and first and second ohmic contacts; and a plurality of isolated charge control structures formed on at least a portion of the active region, wherein each of the plurality of isolated charge control structures is arranged to reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures, thereby increasing the resistance of the resistor.

[0023] In some embodiments, each of the plurality of isolated charge control structures of the resistor comprises a P-type GaN layer.

[0024] In some embodiments, the spacing between each adjacent charge control structure of the resistor is less than the minimum manufacturing width of the active region. Attached Figure Description

[0025] Figure 1A A 3D side view of a GaN device using a P-type GaN structure to control 2DEG charge density according to an embodiment of the present disclosure is shown. Figure 1B Embodiments according to this disclosure are shown Figure 1A Cross-sectional view of a GaN device; Figure 2A A side 3D view of an embodiment of a GaN device patterned using isolation injection according to an embodiment of the present disclosure is shown; Figure 2B Embodiments according to this disclosure are shown Figure 2A Cross-sectional view of a GaN device; Figure 3A A side 3D view showing an embodiment of a GaN device using an isolation injection through a P-type GaN structure according to an embodiment of the present disclosure; Figure 3B Embodiments according to this disclosure are shown Figure 3A Cross-sectional view of a GaN device; Figure 4A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 4B Showing Figure 4A The 2DEG charge density varies depending on its position within the GaN device; Figure 5A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 5B Showing Figure 5A The 2DEG charge density varies depending on its position within the GaN device; Figure 6A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 6B Showing Figure 6A The 2DEG charge density varies depending on its position within the GaN device; Figure 7A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 7B Showing Figure 7A The 2DEG charge density varies depending on its position within the GaN device; Figure 8A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 8B Showing Figure 8A The 2DEG charge density varies depending on its position within the GaN device; Figure 9A A plan view of a GaN device according to an embodiment of the present disclosure is shown; Figure 9B Showing Figure 9A The 2DEG charge density varies depending on its position within the GaN device; Figure 10A Showing the use of similar Figure 5A Various experimental test structures for charge control structures; Figure 10B Show Figure 10A The CV test results of the test structure; Figure 11ACross-sectional and plan views of GaN transistors according to embodiments of the present disclosure are shown; Figure 11B Show along Figure 11A The 2DEG charge density and electric field vary depending on the location of the active region of the GaN transistor; Figure 12A Cross-sectional and plan views of GaN transistors according to embodiments of the present disclosure are shown; Figure 12B Show along Figure 12A The 2DEG charge density and electric field vary depending on the location of the active region of the GaN transistor; Figure 13A Cross-sectional and plan views of GaN transistors according to embodiments of the present disclosure are shown; Figure 13B Show along Figure 13A The 2DEG charge density and electric field vary depending on the location of the active region of the GaN transistor; Figure 14 A plan view of a GaN resistor according to an embodiment of the present disclosure is shown; Figure 15 A plan view of a GaN resistor according to an embodiment of the present disclosure is shown; and Figure 16 A plan view of a GaN resistor according to an embodiment of the present disclosure is shown; Figure 17 A cross-sectional view of a GaN device having a P-type GaN island and an additional AlGaN layer according to an embodiment of the present disclosure is shown. Figure 18 A cross-sectional view of a GaN device with patterned isolation injection and an additional AlGaN layer according to an embodiment of the present disclosure is shown; and Figure 19 A cross-sectional view of a GaN device having P-type GaN islands and patterned injection and an additional AlGaN layer according to an embodiment of the present disclosure is shown. Detailed Implementation

[0026] The structures and related techniques disclosed herein generally relate to controlling the two-dimensional electron gas (2DEG) charge density in gallium nitride (GaN) devices. More specifically, the devices, structures, and related techniques disclosed herein relate to GaN transistors, wherein a P-type GaN structure, isolation implant patterning, and isolation implantation through the P-type GaN structure can be used to control the 2DEG charge density. In various embodiments, 2DEG charge density control can enable modification of the transistor threshold voltage (Vth) and / or reduction of the transistor's output capacitance, thereby achieving a relatively high operating frequency. In some embodiments, 2DEG charge density control can enable a reduction in the size of the GaN transistor. In various embodiments, control of the 2DEG charge density can enable the fabrication of relatively high-value 2DEG resistors in the same region, thereby achieving a reduction in the overall die area. Various inventive embodiments are described herein, including methods, processes, systems, devices, etc.

[0027] Several illustrative embodiments will now be described with reference to the accompanying drawings, which form part of this invention. The following description is merely illustrative and is not intended to limit the scope, applicability, or configuration of this disclosure. In fact, the following description of the embodiments will provide an enlightening description for those skilled in the art to implement one or more embodiments. It should be understood that various changes can be made to the function and configuration of elements without departing from the spirit and scope of this disclosure. In the following description, specific details are set forth for illustrative purposes to provide a thorough understanding of particular inventive embodiments. However, it will be apparent that various embodiments can be practiced without these specific details. The drawings and descriptions are not intended to be limiting. The terms “example” or “exemplary” are used herein to mean “serving as an example, illustration, or description.” Any embodiment or design described herein as “exemplary” or “example” should not be construed as preferred or advantageous relative to other embodiments or designs.

[0028] Figure 1A An isometric view is shown of a GaN device 100A using a p-type GaN structure to control 2DEG charge density according to an embodiment of the present disclosure. Figure 1A As shown, GaN device 100A may include a GaN layer 104, an AlGaN layer 108, and a 2DEG layer 106 formed between the GaN layer and the AlGaN layer. In some embodiments, p-type GaN islands 102 may be added to device 100A, wherein the p-type GaN islands are disposed on the AlGaN layer 108. The p-type GaN islands 102 may deplete charge carriers and reduce the charge density in the 2DEG layer 106. The amount of reduction in 2DEG charge density may depend on the area 112 and spacing 110 of the p-type GaN islands 102 (in Figure 1B(This will be discussed in more detail below). Patterning of P-type GaN islands 102 can provide 2DEG charge density control without changing the manufacturing process—which could require expensive and complex process modifications.

[0029] Figure 1B Show Figure 1A Cross-sectional view 100B of GaN device 100A is shown in the figure. Figure 1B As shown, compared to a region without P-type GaN islands (e.g., location 114), the charge density in the 2DEG layer 106 beneath the P-type GaN islands 102 (e.g., location 116) can be reduced. The amount of reduction in 2DEG charge density can depend on the area 112 of the P-type GaN islands 102 (see Figure 116). Figure 1A ), and spacing 110. In some embodiments, the area 112 of each island 102 may be, for example, 1.0 μm. 2 The spacing 110 between each island can be 1.0 μm. In various embodiments, the area 112 of the island 102 can be 1.5 μm. 2 The interval 110 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in other embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between islands 102 and 110 is between 0.2 and 5.0 μm. As will be understood by those skilled in the art to which this disclosure pertains, the area 112 and spacing 110 of island 102 can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, the 2DEG charge density technique described above can employ one or more islands, different sizes and shapes for each island, non-uniform spacing between each island, and other characteristics that may differ from those described herein. Additionally, as will be understood by those skilled in the art, p-type GaN layers can have different doping density values.

[0030] To better understand the features and aspects of the 2DEG charge control structure and technology of the GaN device according to this disclosure, further background of the disclosure is provided in the following sections by discussing several specific embodiments of the charge control structure of the GaN device according to embodiments of the disclosure. These embodiments are merely examples, and other embodiments can be used in other compound semiconductor devices, such as, but not limited to, any high electron mobility transistor (HEMT).

[0031] Figure 2A An isometric view is shown of an embodiment of a GaN device 200A using isolated injection patterning to control the charge density of 2DEG according to an embodiment of the present disclosure. Figure 2AAs shown, the GaN device 200A may include a GaN layer 204, an AlGaN layer 208, and a 2DEG layer 206 formed between the GaN layer and the AlGaN layer. In some embodiments, an isolation implantation region 202 may be utilized in the GaN device 200A, wherein the isolation implant can be placed in the active region of the GaN device. The isolation implantation region 202 can create a damaged lattice structure in the underlying AlGaN layer 208 and GaN layer 204, thereby eliminating charge carriers in the 2DEG layer 206. Furthermore, the damaged lattice structure can reduce the piezoelectric effect outside the direct implantation region and can cause a reduction in charge carriers in the adjacent 2DEG region (in Figure 2B (Further discussion follows). In some embodiments, the amount of reduction in 2DEG charge density may depend on the area 212 of the isolation injection region 202 and the spacing 210 (in... Figure 2B (Further discussion in the text).

[0032] Figure 2B Show Figure 2A A cross-sectional view 200B of the GaN device 200A shown is included. In some embodiments, 2DEG charge carriers at the location of the isolation injection region 202 can be eliminated because the isolation injector can penetrate the AlGaN layer 208 and at least partially penetrate the GaN layer 204, potentially damaging the lattice structure. Furthermore, the damaged lattice structure can cause a reduction in piezoelectric effect outside the direct injection region and can also cause a reduction in charge carriers in the adjacent region 220. The amount of reduction in 2DEG charge density can depend on the area 212 of the injection region 202 and the spacing 210. The area 212 of the injection region 202 can be, for example, 1.0 μm. 2 The spacing 210 between the injection regions can be 1.0 μm. In some embodiments, the area 212 of the injection region 202 can be 1.5 μm. 2 The interval 210 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the injection regions 202 and the injection area is between 0.2 and 5.0 μm. As will be understood by those skilled in the art who benefit from this disclosure, the area and spacing of the injection regions 202 can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, the disclosed techniques for varying the 2DEG charge density may include one or more injection regions 202, different injection region sizes and shapes, and other characteristics that may differ from those described herein. Additionally, as will be understood by those skilled in the art, the isolation dose and injection energy can have any suitable values.

[0033] Figure 3AAn isometric view is shown of an embodiment of a GaN device 300A using an isolation injection region through a P-type GaN structure, according to an embodiment of the present disclosure. In the illustrated embodiment, the isolation injection region 302 through the P-type GaN structure 320 can be used to control the charge density in the 2DEG layer 306 of the GaN device 300A. Figure 3A As shown, the GaN device 300A may include a GaN layer 304, an AlGaN layer 308, and a 2DEG layer 306 formed between the GaN layer and the AlGaN layer. In some embodiments, an isolation injection region 302 may be formed by implanting through a p-type GaN structure 320. The isolation injection region 302 may be utilized in the active region of the GaN device 300A to reduce the charge density in the 2DEG layer 306. In the illustrated embodiment, due to the presence of the p-type GaN structure 320, the isolation injection region 302 penetrates less into the substrate, and therefore the resulting lattice damage may not completely eliminate charge carriers in the 2DEG layer 306. The amount of reduction in 2DEG charge density may depend on the area 312 and spacing 310 of the isolation injection region 302. Figure 2B (Further discussion in the text).

[0034] Figure 3B A cross-sectional view 300B of the GaN device 300A is shown. Figure 3B The diagram shows a GaN layer 304, an AlGaN layer 308, and a 2DEG layer 306. Region 324 in the 2DEG layer 306 with reduced 2DEG charge density is aligned with isolation injection regions 302, while regions 322 in the 2DEG layer with increased charge density are located between the isolation injection regions. This reduces charge carriers at the location of the isolation injection regions 302 in the 2DEG layer 306 because isolation injections penetrating the p-type GaN structure 320 can penetrate the AlGaN layer 308 and damage the lattice structure. However, in this embodiment, the isolation injection penetrates into the GaN layer, but not as deeply as direct implantation on the AlGaN surface. Less penetration reduces the strain reduction based on the injection compared to direct implantation on the AlGaN surface. In this way, the isolation injection regions 302 can cause a reduction in carrier charge in the 2DEG layer 306 near the isolation injection regions 302, but do not lead to complete carrier elimination.

[0035] The amount of reduction in 2DEG charge density can depend on the area 312 of the isolation injection region 302 (see...) Figure 3A ) and spacing 310. The area 312 of the isolation injection region 302 can be, for example, 1.0 μm. 2 The spacing 310 between the isolation injection regions can be 1.0 μm. In some embodiments, the area 312 of the isolation injection region 302 can be 1.5 μm. 2The interval 310 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the isolation injection regions 302 and 310 is between 0.2 and 5.0 μm. As will be understood by those skilled in the art to which this disclosure pertains, the area 312 and spacing 310 of the isolation injection region 302 can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, the disclosed 2DEG charge density modification technique may include one or more isolation injection regions, different sizes and shapes for the isolation injection regions, and other characteristics that may differ from those described herein. Additionally, as will be understood by those skilled in the art, the isolation dose and injection energy can have any suitable values.

[0036] Figure 4A A plan view of a GaN device 400A according to an embodiment of the present disclosure is shown. The GaN device 400A may include a gate 402 and an active region 406, wherein a 2DEG charge control structure 404 is added to the active region. The charge control structure 404 may have an area 408 and a spacing 410. The charge control structure may be formed in the shape of islands. The values ​​of the area 408 and the spacing 410 may vary. In some embodiments, the structure 404 may be a P-type GaN structure similar to that of device 100A, while in other embodiments, the structure may be an isolation injection region similar to that of device 200A, and in various embodiments, the structure may be an isolation injection region through a P-type GaN structure similar to that of device 300A. The number of areas 408, spacing 410, and structures 404 can be used to control the 2DEG charge density, as shown in FIG400B. In the illustrated embodiment, the density of the islands may be constant in the regions near and far from the gate 402.

[0037] like Figure 4B As shown in Figure 400B, a first curve 422 illustrates the 2DEG charge density as a function of position within the region 406 with the presence of the charge control structure 404, while a second curve 420 shows the charge density (for reference) without the charge control structure 404. As can be seen in curve 422, the charge density decreases where the structure 404 is present and increases in the region without the structure 404. The area 408 of the structure 404 can be, for example, 1.0 μm. 2 The spacing 410 between structures 404 can be 1.0 μm. In some embodiments, the area 408 can be 1.5 μm. 2 The interval 410 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 408 and spacing 410 of structure 404 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 404 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal, and can have other properties that may differ from those described herein.

[0038] Figure 5A A plan view of a GaN device 500A according to an embodiment of the present disclosure is shown. The GaN device 500A may include a gate 502 and an active region 506, wherein a 2DEG charge control structure 504 has been added to the active region. The structure 504 may have a variable area 508 and spacing 510. The structure 504 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 508, spacings 510, and structures 504 can be used to control the 2DEG charge density, such as... Figure 5B As shown. Figure 5B As shown in Figure 500B, the 2DEG charge density varies with position within the active region. First graph 522 shows the 2DEG charge density with structure 504, while graph 520 shows the 2DEG charge density without structure 504. In the illustrated embodiment, the density of the charge control structure (island) can be reduced in the region near the gate 502 and increased in the region far from the gate 502.

[0039] As shown in Figure 500B, the charge density decreases where structure 504 is present and increases in the region without structure 504. A lower density of structure 504 is present in the region near the gate 502, which can generate a higher charge density in those regions. The area 508 of structure 504 can be, for example, 1.0 μm. 2 The spacing 510 between structures 504 can be 1.0 μm. In some embodiments, the area 508 can be 1.5 μm. 2 The interval 510 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2The spacing between the areas 508 and 510 is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 508 and spacing 510 of structure 504 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 504 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal shapes, and can have other properties that may differ from those described herein.

[0040] Figure 6A A plan view of a GaN device 600A according to an embodiment of the present disclosure is shown. The GaN device 600A may include a gate 602 and an active region 606, wherein a 2DEG charge control structure 604 is added to the active region. The structure 604 may have a variable area 608 and spacing 610. The structure 604 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 608, spacing 610, and structures 604 can be used to control the 2DEG charge density, such as... Figure 6B As shown. Figure 6B As shown in Figure 600B, the 2DEG charge density varies with position within the active region. A first graph 622 shows the 2DEG charge density with structure 604, while a second graph 620 shows the 2DEG charge density without structure 604. In the illustrated embodiment, the density of the charge control structure (island) can be constant in the region near the gate 602 and decreases in the region far from the gate 602.

[0041] As can be seen in the first graph 622, the 2DEG charge density decreases where structure 604 is present and increases in the region without structure 604. In the region far from the active region 606 of gate 602, there is a lower density of structure 604, which can generate a higher charge density in those regions. The area 608 of structure 604 can be, for example, 1.0 μm. 2 The spacing 610 between structures 604 can be 1.0 μm. In some embodiments, the area 608 can be 1.5 μm. 2 The interval 610 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2The spacing between the two areas is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 608 and spacing 610 of structure 604 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 604 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal shapes, and can have other properties that may differ from those described herein.

[0042] Figure 7A A plan view of a GaN device 700A according to an embodiment of the present disclosure is shown. The GaN device 700A may include a gate 702 and an active region 706, wherein a 2DEG charge control structure 704 has been added to the active region. The structure 704 may have a variable area 708 and spacing 710. The structure 704 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 708, spacing 710, and structures 704 can be used to control the 2DEG charge density, as shown in FIG700B. Figure 7B As shown in Figure 700B, the 2DEG charge density varies with position within the active region 706. A first graph 722 shows the 2DEG charge density with structure 704, while a second graph 720 shows the 2DEG charge density without structure 704. In the illustrated embodiment, the density of the charge control structure (island) can decrease in the region near the gate 702 and increase in the region far from the gate 702.

[0043] As shown in Figure 700B, the charge density decreases where structure 704 is present and increases in the region without structure 704. Lower densities of 704 are present in regions close to and far from gate 702, which can generate higher charge densities in those regions. The area 708 of structure 704 can be, for example, 1.0 μm. 2 The spacing 710 between structures 704 can be 1.0 μm. In some embodiments, the area 708 can be 1.5 μm. 2 The interval 710 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2The spacing between the areas 708 and 710 is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 708 and spacing 710 of structure 704 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 704 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal shapes, and can have other properties that may differ from those described herein.

[0044] Figure 8A A plan view of a GaN device 800A according to an embodiment of the present disclosure is shown. The GaN device 800A may include a gate 802 and an active region 806, wherein a 2DEG charge control structure 804 is added to the active region. The structure 804 may have a variable area 808 and spacing 810. The structure 804 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 808, spacing 810, and structures 804 can be used to control the 2DEG charge density, such as... Figure 8B As shown. Figure 8B As shown in Figure 800B, the 2DEG charge density varies with position within the active region 806. A first graph 822 shows the charge density in the 2DEG region with structure 804, while a second graph 820 shows the charge density without structure 804. In the illustrated embodiment, the density of the charge control structure (island) can be constant in the region near the gate 802 and decreases and increases in the region far from the gate 802.

[0045] As can be seen in the first curve 822, the charge density decreases where structure 804 is present and increases in the region without structure 804. The charge density can be higher in regions with lower density structures 804 than in regions with higher density structures 804. The area 808 of structure 804 can be, for example, 1.0 μm. 2 The spacing 810 between structures 804 can be 1.0 μm. In some embodiments, the area 808 can be 1.5 μm. 2 The interval 810 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2The area and spacing of the structures are between 0.2 and 5.0 μm. As will be understood by those skilled in the art to which this disclosure pertains, the area and spacing of the structures can be set to any suitable value. Furthermore, as will be understood by those skilled in the art, structure 804 can have different sizes and shapes, such as, but not limited to, squares, rectangles, circles, triangles, or trapezoids, and can have other properties that may differ from those described herein.

[0046] Figure 9A A plan view of a GaN device 900A according to an embodiment of the present disclosure is shown. The GaN device 900A may include a gate 902 and an active region 906, wherein a 2DEG charge control structure 904 has been added to the active region. The structure 904 may have a variable area 908 and spacing 910. The structure 904 may be a P-type GaN structure similar to device 100A, an isolation injection region similar to device 200A, or an isolation injection region through a P-type GaN structure similar to device 300A. The number of areas 908, spacing 910, and structures 904 can be used to control the 2DEG charge density, as shown in FIG900B. Figure 9B As shown in Figure 900B, the 2DEG charge density varies with position within the active region 906. A first graph 922 shows the charge density in the 2DEG layer with structure 904, while a second graph 920 shows the charge density without structure 904.

[0047] As in Figure 9A and 9B As can be seen, the charge density decreases where structure 904 is present and increases in regions without structure 904. Regions with lower density structures 904 can have higher charge densities, while regions with higher density structures can have relatively lower charge densities. The area 908 of structure 904 can be, for example, 1.0 μm. 2 The spacing 910 between structures 904 can be 1.0 μm. In some embodiments, the area 908 can be 1.5 μm. 2 The interval 910 is 1.5 μm, while in other embodiments, the area can be between 0.5 and 2.0 μm. 2 The area is between 0.5 and 2.0 μm, and in various embodiments, the area can be between 0.2 and 5.0 μm. 2 The spacing between the two areas is between 0.2 and 5.0 μm. As will be appreciated by those skilled in the art to which this disclosure pertains, the area 908 and spacing 910 of structure 904 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, structure 904 can have different sizes and shapes, such as, but not limited to, square, rectangular, circular, triangular, or trapezoidal shapes, and can have other properties that may differ from those described herein.

[0048] Figure 10A Showing the use of similar Figure 5A A series of charge density modified sample chips (coupons) 1000A of the 2DEG charge control structure of the charge control structure. Sample chip 1002 is a reference transistor, while sample chips 1004, 1006, 1008 and 1010 are transistors with different sizes and spacings for the charge control structure in their active regions. Figure 10B Show Figure 10A The CV test result of the sampled piece is 1000B. Figure 10B In China, targeting Figure 10A Each sample chip in the diagram is plotted as its capacitance varies with the gate-to-source voltage (Vgs). For example, in... Figure 10B As can be seen in the CV curve, the arrangement of the charge control structures can be used to control the charge density in the sampling chips, because the threshold voltage of each of the sampling chips 1004 to 1010 deviates from the threshold voltage of sampling chip 1002. Furthermore, the charge density decreases as the size of the charge control structures increases. Similarly, the charge density also decreases as the spacing between the charge control structures decreases. This reduction in charge density reduces the output capacitance of the transistor and allows for an increase in the switching frequency of the transistor.

[0049] Figure 11A Cross-sectional and plan views of a GaN transistor 1100A according to an embodiment of the present disclosure are shown. Figure 11A The image shows a cross-sectional view of a GaN transistor having a source region 1104, a gate region 1102, a drift region 1106, a drain region 1108, and a 2DEG layer 1122. A magnified plan view of section 1120 is also shown, illustrating the gate 1110, the active region 1112, and the charge control region 1114. The charge control region has a stepped trapezoidal shape. The charge control region 1114 can be P-type GaN, an isolation implantation region, and / or a combination of P-type GaN and an isolation implantation structure. Figure 11B The diagram shows the 2DEG charge density and electric field as a function of the GaN transistor 1100A. Figure 11BAs shown, due to the presence of the charge control region 1114, the 2DEG charge density 1127 is reduced near the gate region 1102. Compared to the electric field (1129) without the charge control structure, the electric field 1125 is reduced in the region near the gate region 1102 due to the reduced charge density. In various embodiments, the reduction of the 2DEG charge density near the gate of the transistor enables a reduction in gate length and a reduction in die area. As will be appreciated by those skilled in the art to which this disclosure pertains, the charge control structure can be a continuous structure and / or can be island-shaped. Furthermore, as will be appreciated by those skilled in the art, the charge control structure can have different sizes and spacings.

[0050] Figure 12A Cross-sectional and plan views of a GaN transistor 1200A according to an embodiment of the present disclosure are shown. Figure 12A The image shows a cross-sectional view of a GaN transistor 1200A having a source region 1204, a gate region 1202, a drift region 1206, a drain region 1208, and a 2DEG layer 1222. A plan view of the enlarged section 1220 is also shown, illustrating the gate 1210, the active region 1212, and the charge control region 1214. In this embodiment, the charge control region 1214 has a triangular or trapezoidal shape. The charge control region 1214 can be P-type GaN, an isolation implantation structure, and / or a combination of P-type GaN and an isolation implantation structure. Figure 12B The 2DEG charge density and electric field are shown as varying along the position of the region of action. (Example) Figure 12B As shown, due to the presence of the charge control region 1214, the 2DEG charge density 1227 decreases near the gate region 1202. Compared to the electric field (1229) without the charge control structure, the electric field 1225 in the region near the gate region 1202 decreases due to the reduced charge density. As will be appreciated by those skilled in the art who benefit from this disclosure, the charge control structure can be a continuous structure and / or can be island-shaped. Furthermore, as will be appreciated by those skilled in the art, the charge control structures can have different sizes and spacings.

[0051] Figure 13A Cross-sectional and plan views of a GaN transistor 1300A according to an embodiment of the present disclosure are shown. Figure 13A The image shows a cross-sectional view of a GaN transistor having a source region 1304, a gate region 1302, a drift region 1306, a drain region 1308, and a 2DEG layer 1322. A plan view of the enlarged section 1320 is also shown, illustrating the gate 1310, the active region 1312, and the charge control region 1314. In this embodiment, the charge control region has an elliptical shape. The charge control region can be P-type GaN, an isolation-implanted structure, and / or a combination of P-type GaN and an isolation-implanted structure.Figure 13B The 2DEG charge density and electric field are shown as varying along the position of the region of action. (Example) Figure 13B As shown, due to the presence of the charge control region 1314, the 2DEG charge density 1327 decreases near the gate region 1302. Compared to the electric field (1329) without the charge control structure, the electric field 1325 decreases in the region near the gate region 1302 due to the reduced charge density. As will be appreciated by those skilled in the art who benefit from this disclosure, the charge control structure can be a continuous structure and / or can be island-shaped. Furthermore, as will be appreciated by those skilled in the art, the charge control structures can have different sizes and spacings.

[0052] Figure 14 A plan view of a GaN resistor 1400 according to an embodiment of the present disclosure is shown. The GaN resistor 1400 may include an ohmic contact region 1402, an active region 1408, and an isolation implantation region 1404. In some embodiments, the ohmic contact region 1402 may be a metal contact region. In this embodiment, a dog-bone shaped active region 1408 enables the formation of 2DEGs in the substrate, wherein the resistance value of the resistor may be set by a minimum fabricated active region width 1412. The width of the minimum fabricated active region width 1412 may be set by a minimum fabricated spacing between the implantation regions 1404. In the illustrated embodiment, a P-type GaN charge control structure 1406 may be added to the resistor to form a relatively high-value resistor. The charge control structure may have a minimum fabricated spacing 1410. The value of the spacing 1410 may be lower than the active region width 1412, thus enabling the formation of a relatively high-value resistor. In this way, the fabrication limitations on the minimum spacing of the implantation regions can be circumvented. Furthermore, this technique allows for the formation of relatively high-value resistors without the high cost and complex changes to fabrication equipment. Furthermore, compared to resistors formed without charge control structures, using P-type GaN charge control structures allows for improved manufacturing control over resistor values. For example, if a minimum manufacturing design rule is set at 10 nm for a given operating width, this technique can enable the manufacture of resistors with resistance values ​​that are equal to those of resistors with an operating width of 8 nm. As will be understood by those skilled in the art to which this disclosure pertains, the minimum manufacturing design rules for operating width and spacing can be varied for various semiconductor manufacturing processes.

[0053] Figure 15A plan view of a GaN resistor 1500 according to an embodiment of the present disclosure is shown. The GaN resistor 1500 may include an ohmic contact region 1502, an active region 1508, and an isolation injection region 1504. In some embodiments, the ohmic contact region 1502 may be a metal contact region. In the illustrated embodiment, the active region 1508, having a rectangular shape, may have a non-minimum manufacturing width 1512. As understood by those skilled in the art, a non-minimum manufacturing feature size is a feature size that is the minimum feature size without using a manufacturing process. A P-type GaN charge control structure 1506 may be added to the resistor to form a relatively high-value resistor. The charge control structure may have a minimum manufacturing spacing 1510. Therefore, even with a non-minimum width of the active region, a relatively high-value resistor can be formed. Furthermore, using a P-type GaN charge control structure allows for improved manufacturing control of the resistor value compared to a resistor formed without a charge control structure.

[0054] Figure 16 A plan view of a GaN resistor 1600 according to an embodiment of the present disclosure is shown. The GaN resistor 1600 may include an ohmic contact region 1602, an active region 1608, and an isolation implantation region 1604. In some embodiments, the ohmic contact region may be a metal contact region. An active region that may have a dog-bone shape enables the formation of 2DEGs in the substrate, wherein the value of the resistor may be determined by the minimum fabrication width of the active region 1612. The width of the minimum fabrication active region width 1612 may be set by the minimum fabrication spacing between the implantation regions 1604. In the illustrated embodiment, a P-type GaN charge control structure 1606 may be added to the resistor to form a relatively high-value resistor. The P-type GaN structure may be in the form of multiple islands. The charge control structure may have a minimum fabrication spacing 1610. In some embodiments, the spacing 1610 may be smaller than the minimum active region width 1612, thus enabling the formation of a relatively high-value resistor. In this way, the fabrication limitations on the minimum spacing of the implantation regions can be circumvented, and this technique allows for the formation of relatively high-value resistors without the high cost and complex changes to fabrication equipment. Furthermore, compared to resistors formed without charge control structures, using P-type GaN charge control structures enables improved manufacturing control over resistor values.

[0055] Figure 17A cross-sectional view of a GaN device 1700 is shown. The GaN device 1700 may include a GaN layer 1704, a first AlGaN layer 1708, and a 2DEG layer 1706 formed between the GaN layer 1704 and the first AlGaN layer 1708. The GaN device 1700 may also include islands 1702. In some embodiments, the islands 1702 may be formed of a p-type GaN material. The GaN device 1700 may also include a second AlGaN layer 1705 formed on the first AlGaN layer 1708. In the illustrated embodiment, the second AlGaN layer 1705 may be removed in some regions, such as region 1720. As discussed above, the 2DEG charge density under the p-type GaN island 1702 (e.g., location 1716) may be reduced compared to regions without p-type GaN islands (e.g., location 1714). Adding a second AlGaN layer 1705 on top of the first AlGaN layer 1708 in region 1722 increases the charge density in the 2DEG layer 1706 below the second AlGaN layer 1705 (e.g., location 1718). As previously described, the presence of a p-type GaN island in region 1722 reduces the 2DEG charge density below the island (e.g., location 1712); however, due to the presence of the second AlGaN layer 1705 above location 1712, the 2DEG charge density at location 1712 can be higher than that at location 1716. Therefore, this method allows control over the 2DEG charge density at various locations within the GaN substrate and / or GaN wafer.

[0056] The amount of increase in 2DEG charge density attributable to the presence of the second AlGaN layer 1705 can depend on the thickness of the second AlGaN layer 1705. In some embodiments, the thickness of the second AlGaN layer 1705 can be, for example, 50 nm. In various embodiments, the thickness of the second AlGaN layer 1705 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 and 10 nm, and in other embodiments, the thickness can be between 150 and 250 nm. As will be appreciated by those skilled in the art to which this disclosure pertains, the thickness of the second AlGaN layer 1705 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, the 2DEG charge density control techniques described above can employ one or more islands, different sizes and shapes for each island, non-uniform spacing between each island, and other characteristics that may differ from those described herein. Furthermore, as will be appreciated by those skilled in the art, p-type GaN layers can have different doping density values. Additionally, the second AlGaN layer 1705 can have different Al and GaN concentrations. Furthermore, a third AlGaN layer may be formed on the second AlGaN layer 1705 to control the 2DEG charge density. In some embodiments, multiple AlGaN layers may be used to control the 2DEG charge density.

[0057] Figure 18 A cross-sectional view of a GaN device 1800 according to an embodiment of the present disclosure is shown. Figure 18 As shown, the GaN device 1800 may include a GaN layer 1804, a first AlGaN layer 1808, and a 2DEG layer 1806 formed between the GaN layer 1804 and the first AlGaN layer 1808. The GaN device 1800 may include an isolation implantation region 1802. The GaN device 1800 may also include a second AlGaN layer 1805 formed on the first AlGaN layer 1808. In the illustrated embodiment, the second AlGaN layer 1805 may be removed in some regions, such as region 1820. As discussed above, the isolation implantation region 1802 can be utilized in the GaN device 1800, wherein an isolation implant can be placed in the active region of the GaN device 1800. The isolation implantation region 1802 may create a damaged lattice structure in the underlying first AlGaN layer 1808 and GaN layer 1804, thereby eliminating charge carriers in the 2DEG layer 1806. Furthermore, the damaged lattice structure can reduce the piezoelectric effect outside the direct injection region and can cause a reduction in charge carriers in the adjacent 2DEG region. Adding a second AlGaN layer 1805 on the first AlGaN layer 1808 in region 1822 can increase the charge density in the 2DEG layer 1806 below the region where the second AlGaN layer 1805 is located (e.g., location 1818). As previously described, the presence of the isolation injection region 1802 can eliminate the 2DEG charge density in those regions (e.g., location 1812).

[0058] Similar to the above text Figure 2A and 2BAs discussed in the text, 2DEG charge carriers can be eliminated where an isolation injection region 1802 is present, wherein the isolation injector used to form the isolation injection region 1802 can penetrate through the second AlGaN layer 1805 and the first AlGaN layer 1808. In some embodiments, the isolation injector can penetrate into the GaN layer 1804. The addition of the second AlGaN layer 1805 can increase the 2DEG charge density below the region having the second AlGaN layer 1805. The amount of increase in 2DEG charge density can depend on the thickness of the second AlGaN layer 1805. In some embodiments, the thickness of the second AlGaN layer 1805 can be, for example, 50 nm. In various embodiments, the thickness of the second AlGaN layer 1805 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 and 10 nm, and in other embodiments, the thickness can be between 150 and 250 nm. As will be understood by those skilled in the art to which this disclosure pertains, the thickness of the second AlGaN layer 1805 can be set to any suitable value. Furthermore, as those skilled in the art will understand, the 2DEG charge density control techniques described above may employ one or more isolation injection regions, different sizes and shapes for each isolation injection region, non-uniform spacing between each isolation injection region, and other characteristics that may differ from those described herein. Furthermore, as those skilled in the art will understand, the isolation injection regions may have different depth values. Furthermore, the second AlGaN layer 1805 may have different Al and GaN concentrations. Furthermore, a third AlGaN layer may be formed on the second AlGaN layer 1805 for controlling the 2DEG charge density. In some embodiments, multiple AlGaN layers may be used to control the 2DEG charge density.

[0059] Figure 19 A cross-sectional view is shown of an embodiment of a GaN device 1900 with a second AlGaN layer using an isolation injection region through a P-type GaN structure, according to an embodiment of the present disclosure. Figure 19 As shown, the GaN device 1900 may include a GaN layer 1904, a first AlGaN layer 1908, and a 2DEG layer 1906 formed between the GaN layer 1904 and the first AlGaN layer 1908. The GaN device 1900 may include an isolation implantation region 1902 that penetrates the P-type GaN structure. The GaN device 1900 may also include a second AlGaN layer 1905 formed on the first AlGaN layer 1908. In the illustrated embodiment, the second AlGaN layer 1905 may be removed in some regions, such as region 1920. Similar to the above... Figure 3A and 3BAs described, the isolation injection region 1902 through the P-type GaN structure can be formed by injection through the P-type GaN structure. The isolation injection region 1902 through the P-type GaN structure can be used in the active region of the GaN device 1900 to reduce the charge density in the 2DEG layer 1906. In the illustrated embodiment, due to the presence of the P-type GaN structure, the isolation injection penetrates less into the substrate, and therefore the resulting lattice damage may not completely eliminate charge carriers in the 2DEG layer 1906. Adding a second AlGaN layer 1905 on the first AlGaN layer 1908 in region 1922 can increase the charge density in the 2DEG layer 1906 below the region where the second AlGaN layer 1905 is located (e.g., at location 1912).

[0060] Adding a second AlGaN layer 1905 on top of the first AlGaN layer 1908 can increase the 2DEG charge density beneath the region having the second AlGaN layer 1905. The amount of increase in 2DEG charge density can depend on the thickness of the second AlGaN layer 1905. In some embodiments, the thickness of the second AlGaN layer 1905 can be, for example, 50 nm. In various embodiments, the thickness of the second AlGaN layer 1905 can be, for example, 100 nm, while in other embodiments, the thickness can be between 5 and 10 nm, and in other embodiments, the thickness can be between 150 and 250 nm. As will be appreciated by those skilled in the art to which this disclosure pertains, the thickness of the second AlGaN layer 1905 can be set to any suitable value. Furthermore, as will be appreciated by those skilled in the art, the 2DEG charge density control techniques described above can employ one or more isolation implantation regions through the P-type GaN region, different sizes and shapes for each region, non-uniform spacing between each region, and other characteristics that may differ from those described herein. Furthermore, as those skilled in the art will understand, the isolation implantation region through the P-type GaN region can have different depth values. Additionally, the second AlGaN layer 1905 can have different Al and GaN concentrations. Furthermore, a third AlGaN layer can be formed on the second AlGaN layer 1905 to control the 2DEG charge density. In some embodiments, multiple AlGaN layers can be used to control the 2DEG charge density.

[0061] Although a 2DEG charge control structure for a GaN device is described and illustrated herein with respect to a particular configuration of a GaN device, embodiments of this disclosure are suitable for use with other configurations of GaN and non-GaN devices. For example, any semiconductor device can be used with embodiments of this disclosure. In some cases, embodiments of this disclosure are particularly suitable for use with silicon and other compound semiconductor devices.

[0062] For simplicity, various internal components, such as substrate details, various dielectric and metal layers, contacts, and other components of the GaN transistor 100 (see Figure 1), are not shown in the figure.

[0063] In the foregoing description, embodiments of this disclosure have been described with reference to numerous specific details that may vary with different implementations. Therefore, the description and drawings are to be considered illustrative rather than restrictive. The unique and exclusive reference to the scope of this disclosure, and what the applicant intends to be the scope of this disclosure, is the literal and equivalent scope of the set of claims published in this application, including any subsequent corrections in the specific form of those claims. Specific details of particular embodiments may be combined in any suitable manner without departing from the spirit and scope of the embodiments of this disclosure.

[0064] Additionally, spatially relative terms such as “bottom” or “top” may be used to describe the relationship of an element and / or feature to another element(s) and / or feature, as illustrated in the figures. It should be understood that, in addition to the orientation depicted in the figures, spatially relative terms are intended to cover different orientations of the device in use and / or operation. For example, if the device in the figures is flipped, an element described as the “bottom” face may be oriented “above” other elements or features. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations) and the spatially relative descriptors used herein shall be interpreted accordingly.

[0065] The terms “and,” “or,” and “and / or” as used herein may have a variety of meanings, which are expected to depend at least in part on the context in which such terms are used. Generally, “or,” when used to relate a list such as, for example, A, B, or C, implies A, B, and C, used here in an inclusive sense, and A, B, or C, used here in an exclusive sense. Additionally, the term “one or more,” as used herein, may be used to describe any feature, structure, or property in the singular, or may be used to describe some combination of features, structures, or properties. However, it should be noted that this is merely an illustrative example, and the subject matter claimed is not limited to this example. Furthermore, if the term “at least one of” is used to relate a list (e.g., A, B, or C), it may be interpreted as referring to any combination of A, B, and / or C, such as A, B, C, AB, AC, BC, AA, AAB, ABC, AABBCCC, etc.

[0066] Throughout this specification, references to “an example,” “example,” “some examples,” or “exemplary embodiments” indicate that a particular feature, structure, or characteristic described in conjunction with said feature and / or example may be included in at least one feature and / or example of the claimed subject matter. Therefore, the appearance of the phrases “in one instance,” “example,” “in some instances,” or “in some embodiments,” or other similar phrases throughout this specification, does not necessarily refer to the same feature, instance, and / or limitation. Furthermore, a particular feature, structure, or characteristic may be combined in one or more instances and / or features.

[0067] In the preceding detailed description, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods and apparatus originally known to a person of ordinary skill have not been described in detail to avoid obscuring the claimed subject matter. Therefore, it is intended that the claimed subject matter be limited to the specific instances disclosed, but rather that such claimed subject matter may also encompass all aspects falling within the scope of the appended claims and their equivalents.

Claims

1. A gallium nitride (GaN) resistor, comprising: Compound semiconductor substrates; The first ohmic contact region is formed in the compound semiconductor substrate; The second ohmic contact region is formed in the compound semiconductor substrate and is separate from the first ohmic contact region; The effective area extends between the first ohmic contact area and the second ohmic contact area; A two-dimensional electron gas (2DEG) layer is formed in the compound semiconductor substrate and below the active region; A first isolated charge control structure is disposed between the first ohmic contact area and the second ohmic contact area, and covers a first portion of the active area; as well as A second isolated charge control structure is disposed between the first ohmic contact area and the second ohmic contact area, and covers a second portion of the active area.

2. The GaN resistor of claim 1, wherein each of the first isolated charge control structure and the second isolated charge control structure is arranged to selectively reduce the charge density in the 2DEG layer beneath each of the first isolated charge control structure and the second isolated charge control structure.

3. The GaN resistor according to claim 1, wherein each of the first isolated charge control structure and the second isolated charge control structure is disposed on the compound semiconductor substrate.

4. The GaN resistor of claim 3, wherein each of the first isolated charge control structure and the second isolated charge control structure comprises a GaN layer.

5. The GaN resistor according to claim 4, wherein the GaN layer comprises a P-type GaN layer.

6. The GaN resistor of claim 1, wherein each of the first isolated charge control structure and the second isolated charge control structure is disposed within the compound semiconductor substrate.

7. The GaN resistor of claim 6, wherein each of the first isolated charge control structure and the second isolated charge control structure includes an isolation injection region.

8. A gallium nitride (GaN) device, comprising: Compound semiconductor substrates; Source region, the source region being formed in the compound semiconductor substrate; Drain region, the drain region being formed in the compound semiconductor substrate and separated from the source region; A two-dimensional electron gas (2DEG) layer is formed in the compound semiconductor substrate and extends between the source region and the drain region; A gate region, which is formed on the compound semiconductor substrate and positioned between the source region and the drain region; as well as A plurality of isolated charge control structures are disposed between the gate region and the drain region, wherein each of the plurality of isolated charge control structures includes an isolated injection region formed by each of the respective plurality of isolated charge control structures.

9. The GaN device of claim 8, wherein each of the plurality of isolated charge control structures is arranged to selectively reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures.

10. The GaN device of claim 8, wherein each of the plurality of isolated charge control structures is disposed on the compound semiconductor substrate.

11. The GaN device of claim 10, wherein each of the plurality of isolated charge control structures comprises a GaN layer.

12. The GaN device of claim 11, wherein the GaN layer comprises a P-type GaN layer.

13. The GaN device of claim 8, wherein each of the plurality of isolated charge control structures is formed in the shape of an island.

14. A method for controlling the charge density in a two-dimensional electron gas (2DEG) layer in a gallium nitride (GaN) device, the method comprising: A compound semiconductor substrate is provided, the compound semiconductor substrate comprising a first layer and a second layer and further comprising a 2DEG layer formed between the first layer and the second layer; Forming an area of ​​action; A gate region is formed on the compound semiconductor substrate and across the active region; A source region is formed in the compound semiconductor substrate; A drain region separate from the source region is formed in the compound semiconductor substrate, wherein the gate region is located between the source region and the drain region; Multiple isolated charge control structures are formed, and the multiple isolated charge control structures are disposed between the gate region and the drain region; and Each of the plurality of isolated charge control structures is arranged to selectively reduce the charge density in the 2DEG layer beneath each of the plurality of isolated charge control structures.

15. The method of claim 14, wherein each of the plurality of isolated charge control structures comprises a p-type GaN layer.

16. The method of claim 15, wherein each of the plurality of isolated charge control structures includes an isolated injection region.

17. The method of claim 14, wherein each of the plurality of isolated charge control structures is disposed within the compound semiconductor substrate.

18. The method of claim 17, wherein each of the plurality of isolated charge control structures includes an isolated injection region.

19. The method of claim 14, wherein the plurality of isolated charge control structures are disposed near the gate region.

20. The method of claim 14, wherein the plurality of isolated charge control structures are arranged to reduce the electric field near the gate region.

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