Variable inductor and electronic equipment
Patent Information
- Application Number
- CN202411128836.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2026-03-03
Smart Images
Figure CN121602955A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of microelectronic circuits, and more particularly to a variable inductor and electronic device. Background Technology
[0002] The implementation of on-chip passive inductors is crucial for the development of radio frequency integrated circuits. In voltage-controlled oscillators (VCOs), receivers, and transmitters, they form resonant circuits with capacitors, playing roles in frequency selection, tuning, filtering, and energy storage. In chip circuit design, the size and Q (Quality Factor) of the inductor are important factors to consider. Passive components are often much larger than active components, so optimizing the inductor area can effectively reduce chip costs. Furthermore, a higher Q value results in better phase noise in the VCO, higher gain and better filtering in the receiver and transmitter circuits, and lower power consumption, all of which contribute to improving the overall performance of the communication system. Adjustable inductors allow for switching to select different inductance values, enabling the circuit to operate in different frequency bands, expanding the chip's application scenarios and reducing chip costs. Therefore, compact, high-Q variable inductors have significant research value. Summary of the Invention
[0003] This disclosure provides a variable inductor and an electronic device.
[0004] In a first aspect, embodiments of this disclosure provide a variable inductor, which includes: a plurality of inductors and a plurality of switches; wherein, each inductor includes a first end and a second end, the plurality of inductors are connected in series such that the second end of one inductor is connected to the first end of the next inductor, and each of the switches is connected between the second end of any one inductor and the first end of another inductor or between the first end of any one inductor and the second end of another inductor;
[0005] The closing and closing of the plurality of switches are controlled to cause all or part of the plurality of inductors to be connected to the variable inductor;
[0006] In this case, at least one switch connected in series with the inductor not connected to the circuit is turned off, so that the inductor not connected to the circuit is in an open circuit state.
[0007] Secondly, embodiments of this disclosure also provide an electronic device, which includes the aforementioned variable inductor.
[0008] In the embodiments of this disclosure, the variable inductor includes multiple inductors and multiple switches. Each inductor includes a first terminal and a second terminal. The multiple inductors are connected in series such that the second terminal of one inductor is connected to the first terminal of the next inductor. Each switch is connected between the second terminal of any inductor and the first terminal of another inductor, or between the first terminal of any inductor and the second terminal of another inductor. The closing and closing of the multiple switches are controlled to allow all or part of the multiple inductors to be connected to the circuit, so that any one or more inductors can be short-circuited by the switches, leaving any one or more inductors remaining in the variable inductor, thereby enabling the variable inductor to be changed into multiple inductance values. At least one switch connected in series with the inductor not connected to the circuit is turned off, making the inductor in an open circuit state. This achieves the goal of cutting off the closed circuit of the inductor not connected to the circuit through at least one switch connected in series with the inductor not connected to the circuit, thereby avoiding leakage current due to the closed circuit of the inductor not connected to the circuit not being cut off, which would cause the inductance of the variable inductor to be inaccurate. It can also make the variable inductor have a high Q value when switching between large and small inductance. The structure is simple, small in area and low in cost. Attached Figure Description
[0009] In the accompanying drawings of the embodiments disclosed herein:
[0010] Figure 1(a) is a schematic diagram of the first variable inductor structure provided by the related technology;
[0011] Figure 1(b) is a schematic diagram of the second variable inductor structure provided by the related technology;
[0012] Figure 2 This is a schematic diagram of a variable inductor structure provided in an embodiment of this disclosure;
[0013] Figure 3 A schematic diagram of a symmetrical variable inductor structure provided in an embodiment of this disclosure;
[0014] Figure 4(a) is a schematic diagram of the first embodiment of the closed and open states of the switch provided in this disclosure;
[0015] Figure 4(b) is a schematic diagram of a second embodiment of the closed and open states of the switch provided in this disclosure;
[0016] Figure 4(c) is a schematic diagram of a third embodiment of the closed and open states of the switch provided in this disclosure;
[0017] Figure 5 This is a schematic diagram of the variable inductor structure under two switching conditions provided in the embodiments of this disclosure;
[0018] Figure 6 This is a schematic diagram of a switch state structure under two switch conditions provided in an embodiment of the present disclosure;
[0019] Figure 7 This is a block diagram of an electronic device provided in an embodiment of the present disclosure. Detailed Implementation
[0020] To enable those skilled in the art to better understand the technical solutions of this disclosure, the communication-sensing data processing method and computer-readable storage medium provided in the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.
[0021] The present disclosure will be described more fully below with reference to the accompanying drawings; however, the embodiments shown may be embodied in different forms, and the present disclosure should not be construed as limited to the embodiments set forth below. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of the disclosure.
[0022] The accompanying drawings of the embodiments disclosed herein are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the detailed embodiments to explain this disclosure and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the description of the detailed embodiments with reference to the accompanying drawings.
[0023] This disclosure may be described with reference to plan and / or cross-sectional views using the ideal schematic diagrams of this disclosure. Therefore, the example illustrations may be modified according to manufacturing techniques and / or tolerances.
[0024] Where there is no conflict, the various embodiments of this disclosure and the features thereof in the embodiments may be combined with each other.
[0025] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. The term "and / or" as used in this disclosure includes any and all combinations of one or more of the associated enumerated entries. The singular forms "a" and "the" as used in this disclosure are also intended to include the plural forms, unless the context clearly indicates otherwise. The terms "comprising," "made of," etc., as used in this disclosure specify the presence of the stated feature, integral, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.
[0026] Unless otherwise specified, all terms used in this disclosure (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined in this disclosure.
[0027] In the design of traditional variable inductors, there are two main approaches: one is to use a single switch to short-circuit part of the inductor, and the other is to use mutual inductance to change the magnetic flux through a switch, thereby changing the inductance.
[0028] Traditional Option 1
[0029] The schematic diagram is shown in Figure 1(a). A single switch short-circuits a portion of the inductor lines, thereby changing the inductance value. In the large inductance operating mode, switch SW41 is open, and the total inductance is L41+L43+L44+L42; in the small inductance mode, switch SW41 is closed, and inductors L43 and L44 are short-circuited, resulting in a total inductance of L41+L42. This scheme has a simple structure, but its disadvantage is that the Q value is low because the switch is connected in series in the signal path. In addition, since inductors are often made of high-layer metal, the parasitic resistance of the short-circuited traces L43 and L44 is small, and some signals may be shunted to L43 and L44, making the inductance value uncontrollable. Therefore, a larger switch size is required to reduce the on-resistance. However, an excessively large switch size will cause a decrease in the inductance value, and the coupling between the large-area switch and the passive coil is difficult to accurately simulate, ultimately leading to inconsistencies in simulation results.
[0030] Traditional Option 2
[0031] The schematic diagram is shown in Figure 1(b). Based on the mutual inductance principle, a secondary coil consisting of a series switch and inductors L53 and L54 is added around the main coils L51 and L52. The change in magnetic flux caused by switch SW51 alters the mutual inductance value, ultimately achieving adjustable inductance. This scheme incurs a large chip area overhead, which is not conducive to chip miniaturization design. Furthermore, considering the symmetry principle of differential circuits, multiple secondary coils need to be added symmetrically around the main coils, along with transistors controlling the secondary coils. These transistors affect the differential offset performance of the circuit. In addition, the design factors for inductance and Q-value include the mutual inductance coefficient, mutual coupling capacitance, and secondary coil inductance, leading to excessively complex variable factors in inductor design, poor reproducibility of the design scheme and steps, and even the possibility of multiple oscillation frequencies in the main coil.
[0032] In the embodiments of this disclosure, the variable inductor includes multiple inductors and multiple switches. Each inductor includes a first terminal and a second terminal. The multiple inductors are connected in series such that the second terminal of one inductor is connected to the first terminal of the next inductor. Each switch is connected between the second terminal of any inductor and the first terminal of another inductor, or between the first terminal of any inductor and the second terminal of another inductor. The closing and closing of the multiple switches are controlled to allow all or part of the multiple inductors to be connected to the circuit, so that any one or more inductors can be short-circuited by the switches, leaving any one or more inductors remaining in the variable inductor, thereby enabling the variable inductor to be changed into multiple inductance values. At least one switch connected in series with the inductor not connected to the circuit is turned off, making the inductor in an open circuit state. This achieves the goal of cutting off the closed circuit of the inductor not connected to the circuit through at least one switch connected in series with the inductor not connected to the circuit, thereby avoiding leakage current due to the closed circuit of the inductor not connected to the circuit not being cut off, which would cause the inductance of the variable inductor to be inaccurate. It can also make the variable inductor have a high Q value when switching between large and small inductance. The structure is simple, small in area and low in cost.
[0033] The embodiments disclosed herein can be applied to any design scheme with variable inductance, and can be applied to any circuit containing variable inductance, such as, but not limited to, RF passive variable resonators, matching circuits, filtering circuits, etc., and can be widely used in multi-band receivers and transmitters.
[0034] The embodiments of this disclosure will be described in detail below.
[0035] This disclosure provides a variable inductor A, such as... Figure 2 As shown, the variable inductor A includes: multiple inductors L and multiple switches SW; wherein, each inductor L includes a first terminal and a second terminal, the multiple inductors L are connected in series in such a way that the second terminal of one inductor L is connected to the first terminal of the next inductor L, and each switch SW is connected between the second terminal of any inductor L and the first terminal of another inductor L or between the first terminal of any inductor L and the second terminal of another inductor L.
[0036] The closing and closing of multiple switches SW are controlled to enable all or part of multiple inductors to be connected to a variable inductor;
[0037] In this case, at least one switch connected in series with the inductor that is not connected to the circuit is turned off, so that the inductor that is not connected to the circuit is in an open circuit state.
[0038] In this embodiment of the disclosure, the circuit refers to the circuit where the variable inductor is located, and can be any circuit that needs to use a variable inductor. No specific circuit is limited here.
[0039] In this embodiment of the disclosure, an inductor not connected to the circuit being in an open circuit state means that the inductor not connected to the circuit will not form a closed circuit capable of transmitting current signals with the control switch (i.e., the switch selected to close according to the inductance requirement).
[0040] In this embodiment of the disclosure, a switch SW can be set between any two inductors L, so that the variable inductor can have different inductance values by controlling any one or more of the set switches, thereby meeting the inductance requirements of different scenarios.
[0041] In this embodiment of the disclosure, based on the series connection of multiple inductors L, a switch can be connected between any two terminals of the multiple inductors. Each switch (e.g., any y-th switch) can be connected to one or more inductors, and can be connected to at least one switch (e.g., any z-th switch). When the y-th switch is closed, the at least one switch (e.g., any z-th switch) connected to the y-th switch is controlled to open (or turn off), so that the inductors originally connected to the y-th switch are no longer connected to the y-th switch. This avoids the situation where, even when the signal on the variable inductor flows through the y-th switch, these connected inductors and the y-th switch still form a closed circuit. Thus, the closed circuit will share the signal flowing through the y-th switch, resulting in the flow of current signal in the closed circuit, which leads to the inductance error of the variable inductor and the decrease in the Q value.
[0042] In the embodiments of this disclosure, the switch can be any type of switching device, for example, the switch can include, but is not limited to, a metal-insulator semiconductor MOSFET.
[0043] In this embodiment of the disclosure, one or more of the multiple inductors may be composed of multiple sub-inductors connected in series. The number of sub-inductors is not limited here.
[0044] In the embodiments disclosed herein, such as Figure 2 As shown, the multiple inductors L can include, but are not limited to, inductors L1, L2, ..., Lk, Lk+1, ..., Ln-, Ln, where k and n are positive integers, and k is greater than 1 and less than n; the multiple switches SW can include, but are not limited to, switches SW1, SW2, SW1, SW1, SW1, ..., Lm, where m is a positive integer. The two terminals of the variable inductor are P1 and P2.
[0045] In this embodiment of the disclosure, for example, in a variable inductor, switch SW1, inductor L2, switch SW3, inductor Lk, switch SWm, inductor Lk+1, switch SW5, inductor Ln-1, and inductor Ln form a circuit. When switch SW1 is closed, all inductors in this circuit are short-circuited. If, in this case, switches SW3, SWm, and SW5 are still closed, the circuit forms a closed circuit, which may allow current signals to flow through it. Therefore, at this time, at least one of switches SW3, SWm, and SW5 can be opened to disconnect the circuit, thereby cutting off the possibility of current signals flowing through it. This ensures that the inductance of the variable inductor is determined only by inductor L1, thus guaranteeing the accuracy of the inductance of the variable inductor and ensuring that the Q value does not decrease.
[0046] In the embodiments disclosed herein, the situation is the same in other circuits where switch SW1 is located (e.g., the circuit formed by switch SW1, switch SW2, and inductor Ln, the circuit formed by switch SW1, inductor L2, switch SW4, inductor Ln-1, and inductor Ln, etc.), and will not be described in detail here.
[0047] In this embodiment of the disclosure, by Figure 2 It is known that the variable capacitor may contain switches such as SW3 and SW5. These switches are directly connected in series with the inductor and may exist in multiple circuits. Therefore, when controlling any one switch to be closed, we can first find the switch in the circuit containing that switch that is used the most frequently in the circuit, and then first open the switch that is used the most frequently in the circuit, so that multiple circuits can be disconnected through this one switch. After disconnecting multiple circuits, we can then check if there are any undisconnected circuits in the circuit containing the closed switch. If so, we can find one or more switches in the corresponding circuit that are not closed, and open the corresponding switches, so that the corresponding circuits can be disconnected.
[0048] In this embodiment of the disclosure, there are x inductors, where x is an even number; wherein, one of the multiple switches is connected between the x / 2th inductor and the (x / 2+1)th inductor, and each of the remaining switches is connected between the second terminal of the i-th inductor and the first terminal of the (x-i+1)-th inductor; i is greater than or equal to 1 and less than x.
[0049] In this embodiment of the disclosure, when any one of the multiple switches is closed, the remaining switches can all be opened.
[0050] In this embodiment of the disclosure, the remaining switches refer to the switches other than the closed switch among the plurality of switches.
[0051] In the embodiments disclosed herein, such as Figure 3 As shown, a symmetrical design method of the present disclosure embodiment is given, wherein x inductors L may include, but is not limited to, inductors L11, L12, ..., L1n and L21, L22, ..., L2n, where 1n and 2n are positive integers. There may be x / 2 switches SW, which may include, but are not limited to, switches SW11, SW12, ..., SW1m, where 1m is a positive integer. The two terminals of the variable inductors are P11 and P12, and the connection terminals between the inductors include: P13, P14, P15, P16. In this embodiment, inductors L11, L12, ..., L1n are located on the first side of switches SW11, SW12, ..., SW1m, and inductors L21, L22, ..., L2n are located on the second side of switches SW11, SW12, ..., SW1m. Switches SW11, SW12, ..., SW1m are connected across the inductors on the first side and the inductors on the second side. When any one switch SW is closed (e.g., SW12), the other switches (e.g., SW11, ..., SW1m) are open. In embodiments of this disclosure, as shown in Figures 4(a), 4(b), and 4(c), several embodiments of the closed and open states of the switches are given.
[0052] In the embodiments of this disclosure, in the above-described symmetrical design method, the number of inductors between the first terminals of any adjacent switches is the same, and the number of inductors between the second terminals of any adjacent switches is the same.
[0053] In this embodiment of the disclosure, the number of inductors can be one or more, and the exact number is not limited here; it can be defined according to the requirements.
[0054] In this embodiment of the disclosure, for example, the number of inductors between P11 and P13 can be the same as the number of inductors between P13 and P15, and the number of inductors between P12 and P14 can be the same as the number of inductors between P14 and P16.
[0055] In this embodiment of the disclosure, in order to achieve structural symmetry, the number of inductors between P11 and P13 can be set to be the same as the number of inductors between P12 and P14, and the number of inductors between P13 and P15 can be the same as the number of inductors between P14 and P16.
[0056] In the embodiments of this disclosure, the above-described symmetrical design method is only one detailed embodiment of the scheme of this disclosure. Since there are many symmetrical design methods, they will not be listed one by one here. Any other symmetrical design method is within the protection scope of the embodiments of this disclosure.
[0057] In the embodiments disclosed herein, such as Figure 5 As shown, a detailed embodiment of the present disclosure is presented.
[0058] In this embodiment of the disclosure, Figure 5 The inductor L includes a first inductor L31, a second inductor L32, a third inductor L33, and a fourth inductor L34; the switch SW includes a first switch SW31 and a second switch SW32.
[0059] The first inductor L31, the second inductor L32, the third inductor L33 and the fourth inductor L34 are connected in series.
[0060] The first terminal of the first inductor L31 is the first terminal of the variable inductor, and the second terminal of the fourth inductor L34 is the second terminal of the variable inductor.
[0061] The first switch SW31 is connected between the second terminal of the first inductor L31 and the first terminal of the fourth inductor L34;
[0062] The second switch SW32 is connected in series between the second inductor L32 and the third inductor L33.
[0063] In this embodiment of the disclosure, the two terminals of the variable inductor are P21 and P22, the connection terminals between the inductors include P23 and P24, and the connection terminals between the switch SW32 and the inductor are P15 and P16.
[0064] In this embodiment of the disclosure, Figure 5 A dual-switch design is adopted. Between nodes P23 and P24, the first switch SW31 is connected in series on the short conductor path L31+L34; between nodes P25 and P26, the second switch SW32 is connected in series on the long conductor path L31+L32+L33+L34.
[0065] In this embodiment of the disclosure, when the first switch SW31 is in the closed state, the second switch SW32 is in the open state;
[0066] When the second switch SW32 is in the closed state, the first switch SW31 is in the open state.
[0067] In this embodiment, when the first switch SW31 is closed and the second switch SW32 is open, the short wire path is connected and the long wire path is disconnected. After the signal flows through inductor L31, it flows directly to inductor L34 and will no longer flow through inductors L32 and L33. At this time, the variable inductor operates in the small inductor mode. Conversely, when the second switch SW32 is closed and the first switch SW31 is open, the long wire path is connected and the short wire path is disconnected. After the signal flows through inductor L31, it passes through inductors L32 and L33 in sequence before flowing to inductor L34. At this time, the variable inductor operates in the large inductor mode.
[0068] In the embodiments disclosed herein, such as Figure 6As shown, the switch can be equivalent to the on-resistance Ron when closed and the off-resistance parasitic capacitance Coff when open. In the small inductor operating mode, after switch SW31 is closed and switch SW32 is closed, the signal flow in the L32+L33 path can be cut off, avoiding errors in the inductance value and a decrease in the Q value. The same principle applies in the large inductor mode. Therefore, in the operating frequency range of 0 to 7.2 GHz (gigahertz), this variable inductor can simultaneously take into account the Q value in both large and small inductor operating states, with the Q value change before and after switching not exceeding 5%, and nearly doubling the Q value under the small inductor mode.
[0069] This disclosure also provides an electronic device B, such as... Figure 7 As shown, this includes the variable inductor A.
[0070] In this embodiment of the disclosure, the electronic device may include, but is not limited to, a radio frequency transmitter.
[0071] In the embodiments disclosed herein, any of the aforementioned embodiments of the variable inductor are applicable to the embodiments of the electronic device, and will not be described in detail here.
[0072] Those skilled in the art will understand that all or some of the functional modules / units disclosed above can be implemented as software, firmware, hardware, or suitable combinations thereof.
[0073] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be executed by several physical components working together.
[0074] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technique for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH) or other disk storage; read-only optical disc (CD-ROM), digital versatile disc (DVD) or other optical disc storage; magnetic cartridges, magnetic tapes, disk storage or other magnetic storage; and any other media that can be used to store desired information and can be accessed by a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0075] This disclosure has disclosed exemplary embodiments, and although specific terminology has been used, it is for general illustrative purposes only and should not be construed as limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of this disclosure as set forth by the appended claims.
Claims
1. A variable inductor, comprising: Multiple inductors and multiple switches; wherein each inductor includes a first terminal and a second terminal, the multiple inductors are connected in series such that the second terminal of one inductor is connected to the first terminal of the next inductor, and each of the switches is connected between the second terminal of any one inductor and the first terminal of another inductor or between the first terminal of any one inductor and the second terminal of another inductor; The closing and closing of the plurality of switches are controlled to enable all or part of the plurality of inductors to be connected to the circuit; In this case, at least one switch connected in series with the inductor not connected to the circuit is turned off, so that the inductor not connected to the circuit is in an open circuit state.
2. The variable inductor according to claim 1, wherein, The plurality of inductors is x inductors, where x is an even number; In this configuration, one of the multiple switches is connected between the x / 2th inductor and the (x / 2+1)th inductor, and each of the remaining switches is connected between the second terminal of the i-th inductor and the first terminal of the (x-i+1)-th inductor; i is greater than or equal to 1 and less than x.
3. The variable inductor according to claim 2, wherein, The number of inductors between the first terminals of any two adjacent switches is the same, and the number of inductors between the second terminals of any two adjacent switches is the same.
4. The variable inductor according to claim 2, wherein, The inductor includes a first inductor, a second inductor, a third inductor, and a fourth inductor; the switch includes a first switch and a second switch; The first inductor, the second inductor, the third inductor, and the fourth inductor are connected in series. The first terminal of the first inductor is the first terminal of the variable inductor, and the second terminal of the fourth inductor is the second terminal of the variable inductor; The first switch is connected between the second terminal of the first inductor and the first terminal of the fourth inductor; The second switch is connected in series between the second inductor and the third inductor.
5. The variable inductor according to claim 4, wherein, When the first switch is in the closed state, the second switch is in the open state; When the second switch is in the closed state, the first switch is in the open state.
6. The variable inductor according to any one of claims 1-5, wherein, The switch includes a metal-insulator-semiconductor MOSFET.
7. The variable inductor according to any one of claims 1-5, wherein, One or more of the plurality of inductors are composed of a plurality of sub-inductors connected in series.
8. The variable inductor according to any one of claims 1-3, wherein, When any one of the multiple switches is closed, the other switches are open.
9. An electronic device, wherein, Includes the variable inductor as described in any one of claims 1-8.
10. The electronic device according to claim 9, wherein, The electronic device includes a radio frequency transmitter.