A redundant circuit

Abstract

The application discloses a kind of redundancy circuits, belong to integrated circuit technical field, including multiple resistors, multiple triodes, multiple transistors, the second end of second resistor is connected with the third end of third triode and the first end of second triode, the second end of third resistor is connected with the third end of second triode, the first end and third end of first triode, the second end of fifth resistor is connected with the third end of sixth triode and the first end of fifth triode, the second end of sixth resistor is connected with the third end of fifth triode, the first end and third end of fourth triode.The redundancy circuit of the application utilizes the advantage that MOS tube has small conduction loss and the characteristics of slow opening and fast closing, realizes smooth commutation in the process of two-way power supply switching, and there is no current spike.Moreover, the on-voltage drop of the MOS tube of the present scheme is very small, which is conducive to improving the overall efficiency of the system.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a redundant circuit. Background Technology

[0002] In the operation of electronic systems and various industrial equipment, the continuous and stable operation of the system often plays a decisive role in the safety and reliability of the application scenario. To achieve this goal, redundant circuit design schemes are widely used. Redundant circuits refer to adding extra circuit structures and electronic components to the normal circuit that performs the core functions. The added circuits and components usually do not participate in the operation when the system is in normal operation, but when the normal circuit fails and cannot perform the preset functions, the extra circuit will intervene in time and take over the work to ensure that the entire system maintains normal operation. In many cases, the continuous operation of the system is crucial. For example, in the field of life support equipment in hospitals, the stable operation of the equipment is directly related to the life safety of patients; in the field of aircraft flight control systems, even a minor circuit failure can lead to a serious safety accident. Therefore, reducing the system risk caused by a single failure through redundant circuit design, thereby improving the overall system reliability, has become an important research direction and application trend in related technical fields.

[0003] Existing redundant circuits typically employ two methods. The first uses two power supplies and two diodes; the one with the more negative voltage conducts. However, diodes have large forward voltage drops, leading to high circuit losses and low system efficiency when current is high. The second method utilizes MOSFETs and comparators to achieve negative voltage redundancy. The output voltage is compared with the two input voltages by the comparator; the one with the larger negative voltage drives the MOSFET to conduct, supplying power to the load. However, MOSFETs cannot achieve slow-on, fast-off characteristics, creating a risk of shoot-through when switching between the two power supplies. Summary of the Invention

[0004] The present invention aims to provide a redundant circuit.

[0005] To achieve the above objectives, the technical solution of the present invention is as follows:

[0006] A redundant circuit includes multiple resistors, multiple transistors, and multiple diodes. A first resistor's first terminal is connected to the first terminals of a second resistor and a third resistor. A second terminal of the first resistor is connected to the first terminal of a third transistor and the third terminal of a first diode. A second terminal of the second resistor is connected to the third terminal of the third transistor and the first terminal of the second transistor. A second terminal of the third resistor is connected to the third terminal of the second transistor, the first terminal of the first transistor, and the third terminal of the first transistor. A second terminal of the third transistor is connected to the second terminal of the first transistor, the second terminal of the first transistor, and the first terminal of a seventh resistor. The first terminal of the first transistor is connected to the second terminal of the second transistor and... The first input voltage source, the second terminal of the seventh resistor is grounded, the first terminal of the fourth resistor is connected to the first terminal of the fifth resistor and the first terminal of the sixth resistor, the second terminal of the fourth resistor is connected to the first terminal of the sixth transistor and the third terminal of the second transistor, the second terminal of the fifth resistor is connected to the third terminal of the sixth transistor and the first terminal of the fifth transistor, the second terminal of the sixth resistor is connected to the third terminal of the fifth transistor, the first terminal of the fourth transistor and the third terminal of the fourth transistor, the second terminal of the sixth transistor is connected to the second terminal of the second transistor, the second terminal of the fourth transistor and the first terminal of the seventh resistor, and the first terminal of the second transistor is connected to the second terminal of the fifth transistor and the second input voltage source.

[0007] Furthermore, the first end of the first resistor is connected to the first end of the second resistor, the first end of the third resistor, and ground; the first end of the fourth resistor is connected to the first end of the fifth resistor, the first end of the sixth resistor, and ground; the circuit is a negative voltage redundant circuit.

[0008] Furthermore, the third and sixth transistors are NPN transistors, with the first terminal being its collector, the second terminal being its emitter, and the third terminal being its base.

[0009] Furthermore, the negative voltage redundancy circuit realizes the negative voltage redundancy function of low voltage path conduction.

[0010] Furthermore, the first end of the first resistor is connected to the first end of the second resistor, the first end of the third resistor, and the third power supply; the first end of the fourth resistor is connected to the first end of the fifth resistor, the first end of the sixth resistor, and the third power supply. The circuit is a positive voltage redundant circuit.

[0011] Furthermore, the third and sixth transistors are PNP type transistors, with the first terminal being its emitter, the second terminal being its collector, and the third terminal being its base.

[0012] Furthermore, the positive voltage redundancy circuit realizes the positive voltage redundancy function of high voltage path conduction.

[0013] Furthermore, the third power supply is 15V.

[0014] Furthermore, the first, second, fourth, and fifth transistors are NPN transistors, with the first terminal of each transistor being its collector, the second terminal being its emitter, and the third terminal being its base.

[0015] Furthermore, the first transistor and the second transistor are N-type MOSFETs, with the first terminal of each transistor being its drain, the second terminal of each transistor being its source, and the third terminal of each transistor being its gate.

[0016] Beneficial effects: This invention provides a redundant circuit that utilizes the low conduction loss and slow on / off characteristics of MOSFETs to achieve smooth commutation without current spikes during the switching between two power supplies. Furthermore, the MOSFET on-state voltage drop in this solution is very small, which helps improve the overall system efficiency.

[0017] To make the above-mentioned features and advantages of the invention more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0018] Figure 1 This is a circuit topology diagram of a first specific embodiment of a redundant circuit according to the present invention.

[0019] Figure 2 This is a circuit topology diagram of a second specific embodiment of a redundant circuit according to the present invention.

[0020] Figure 3 for Figure 1 A schematic diagram of the circuit simulation.

[0021] Figure 4 for Figure 1 Simulation waveform diagram of the voltage V(vd1) of the circuit input voltage source VIN1 decreasing.

[0022] Figure 5 for Figure 1 Simulation waveform diagram of the voltage V(vd1) rising when the input voltage source VIN1 rises.

[0023] Figure 6 This is a typical application circuit diagram for module XCM05OR.

[0024] Figure 7 The waveform diagram is shown when the load is unloaded.

[0025] Figure 8 The experimental waveform is shown when the load is 1.5Ω. Detailed Implementation

[0026] To make the objectives and technical solutions of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0027] Figure 1 This is a circuit topology diagram of a first specific embodiment of a redundant circuit according to the present invention. Figure 1 As shown, a redundant circuit includes multiple resistors, multiple transistors, and multiple diodes. The first terminal of resistor R1 is grounded; the first terminals of resistors R2 and R3 are connected; the second terminal of resistor R1 is connected to the first terminal of transistor Q3 and the third terminal of transistor M1; the second terminal of resistor R2 is connected to the third terminal of transistor Q3 and the first terminal of transistor Q2; the second terminal of resistor R3 is connected to the third terminal of transistor Q2, the first terminal of transistor Q1, and the third terminal of transistor Q1; the second terminal of transistor Q3 is connected to the second terminal of transistor M1, the second terminal of transistor Q1, and the first terminal of resistor RL; the first terminal of transistor M1 is connected to the second terminal of transistor Q2 and the input voltage source VIN. The second terminal of resistor RL is grounded, the first terminal of resistor R4 is grounded, the first terminals of resistors R5 and R6 are connected, the second terminal of resistor R4 is connected to the first terminal of transistor Q6 and the third terminal of transistor M2, the second terminal of resistor R5 is connected to the third terminal of transistor Q6 and the first terminal of transistor Q5, the second terminal of resistor R6 is connected to the third terminal of transistor Q5, the first terminal of transistor Q4, the second terminal of transistor Q6 is connected to the second terminal of transistor M2, the second terminal of transistor Q4 and the first terminal of resistor RL, the first terminal of transistor M2 is connected to the second terminal of transistor Q5 and the input voltage source VIN1, and the voltage at the first terminal of resistor RL is the output voltage Vo.

[0028] Optionally, transistors Q1, Q2, Q3, Q4, Q5, and Q6 are NPN transistors, with the first terminal of each transistor being its collector, the second terminal being its emitter, and the third terminal being its base.

[0029] Optionally, each transistor is model number 2N2222.

[0030] Optionally, transistors M1 and M2 are N-type MOSFETs; the first terminal of each transistor is its drain, the second terminal of each transistor is its source, and the third terminal of each transistor is its gate.

[0031] Optionally, the transistor model is BSZ130N03LS G.

[0032] The following will continue to combine Figure 1 The working principle of the first specific embodiment of the present invention is introduced. Figure 1 As a negative voltage redundant circuit, when the input voltage source VIN1 is lower than the input voltage source VIN, transistor M2 is turned on. The input voltage source VIN1 flows to the output voltage Vo through the body diode of transistor M2. At this time, the current flowing through resistor R6 is relatively large. Since transistors Q4 and Q5 form a current mirror, the current flowing through resistor R5 is the same as the current flowing through resistor R6. The voltage difference of resistor R5 is greater than the voltage difference of the other resistor R2. The base voltage of transistor Q6 is low, so transistor Q6 is turned off. The driving voltage charges the gate junction capacitance of transistor M2 through resistor R4, and transistor M2 is turned on slowly.

[0033] Furthermore, if the base voltage of transistor Q3 is high, then transistor Q3 conducts, discharging the gate junction capacitance of transistor M1, allowing transistor M1 to quickly turn off, thus achieving the negative voltage redundancy function of low-voltage path conduction. The reverse is also true.

[0034] Furthermore, since the body diode of a transistor is unidirectional, when one path is not conducting, the body diode will prevent current from flowing back from the output terminal into the unconducted input power path, thus having the function of reverse flow.

[0035] Figure 3 for Figure 1 The circuit simulation diagram is shown below. Figure 3 As shown, a simulation model was built in LT Spice. The simulation requires two voltage sources: one -5V and the other varying from 0 to -5.2V, with a load of 5A. The low-voltage path provides the load current. The first voltage source V1 is set to -5V, and the second voltage source V2 drops from 0V to -5.2V in the 0-200µs range, remains at -5.2V in the 200µs-300µs range, and rises back to 0V in the 300µs-400µs range. Resistors R1 and R4 are set to 1kΩ, R2 and R5 to 2.2kΩ, and R3 and R6 to 3kΩ.

[0036] Figure 4 for Figure 1The simulation waveform diagram of the voltage V(vd1) of the input voltage source VIN1 when it drops is shown. V(VG,VS) is the driving voltage of transistor M1, V(VG1,VS) is the driving voltage of transistor M2, I(Rl) is the load current, I(V1) is the current provided by the input voltage source VIN, I(V2) is the current provided by the input voltage source VIN1, V(vd) is the voltage of the input voltage source VIN, V(vd1) is the voltage of the input voltage source VIN1, and V(vs) is the output voltage. When the voltage V(vd1) of the input voltage source VIN1 drops from 0V to -4.95V, transistor M2 begins to conduct, and the input voltage source VIN1 gradually provides current until V(vd1) drops to -5.05V. At this point, transistor M1 is completely turned off, and transistor M2 is fully turned on. The input voltage source VIN1 then carries the entire load current. The drive voltage waveforms of transistors M1 and M2 show that the switching transistors achieve slow-on and fast-off characteristics, and the two power supply currents switch smoothly without current spikes, consistent with the principle analysis. The output voltage waveform of V(vs) shows that the on-state voltage drop of the MOSFET is very small, only 70mV under a 5A load, which helps improve the overall system efficiency.

[0037] Figure 5 for Figure 1 The simulation waveform diagram shows the rise of the voltage V(vd1) of the input voltage source VIN1. When the voltage V(vd1) of the input voltage source VIN1 rises from -5.2V to -5.05V, transistor M1 starts to conduct, and the input voltage source VIN gradually provides current until V(vd1) rises to -4.95V. At this point, transistor M2 is completely turned off, and transistor M1 is fully turned on. The input voltage source VIN1 bears the entire load current. From the drive voltage waveforms of transistors M1 and M2, it can be seen that the switching transistors achieve slow-on and fast-off characteristics, and the two power supply currents achieve smooth switching without current spikes, which is consistent with the principle analysis.

[0038] Figure 2 This is a circuit topology diagram of a second specific embodiment of a redundant circuit according to the present invention. Figure 2As shown, a redundant circuit includes multiple resistors, multiple transistors, and multiple diodes. The first terminal of resistor R1 is connected to the power supply VCC, the first terminals of resistors R2 and R3, the second terminal of resistor R1 is connected to the first terminal of transistor Q7 and the third terminal of transistor M1, the second terminal of resistor R2 is connected to the third terminal of transistor Q7 and the first terminal of transistor Q2, the second terminal of resistor R3 is connected to the third terminal of transistor Q2, the first and third terminals of transistor Q1, the second terminal of transistor Q7 is connected to the second terminal of transistor M1, the second terminal of transistor Q1, and the first terminal of resistor RL, and the first terminal of transistor M1 is connected to the second terminal of transistor Q2 and the input voltage source VIN. The second terminal of resistor RL is grounded. The first terminal of resistor R4 is connected to the power supply VCC. The first terminals of resistors R5 and R6 are also connected. The second terminal of resistor R4 is connected to the first terminal of transistor Q8 and the third terminal of transistor M2. The second terminal of resistor R5 is connected to the third terminal of transistor Q8 and the first terminal of transistor Q5. The second terminal of resistor R6 is connected to the third terminal of transistor Q5, the first terminal of transistor Q4, and the third terminal of transistor Q8. The second terminal of transistor Q8 is connected to the second terminal of transistor M2, the second terminal of transistor Q4, and the first terminal of resistor RL. The first terminal of transistor M2 is connected to the second terminal of transistor Q5 and the input voltage source VIN1. The voltage at the first terminal of resistor RL is the output voltage Vo.

[0039] Optionally, transistors Q1, Q2, Q4, and Q5 are NPN transistors, with the first terminal of each transistor being its collector, the second terminal being its emitter, and the third terminal being its base.

[0040] Optionally, transistors Q7 and Q8 are PNP transistors, with the first terminal of each transistor being its emitter, the second terminal of each transistor being its collector, and the third terminal of each transistor being its base.

[0041] Optionally, transistors M1 and M2 are N-type MOSFETs; the first terminal of each transistor is its drain, the second terminal of each transistor is its source, and the third terminal of each transistor is its gate.

[0042] Optionally, the power supply VCC can be 15V.

[0043] The following will continue to combine Figure 2 The working principle of the second specific embodiment of the present invention will be introduced. Figure 2As a positive voltage redundant circuit, when the input voltage source VIN1 is higher than the input voltage source VIN, the input voltage source VIN1 flows to the output voltage Vo through the body diode of transistor M2. At this time, the current flowing through resistor R6 is small. Since transistors Q4 and Q5 form a current mirror, the current flowing through resistor R5 is the same as the current flowing through resistor R6. Therefore, the voltage difference of resistor R5 is less than the voltage difference of resistor R2. The base voltage of transistor Q8 is high, so transistor Q8 is turned off. The driving voltage charges the gate junction capacitance of transistor M2 through resistor R4, and transistor M2 is turned on slowly.

[0044] Furthermore, when the base voltage of transistor Q7 is low, transistor Q7 conducts, discharging the gate junction capacitance of transistor M1, allowing transistor M1 to quickly turn off, thus achieving positive voltage redundancy for high-voltage path conduction. The reverse is also true.

[0045] Furthermore, since the body diode of a transistor is unidirectional, when one path is not conducting, the body diode will prevent current from flowing back from the output terminal into the unconducted input power path, thus having the function of reverse flow.

[0046] Furthermore, the components other than transistors are packaged into a module named XCM05OR. The module is a positive voltage ideal diode controller used to drive an external N-type MOSFET. Figure 6 Here is a typical application circuit diagram for module XCM05OR, such as... Figure 6 As shown, the first terminal of transistor Qa is connected to the VD terminal of module XCM05OR-1, the VD terminal of module XCM05OR-2, the first terminal of transistor Qb, and the output voltage V. OUT The second terminal of transistor Qa is connected to the VS terminal of module XCM05OR-1 and the input voltage V. IN1 The third terminal of transistor Qa is connected to the VG terminal of module XCM05OR-1, and the VIN terminal of module XCM05OR-1 is connected to capacitor C. IN1 The first terminal, capacitor C IN1 The second terminal of transistor Qb is connected to the GND terminal of module XCM05OR-1 and ground; the second terminal of transistor Qb is connected to the VS terminal of module XCM05OR-2 and the input voltage V. IN2 The third terminal of transistor Qb is connected to the VG terminal of module XCM05OR-2, and the VIN terminal of module XCM05OR-2 is connected to capacitor C. IN2 The first terminal, capacitor C IN2 The second end connects to the GND terminal of module XCM05OR-2 and ground.

[0047] Optionally, transistors Qa and Qb are N-type MOSFETs; the first terminal of each transistor is its drain, the second terminal of each transistor is its source, and the third terminal of each transistor is its gate.

[0048] Optionally, capacitor C IN1 and capacitor C IN2 Its function is to filter and suppress voltage fluctuations in the input power supply. Whether to add a capacitor depends on actual needs. If the input power supply itself is stable, it is not necessary to connect it; if the power supply fluctuates greatly, this capacitor needs to be connected in parallel to optimize performance.

[0049] Furthermore, utilizing multiple XCM05OR modules to create redundancy reduces power consumption, heat dissipation, and printed circuit board (PCB) area. The XCM05OR module easily enables parallel redundant connections of multiple positive power supplies, achieving redundancy to improve overall system reliability. If a power supply fails or short-circuits, the XCM05OR module quickly shuts down the MOSFET, minimizing instantaneous reverse current.

[0050] Figure 7 The waveform diagram is shown when the load is unloaded. Figure 8 The experimental waveform diagram is shown below when the load is 1.5Ω. Figure 7 and Figure 8 As shown, channel CH1 is the input voltage source VIN1, with a voltage range of 0~8V, and is a square wave with a period of 1s. Channel CH2 is the input voltage source VIN2, which is a constant voltage of 5V. Channel CH3 is the output voltage V. OUT When the input voltage source V IN1 Higher than the input voltage source V IN2 Time output input voltage source V IN1 When the input voltage source V IN2 Higher than the input voltage source V IN1 Time output input voltage source V IN2 Channel CH4 represents the load current.

[0051] This invention provides a redundant circuit that utilizes the low conduction loss and slow on / off characteristics of MOSFETs to achieve smooth commutation without current spikes during the switching between two power supplies. Furthermore, the MOSFET on-state voltage drop in this solution is very small, which helps improve the overall system efficiency.

[0052] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Anyone skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A redundant circuit, characterized in that, This includes multiple resistors, multiple transistors, and multiple diodes. The first terminal of a first resistor is connected to the first terminals of a second and a third resistor. The second terminal of the first resistor is connected to the first terminal of a third transistor and the third terminal of a first transistor. The second terminal of the second resistor is connected to the third terminal of the third transistor and the first terminal of the second transistor. The second terminal of the third resistor is connected to the third terminal of the second transistor, the first terminal of the first transistor, and the third terminal of the first transistor. The second terminal of the third transistor is connected to the second terminal of the first transistor, the second terminal of the first transistor, and the first terminal of a seventh resistor. The first terminal of the first transistor is connected to the second terminal of the second transistor and the first diode. The input voltage source is connected to the second terminal of the seventh resistor, which is grounded. The first terminal of the fourth resistor is connected to the first terminal of the fifth resistor and the first terminal of the sixth resistor. The second terminal of the fourth resistor is connected to the first terminal of the sixth transistor and the third terminal of the second transistor. The second terminal of the fifth resistor is connected to the third terminal of the sixth transistor and the first terminal of the fifth transistor. The second terminal of the sixth resistor is connected to the third terminal of the fifth transistor, the first terminal of the fourth transistor, and the third terminal of the fourth transistor. The second terminal of the sixth transistor is connected to the second terminal of the second transistor, the second terminal of the fourth transistor, and the first terminal of the seventh resistor. The first terminal of the second transistor is connected to the second terminal of the fifth transistor and the second input voltage source.

2. The redundant circuit as described in claim 1, characterized in that, The first end of the first resistor is connected to the first end of the second resistor, the first end of the third resistor, and ground. The first end of the fourth resistor is connected to the first end of the fifth resistor, the first end of the sixth resistor, and ground. The circuit is a negative voltage redundant circuit.

3. The redundant circuit as described in claim 2, characterized in that, The third and sixth transistors are NPN transistors. The first terminal of the transistor is its collector, the second terminal is its emitter, and the third terminal is its base.

4. A redundant circuit as described in claim 3, characterized in that, The negative voltage redundancy circuit realizes the negative voltage redundancy function of low voltage path conduction.

5. A redundant circuit as described in claim 1, characterized in that, The first end of the first resistor is connected to the first end of the second resistor, the first end of the third resistor, and the third power supply. The first end of the fourth resistor is connected to the first end of the fifth resistor, the first end of the sixth resistor, and the third power supply. The circuit is a positive voltage redundant circuit.

6. The redundant circuit as described in claim 5, characterized in that, The third and sixth transistors are PNP transistors. The first terminal of the transistor is its emitter, the second terminal is its collector, and the third terminal is its base.

7. A redundant circuit as described in claim 6, characterized in that, Positive voltage redundancy circuits enable positive voltage redundancy for high-voltage path conduction.

8. A redundant circuit as described in claim 7, characterized in that, The third power supply is 15V.

9. A redundant circuit as described in claim 1, characterized in that, The first, second, fourth, and fifth transistors are NPN transistors. The first terminal of each transistor is its collector, the second terminal is its emitter, and the third terminal is its base.

10. A redundant circuit as described in claim 9, characterized in that, The first and second transistors are N-type MOSFETs, with the first terminal of each transistor being its drain, the second terminal being its source, and the third terminal being its gate.

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