LED device for improving carrier concentration of P-type semiconductor based on structure pressurization

Abstract

The invention discloses an LED device for improving the carrier concentration of a P-type semiconductor based on structural pressurization. The LED device comprises an N-type semiconductor, a patterned P-type semiconductor and a quantum well. The LED device for improving the carrier concentration of the P-type semiconductor based on structural pressurization comprises an N-type semiconductor and is characterized in that the N-type semiconductor is provided with a quantum well, the quantum well is connected with a semiconductor or an insulating patterned structure with the carrier concentration smaller than the specific carrier concentration, a patterned P-type semiconductor matched with the quantum well is arranged above the quantum well, and the patterned P-type semiconductor is connected with the N-type semiconductor. The P-type carrier concentration in the LED device can be increased, the recombination efficiency can be improved, and the quantum well with a semiconductor or an insulating patterned structure with the carrier concentration smaller than the specific carrier concentration can reduce surface radiation recombination, reduce total reflection of a light source in the quantum well, reduce electric heat loss, improve electro-optical conversion efficiency and improve light extraction efficiency. The method can be compatible with an existing LED chip or lamp bead process method, is simple and reliable, and has a great application market.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to an LED device based on structural pressure enhancement to increase the carrier concentration of a P-type semiconductor. Background Technology

[0002] Currently, in ordinary LEDs, especially GaN-based LEDs, the carrier concentration in the P-type semiconductor is too low, while the carrier concentration in the N-type semiconductor is much higher. This leads to an excess of electrons during quantum well recombination, causing leakage current in the P-type semiconductor and reducing the LED's electro-optical conversion efficiency. The current solution is to use an electron blocking layer to address this excess carrier problem. However, current intercalation layers, due to their electron blocking properties, differ from the materials used in current P-type semiconductors. The significant differences in lattice constants and thermal expansion coefficients between the two materials make it easy for defects to form at the interface. Furthermore, frequent switching and rapid temperature changes during LED operation can lead to thermal mismatch and generate more defects. These defects increase non-radiative recombination, reducing the LED's light extraction efficiency to some extent, diminishing some of the positive effects of the electron blocking layer, and lowering the LED's reliability. In addition, the electron blocking layer's effectiveness varies depending on the current, resulting in inconsistent blocking performance when the current varies significantly.

[0003] Furthermore, with the rapid development of displays, LEDs are moving towards Mini / Micro-LED. As LEDs become smaller, their surface effects become more and more pronounced. As the size decreases, the surface area / volume ratio increases, and the effect of surface effects becomes more and more obvious. Surface defects leading to non-radiative recombination have a greater impact on the light output efficiency of LEDs, significantly reducing their luminous efficiency. Therefore, how to reduce non-radiative recombination caused by surface defects is a major problem.

[0004] Furthermore, the light emitted from quantum wells currently has a very small exit cone angle due to the excessively large refractive indices of P-type and N-type semiconductors compared to air. As a result, most of this light undergoes total internal reflection and is reflected back into the quantum well for reabsorption, increasing heat loss and reducing light extraction efficiency.

[0005] Furthermore, according to the ABC recombination theory, there is a maximum value for the LEE efficiency of an LED. This maximum value corresponds to a suitable carrier concentration, which can be calculated using ABC. Therefore, how to dynamically control the P-type carrier concentration to maximize the LEE efficiency of an LED is a major problem.

[0006] Currently, Mini-LED+LCD display technology is gradually becoming the mainstream technology for TVs, flat-panel displays due to its advantages such as high contrast, low power consumption, good display effect, strong compatibility, minimal equipment changes required for technology upgrades, and low cost. However, in the application of this technology, it has been found that the more zones there are, the lower the LED power required within each zone, and the fewer LEDs are needed. Since each zone needs to be controlled individually, the 220V or other high voltage needs to be adjusted to the low voltage required by each LED zone. Because the voltage range of the transformer is relatively large, the power loss due to the transformer is relatively large, which is not energy-efficient. Therefore, with the current situation of large zones, the power required to drive is relatively large, and in some cases, it may even exceed the power required by the LED, resulting in high power consumption. If Micro-LED display is to be implemented in the future, each pixel will require one LED, and the voltage will need to be changed from 220V or other high voltage to the 2-4V range required by the LED (the turn-on voltage is different for red, blue, and green), which will cause even greater transformer losses and require even greater drive power. In order to reduce transformer losses, LEDs with higher turn-on voltages need to be implemented.

[0007] Current LEDs exhibit a droop phenomenon, specifically, the luminous efficiency of an LED initially increases and then decreases further as the driving current increases. There are many reasons for this droop phenomenon, one crucial one being the mismatch between the concentrations of electrons and holes. Their concentrations change inconsistently with increasing temperature. Blue LEDs could not be manufactured until the P-type carrier problem was solved by a Japanese Nobel laureate, demonstrating the impact of electron and hole carrier concentrations on LED luminous efficiency. This is also illustrated by the ABC theory of LEDs. Therefore, adjusting the appropriate electron and hole carrier concentrations can regulate the droop peak current, thereby improving the luminous efficiency of LEDs under high power and high current conditions.

[0008] Therefore, existing LEDs have the following technical problems:

[0009] 1. Electron blocking layers are prone to defects when addressing the phenomenon of excess electrons in quantum well recombination, which reduces the light extraction efficiency of LEDs. Furthermore, the blocking effect of electron blocking layers varies depending on the current. How can a better method be adopted to address the phenomenon of excess electrons?

[0010] 2. How to reduce non-radiative recombination caused by surface defects;

[0011] 3. How to prevent the light emitted from the quantum well from being reflected back into the internal quantum well and reabsorbed after total internal reflection, which increases heat loss and reduces light extraction efficiency;

[0012] 4. How can the concentration of p-type carriers be dynamically adjusted to maximize the LEE efficiency of an LED?

[0013] 5. How to solve the problem of significant electrical losses caused by transformers in Mini-LED+LCD display technology;

[0014] 6. How to adjust the appropriate carrier concentration of electrons and holes, and thus adjust the peak current of droop, thereby improving the light extraction efficiency of LEDs under high power and high current.

[0015] 7. Currently, LEDs, especially GaN-based materials such as P-GaN, P-AlGaN, or P-AlInN, suffer from excessively low P-type carrier concentration. How to increase the P-type carrier concentration of P-type GaN-based materials has become a major challenge. Summary of the Invention

[0016] The purpose of this invention is to provide an LED device that improves the carrier concentration of a P-type semiconductor based on structural pressure enhancement, so as to solve the problems mentioned in the background art.

[0017] To achieve the above objectives, the present invention provides the following technical solution:

[0018] An LED device based on structural pressure enhancement to increase the carrier concentration of a P-type semiconductor includes an N-type semiconductor, on which a quantum well is disposed. The quantum well includes a semiconductor or insulating patterned structure with a carrier concentration lower than a certain value. The P-type semiconductor above the quantum well includes a patterned structure adapted to it.

[0019] As a further aspect of the present invention: the quantum well includes multiple unconnected quantum well partitions of semiconductors with a specific carrier concentration, or multiple isolated patterned unconnected quantum well partitions, or a single quantum well partition of semiconductors or isolated patterned structures with a specific carrier concentration, wherein the quantum well partition is W-shaped or F-shaped.

[0020] As a further embodiment of the present invention: the P-type semiconductor includes multiple unconnected semiconductor partitions with a specific carrier concentration, or includes multiple isolated patterned unconnected semiconductor partitions, or includes a single semiconductor partition with a specific carrier concentration or an isolated patterned structure.

[0021] This includes multiple unconnected semiconductor regions with carrier concentrations below a specific value. This refers to a situation where the carrier concentrations of multiple semiconductors below a specific value are less than a certain threshold. For P-GaN and P-ALGaN, the corresponding threshold is 1*10. 16 cm -3At this point, the semiconductor with a concentration below a specific carrier concentration acts as an insulator, preventing carriers from passing through and thus controlling the hole injection location of the quantum well. The semiconductor partitioning mentioned in the latter part of the sentence refers to the concentration of a normal P-type semiconductor, mostly around 10. 16 cm -3 The term refers to multiple isolated, patterned, and unconnected conductive semiconductor partitions. Insulation occurs outside the semiconductor partitions to prevent charge carriers from passing through, thereby controlling the hole injection location of the quantum well. The semiconductor partitions in these multiple isolated, patterned, and unconnected conductive semiconductor partitions refer to regions with the concentration of a normal P-type semiconductor, where multiple partitions are unconnected. A single semiconductor partition with a semiconductor or isolated patterned structure having a lower than a specific charge carrier concentration refers to a single semiconductor partition that is completely connected.

[0022] As a further embodiment of the present invention: the quantum well includes multiple unconnected quantum well partitions of semiconductors with a specific carrier concentration, or multiple isolated patterned unconnected quantum well partitions, or a single quantum well partition of semiconductors or isolated patterned structures with a specific carrier concentration; the partitions herein are annular, sector-shaped, polygonal, or free-form patterned partitions.

[0023] As a further aspect of the present invention: the outer side of the patterned P-type semiconductor is insulated.

[0024] As a further aspect of the present invention: the central region of the patterned P-type semiconductor is insulating and transparent.

[0025] As a further embodiment of the present invention: the semiconductor partition having multiple non-interconnected semiconductors with a specific carrier concentration, or including multiple isolated patterned non-interconnected semiconductor partitions, or including a single semiconductor partition with a specific carrier concentration or an isolated patterned structure, these three types of semiconductor partitions are annular, sector-shaped, polygonal, or free-form patterned partitions.

[0026] As a further embodiment of the present invention: a P-type electrode is provided on the top of the patterned P-type semiconductor, an N-type electrode is also provided on the N-type semiconductor, an N-type buffer layer is provided on the bottom surface of the N-type semiconductor, and a substrate is provided on the bottom surface of the N-type buffer layer.

[0027] As a further aspect of the present invention: when the patterned P-type semiconductor is P-GaN or P-AlGaN, the specific carrier concentration is 1*102 16 cm -3 .

[0028] As a further aspect of the present invention: the quantum well is composed of multiple components, including at least a first specific melting point or boiling point or decomposition point component and a second specific melting point or boiling point or decomposition point component, wherein the second specific melting point or boiling point or decomposition point component is a patterned material, and the first specific melting point is less than the second specific melting point in the quantum well, or the first specific boiling point is less than the second specific boiling point in the quantum well, or the first specific decomposition point is less than the second specific decomposition point in the quantum well.

[0029] Compared with the prior art, the beneficial effects of the present invention are:

[0030] 1. A design involving an N-type semiconductor and a quantum well with a patterned semiconductor or insulating structure having a lower than specific carrier concentration on top of the N-type semiconductor; and a patterned P-type semiconductor on top of the quantum well with a patterned semiconductor or insulating structure matching the quantum well. This design increases the P-type carrier concentration in LED devices, increasing recombination efficiency. The quantum well with the patterned semiconductor or insulating structure having a lower than specific carrier concentration reduces surface radiative recombination, reduces total internal reflection of the light source inside the quantum well, reduces heat loss, and improves electro-optical conversion efficiency and light extraction efficiency. This method is compatible with existing LED chip or lamp bead manufacturing processes, is simple and reliable, and has a large application market.

[0031] 2. Instead of using an electron blocking layer to address the electron excess problem, a better approach is to increase the concentration of P-type carriers through structural pressurization, thus providing a more efficient solution to the electron excess problem.

[0032] 3. Since carrier recombination cannot occur in the insulating areas of the quantum well, a suitable light-emitting region can be selected by choosing an appropriate patterned structure. This reduces the proportion of total internal reflection of the emitted light and minimizes the heat generated by the reabsorption of light by the quantum well after total internal reflection. Then, a suitable insulating region can be designed based on the light-emitting characteristics of the LED to improve its light-emitting efficiency. This avoids the problem of light emitted from the quantum well being reflected back into the internal quantum well after total internal reflection, resulting in increased heat loss and reduced light-emitting efficiency.

[0033] 4. The technical solution of "partitioning non-connected conductive quantum wells with semiconductor or insulating patterns of less than a certain carrier concentration into ring, sector, polygon, or free pattern partitions" is adopted. When the quantum well is ring-shaped, the ring area is smaller than the surface area of ​​the P-type semiconductor of the LED. The outside of the LED, especially the outside of the quantum well and the P-type semiconductor, is an insulating material, which can avoid carrier recombination at the surface defects, thereby avoiding non-radiative recombination at the surface and effectively reducing the problem of non-radiative recombination caused by surface defects.

[0034] 5. In P-type semiconductor circuits, the resistance can be increased by increasing the insulating area and decreasing the cross-sectional area through which charge carriers can pass. According to the changing characteristics of charge carriers in semiconductors, as the voltage increases, the internal electric field increases, the charge carrier concentration increases, the force on the charge carriers increases, and the velocity of the charge carriers increases. Both of these effects lead to an increase in the number and concentration of P-type charge carriers injected into the quantum well, which can solve the current technical problem of excessively low P-type charge carrier concentration in LED P-type semiconductors.

[0035] 6. In P-type semiconductor circuits, the resistance can be increased by increasing the insulating area and decreasing the cross-sectional area through which charge carriers can pass. Because the resistance across the P-type semiconductor is increased, the LED can be kept on normally. Newly designed LED devices can achieve a higher turn-on voltage, the specific of which can be designed and implemented using a miniature structure of the P-type semiconductor. This solves the problem of significant electrical losses due to voltage transformation in Mini-LED+LCD display technology.

[0036] 7. The technical solution employs a patterned P-type semiconductor 2 comprising multiple interconnected or non-interconnected conductive semiconductor partitions with a patterned semiconductor or insulating structure 8 having a patterned semiconductor or insulating structure with a patterned semiconductor or insulating structure 8. By designing appropriate partition positions and area adjustments, a suitable P-type carrier concentration is obtained, increasing the recombination probability of P-type and N-type carriers, thereby improving the LED's electro-optical conversion efficiency and light extraction efficiency. This solution addresses the technical problem of how to adjust the appropriate electron and hole carrier concentrations, thereby adjusting the peak current of the droop and improving the light extraction efficiency of LEDs under high power and high current conditions.

[0037] 8. In P-type semiconductor circuits, the resistance can be increased by increasing the insulating area and decreasing the cross-sectional area through which charge carriers can pass. According to the changing characteristics of charge carriers in semiconductors, as the voltage increases, the internal electric field increases, the charge carrier concentration increases, the force on the charge carriers increases, and the charge carrier velocity increases. Both of these effects lead to an increase in the number and concentration of P-type charge carriers injected into the quantum well, thus solving the problem of how to increase the P-type charge carrier concentration in P-type GaN-based materials. Attached Figure Description

[0038] Figure 1 This is a cross-sectional view of an LED device that improves the carrier concentration of a P-type semiconductor based on structural pressure enhancement.

[0039] Figure 2 This is a top view of an LED device that increases the carrier concentration of a P-type semiconductor based on structural pressure enhancement.

[0040] Figure 3 This is a top view from a quantum well of an LED device that uses structural pressurization to increase the carrier concentration in a P-type semiconductor.

[0041] In the figure: 1. Quantum well; 2. P-type semiconductor; 3. N-type semiconductor; 4. P-type electrode; 5. N-type electrode; 6. N-type buffer layer; 7. Substrate; 8. Patterned semiconductor or insulating structure with a carrier concentration lower than a specific value. Detailed Implementation

[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0043] Please see Figures 1-3 In this embodiment of the invention, an LED device based on structural pressure enhancement to increase the carrier concentration of a P-type semiconductor includes an N-type semiconductor 3, a quantum well 1 on the N-type semiconductor 3, the quantum well 1 including a semiconductor or insulating patterned structure 8 with a carrier concentration less than a specific value, and a P-type semiconductor 2 above the quantum well 1 including a patterned structure adapted thereto.

[0044] The quantum well 1 includes multiple unconnected quantum well sections of semiconductors with a specific carrier concentration, or multiple unconnected, patterned, insulated quantum well sections, or a single quantum well section of semiconductors or patterned structures with a specific carrier concentration 8. The quantum well sections are W-shaped or F-shaped.

[0045] The insulating patterned areas are non-conductive, preventing charge carriers from passing through. This allows control over the electron-hole injection points of the quantum well, which are the light-emitting regions. This patent controls the light-emitting position of the quantum well by controlling the external insulating positions to prevent light emission around the outer perimeter of the quantum well, avoiding surface non-radiative recombination, minimizing electrical losses, and improving electro-optical conversion efficiency. Furthermore, by controlling the central insulating position, the patent prevents light emission from the innermost part of the quantum well, avoiding the light loss caused by strong total internal reflection due to light emission from the center, thus improving light extraction and emission efficiency.

[0046] Since carrier recombination cannot occur in the insulating areas of a quantum well, a suitable light-emitting region can be selected by choosing an appropriate patterned structure. Then, a suitable insulating region can be designed according to the light-emitting characteristics of the LED to improve the light-emitting efficiency of the LED.

[0047] P-type semiconductor 2 includes multiple unconnected semiconductor partitions of semiconductors with a specific carrier concentration, or multiple isolated patterned unconnected semiconductor partitions, or a single semiconductor partition of semiconductor or isolated patterned structure 8 with a specific carrier concentration.

[0048] For the same bulk material, with constant length or thickness, according to the formula for resistance, the smaller the cross-sectional area, the greater the resistance. By selecting appropriate semiconductor partitions, the resistance of a P-type semiconductor of suitable size can be obtained. Because the N-type semiconductor layer is untreated, the resistance of N-type semiconductor 3 remains unchanged. In the P-type semiconductor circuit, the resistance can be increased by increasing the insulating area and reducing the cross-sectional area through which charge carriers can pass. When voltage is applied to the positive and negative electrodes of the LED, due to the increased resistance of the P-type semiconductor, and since the resistances of the P-type semiconductor, quantum well semiconductor, and N-type semiconductor 3 are in series, most of the voltage is applied to the P-type semiconductor layer. According to the changing characteristics of semiconductor charge carriers, when the voltage increases, the internal electric field increases, the charge carrier concentration increases, the force on the charge carriers increases, and the charge carrier velocity increases. Both of these effects lead to an increase in the number and concentration of P-type charge carriers injected into quantum well 1. Holes will recombine with more electrons, reducing or even eliminating electron leakage problems, reducing the thickness of the electron blocking layer, or even eliminating the need for an electron blocking layer. This approach allows for a better match between the P-type and N-type carrier concentrations. Furthermore, according to the ABC theory, an optimized quantum efficiency can be designed to achieve a more suitable carrier concentration. This, in turn, allows for appropriate P-type carrier concentration adjustments through suitable partitioning locations and area control, increasing the recombination probability of P-type and N-type carriers, thereby improving the LED's electro-optical conversion efficiency and light extraction efficiency. Moreover, this improved light extraction efficiency allows for the regulation of the droop peak current, mitigating the droop phenomenon.

[0049] Based on the above design, the increased resistance across the P-type semiconductor ensures the LED remains on, resulting in a higher turn-on voltage for the newly designed LED device. This specific turn-on voltage can be achieved through the design of a miniature P-type semiconductor structure. This novel LED device boasts a higher turn-on voltage and higher light extraction efficiency, offering significant advantages when applied to Mini / Micro-LED displays. It reduces the large transformer losses caused by the low voltage of current single-segment Mini-LEDs with more partitions, enabling more partitions in Mini-LEDs and even achieving Micro-LED display for each pixel.

[0050] Quantum well 1 includes multiple unconnected quantum well partitions of semiconductors with a specific carrier concentration, or multiple isolated patterned unconnected quantum well partitions, or a single quantum well partition of semiconductors or isolated patterned structures with a specific carrier concentration; the partitions described herein are annular, sector-shaped, polygonal, or free-form patterned partitions.

[0051] When the semiconductor partition is ring-shaped, the surface area of ​​the ring is smaller than that of the P-type semiconductor. Therefore, the outer side of the P-type semiconductor is insulated. Due to the surface insulation, charge carriers cannot move to the surface to undergo non-radiative reactions, reducing heat loss, improving electro-optical conversion efficiency, and increasing the light extraction efficiency of the LED. When the semiconductor partition is ring-shaped, the center of the ring is insulated. There is no charge carrier movement in the central region of the semiconductor. Charge carriers cannot reach the center of quantum well 1 to undergo radiative recombination, avoiding total internal reflection after light is emitted from the quantum well 1 at the center. It also avoids the reabsorption of this total internally reflected light inside the quantum well 1, which would cause heat loss. This reduces the electro-optical conversion efficiency and increases the light extraction efficiency of the LED.

[0052] The outer side of the graphically represented P-type semiconductor 2 is insulated.

[0053] Because the outer side of the ring is insulated, charge carriers cannot move to the surface to undergo non-radiative recombination, which reduces charge carrier and electrical losses and increases the light extraction efficiency of the LED.

[0054] The central region of the graphically represented P-type semiconductor 2 is insulating and transparent.

[0055] Because the length of the LED is much greater than the thickness of the P-type semiconductor, most of the light emitted from the center undergoes total internal reflection after being emitted from the center. This reflected light is then absorbed again by the quantum well 1, generating heat or causing photoluminescence and further total internal reflection. This cycle repeats multiple times within the LED, reducing the electro-optical conversion efficiency and thus the light extraction efficiency. If the interior is insulated, when the light-emitting area of ​​the quantum well 1 is near the edge (not the surface) of the LED and not in the center, the incident angle between the light emitted from the edge of the LED quantum well and the semiconductor-air interface is smaller. This angle is less than the total internal reflection angle, allowing the light to escape into the air, thus avoiding total internal reflection, reducing light loss, and improving the light extraction efficiency.

[0056] The semiconductor partitions may be either multiple non-interconnected semiconductors with a specific carrier concentration, or multiple isolated patterned non-interconnected semiconductor partitions, or a single semiconductor partition with a specific carrier concentration or an isolated patterned structure 8. These three types of semiconductor partitions may be annular, sector-shaped, polygonal, or free-form patterned partitions.

[0057] When quantum well 1 is ring-shaped, the ring area is smaller than the surface area of ​​the P-type semiconductor of the LED, which can avoid carrier recombination at the surface defects, thereby avoiding non-radiative recombination at the surface. When quantum well 1 is ring-shaped, the center of the ring region is made of insulating material, so the center of quantum well 1 cannot emit light radiatively, which can avoid total internal reflection at the center of quantum well 1 and the resulting reabsorption phenomenon of quantum well 1, thereby improving the electro-optical conversion efficiency of the LED and the light extraction efficiency of quantum well 1.

[0058] The area of ​​the quantum well 1 with a semiconductor or insulating patterned structure 8 having a lower than a specific carrier concentration is smaller than the area of ​​the unpatterned P-type semiconductor, and the area of ​​the patterned P-type semiconductor 2 matched with the quantum well 1 is smaller than the area of ​​the unpatterned P-type semiconductor.

[0059] Because the diffusion length of charge carriers is relatively large, the quantum well needs to be processed through a semiconductor or insulating patterned structure with a concentration lower than a specific charge carrier concentration. This forces the insulating region to prevent charge carrier recombination and forces the recombination of P-type and N-type charge carriers to occur in the designed region. This reduces the non-radiative effect on the surface and forces the light emission of P-type and N-type charge carriers to be controlled in the specific designed region, thereby improving the light extraction efficiency of the LED.

[0060] A P-type electrode 4 is provided on the top of the patterned P-type semiconductor 2, and an N-type electrode 5 is provided on the N-type semiconductor 3. An N-type buffer layer 6 is provided on the bottom surface of the N-type semiconductor 3, and a substrate 7 is provided on the bottom surface of the N-type buffer layer 6.

[0061] When the patterned P-type semiconductor 2 is P-GaN or P-AlGaN, the specific carrier concentration is 1*10⁻⁶. 16 cm -3 The specific carrier concentration is 1*10. 16 cm -3 Proximity insulation: Under low voltage, a typical multimeter cannot measure the current; the current is below microamps, which can be considered insulation.

[0062] The quantum well 1 is composed of multiple components, including at least a first specific melting point, boiling point, or decomposition point component and a second specific melting point, boiling point, or decomposition point component. The second specific melting point, boiling point, or decomposition point component is a patterned material. The first specific melting point is less than the second specific melting point in the quantum well, or the first specific boiling point is less than the second specific boiling point in the quantum well, or the first specific decomposition point is less than the second specific decomposition point in the quantum well.

[0063] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An LED device based on structural pressure enhancement to improve the carrier concentration of a patterned P-type semiconductor, comprising an N-type semiconductor (3), characterized in that: The N-type semiconductor (3) is provided with a quantum well (1), the quantum well (1) includes a semiconductor or insulating patterned structure (8) with a concentration less than a certain carrier concentration, and the P-type semiconductor (2) above the quantum well (1) includes a patterned structure adapted to it.

2. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The quantum well (1) includes multiple unconnected quantum well partitions of semiconductors with a specific carrier concentration, or multiple unconnected quantum well partitions of insulating patterned structures, or a single quantum well partition of a semiconductor or insulating patterned structure (8) with a specific carrier concentration.

3. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The P-type semiconductor (2) includes multiple interconnected semiconductor partitions of semiconductors with a specific carrier concentration, or multiple interconnected insulated patterned semiconductor partitions, or a single semiconductor partition of semiconductors with a specific carrier concentration or insulated patterned structure (8).

4. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 2, characterized in that: The quantum well (1) includes multiple unconnected quantum well partitions of semiconductors with a specific carrier concentration, or multiple isolated patterned unconnected quantum well partitions, or a single quantum well partition of semiconductors with a specific carrier concentration or an isolated patterned structure (8); the partition is ring-shaped, sector-shaped, polygonal, or free-form patterned partition.

5. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The outer side of the patterned P-type semiconductor (2) is insulated.

6. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The central region of the patterned P-type semiconductor (2) is insulating and transparent.

7. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 3, characterized in that: The semiconductor partitions are either multiple non-interconnected semiconductors with a specific carrier concentration, or multiple insulated patterned non-interconnected semiconductor partitions, or a single semiconductor with a specific carrier concentration or an insulated patterned structure (8). These three types of semiconductor partitions are annular, sector-shaped, polygonal, or free-form patterned partitions.

8. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The patterned P-type semiconductor (2) is provided with a P-type electrode (4) on top, and the N-type semiconductor (3) is also provided with an N-type electrode (5). The bottom surface of the N-type semiconductor (3) is provided with an N-type buffer layer (6), and the bottom surface of the N-type buffer layer (6) is provided with a substrate (7).

9. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: When the patterned P-type semiconductor (2) is P-GaN or P-AlGaN, the specific carrier concentration is 1*10. 16 cm -3 .

10. The LED device based on structural pressure enhancement to improve the carrier concentration of patterned P-type semiconductors according to claim 1, characterized in that: The quantum well (1) is composed of multiple components, including at least a first specific melting point or boiling point or decomposition point component and a second specific melting point or boiling point or decomposition point component, and the second specific melting point or boiling point or decomposition point component is a patterned material. The first specific melting point is less than the second specific melting point in the quantum well, or the first specific boiling point is less than the second specific boiling point in the quantum well, or the first specific decomposition point is less than the second specific decomposition point in the quantum well.

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