A power device assembly with temperature sensing function

Abstract

The application provides a power device assembly with temperature sensing function, which comprises a main power device and a second mirror power device integrated on the same silicon substrate, the second mirror power device is biased to measure threshold voltage, the threshold voltage contains temperature information, so as to realize temperature detection. The power device assembly with temperature sensing function has the second mirror power device integrated on the same silicon substrate with the main power device, so that excellent thermal tracking performance is achieved; and the same device structure as the main power device is used to realize temperature sensing, so that no new structure is needed, and additional ion implantation process is avoided.

Description

Technical Field

[0001] This invention belongs to the field of temperature sensing, and specifically relates to a power device component with temperature sensing function. Background Technology

[0002] In hot-swap or surge current control applications, power MOSFETs charge a large capacitor during startup and may operate in the saturation region for a short period. At this time, the power MOSFET is simultaneously subjected to high current and high voltage, resulting in significant power dissipation and potentially exceeding its safe operating area (SOA). SOA is essentially a temperature-dependent phenomenon—a sharp increase in junction temperature can lead to thermal instability and damage to the MOSFET.

[0003] Traditional control circuits typically cannot directly provide feedback on junction temperature. Furthermore, in many implementations, the control circuitry and power MOSFETs are housed on separate chips and then co-packaged. Due to the poor thermal conductivity and thermal coupling of the chip bonding materials (such as epoxy resin), even if the controller chip integrates a temperature sensor, it can only sense temperatures that lag behind the junction temperature. By the time an over-limit temperature is detected, the component may already be damaged, making it difficult to effectively prevent thermal runaway. Therefore, a robust solution requires integrating the temperature sensor onto the power MOSFET chip.

[0004] This requirement is particularly critical in high-voltage rack applications (such as data centers) because MOSFETs can have a drain-source voltage difference of over 60V during startup, and systems larger than 1kW suffer from prolonged self-heating issues.

[0005] Currently, most existing temperature sensing methods are not suitable for integration into single-metal-layer power MOSFET processes. Existing temperature sensing methods include, but are not limited to, the following technologies:

[0006] 1) Metal resistors (such as US11774296B2) integrated into MOSFETs have the disadvantage of being far from the heat-generating area, which reduces the effectiveness of detection; and the signal is small, requiring subsequent amplifier trimming or self-calibration, which increases costs.

[0007] 2) Diodes, when integrated into MOSFETs, have the disadvantage of increasing process complexity and cost. Summary of the Invention

[0008] The purpose of this invention is to provide a power device assembly with temperature sensing function, which has excellent thermal tracking performance of the main power device and is simple to manufacture.

[0009] To achieve the above objectives, the present invention provides a power device assembly with temperature sensing function, including a main power device and a second mirror power device integrated on the same silicon substrate. The second mirror power device is biased to measure a threshold voltage, which contains temperature information, thereby realizing temperature detection.

[0010] The second mirror power device is formed using the same process and ion implantation steps as the main power device.

[0011] The ratio of the second mirror power device to the main power device is between 1:1000 and 1:6000; and / or, both the main power device and the second mirror power device are one of N-type or P-type power MOSFETs, N-type or P-type FETs, N-type or P-type IGBTs, NPN-type or PNP-type BJTs.

[0012] The gates of the second mirror power device and the main power device are set separately, and the sources of the second mirror power device and the main power device are set separately, so that the second mirror power device and the main power device are thermally coupled but electrically isolated.

[0013] By applying a preset drain current and gate voltage to the second mirror power device to bias the second mirror power device, the second mirror power device is made to operate stably in the saturation region and maintain a low overdrive voltage state, and the gate-source voltage is measured to extract the threshold voltage.

[0014] The power device assembly includes a control circuit, which includes a drive circuit and a threshold voltage extraction circuit. The drive circuit enables the second mirror power device to operate stably in the saturation region and maintain a low overdrive voltage state. The two input terminals of the threshold voltage extraction circuit are respectively connected to the gate and source of the second mirror power device, and are used to extract the threshold voltage from the gate-source voltage and obtain temperature information from the threshold voltage.

[0015] The driving circuit includes a drain current source with one end connected to the source of the second mirror power device and the other end grounded, and a first voltage source connected to the gate of the second mirror power device.

[0016] The threshold voltage extraction circuit includes a level shifting circuit, an operational amplifier, and an analog measurement module connected in sequence; or, the drain current source includes a switchable first drain current source and a second drain current source; the threshold voltage extraction circuit includes an operational amplifier, a first sampling path connected between the source of the second mirror power device and the first input terminal of the operational amplifier and sampling when the first drain current source is turned on, a second sampling path connected between the source of the second mirror power device and the first input terminal of the operational amplifier and sampling when the second drain current source is turned on, and an analog measurement module connected to the output terminal of the operational amplifier.

[0017] The analog measurement module is a digital-to-analog converter or a comparator.

[0018] The power device assembly also includes a first mirror power device integrated on the same silicon substrate as the main power device. The first mirror power device and the main power device are formed using the same process and ion implantation steps, and the ratio of the first mirror power device to the main power device is between 1:1000 and 1:6000.

[0019] The power device assembly with temperature sensing capability of the present invention integrates the second mirror power device and the main power device on the same silicon substrate, thus exhibiting excellent thermal tracking performance for the main power device. The power device assembly with temperature sensing capability of the present invention utilizes the same device structure as the main power device to achieve temperature sensing, eliminating the need for additional structures and avoiding additional ion implantation processes, thereby simplifying the fabrication process. Furthermore, the second mirror power device of the present invention is thermally coupled but electrically isolated from the main power device, thus allowing for simplified low-voltage control circuitry. Even if the main power device is a high-voltage device, the second mirror power device can still be biased and measured using low-voltage drive circuitry such as CMOS circuitry. Moreover, the compact layout of the individual power devices in the power device assembly facilitates integration into the main power cell array. Attached Figure Description

[0020] Figure 1 This is a schematic diagram showing the connection of each power device in the power device assembly with temperature sensing function of the present invention.

[0021] Figure 2 This is a schematic diagram of the overall structure of the power device assembly with temperature sensing function of the present invention, wherein the dashed box part is the power device chip.

[0022] Figure 3 This is a schematic diagram of the control circuit of the power device assembly with temperature sensing function of the present invention. Detailed Implementation

[0023] The present invention will be further described below with reference to specific embodiments. It should be understood that the following embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0024] The power device assembly with temperature sensing function of the present invention is mainly based on the following principles:

[0025] In the design of power devices such as power MOSFETs, a small-sized mirror power device (such as a mirror FET) is typically used as the current sensing unit. The innovation of this invention lies in the fact that the mirror power device of the power device can be used for both current sensing and temperature sensing, thus achieving monitoring of the junction temperature of the power device without the need for additional sensing elements. Furthermore, different mirror transistors can be used for temperature sensing and current sensing.

[0026] As shown in Figure 1 and Figure 2 The diagram shows a basic block diagram of a power device assembly with temperature sensing function according to the present invention. The power device assembly includes a main power device M1, a first mirror power device M2, and a second mirror power device M3 integrated on the same silicon substrate; these three components constitute a power device chip. The first mirror power device M2 is used for current detection. The second mirror power device M3 is biased to measure a threshold voltage VTH, which contains temperature information, thereby achieving temperature detection. Because the second mirror power device M3 is adjacent to the main power device M1 and shares the same silicon substrate, its thermal coupling efficiency is extremely high, thus achieving high-precision and fast-response temperature sensing. In other embodiments, if only temperature measurement is required, the first mirror power device M2 can be omitted. However, since measuring current is crucial for the power device assembly, the first mirror power device M2 has a higher priority.

[0027] The first mirror power device M2, the second mirror power device M3, and the main power device M1 are formed using the same process and ion implantation steps. In this embodiment, the main power device M1 is a power MOSFET, and the first mirror power device M2 and the second mirror power device M3 are MOSFETs scaled down from the main power device M1. The ratio of the first mirror power device M2, the second mirror power device M3, and the main power device M1 is typically between 1:1000 and 1:6000. In the power MOSFET, the main power devices M1 to the second mirror power devices M3 are typically fabricated on a common silicon substrate (an N-type substrate in this embodiment), therefore, the drain DRAIN of the main power devices M1 to the second mirror power devices M3 is a shared structure.

[0028] It should be noted that although the above description uses an N-type power MOSFET as an example, the present invention is also applicable to other power devices, such as P-type power MOSFETs, N-type or P-type FETs, N-type or P-type IGBTs, NPN-type or PNP-type BJTs, etc. When using a P-type power MOSFET, the corresponding main power devices M1 to the second mirror power devices M3 are also fabricated on a common silicon substrate, and therefore the drains of the main power devices M1 to the second mirror power devices M3 are shared.

[0029] The first mirror power device M2 and the second mirror power device M3 are usually designed to be the same size to ensure layout regularity and matching. However, in specific applications, their sizes can be adjusted as needed to optimize temperature detection sensitivity or linearity.

[0030] The first mirror power device M2 and the second mirror power device M3 are basically the same in structure. The only difference is that the gates of the second mirror power device M3 and the main power device M1 are set separately (i.e., disconnected from each other), and the sources of the second mirror power device M3 and the main power device M1 are also set separately. This makes the second mirror power device M3 thermally coupled but electrically isolated from the main power device M1. Therefore, a simplified low-voltage control circuit can be used. Even if the main device is a high-voltage device (such as the main power MOSFET operating at 100V), the second mirror power device can still be biased and measured using a low-voltage drive circuit such as a CMOS circuit.

[0031] In this invention, a preset drain current I is applied to the second mirror power device M3. DRAIN The gate voltage is used to bias the second mirror power device M3, so that the second mirror power device M3 operates stably in the saturation region and is maintained in a low overdrive voltage state; under this condition, the gate-source voltage V is measured. GATE -V SOURCE The threshold voltage VTH is extracted using this method. Where VTH ≈ V GATE -V SOURCE I DRAIN =1μA~90μA. Preset drain current I DRAIN The value is very small, preventing the second mirror power device M3 from heating up and interfering with the temperature measurement results. This ensures that the second mirror power device M3 operates stably in a state where the threshold voltage can be accurately measured. Since the threshold voltage VTH exhibits good linear predictability with temperature (typically a negative temperature coefficient; the higher the temperature of the main power device, the lower VTH), direct and high-precision measurement of the junction temperature of the main power device can be achieved.

[0032] In this embodiment, the main power device M1 is a main power MOSFET, so SOURCE1 is the system load power supply. The first mirror power device M2 acts as a current sensor. Through feedback control, the voltage of the power supply SOURCE2 of the first mirror power device M2 is made equal to the voltage of the system load power supply SOURCE1, thereby making the current flowing through the first mirror power device M2 linearly proportional to the system load current. The second mirror power device M3 acts as a temperature sensor, and a small preset drain current I flows through it, ranging from 1 μA to tens of μA. DRAIN Furthermore, the preset drain current is achieved through the power supply SOURCE3 of the second mirror power device M3.

[0033] like Figure 2 As shown, the power device assembly with temperature sensing function of the present invention further includes a control circuit. This control circuit includes a drive circuit that ensures the second mirror power device M3 operates stably in the saturation region and is maintained at a low overdrive voltage state, and a threshold voltage extraction circuit A1. The two input terminals of the threshold voltage extraction circuit A1 are respectively connected to the gate (GATE2) and source (VGS) of the second mirror power device M3 to obtain the gate-source voltage VGS. This voltage is used to extract the threshold voltage VTH of the second mirror power device M3 from the gate-source voltage VGS, and the temperature information is obtained from the threshold voltage VTH. Thus, simplified temperature detection under low voltage is achieved, even if the main power device M1 is a high-voltage device.

[0034] In this embodiment, the control circuit can be integrated with the main power device and the second mirror power device in the same co-package structure. However, in other embodiments, the control circuit can also be integrated with the main power device and the second mirror power device on the same chip, and is not limited to a co-package structure.

[0035] The driving circuit includes a terminal connected to the source of the second mirror power device M3 to inject a preset drain current I. DRAIN The drain current source I1, with its other end grounded, and the first voltage source V1, connected to the gate GATE2 of the second mirror power device M3 to bias it, are also connected. The drain current source I1 and the first voltage source V1 ensure that the second mirror power device M3 operates stably in the saturation region and remains in a low overdrive voltage state, thereby ensuring that its gate-source voltage VGS is primarily dominated by the threshold voltage VTH. Therefore, the temperature sensing circuit based on the second mirror power device M3 has the following advantages: the drain current source I1 and the first voltage source V1 can be generated using only low-voltage processes (e.g., 5V CMOS circuitry), achieving a simplified and cost-effective solution, and allowing the system to maintain normal operation at drain voltages up to 60V.

[0036] The following are two implementation schemes for threshold voltage extraction circuits.

[0037] Example 1: Threshold voltage extraction circuit A1 includes a level shifter circuit, an operational amplifier, and an analog measurement module connected in sequence. The analog measurement module uses a digital-to-analog converter (ADC) or a comparator.

[0038] The level shift circuit converts the gate-source voltage VGS to a ground-referenced gate-source voltage VGS as the extracted threshold voltage. The shift amount is adjusted by modifying circuit parameters to compensate for process variations. Ideally, the level shift circuit outputs approximately 0.65V at 25°C with a negative temperature slope of -2mV / °C. More importantly, this output voltage characteristic is independent of manufacturing process variations in power devices (such as MOSFETs), meaning it is unaffected by fluctuations in the threshold voltage VTH and its temperature coefficient. Specifically, the level shift circuit sets the MOSFET's temperature protection trigger point at 165°C by modifying circuit parameters. Furthermore, the parameter modification process considers the differences in threshold voltages of different MOSFETs at 25°C (room temperature), ensuring that regardless of manufacturing variations in the device itself, protection is accurately triggered when the junction temperature reaches 165°C.

[0039] The level shift circuit converts the signal to the ground-referenced gate-source voltage VGS because analog measurement modules (such as ADCs or comparators) can only recognize ground-referenced signals. For example, V GATE =4V, V SOURCE =2V, then V GS =V GATE -V SOURCE If the value is 2V, then the equivalent signal with ground as the reference is 2V.

[0040] The operational amplifier precisely adjusts the temperature slope of the gate-source voltage VGS relative to the ground reference to output a voltage signal representing the temperature. A digital-to-analog converter (ADC) converts the threshold voltage into a temperature value, allowing the temperature voltage signal to be fed into the ADC for digital reading of the main power device's temperature. A comparator compares the threshold voltage with a preset temperature protection trigger point voltage. If the threshold voltage is detected to be lower than the preset temperature protection trigger point voltage (corresponding to a temperature exceeding a safe upper limit, e.g., a temperature protection trigger point of 165°C), the power MOSFET is immediately turned off to prevent damage from thermal instability.

[0041] Example 2: such as Figure 3As shown, the drain current source includes a switchable first drain current source I11 and a second drain current source I12; the threshold voltage extraction circuit A1 includes an operational amplifier AMP1, a first sampling path connected between the source of the second mirror power device M3 and the first input terminal of the operational amplifier AMP1 and sampling when the first drain current source I11 is turned on, a second sampling path connected between the source of the second mirror power device M3 and the first input terminal of the operational amplifier AMP1 and sampling when the second drain current source I12 is turned on, and an analog measurement module connected to the output terminal Vo of the operational amplifier AMP1. The second input terminal of the operational amplifier AMP1 is grounded.

[0042] One end of the first drain current source I11 and the second drain current source I12 are connected to the source of the second mirror power device M3 to inject a preset drain current I. DRAIN The other end is grounded, and the first drain current source I11 and the second drain current source I12 can be switched. Both are used as drain current source I1.

[0043] The first sampling path includes a first type switch Ph1, a second capacitor 2C, a first type switch Ph1 and ground connected in series from the source of the second mirror power device M3, a first type switch Ph1 connected between the first input terminal and the output terminal of the operational amplifier AMP1, and a fourth type switch Ph2', a second capacitor 2C and a fourth type switch Ph2' connected in series between the first input terminal and the output terminal of the operational amplifier AMP1.

[0044] The second sampling path includes a first capacitor C. The first terminal of the first capacitor C is connected to the source of the second mirror power device M3 through a second type switch Ph2 and grounded through a third type switch Ph3. The second terminal of the first capacitor C is connected to the first input terminal of the operational amplifier AMP1 through a third type switch Ph3 and grounded through a second type switch Ph2. The capacitance value of the second capacitor 2C is twice the capacitance value of the first capacitor C.

[0045] The first type of switch Ph1 is turned on in the first time slot t1 and turned off in the other time slots; the second type of switch Ph2 is turned on in the second time slot t2 and turned off in the other time slots; the third type of switch Ph3 is turned on in the third time slot t3 and turned off in the other time slots; the fourth type of switch Ph2' is turned on in the second time slot t2 and the third time slot t3 and turned off in the other time slots.

[0046] In this embodiment, the current values ​​of the first drain current source I11 and the second drain current source I12 are 2μA and 8μA, respectively. In other embodiments, the current value of the second drain current source I12 is four times the current value of the first drain current source I11, and the current values ​​of both can be arbitrary. The analog quantity measurement module uses a digital-to-analog converter (ADC) or a comparator.

[0047] Therefore, the preset drain current I of the second mirror power device M3 DRAIN It can switch between 2μA and 8μA, for example, setting it to 2μA at one time and switching to 8μA at another time. At the first moment, the first type of switch Ph1 is turned on, with a preset drain current of 2μA, storing the first gate-source voltage VGS1 (i.e., the voltage of the power supply SOURCE3 of the second mirror power device M3) on the second capacitor 2C; at the second moment, the second type of switch Ph2 is turned on, with a preset drain current I... DRAIN Switch to 8μA, then measure the second gate-source voltage VGS2 (i.e., the voltage of the power supply SOURCE3 of the second mirror power device M3), and store it on the first capacitor C.

[0048] Therefore, the first sampling path clears the output of operational amplifier AMP1 to zero in the first time slot t1, and samples the first gate-source voltage VGS1 using the second capacitor 2C in the first time slot t1. This sampled voltage is then provided to operational amplifier AMP1 in the second and third time slots, resulting in operational amplifier AMP1 outputting a first gate-source voltage VGS1 with double gain (relative to VGS2) in the second and third time slots t1 and t3. The second sampling path samples the second gate-source voltage VGS2 using the first capacitor C in the second time slot t2, resulting in operational amplifier AMP1 outputting a negative value of the second gate-source voltage VGS2 with single gain in the third time slot t3. Thus, operational amplifier AMP1 outputs 0V in the first time slot t1, VGS1 in the second time slot t2, and VGS1- in the third time slot t3. The output voltage obtained in the third time slot t3 of VGS2 is used as the extracted threshold voltage.

[0049] According to the relation:

[0050] ,

[0051] Where, k = μ n C ox (W / L),

[0052] in, Gate-source voltage, Threshold voltage, Where μ is the drain current, k is the transconductance coefficient, and μ is the transductance coefficient. n For electron mobility, C ox is the capacitance per unit area of ​​the oxide layer of the second mirror power device, and W / L is the aspect ratio of the second mirror power device.

[0053] If the gate-source voltage when I1 = 2μA is the first gate-source voltage VGS1, and the gate-source voltage when I2 = 8μA is the second gate-source voltage VGS2, then:

[0054] .

[0055] Therefore, by simply doubling the gain of VGS1 (relative to VGS2) in the first clock phase and subtracting the amplified signal from VGS2 in the next clock phase, the threshold voltage VTH can be obtained. This differential signal can then be fed into an analog-to-digital converter (ADC) for digital temperature readout, or into a comparator to turn off the MOSFET in case of over-temperature.

[0056] The above are two exemplary implementations of extracting temperature information from the second mirror power device M3. Any other implementation based on this core principle is also within the scope of protection of this invention.

[0057] The temperature-sensing power device assembly of the present invention utilizes the same device structure as the main power device to achieve temperature sensing, eliminating the need for additional structures and avoiding extra ion implantation processes, thus simplifying the fabrication process. Furthermore, the second mirror power device is integrated with the main power device on the same silicon substrate, thus exhibiting excellent thermal tracking performance for the main power device. Moreover, the second mirror power device of the present invention is thermally coupled but electrically isolated from the main power device, allowing for simplified low-voltage control circuitry. Even if the main power device is a high-voltage device, the second mirror power device can still be biased and measured using low-voltage drive circuitry such as CMOS circuitry. Furthermore, the compact layout of the individual power devices in the power device assembly facilitates integration into the main power cell array.

[0058] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of the invention. Various variations can be made to the above embodiments of the present invention. All simple and equivalent changes and modifications made in accordance with the claims and description of this application fall within the protection scope of the claims of this patent. All aspects not described in detail in this invention are conventional technical content.

Claims

1. A power device assembly with temperature sensing function, characterized in that, It includes a main power device (M1) and a second mirror power device (M3) integrated on the same silicon substrate, as well as control circuitry. The second mirror power device (M3) is biased to measure a threshold voltage (VTH), which contains temperature information, thereby enabling temperature detection. By applying a preset drain current (Id) to the second mirror power device (M3) DRAIN The gate voltage is used to bias the second mirror power device (M3) so that the second mirror power device (M3) operates stably in the saturation region and is maintained in a low overdrive voltage state, and the gate-source voltage is measured to extract the threshold voltage. The control circuit includes a drive circuit and a threshold voltage extraction circuit. The drive circuit enables the second mirror power device (M3) to operate stably in the saturation region and maintain a low overdrive voltage state. The two input terminals of the threshold voltage extraction circuit (A1) are respectively connected to the gate (GATE2) and source of the second mirror power device (M3) to extract the threshold voltage (VTH) from the gate-source voltage (VGS) and obtain temperature information from the threshold voltage (VTH). The threshold voltage changes linearly and predictably with temperature. The driving circuit includes a drain current source (I1) with one end connected to the source of the second mirror power device (M3) and the other end grounded, and a first voltage source (V1) connected to the gate (GATE2) of the second mirror power device (M3). The drain current source (I1) includes a switchable first drain current source (I11) and a second drain current source (I12); the threshold voltage extraction circuit (A1) includes an operational amplifier (AMP1), a first sampling path connected between the source of the second mirror power device (M3) and the first input terminal of the operational amplifier (AMP1) and sampling when the first drain current source (I11) is turned on, a second sampling path connected between the source of the second mirror power device (M3) and the first input terminal of the operational amplifier (AMP1) and sampling when the second drain current source (I12) is turned on, and an analog measurement module connected to the output terminal of the operational amplifier (AMP1); The current value of the second drain current source (I12) is 4 times the current value of the first drain current source (I11); the operational amplifier (AMP1) outputs 0V in the first time slot t1, VGS1 in the second time slot t2, and VGS1- in the third time slot t3. VGS2, the first gate-source voltage VGS1 is the power supply voltage of the second mirror power device (M3) under the current of the first drain current source (I11), and the second gate-source voltage VGS2 is the power supply voltage of the second mirror power device (M3) under the current of the second drain current source (I12); the output voltage obtained in the third time slot t3 is used as the extracted threshold voltage.

2. The power device assembly according to claim 1, characterized in that, The second mirror power device (M3) is formed using the same process and ion implantation steps as the main power device (M1).

3. The power device assembly according to claim 2, characterized in that, The ratio of the second mirror power device (M3) to the main power device (M1) is between 1:1000 and 1:6000; And / or, the main power device (M1) and the second mirror power device (M3) are both one of N-type or P-type power MOSFETs, N-type or P-type FETs, N-type or P-type IGBTs, NPN-type or PNP-type BJTs.

4. The power device assembly according to claim 1, characterized in that, The gates of the second mirror power device (M3) and the main power device (M1) are set separately, and the sources of the second mirror power device (M3) and the main power device (M1) are set separately, so that the second mirror power device (M3) and the main power device (M1) are thermally coupled but electrically isolated.

5. The power device assembly according to claim 1, characterized in that, The analog measurement module is a digital-to-analog converter or a comparator.

6. The power device assembly according to claim 1, characterized in that, It also includes a first mirror power device (M2) integrated on the same silicon substrate as the main power device. The first mirror power device and the main power device (M1) are formed using the same process and ion implantation steps, and the ratio of the first mirror power device (M2) to the main power device (M1) is between 1:1000 and 1:6000.

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