Driving device, optical system and lithographic apparatus

Abstract

A drive arrangement (100) for driving N actuator elements (210) to actuate an optical element (310) of an optical system (4, 10), comprising: N drive stages (110-130) controlled by time division multiplexed signals (ZMD, ZMA) determined by a time division multiplexing scheme (Z), wherein a respective drive stage (110-130) of the N drive stages (110-130) is assigned to one of the N actuator elements (210) and a specified time slot (Z1-Z3) of the time division multiplexed signal (ZMD, ZMA) and has an amplifier (V) configured to amplify a signal component of the assigned time slot (Z1-Z3) of the time division multiplexed signal (ZMD, ZMA), thereby forming a drive voltage (U1-U3), an actuator element (210) for driving the distribution, wherein N > = 2; and a control loop (400), the feedback branch (410) of which has a voltage divider (420) that can be selectively connected to one of the N drive stages (110-130) on the basis of the time division multiplexing scheme (Z).

Description

Technical Field

[0001] The present invention relates to a driving device for driving a plurality of actuator elements to actuate optical elements of an optical system, to an optical system including the actuating device, and to a photolithography apparatus including the optical system.

[0002] Interactive Reference

[0003] The contents of priority application DE 10 2023 207 368.4 are incorporated herein by reference in their entirety. Background Technology

[0004] Microlithography equipment is known to have actuable optical elements, such as arrays of microlenses or micromirrors. Microlithography is used to fabricate microstructured components, such as integrated circuits. Microlithography processes are performed using lithography equipment that includes an illumination system and a projection system.

[0005] Driven by the desire for smaller structures in integrated circuit fabrication, EUV lithography equipment using light with wavelengths ranging from 0.1 nm to 30 nm (especially 13.5 nm) is currently under development. Since most materials absorb light at this wavelength, reflective optics, i.e., mirrors, are required in these EUV lithography devices, rather than refractive optics, i.e., lenses, as was the case previously.

[0006] The image of a mask (mask master) illuminated by an illumination system is projected onto a substrate, such as a silicon wafer, via a projection system. This substrate is coated with a photosensitive layer (photoresist) and positioned on the image plane of the projection system to transfer the mask structure onto the photosensitive coating of the substrate. The imaging of the mask on the substrate can be improved using actuable optics. For example, wavefront aberrations that cause magnification and / or blurred imaging during exposure can be compensated.

[0007] For example, MEMS actuators (MEMS; Microelectromechanical Systems) or PMN actuators (PMN; Lead Magnesium Niobate) can be used as actuators. PMN actuators can achieve distance positioning in the submicron or subnanometer range. In this case, the actuator, with actuator elements stacked on top of each other, is subjected to a force that causes a specific linear expansion due to the application of a DC voltage. The position set by a DC voltage (DC; Direct Current) may be adversely affected by external electromechanical crosstalk at the resonant point inherent in the DC-driven actuator. For example, a MEMS mirror and an actuator suitable for driving it are described in DE 10 2016 213 025 A1. For example, the actuator has a plurality of actuator elements for tilting the MEMS mirror on multiple axes.

[0008] For example, each mirror axis uses two actuator elements. Therefore, millions of actuator elements are used in a lithography apparatus. It is worth noting that over 40% of the electrical power of the lithography apparatus's optical system may be lost at the actuator drive elements of the optical components.

[0009] The large number of optical components in the optical system of a lithography device, along with the numerous actuators used to drive these components and the relatively high driving voltages required (e.g., 140 V), generates a relatively high thermal load during operation, which is very disadvantageous, especially in the vacuum housing of the lithography device. Summary of the Invention

[0010] In this context, one object of the present invention is to facilitate the driving of actuator elements for actuating optical elements in an actuating optical system.

[0011] According to a first aspect, a driving device is proposed for driving a plurality of actuator elements to actuate optical elements of an optical system. This driving device includes:

[0012] N drive stages, controlled by a time-division multiplexed signal determined by a time-division multiplexing scheme, wherein each of the N drive stages is assigned to one of the N actuator elements and a designated time slot of the time-division multiplexed signal, and has an amplifier configured to amplify the signal component of the assigned time slot of the time-division multiplexed signal, thereby forming a drive voltage for driving the assigned actuator element, wherein N≥2; and

[0013] The control loop has a feedback branch with a voltage divider that can be selectively connected to one of the N drive stages based on the time-division multiplexing scheme.

[0014] The time-division multiplexing scheme described in this paper specifically refers to allocating a fixed time slot for each of the N driver stages to the time-division multiplexed signal within a time-division multiplexing cycle. If, for example, N=4, the drive unit has four driver stages for driving four actuator elements, and the multiplexed frame therefore has four time slots. For instance, the first time slot of the multiplexed frame is then allocated to the first driver stage, the second time slot to the second driver stage, the third time slot to the third driver stage, and the fourth time slot to the fourth driver stage. Any other periodically repeating time slot allocation within the time-division multiplexing cycle is also possible.

[0015] For the duration of the corresponding time slot, the drive is assigned to the corresponding drive stage of that time slot, and its output signal (corresponding drive voltage) is fed back via the feedback branch of the control loop for adjustment purposes.

[0016] Using a drive stage controlled by a time-division multiplexing scheme and a control loop, its feedback branch (including a voltage divider) is selectively connected to a current drive stage driven according to the time-division multiplexing scheme. This significantly reduces the thermal load caused by this drive unit when driving actuator elements compared to conventional solutions.

[0017] Because the optical system of a lithography device contains a large number of actuator elements (millions) and requires a relatively high driving voltage, such as 140 V, this results in a huge potential for saving power consumption and associated thermal load.

[0018] This actuator is particularly a MEMS actuator, an electrostatic (capacitive) actuator, or a piezoelectric actuator, such as a PMN actuator (PMN: lead magnesium niobate), a PZT actuator (PZT: lead zirconate titanate), or a LiNbO3 actuator (lithium niobate). The actuator is specifically configured to actuate optical elements of an optical system. Examples of such optical elements include lens elements, mirrors (e.g., micromirrors or MEMS mirrors), and adaptive mirrors.

[0019] The optical system is preferably a projection optics unit of a lithography apparatus or a projection exposure apparatus. However, the optical system can also be an illumination system. The projection exposure apparatus can be an EUV lithography apparatus. EUV stands for "Extreme Ultraviolet" and refers to the wavelength of the working light being between 0.1 nanometers and 30 nanometers. The projection exposure apparatus can also be a DUV lithography apparatus. DUV stands for "Deep Ultraviolet" and refers to the wavelength of the working light being between 30 nanometers and 250 nanometers.

[0020] According to one embodiment, this driving device has an output-side switch at the output of the amplifier in the corresponding driving stage. Here, the output-side switch of the driving stage is coupled to a voltage divider via a first node.

[0021] At any given moment, only one of the output-side switches of the driver stage is closed, ensuring that only the driver stage assigned to the closed switch is coupled to the voltage divider via the first node. For example, if the first time slot of the multiplexed frame of a time-division multiplexed signal is assigned to the first driver stage, and then the output-side switch of the first driver stage is closed in the first time slot, while all other output-side switches are open, then only the first driver stage is coupled to the voltage divider via the first node, thereby ensuring that the output signal from the first driver stage is fed back through the feedback branch of the control loop.

[0022] According to another embodiment, the voltage divider is designed as a capacitive voltage divider or a resistive voltage divider.

[0023] According to another embodiment, the driving device has:

[0024] A D / A converter configured to convert a digital representation of a time-division multiplexed signal received at the input side into an analog time-division multiplexed signal, and to provide the analog time-division multiplexed signal at a second node on the output side; and

[0025] A differential amplifier, the non-inverting input of which is coupled to the second node and the inverting input of which is coupled to the center tap of the voltage divider, is configured to amplify the difference between the analog time-division multiplexed signal presented at the non-inverting input and the voltage provided at the center tap, thereby providing an amplified time-division multiplexed drive signal at the third node on the output side.

[0026] Preferably, the N driver stages are connected in parallel between the third node and the first node, wherein a corresponding input-side switch allocated to the amplifier for selectively connecting the amplifier to the output of the differential amplifier is configured between the third node and the amplifier of the corresponding driver stage.

[0027] Preferably, a control unit is provided, configured to control the switching of the driver stage according to a time-division multiplexing scheme. The control unit is specifically implemented in software as a discrete circuit or ASIC and controls the switching of the driver stage. The discrete circuit is particularly a circuit built on a circuit board and composed of standard components, such as resistors, transistors, capacitors, operational amplifiers, etc.

[0028] Preferably, a holding capacitor is used to maintain the level of the provided time-division multiplexed drive signal when the assigned input-side switch is in the open state. The holding capacitor is connected between the node connecting the amplifier of the corresponding drive stage and the corresponding assigned input-side switch and ground.

[0029] The above embodiments are time-division multiplexing using voltage dividers for multiple driver stages. For example, the driver device can be implemented on an ASIC, which may drive nine MEMS mirrors. Assuming four actuator elements are provided to drive the MEMS mirrors, this driver device can drive 36 actuator elements. In this embodiment, the control loop is an analog control loop with an additional capacitor (holding capacitor) to maintain the voltage level. This embodiment, containing an analog control loop, is optimal for optimizing chip footprint.

[0030] The control unit of the drive unit ensures that only the amplifier in the selected amplifier stage, chosen according to the time-division multiplexing scheme, is connected to the voltage divider. In this case, the differential amplifier sets the output of the currently selected amplifier to the desired output voltage. The input voltage required for the desired output voltage is kept constant by a holding capacitor, and the differential amplifier is not connected to its respective amplifier. This embodiment advantageously reduces the necessary energy consumption.

[0031] According to another embodiment, the driving device has:

[0032] An A / D converter, configured in a feedback branch, coupled to the center tap of a voltage divider, and configured to convert the voltage supplied at the center tap of the voltage divider into a digital signal representing the supplied voltage; and

[0033] A digital controller, coupled to the A / D converter, is configured to provide a digital signal at a seventh node on the output side, representing the difference between the digital representation of the time-division multiplexed signal and the digital signal provided by the A / D converter.

[0034] In this embodiment, most of the control loop is implemented in the digital domain, here by a digital controller. Therefore, leakage current is irrelevant. This embodiment is particularly advantageous if sophisticated digital logic (such as, for example, a microcontroller and / or FPGA) is already available in the system. For example, the ability to configure the digital controller on demand allows for further reductions in power consumption in certain applications.

[0035] According to another embodiment, the corresponding driver level has:

[0036] A storage unit, coupled to the seventh node, is used to buffer the signal components of the time slots of the digital signals provided at the seventh node, which are then allocated to the drive stage;

[0037] A D / A converter, connected downstream of the storage cell, is used to convert the signal components provided by the storage cell into analog drive signals; and

[0038] The amplifier, connected downstream of the D / A converter, is used to amplify the analog drive signal into the drive voltage to drive the assigned actuator element.

[0039] Using a separate D / A converter for each drive stage improves flexibility in scaling and update rates. It can be readjusted based on axis tilt angle and movement. Leakage current is irrelevant here.

[0040] According to another embodiment, the digital controller is designed as a microcontroller, FPGA, or application-specific integrated digital circuit (ASIC).

[0041] According to another embodiment, a control unit is provided, configured to control the storage units and switches of the drive stage according to the time-division multiplexing scheme. The control unit is specifically implemented in software as a discrete circuit or ASIC, and controls the switches and storage units. The discrete circuit is particularly a circuit built on a circuit board and composed of standard components, such as resistors, transistors, capacitors, operational amplifiers, etc.

[0042] According to another embodiment, the driving device has:

[0043] A D / A converter configured to convert a digital representation of a time-division multiplexed signal received at the input side into an analog time-division multiplexed signal, and to provide the analog time-division multiplexed signal at the output side;

[0044] A comparator, configured in the feedback branch, coupled via a first input node to the center tap of the voltage divider, and configured to provide a comparison result on the output side based on a comparison between the voltage provided at the center tap of the voltage divider and an analog time-division multiplexed signal provided by the D / A converter; and

[0045] A continuous approximation controller, coupled to the comparator, is configured to provide a digital signal at the seventh node on the output side based on a continuous approximation of the digital representation of the time-division multiplexed signal and the comparison result.

[0046] The analog time-division multiplexed signal provided by the D / A converter is used here as the target value (or reference value) for continuous approximate control.

[0047] According to another embodiment, the corresponding driver level has:

[0048] A storage unit, coupled to the seventh node, is used to buffer the signal components of the time slots of the digital signals provided at the seventh node, which are allocated to the drive stage;

[0049] A D / A converter, connected downstream of the storage cell, is used to convert the signal components provided by the storage cell into analog drive signals;

[0050] The amplifier, which is connected to the D / A converter via a coupling node, is used to amplify the analog drive signal into a drive voltage to drive the assigned actuator element.

[0051] Preferably, the corresponding coupling node is connected to the second input node of the comparator via a corresponding switch.

[0052] Preferably, a control unit is provided, configured to control the switch according to the time-division multiplexing scheme. The control unit is specifically implemented in software as a discrete circuit or ASIC, and controls the switch. The discrete circuit is particularly a circuit built on a circuit board and composed of standard components, such as resistors, transistors, capacitors, operational amplifiers, etc. In the case of software implementation, the control unit can be in the form of a computer program product, function, routine, part of program code, or executable object.

[0053] In this embodiment, the control loop of the driver stage is also implemented in the digital domain. In this case, the use of a continuous approximation controller reduces the complexity of the digital logic. The current continuous approximation controller operates similarly to a continuous approximation analog-to-digital converter (SAR ADC), operating on bits of a digital time-division multiplexed signal while the amplifier's output voltage approaches the ideal target value, i.e., the value of the analog time-division multiplexed signal provided by the D / A converter. The digital continuous approximation controller starts by setting the MSB (most significant bit) to 1, then a comparator checks whether the amplifier's output voltage (after voltage division) is greater than or less than the target value. If it is greater, the MSB is set to 0; otherwise, it remains 1. This operation is repeated bit-by-bit from MSB to LSB (least significant bit). This type of voltage feedback can be performed on demand. This on-demand execution can further reduce power consumption.

[0054] According to the second aspect, an optical system is proposed that includes a plurality of actuable optical elements, each of which is assigned a plurality of N actuator elements of an actuator, wherein each actuator is assigned a drive means for driving the actuator according to one of the embodiments of the first aspect or the first aspect.

[0055] The optical system specifically includes an array of micromirrors and / or an array of microlens elements having multiple optical elements that can be independently actuated. In some embodiments, multiple groups of actuators may be defined, wherein all actuators in a group are assigned the same driving mechanism.

[0056] According to one embodiment, the optical system takes the form of an illumination optical unit or a projection optical unit of a photolithography device.

[0057] According to another embodiment, the optical system has a vacuum housing in which actuable optical elements, distributed actuators, and drive devices are disposed.

[0058] According to a third aspect, a lithography apparatus is proposed, which includes an optical system according to a second aspect or one of the embodiments of the second aspect.

[0059] Photolithography equipment, for example, is EUV photolithography equipment, with a working light wavelength range of 0.1 nm to 30 nm; or DUV photolithography equipment, with a working light wavelength range of 30 nm to 250 nm.

[0060] In this context, "one" is not necessarily interpreted as a limitation to exactly one element. Rather, a plurality of elements may be provided, such as, for example, two, three, or more. Any other numbers used herein should not be construed as a limitation on the exact number of elements. Rather, upward and downward numerical deviations are possible unless otherwise stated.

[0061] Further possible embodiments of the present invention also cover combinations of features or embodiments not explicitly mentioned in the foregoing or following description of exemplary embodiments. In such cases, those skilled in the art will also add individual aspects as improvements or supplements to the respective basic forms of the invention.

[0062] Further advantageous constructions and aspects of the invention are the subject of the dependent claims and are also the objectives of the exemplary embodiments of the invention described below. The invention will now be explained in more detail based on preferred embodiments with reference to the accompanying drawings. Attached Figure Description

[0063] Figure 1 A schematic meridional cross-sectional view of a projection exposure apparatus used for EUV projection lithography is shown.

[0064] Figure 2 A schematic diagram showing one embodiment of the optical system;

[0065] Figure 3 A schematic block diagram showing a first embodiment of a drive device for a plurality of actuator elements for an actuating optical system;

[0066] Figure 4 Showing according to Figure 3 A schematic diagram of an embodiment of the time-division multiplexed signal determined by the time-division multiplexing scheme used;

[0067] Figure 5 A schematic block diagram illustrating a second embodiment of a driving device for driving a plurality of actuator elements for actuating optical elements of an optical system; and

[0068] Figure 6 A schematic block diagram illustrating a third embodiment of a drive device for driving a plurality of actuator elements for actuating optical systems. Detailed Implementation

[0069] Unless otherwise specified, identical or functionally equivalent elements have the same reference numerals in the drawings. Furthermore, it should be noted that the drawings are not necessarily to scale.

[0070] Figure 1 An embodiment of a projection exposure apparatus 1 (lithography apparatus), particularly an EUV lithography apparatus, is shown. One embodiment of the illumination system 2 of the projection exposure apparatus 1, in addition to having a light or radiation source 3, also has an illumination optics unit 4 for illuminating the object field 5 in the object plane 6. In an alternative embodiment, the light source 3 may also be provided as a module separate from the rest of the illumination system 2. In this case, the illumination system 2 does not include the light source 3.

[0071] The mask master 7, positioned in the object field 5, is exposed. The mask master 7 is secured by the mask master carrier 8. The mask carrier 8 can be displaced by the mask master displacement driver 9, particularly along the scanning direction.

[0072] For the purpose of explanation, Figure 1 This diagram shows a Cartesian coordinate system with x-direction x, y-direction y, and z-direction z. The x-direction x enters the plane perpendicularly. The y-direction y extends horizontally, and the z-direction z extends vertically. Figure 1 The scanning direction is along the y-direction y. The z-direction z extends perpendicular to the object plane 6.

[0073] The projection exposure apparatus 1 includes a projection optics unit 10. The projection optics unit 10 is used to image the object field 5 onto an image field 11 in an image plane 12. The image plane 12 extends parallel to the object plane 6. Alternatively, the angle between the object plane 6 and the image plane 12 may be different from 0°.

[0074] The structure on the mask master 7 is imaged onto the photosensitive layer of the wafer 13 in the region of the image field 11 disposed in the image plane 12. The wafer 13 is held by the wafer carrier 14. The wafer carrier 14 can be displaced by the wafer displacement driver 15, specifically along the y-direction. The displacement of the mask master 7 first by the mask master displacement driver 9 and then by the wafer 13 by the wafer displacement driver 15 can be implemented to be synchronized with each other.

[0075] Light source 3 is an EUV radiation source. Light source 3 specifically emits EUV radiation 16, which is also referred to below as the radiation used, illumination radiation, or illumination light. In particular, the wavelength range of the radiation used 16 is between 5 nm and 30 nm. Light source 3 can be a plasma source, such as a laser-produced plasma (LPP) source or a gas-discharge-produced plasma (DPP) source. It can also be a synchrotron-based radiation source. Light source 3 can be a free-electron laser (FEL).

[0076] Illumination radiation 16 emitted from light source 3 is focused by concentrator 17. Concentrator 17 may be a concentrator having one or more elliptical and / or hyperboloidal reflective surfaces. At least one reflective surface of concentrator 17 may be illuminated by illumination radiation 16 with grazing incidence (abbreviated as GI), that is, an incident angle greater than 45°; or with perpendicular incidence (abbreviated as NI), that is, an incident angle less than 45°. Concentrator 17 may be structured and / or coated, primarily to optimize its reflectivity to the radiation used, and secondarily to suppress intrusive light.

[0077] Downstream of the concentrator 17, the illumination radiation 16 propagates through the intermediate focal point in the intermediate focal plane 18. The intermediate focal plane 18 can be represented as the separation between the radiation source module containing the light source 3 and the concentrator 17 and the illumination optical unit 4.

[0078] The illumination optical unit 4 includes a deflecting mirror 19 and a first facet mirror 20 disposed downstream of it in the beam path. The deflecting mirror 19 may be a planar deflecting mirror, or alternatively, a mirror with beam-affecting effects beyond pure deflection. Alternatively or additionally, the deflecting mirror 19 may be designed as a spectral filter that separates the wavelength of light used for illumination radiation 16 from external light of different wavelengths. If the first facet mirror 20 is disposed in a plane optically conjugate to the object plane 6 of the illumination optical unit 4, serving as a field plane, it is also referred to as a field facet mirror. The first facet mirror 20 comprises multiple individual first facets 21, which may also be referred to as field facets. Figure 1 The examples shown are only some of these first facets 21.

[0079] The first facet 21 can be designed as a macro-facet, particularly a rectangular facet or a facet with an arc-shaped edge profile or a partially circular edge profile. The first facet 21 can be a planar facet or, alternatively, a convex or concave curved facet.

[0080] For example, as can be seen from DE 10 2008 009 600 A1, the first facet 21 itself can also be composed of multiple individual mirrors (especially multiple micromirrors). The first facet mirror 20 can especially be in the form of a microelectromechanical system (MEMS system). For more details, please refer to DE 10 2008 009 600 A1.

[0081] Between the condenser 17 and the deflector 19, the illumination radiation 16 travels horizontally, that is, along the y-direction y.

[0082] In the beam path of the illumination optical unit 4, the second faceted mirror 22 is disposed downstream of the first faceted mirror 20. If the second faceted mirror 22 is disposed in the pupil plane of the illumination optical unit 4, it is also called a pupil faceted mirror. The second faceted mirror 22 can also be disposed at a certain distance from the pupil plane of the illumination optical unit 4. In this case, the combination of the first faceted mirror 20 and the second faceted mirror 22 is also called a specular mirror. Specular reflectors are known from US2006 / 0132747 A1, EP 1 614 008 B1, and US 6,573,978.

[0083] The second faceted mirror 22 comprises a plurality of second facets 23. In the case of a pupil faceted mirror, the second facet 23 is also called a pupil facet.

[0084] The second facet 23 can also be a macroscopic facet, the outer perimeter of which can be, for example, a circle, a rectangle, or a hexagon, or alternatively, a facet composed of micromirrors. See also DE 10 2008 009 600 A1 for this.

[0085] The second facet 23 may have a plane, or alternatively, a convex or concave curved reflective surface.

[0086] The illumination optics unit 4 thus forms a biplane system. This basic principle is also known as a compound eye condenser (or integrator).

[0087] It may be advantageous to not precisely position the second faceted mirror 22 in a plane optically conjugate with the pupil plane of the projection optics unit 10. Specifically, the second faceted mirror 22 may be configured to be tilted relative to the pupil plane of the projection optics unit 10, as described, for example, in document DE 10 2017 220 586 A1.

[0088] Using the second faceted reflector 22, individual first facets 21 are imaged into the object field 5. The second faceted reflector 22 is the final beam shaping mirror, or in fact the final reflector of the illumination radiation 16 in the beam path upstream of the object field 5.

[0089] In another embodiment (not shown) of the illumination optics unit 4, a transmission optics unit may be configured in the beam path between the second facet mirror 22 and the object field 5, and particularly helpful in imaging the first facet 21 into the object field 5. The transmission optics unit may have exactly one mirror, or alternatively, two or more mirrors arranged sequentially in the beam path of the illumination optics unit 4. The transmission optics unit may specifically include one or two vertical incident mirrors (NI mirrors) and / or one or two grazing incident mirrors (GI mirrors).

[0090] exist Figure 1 In the illustrated embodiment, the illumination optical unit 4 has exactly three mirrors downstream of the condenser 17, specifically a deflector 19, a first faceted mirror 20, and a second faceted mirror 22.

[0091] In another embodiment of the illumination optical unit 4, the deflector 19 may be omitted. Thus, the illumination optical unit 4 may indeed have two mirrors downstream of the condenser 17, specifically the first faceted mirror 20 and the second faceted mirror 22.

[0092] Imaging the first plane 21 onto the object plane 6 via the second plane 23 or using the second plane 23 and a transmission optical unit is usually only an approximate imaging.

[0093] The projection optical unit 10 includes a plurality of mirrors Mi, which are sequentially numbered according to their configuration in the beam path of the projection exposure device 1.

[0094] exist Figure 1 In the example shown, the projection optics unit 10 comprises six mirrors M1 to M6. Alternatively, it may also have four, eight, ten, twelve, or any other number of mirrors Mi. The projection optics unit 10 is a double-shielding optics unit. The penultimate mirror M5 and the last mirror M6 each have a channel opening for illumination radiation 16. The image-side numerical aperture of the projection optics unit 10 is greater than 0.5, and may also be greater than 0.6, and may be, for example, 0.7 or 0.75.

[0095] The reflective surface of mirror Mi can be designed as a freeform surface without an axis of rotational symmetry. Alternatively, the reflective surface of mirror Mi can be designed as an aspherical surface that has exactly one axis of rotational symmetry for the shape of the reflective surface. Just like the mirror of illumination optics unit 4, mirror Mi can have a highly reflective coating for illumination radiation 16. These coatings can be designed as multilayer coatings, particularly with alternating layers of molybdenum and silicon.

[0096] The projection optical unit 10 has a large object-image offset in the y-direction y between the y-coordinate of the center of the object field 5 and the y-coordinate of the center of the image field 11. The magnitude of the object-image offset in the y-direction y can be approximately the same as the magnitude of the z-distance between the object plane 6 and the image plane 12.

[0097] The projection optical unit 10 can be modified, particularly by having different imaging ratios βx and βy in the x-direction and y-direction (x, y). The two imaging ratios βx and βy of the projection optical unit 10 are preferably (βx, βy) = (+ / -0.25, + / -0.125). A positive imaging ratio β means imaging without image inversion. A negative imaging ratio β means imaging with image inversion.

[0098] Therefore, the projection optical unit 10 results in a 4:1 reduction in size in the x-direction (i.e., in the direction perpendicular to the scanning direction).

[0099] The projection optical unit 10 causes the dimension in the y-direction (i.e., the scanning direction) to be reduced at a ratio of 8:1.

[0100] Other imaging scales are also possible. It is also possible to have imaging scales with the same sign and the same absolute value in both the x-direction (x) and y-direction (y), for example, with absolute values ​​of 0.125 or 0.25.

[0101] The number of intermediate image planes in the x-direction (x) and y-direction (y) of the beam path between object field 5 and image field 11 may be the same or different, depending on the embodiment of the projection optics unit 10. Examples of projection optics units with different numbers of such intermediate images in the x-direction and y-direction (x, y) are known from US 2018 / 0074303 A1.

[0102] In each case, one of the second facets 23 is precisely assigned to one of the first facets 21 to form illumination channels for illuminating the object field 5, respectively. This particularly results in illumination according to the Köhler principle. The far field is decomposed into multiple object fields 5 using the first facet 21. The first facet 21 produces multiple images with intermediate focal points on the second facets 23 to which it is respectively assigned.

[0103] Through the designated second facet 23, the first facet 21 is imaged onto the master mask 7 in each case in an overlapping manner to illuminate the object field 5. The illumination of the object field 5 is, in particular, as uniform as possible. Its uniformity error is preferably less than 2%. Field uniformity can be achieved by superimposing different illumination channels.

[0104] The illumination of the entrance pupil of the projection optical unit 10 can be geometrically defined by the configuration of the second facet 23. The intensity distribution in the entrance pupil of the projection optical unit 10 can be set by selecting the illumination channel, specifically a subset of the second facet 23 that guides the light. This intensity distribution is also referred to as illumination setting or illumination pupil filling.

[0105] The same preferred pupil uniformity in a portion of the illumination pupil illuminating the optical unit 4 in a defined manner can be achieved by redistributing the illumination channels.

[0106] The following describes other aspects and details of the illumination of the object field 5, and in particular the illumination of the entrance pupil of the projection optical unit 10. The projection optical unit 10 may have concentric entrance pupils, which may be accessible or inaccessible.

[0107] The entrance pupil of the projection optics unit 10 is typically not precisely illuminated by the second faceted mirror 22. When the center of the second faceted mirror 22 is telecentrically imaged onto the projection optics unit 10 on the wafer 13, the aperture rays typically do not intersect at a single point. However, a region can be found where the spacing between pairs of defined aperture rays becomes minimal. This region represents the area in the actual space of the entrance pupil or its conjugate. In particular, this region exhibits a finite curvature.

[0108] It is possible that the projection optics unit 10 has different entrance pupil positions for the tangential and sagittal beam paths. In this case, the imaging element, particularly the optical components of the transmission optics unit, should be positioned between the second faceted mirror 22 and the mask master 7. Using this optical element allows for the consideration of the different positions of the tangential and sagittal entrance pupils.

[0109] exist Figure 1 In the arrangement of components of the illumination optical unit 4 shown, the second faceted mirror 22 is disposed in the region conjugate with the entrance pupil of the projection optical unit 10. The first faceted mirror 20 is disposed inclined relative to the object plane 6. The first faceted mirror 20 is disposed inclined relative to the configuration plane defined by the deflecting mirror 19. The first faceted mirror 20 is disposed inclined relative to the configuration plane defined by the second faceted mirror 22.

[0110] Figure 2 A schematic diagram illustrating one embodiment of an optical system 300 for a photolithography apparatus or projection exposure apparatus 1, for example as... Figure 1 As shown. Additionally, Figure 2 The optical system 300 can also be used in, for example, DUV lithography equipment.

[0111] Figure 2 The optical system 300 has a plurality of actuable optical elements 310. The optical system 300 is here designed as a micromirror array, wherein the optical elements 310 are micromirrors. Each micromirror 310 can be actuated by a designated actuator 200. For example, a corresponding micromirror 310 can be tilted about two axes and / or displaced along one, two, or three spatial axes by a designated actuator 200. For example, the actuator 200 has a plurality of actuator elements 210 for tilting the micromirror 310 on multiple axes (see [link to relevant documentation]). Figure 3 , Figure 5 as well as Figure 6 For clarity, only the top column of reference numerals for these elements are depicted.

[0112] The drive unit 100, for example, uses drive voltages U1, U2, U3 to drive the actuator element 210 of the corresponding actuator 200 (see...). Figure 3 , 5 (and 6). This sets the position of the corresponding micromirror 310. See details. Figure 3 , Figure 5 as well as Figure 6 Describe the drive unit 100.

[0113] Figure 3 A schematic block diagram showing a first embodiment of an actuator element 210 for actuating optical elements 310 of a plurality of N optical elements 310 for actuating optical systems 4, 10.

[0114] Figure 3 The optical element 310 shown is a MEMS mirror capable of shifting along two mutually orthogonal tilt axes. For Figure 3 Each tilt axis in the diagram shows Figure 3 MEMS mirror 310 in, and therefore in Figure 3 The diagram is shown twice. Two actuator elements 210 are provided for each of the two tilting axes. Therefore, for... Figure 3 The MEMS mirror 310 in the middle provides four actuator elements 210. For example... Figure 3 As shown, three of the four actuator elements 210 are driven by three drive stages 110-130 (where N=3). Without being limited by general principles, the fourth actuator element 210 may also be driven by a single drive stage (not shown). Generally, the drive unit 100 has N drive stages 110-130 for driving N actuator elements 210.

[0115] The drive stages 110-130 of the drive unit 100 are controlled by the time-division multiplexing signals ZMD and ZMA determined by the time-division multiplexing scheme Z (see [link]). Figure 4 The determined time-division multiplexed signals ZMD and ZMA can be in the form of digital time-division multiplexed signal ZMD or analog time-division multiplexed signal ZMA.

[0116] Also Figure 3 As shown, each of the drive stages 110-130 is assigned to one of the actuator elements 210. Furthermore, each of the drive stages 110-130 is assigned to a specific time slot Z1-Z3 of the time-division multiplexed signals ZMD and ZMA.

[0117] The time-division multiplexing scheme Z here specifically means that each of the three driver stages 110-130 is allocated a fixed time slot Z1-Z3 for the time-division multiplexing period of the time-division multiplexed frame MR or the time-division multiplexed signal ZMD. In this regard, Figure 4 Demonstrates the use of Figure 3 This is an example of a time-division multiplexed signal ZMD determined by the time-division multiplexing scheme Z used in the example. For the allocation of time slots Z1-Z3 in the time-division multiplexed frame MR, it is not important whether the time-division multiplexed signal is in the form of a digital time-division multiplexed signal ZMD or an analog time-division multiplexed signal ZMA. If... Figure 3 and Figure 4In an example, the drive unit 100 has three drive stages 110-130 for driving three actuator elements 210, so the time-division multiplexed frame MR therefore has three time slots Z1-Z3. For example, the first time slot Z1 of the multiplexed frame MR is then allocated to the first drive stage 110, the second time slot Z2 of the multiplexed frame MR is allocated to the second drive stage 120, and the third time slot Z3 of the multiplexed frame MR is allocated to the third drive stage.

[0118] Furthermore, the corresponding drive stages 110-130 have an amplifier V configured to amplify the signal components of designated time slots Z1-Z3 of the time-division multiplexed signals ZMD and ZMA to form drive voltages U1-U3 to drive the allocated actuator elements 210.

[0119] Also Figure 3 As shown, the drive unit 100 has a control loop 400, whose feedback branch 410 has a voltage divider 420, which can be selectively connected to one of the three drive stages 110-130 based on a time-division multiplexing scheme Z. The voltage divider 410 has two resistors R1 and R2 connected in series. The node between the two series-connected resistors R1 and R2 forms the center tap MA of the voltage divider 420. Figure 3 In this design, voltage divider 420 is a resistive voltage divider. Alternatively, voltage divider 420 can also be designed as a capacitive voltage divider.

[0120] Regarding the selection of the corresponding driver stages 110-130 according to the time-division multiplexing scheme Z, and therefore the selective connection of one of the three driver stages 110-130 to the voltage divider 420, each driver stage 110-130 has output-side switches S1-S3. The corresponding output-side switches S1-S3 are here configured at the output of the amplifier V of the corresponding driver stage 110-130. For example... Figure 3 As shown, the output-side switches S1-S3 of the drive stages 110-130 are coupled to the voltage divider 420 via the first node K1. A control unit (not shown) is also provided, which is configured to drive the switches S1-S3 according to the time-division multiplexing scheme Z, such that in each case, the drive stages 110-130 driven by the time-division multiplexing signals ZMD and ZMA are connected to the voltage divider 420 via node K1.

[0121] For example, at time slot Z1 (see Figure 4The first driver stage 110 is driven by time-division multiplexed signals ZMD and ZMA. During time slot Z1, the control unit closes switch S1, while switches S2 and S3 remain open. Therefore, the output of amplifier V of the first driver stage 110 is connected to voltage divider 420 via node K1. In the subsequent period corresponding to time slot Z2, the second driver stage 120 is driven by time-division multiplexed signals ZMD and ZMA, with switch S2 closed and switches S1 and S3 open, so that the output of amplifier V of the second driver stage 120 is connected to voltage divider 420 via first node K1. This also applies to the third time slot Z3 and the driving of the third driver stage 130. It should be noted that in this embodiment, N is between 2 and 40 (2 ≤ N ≤ 40).

[0122] For example Figure 3 As shown, the drive unit 100 may have a D / A converter DA. The D / A converter DA is configured to convert the digital representation ZMD of the time-division multiplexed signal received at the input side into an analog time-division multiplexed signal ZMA, and provide the analog time-division multiplexed signal ZMA at the second node K2 on the output side. A differential amplifier D is connected downstream of the D / A converter DA. The non-inverting input of the differential amplifier D is coupled to the second node K2. The inverting input of the differential amplifier D is coupled to the center tap MA of the voltage divider 420. The differential amplifier D is configured to amplify the difference between the analog time-division multiplexed signal ZMA present at the non-inverting input and the voltage U4 provided across the center tap MA, and based on this difference, provide an amplified time-division multiplexed drive signal U5 at the third node K3 on the output side.

[0123] The three drive stages 110-130 of the drive unit 100 are connected in parallel between the third node K3 and the first node K1. Furthermore, corresponding input-side switches S4-S6, allocated to amplifier V for selectively connecting amplifier V to the output of the differential amplifier D, are configured between the third node K3 and the amplifier V of the corresponding drive stages 110-130. The control unit is configured to control the switches S1-S3, and also to control the input-side switches S4-S6 of the drive stages 110-130 according to the time-division multiplexing scheme Z.

[0124] Also Figure 3 As shown, the holding capacitor CS is coupled between the nodes K4-K6 of the amplifier V connecting the corresponding driver stages 110-130 and the corresponding assigned input-side switches S4-S6, and ground. The holding capacitor CS is configured to maintain the level of the provided time-division multiplexed signal U5 when the assigned input-side switches S4-S6 are open.

[0125] Figure 5This is a schematic block diagram showing a second embodiment of a drive device 100 for driving a plurality of N actuator elements 210 for actuating optical elements 310 of optical systems 4, 10. Without being limited by general principles, Figure 5 The drive unit 100 also drives three actuator elements 210 for actuating the MEMS mirror 310.

[0126] Like according to Figure 3 According to the first embodiment, Figure 5 The second embodiment of the drive device 100 has N ( Figure 5 (N=3) Driver stages 110-130, which are controlled by the time-division multiplexing signal ZMD determined by the time-division multiplexing scheme Z (see... Figure 4 The corresponding drive stages 110-130 are assigned to one of the actuator elements 210 and specific time slots Z1-Z3 of the time-division multiplexed signal ZMD. This assignment is, for example, consistent with reference... Figure 3 as well as Figure 4 The explanation is the same. Like... Figure 3 The corresponding drive stages 110-130 have amplifiers V, which are configured to amplify the signal components A1-A3 of the time-division multiplexed signal ZMD allocated to time slots Z1-Z3, so as to form drive voltages U1-U3 to drive the allocated actuator elements 210.

[0127] As with all embodiments of the drive device 100 of the present invention, according to Figure 5 The embodiment also has a control loop 400, whose feedback branch 410 has a voltage divider 420, which can be selectively connected to one of the driver stages 110-130 via node K1 based on a time-division multiplexing scheme Z. As with all embodiments of the driver device 100, output-side switches S1-S3 are also provided at the output of the amplifier V of the respective driver stages 110-130. The output-side switches S1-S3 of the driver stages 110-130 are coupled to the voltage divider 420 via the first node K1.

[0128] Figure 5 The drive unit 100 also has an A / D converter AD, which is disposed in the feedback branch 410 of the control loop 400 and coupled to the center tap MA of the voltage divider 420. The A / D converter AD is configured to convert the voltage U4 provided on the center tap MA of the voltage divider 420 into a digital signal D4 representing the provided voltage U4.

[0129] Furthermore, Figure 5The drive unit 100 includes a digital controller DR coupled to an A / D converter AD. The digital controller DR is configured to provide a digital signal D5 at the seventh node K7 on the output side, which represents the difference between the digital time-division multiplexed signal ZMD and the digital signal D4 provided by the A / D converter AD.

[0130] Figure 5 The corresponding driver stages 110-130 also have a storage unit L coupled to the seventh node K7, used to buffer and store the signal components A1-A3 of time slots Z1-Z3 of the digital signal D5 provided at the seventh node K7, which are allocated to driver stages 110-130. The digital signal D5 is constructed based on the time-division multiplexed signal ZMD received from the time-division multiplexed signal ZMD, and based on the time-division multiplexed frame MR (see...). Figure 3 ).

[0131] Figure 5 The corresponding drive stages 110-130 also have a D / A converter DA connected downstream of the storage unit L, for converting the signal components A1-A3 provided by the storage unit L into analog drive signals U6-U8. Figure 5 The corresponding drive stages 110-130 also have an amplifier V connected downstream of the D / A converter DA, for amplifying the analog drive signals U6-U8 into drive voltages U1-U3 to drive the assigned actuator elements 210.

[0132] In addition, according to Figure 5 The drive unit 100 has a control unit (not shown) configured to control the switches S1-S3 of the drive stages 110-130 and the storage unit L according to the time-division multiplexing scheme Z.

[0133] Figure 6 A schematic block diagram of a third embodiment of a drive device 100 for driving a plurality of N actuator elements 210 for actuating optical elements 310 of an actuating optical system 4, 10.

[0134] According to Figures 3 to 5 The first embodiment and the second embodiment are the same. Figure 6 The drive unit has N drive stages 110-130, which are controlled by a time-division multiplexing signal ZMD determined by a time-division multiplexing scheme Z (see...). Figure 4 The N drive stages 110-130 are assigned to one of the N actuator elements 210 and a specific time slot Z1-Z3 of the time-division multiplexed signal ZMD, and have an amplifier V. The amplifier V is configured to amplify the signal components A1-A3 of the assigned time slots Z1-Z3 of the time-division multiplexed signal ZMD to form a drive voltage U1-U3 to drive the assigned actuator element 210.

[0135] In addition, according to Figure 6 The drive unit 100 also has a control loop 400, whose feedback branch 410 has a voltage divider 420, which can be selectively connected to one of the N drive stages 110-130 based on a time-division multiplexing scheme Z. Additionally, as with all embodiments of the drive unit 100, in accordance with... Figure 6 In one embodiment, an output-side switch S1-S3 is provided at the output of the amplifier V of the corresponding driver stages 110-130. The output-side switches S1-S3 of the driver stages 110-130 are coupled to the voltage divider 420 via the first node K1.

[0136] In addition, according to Figure 6 The drive device 100 has a D / A converter DA configured to convert the digital representation ZMD of the time-division multiplexed signal received on the input side into an analog time-division multiplexed signal ZMA, and provide the analog time-division multiplexed signal ZMA on the output side.

[0137] Furthermore, according to Figure 6 The drive unit 100 has a comparator C configured in the feedback branch 410 and coupled to the center tap MA of the voltage divider 420 via a first input node K8 (non-inverting input). The comparator C is configured to provide a comparison result VE at the output side based on a comparison between the voltage U4 provided at the center tap MA of the voltage divider 420 and the analog time-division multiplexed signal ZMA provided by the D / A converter DA. The comparator C receives the analog time-division multiplexed signal ZMA provided by the D / A converter DA via its second input node K9 (inverting input).

[0138] according to Figure 6 The drive unit 100 also has a continuous approximation controller SR coupled to the comparator C. The continuous approximation controller SR is configured to provide a digital signal D6 at the seventh node K7 on the output side based on the continuous approximation of the digital representation ZMD and the comparison result VE using a time-division multiplexed signal. The analog time-division multiplexed signal ZMA provided by the D / A converter DA is used here as the target value (or reference value) for the continuous approximation control.

[0139] The continuous approximation controller SR operates similarly to a continuous approximation analog-to-digital converter (SAR ADC), operating on bits of the digital time-division multiplexed signal ZMD while the output voltage of amplifier V (e.g., U1) approaches the desired target value, which is the value of the analog time-division multiplexed signal ZMA provided by the D / A converter DA. The digital continuous approximation controller SR is activated by setting the most significant bit (MSB) to 1, and comparator C checks whether the output voltage U1 of amplifier V, after being divided by voltage divider 420, is greater than or less than the target value. If it is greater, the MSB is set to 0; otherwise, it remains 1. This operation is repeated bit by bit from MSB to least significant bit (LSB).

[0140] according to Figure 6 The corresponding drive stages 110-130 of the drive device 100 include: a storage unit L coupled to a seventh node K7 for buffering signal components A1-A3 of the digital signal D6 provided at the seventh node K7 and allocated to the time slots Z1-Z3 of the drive stages 110-130; a D / A converter DA connected downstream of the storage unit L for converting the signal components A1-A3 provided by the storage unit L into analog drive signals U6-U8; and an amplifier V connected downstream of the D / A converter DA for amplifying the analog drive signals U6-U8 into drive voltages U1-U3 to drive the allocated actuator element 210.

[0141] according to Figure 6 The drive unit 100 has a control unit (not shown) configured to control switches S1-S3 according to the time-division multiplexing scheme Z.

[0142] Although the invention has been described based on exemplary embodiments, it can still be modified in various ways.

[0143] List of reference numerals

[0144] 1. Projection Exposure Equipment

[0145] 2 Lighting System

[0146] 3. Light source

[0147] 4 Illumination Optical Unit

[0148] 5. Field

[0149] 6. Object plane

[0150] 7. Mask Master

[0151] 8. Mask Master Carrier

[0152] 9. Mask Master Displacement Driver

[0153] 10 Projection Optical Units

[0154] 11 Image Field

[0155] 12 Image plane

[0156] 13 chips

[0157] 14. Chip carrier

[0158] 15. Wafer displacement driver

[0159] 16. Lighting radiation

[0160] 17 Concentrator

[0161] 18. Intermediate focal plane

[0162] 19 Deflecting mirrors

[0163] 20 First faceted mirror

[0164] 21 First facet

[0165] 22 Second faceted mirror

[0166] 23 Second facet

[0167] 100 drive unit

[0168] 110 First Drive Level

[0169] 120 Second Drive Level

[0170] 130 Third Drive

[0171] 200 actuators

[0172] 210 Actuator Components

[0173] 300 Optical System

[0174] 310 Optical Components

[0175] 400 control loop

[0176] 410 Feedback Branch

[0177] 420 voltage divider

[0178] The A1 digital signal is the signal component allocated to time slot Z1 of the first driver stage.

[0179] The signal component of the A2 digital signal allocated to time slot Z2 of the second drive stage.

[0180] The signal component of the A3 digital signal allocated to time slot Z3 of the third drive stage.

[0181] C comparator

[0182] CS holding capacitor

[0183] D4 digital signal

[0184] D5 digital signal

[0185] D6 Digital Signal

[0186] DR digital controller

[0187] K1 First Node

[0188] K2 Second Node

[0189] K3 Third Node

[0190] K4 Fourth Node

[0191] K5 Fifth Node

[0192] K6 Sixth Node

[0193] K7 Seventh Node

[0194] K8 Eighth Node

[0195] K9 Ninth Node

[0196] L storage unit, latch

[0197] MA center tap

[0198] MR multiplexed frames

[0199] R1 resistor

[0200] R2 resistor

[0201] S1 Output-side switch at the output of the first drive stage

[0202] S2 Output-side switch at the output of the second drive stage

[0203] S3 Output side switch at the third drive stage output

[0204] S4 Input Side Switch

[0205] S5 Input Side Switch

[0206] S6 Input Side Switch

[0207] SR continuous approximation controller

[0208] U1 drive voltage (provided by the first drive stage)

[0209] U2 drive voltage (provided by the second drive stage)

[0210] U3 drive voltage (provided by the third drive stage)

[0211] The voltage supplied at the center tap of the U4 voltage divider

[0212] U5 amplified time-division multiplexed drive signal

[0213] U6 is the analog drive signal used to drive the amplifier in the first drive stage.

[0214] U7 is used to drive the analog drive signal of the amplifier in the second drive stage.

[0215] U8 is the analog drive signal used to drive the amplifier in the third driver stage.

[0216] V amplifier

[0217] VE Comparison Results

[0218] Z-division multiplexing scheme

[0219] Z1 time slot (assigned to the first drive stage)

[0220] Z2 time slot (assigned to the second drive stage)

[0221] Z3 time slot (assigned to the third drive stage)

[0222] ZMA analog time-division multiplexed signal

[0223] ZMD digital time-division multiplexed signal

Claims

1. A driving device (100) for driving a plurality of N actuator elements (210) to actuate an optical element (310) of an optical system (4, 10), comprising: N driving stages (110-130) controlled by time division multiplexed signals (ZMD, ZMA) determined by a time division multiplexing scheme (Z), wherein a respective driving stage (110-130) of the N driving stages (110-130) is assigned to one of the N actuator elements (210) and to a designated time slot (Z1-Z3) of the time division multiplexed signals (ZMD, ZMA) and has an amplifier (V) configured to amplify a signal component of the assigned time slot (Z1-Z3) of the time division multiplexed signals (ZMD, ZMA) to form a driving voltage (U1-U3) for driving the assigned actuator element (210), wherein N > 2; and a control loop (400) having a feedback branch (410) with a voltage divider (420) selectively connectable to one of the N driving stages (110-130) based on the time division multiplexing scheme (Z).

2. The driving device of claim 1, wherein an output-side switch (S1-S3) is provided at an output of the amplifier (V) of the respective driving stage (110-130), wherein the output-side switches (S1-S3) of the driving stages (110-130) are coupled to the voltage divider (420) via a first node (K1).

3. The driving device of claim 1 or 2, wherein the voltage divider (420) is designed as a capacitive or resistive voltage divider (420).

4. The driving device of claims 1 to 3, wherein the driving device (100) has: a D / A converter (DA) configured to convert a digital representation (ZMD) of the time division multiplexed signals (ZMD, ZMA) received at the input side into an analog time division multiplexed signal (ZMA) and to provide the analog time division multiplexed signal (ZMA) at a second node (K2) on the output side; and a differential amplifier (D) having a non-inverting input coupled to the second node (K2) and an inverting input coupled to a center tap (MA) of the voltage divider (420) and configured to amplify a difference between the analog time division multiplexed signal (ZMA) represented at the non-inverting input and a voltage (U4) provided on the center tap (MA) and to provide an amplified time division multiplexed driving signal (U5) at a third node (K3) on the output side in accordance therewith.

5. The driving device of claim 4, wherein the N driving stages (110-130) are connected in parallel between the third node (K3) and the first node (K1), wherein a respective input-side switch (S4-S6) assigned to the amplifier (V) for selectively connecting the amplifier (V) to an output of the differential amplifier (D) is arranged between the third node (K3) and the amplifier (V) of the respective driving stage. ​ 6. The drive device as claimed in claim 5, wherein a control unit is provided, which is configured to control the switches (S1-S6) of the drive stages (110-130) in accordance with the time-multiplexing scheme (Z).

7. The drive device as claimed in claim 5 or 6, wherein a hold capacitor (CS) is provided for holding the level of the time-multiplexed drive signal (U5) provided in the open state of the assigned input-side switch (S4-S6), which hold capacitor (CS) is connected between the node (K4-K6) of the respective drive stage (110-130) amplifier (V) and ground.

8. The drive device as claimed in claim 2 or 3, wherein the drive device (100) has: an A / D converter (AD), which is configured in the feedback branch (410), is coupled to the center tap (MA) of the voltage divider (420) and is configured to convert the voltage (U4) provided on the center tap (MA) of the voltage divider (420) into a digital signal (D4) representing the provided voltage (U4); and a digital controller (DR), which is coupled to the A / D converter (AD) and is configured to provide a digital signal (D5) at a seventh node (K7) on the output side, which represents the difference between the digital representation (ZMD) of the time-multiplexed signal (ZMD, ZMA) and the digital signal (D4) provided by the A / D converter (AD).

9. The drive device as claimed in claim 8, wherein the respective drive stage (110-130) has: a storage unit (L), which is coupled to the seventh node (K7) for buffering the signal components (A1-A3) of the time slots (Z1-Z3) of the digital signal (D5) provided at the seventh node (K7), which are assigned to the drive stage (110-130); a D / A converter (DA), which is connected downstream of the storage unit (L) for converting the signal components (A1-A3) provided by the storage unit (L) into analog drive signals (U6-U8); and the amplifier (V), which is connected downstream of the D / A converter (DA) for amplifying the analog drive signals (U6-U8) to the drive voltage (U1-U3) for driving the assigned actuator element (210).

10. The drive device as claimed in claim 8 or 9, wherein the digital controller (DR) is designed as a microcontroller or as an FPGA or as an application-specific integrated digital circuit (ASIC).

11. The drive device as claimed in claim 9 or 10, wherein a control unit is provided, which is configured to control the storage unit (L) and the switches (S1-S3) of the drive stages (110-130) in accordance with the time-multiplexing scheme (Z).

12. The drive device as claimed in claim 2 or 3, wherein the drive device (100) has: ​ ​ ​ ​ ​ a comparator (C) configured in the feedback branch (410) coupled via a first input node (K8) to the center tap (MA) of the voltage divider (420) and configured to provide a comparison result (VE) at the output side based on a comparison between a voltage (U4) provided on the center tap (MA) of the voltage divider (420) and an analog drive signal (U6-U8) received via a second input node (K9) and present at the input of the amplifier (V) of the drive stage (110-130) selected according to the time-division multiplexing scheme (Z), respectively; and a successive approximation controller (SR) coupled to the comparator (C) and configured to provide a digital signal (D6) at a seventh node (K7) of the output side based on a successive approximation using a digital representation (ZMD) of the time-division multiplexing signal (ZMD, ZMA) and the comparison result (VE).

13. The drive arrangement of claim 12, wherein the respective drive stage (110-130) has: a storage unit (L) coupled to the seventh node (K7) for buffering signal components (A1-A3) of the digital signal (D6) provided at the seventh node (K7) for the time slot (Z1-Z3) assigned to the drive stage (110-130); a D / A converter (DA) connected downstream of the storage unit (L) for converting the signal components (A1-A3) provided by the storage unit (L) into an analog drive signal (U6-U8); and the amplifier (V) connected via coupling nodes (K10-K12) to the D / A converter (DA) for amplifying the analog drive signal (U6-U8) into the drive voltage (U1-U3) to drive the assigned actuator element (210).

14. The drive arrangement of claim 13, wherein the respective coupling nodes (K10-K12) are connected to the second input node (K9) of the comparator (C) via respective switches (S7-S9).

15. The drive arrangement of claim 14, wherein a control unit is provided configured to control the switches (S1-S3, S7-S9) according to the time-division multiplexing scheme (Z).

16. An optical system (300) comprising a plurality of actuatable optical elements (310), wherein each of the plurality of actuatable optical elements (310) is assigned a plurality N of actuator elements (210) of an actuator (200), wherein each actuator (200) is assigned a drive arrangement (100) for driving the actuator (200) as claimed in any one of claims 1 to 15.

17. The optical system of claim 16, wherein the optical system (300) is in the form of an illumination optical unit (4) or in the form of a projection optical unit (10) of a lithography apparatus (1).

18. A lithography apparatus (1) comprising an optical system (300) as claimed in claim 16 or 17.

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