HTFB experimental circuit supporting in-situ parameter monitoring and test method thereof
By designing an HTFB experimental circuit that supports in-situ parameter monitoring, the problems of experimental overheating boundary and offline testing in HTFB aging experiments were solved, realizing efficient and safe device aging testing and ensuring the accuracy and consistency of test results.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-15
- Publication Date
- 2026-03-10
AI Technical Summary
Existing HTFB aging experiments pose a risk of exceeding the test's thermal boundary, leading to false failures or device damage. Furthermore, offline parameter testing affects efficiency and the accuracy of results.
The design includes an HTFB experimental circuit that supports in-situ parameter monitoring, comprising an aging stress application module, a junction temperature detection module, and an in-situ parameter acquisition module. Real-time monitoring of temperature and electrical performance parameters is achieved through hydraulic connection and electrical methods, avoiding human damage and errors during disassembly and assembly.
It improves the safety and efficiency of aging tests, reduces errors, ensures the reliability and consistency of test results, supports parallel or series testing of multiple devices, and is suitable for batch aging tests.
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Figure CN121633763A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of HTFB aging circuit technology, and in particular to an HTFB experimental circuit and its testing method that supports in-situ parameter monitoring. Background Technology
[0002] Silicon carbide (SiC) MOSFETs have become mainstream core devices in power electronics due to their high-temperature and high-voltage characteristics. However, in actual service and accelerated aging applications, SiC MOSFETs face the typical problem of bipolar degradation. Bipolar degradation is assessed by the increase in on-state resistance or leakage current caused by bipolar current stress. Essentially, the bipolar degradation mechanism stems from the recombination of electrons and holes in the current due to testing or stress, causing existing basal plane dislocations (bpd) to transform into stacking faults in the active drift region. The direct impact of these stacking faults is an increase in on-resistance or blocking current, thus representing a degradation in device performance. Accelerated lifetime models of bipolar degradation with variables such as temperature, current density, and gate voltage have not yet been well established. Most or all failures occur within <~100 hours of stress, representing an early lifetime failure mechanism rather than wear.
[0003] Currently, to study the bipolar degradation mechanism of silicon carbide MOSFETs, researchers both domestically and internationally have proposed various accelerated aging test methods. Standard IEC 63275 2 / JEP197 specifies the experimental setup methods for bipolar degradation under DC and pulsed current conditions, covering aspects such as experimental circuits, experimental procedures, and failure criteria. DC bipolar degradation is commonly referred to as HTFB, while pulsed current bipolar degradation is called dyn-HTFB. In HTFB and dyn-HTFB tests, any critical parameter of the device under test (DUT) exceeds the critical threshold specified in the datasheet, or the change in any critical device parameter compared to the initial value exceeds a given percentage, but does not violate the datasheet specifications or cause other failures in the intended application.
[0004] In performing HTFB testing, the primary driving factor is current. Therefore, the goal is to set the stress current as high as possible without exceeding the thermally defined boundaries in the product datasheet. Currently published HTFB techniques typically monitor the case temperature and then calculate the junction temperature after thermal equilibrium based on power and thermal resistance to ensure the test junction temperature does not exceed the thermal boundary of the device under test. According to existing literature, if the calculated junction temperature error exceeds 10°C, this technique carries the risk of exceeding the thermal boundary, introducing additional failure mechanisms, potentially triggering false failures or even burnout that are not true degradations, rendering the experimental conclusions meaningless.
[0005] Furthermore, in existing technologies, key parameter testing typically involves removing the Device Under Test (DUT) from the equipment, conducting offline testing, and then resetting it for continued testing. Each disassembly and reassembly is extremely time-consuming, especially when multiple devices are tested in parallel. During disassembly and reassembly, experimental conditions (such as tightness, material temperature at connection points, and physical contact) change, affecting the scientific validity of comparing test results. Devices are also more susceptible to damage during disassembly and reassembly, leading to false or human-induced failures. To increase the sample size for aging tests, HTFB uses multiple devices in series. If an offline parameter testing scheme is used, a significant amount of time would be spent setting up the DUT, severely impacting testing efficiency.
[0006] The purpose of this invention is to design an HTFB experimental circuit and its testing method that support in-situ parameter monitoring, addressing the problems existing in the prior art. Summary of the Invention
[0007] In view of this, the purpose of this invention is to propose an HTFB experimental circuit and its testing method that support in-situ parameter monitoring, which can solve the above-mentioned problems.
[0008] This invention provides an HTFB experimental circuit that supports in-situ parameter monitoring, comprising: An aging stress application module is connected to the device under test (DUT) and is used to apply a set aging current to the DUT. The junction temperature detection module is connected to the device under test (DUT) and is used to measure and calculate the actual temperature of the junction region of the DUT in real time using electrical methods. The in-situ parameter acquisition module is connected to the device under test (DUT) and is used to acquire various key electrical performance parameters of the DUT in real time during aging tests.
[0009] This invention provides a testing method for an HTFB experimental circuit that supports in-situ parameter monitoring, comprising: Close the equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, switch K6, and aging current source DC1 to apply aging current to the device under test for pre-aging. Close equivalent switch S2, hydraulic connection device Q1, switch K1, switch K4, switch K5, and switch K6. Disconnect the aging current source DC1 and switch to the voltage acquisition module to acquire the positive voltage of the device under test. Through positive voltage Calculate the equivalent junction temperature; Determine whether the current equivalent junction temperature meets the test requirements. If yes, proceed to the continuous aging stage; otherwise, continue with the pre-aging process. Disconnect the equivalent switch S2, close the equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, and switch K6. Apply aging current to the device under test by aging current source DC1 for continuous aging until the set intermediate test time point. During the continuous aging phase, the in-situ acquisition module is controlled to switch on and off, and various key electrical performance data are collected in situ according to the sampling frequency.
[0010] The beneficial effects of this invention are: First, a constant current source (or pulsed current source) is used for hydraulic pressing with a large contact surface to achieve long-term stable, high-current aging stress loading on devices such as MOSFETs / IGBTs, simulating actual failure scenarios to the greatest extent. Hydraulic pressing, combined with a water-cooling structure, effectively eliminates the risks of localized overheating and incomplete contact caused by point contact in traditional spring clamps, extending test time and making it suitable for continuous high-current operation. The structure supports parallel or series testing of multiple devices, significantly improving the efficiency of batch aging experiments and reducing the frequency of manual insertion / removal / maintenance.
[0011] Secondly, real-time, online monitoring of device junction temperature is achieved through a low-current source and electrical methods, avoiding estimation errors caused by traditional reliance on case temperature / thermal resistance calculations, thus significantly improving the accuracy of thermal monitoring. The intermittent low-power sampling method does not affect the device's primary aging process, and stress and temperature measurement do not interfere with each other. It can obtain the device's internal temperature at the actual moment of failure, providing crucial evidence for further physical analysis of the failure mechanism.
[0012] Third, it supports testing key parameters directly on the circuit board without disassembling the components, reducing the uncertainty of data caused by manual disassembly and assembly. Combined with programmable switches and physical isolation, it effectively protects aging power supplies and main switches from high-voltage sampling impacts, improving system safety and maintainability. Automated data acquisition follows the international standard JEP195, requiring no manual intervention, ensuring good test consistency, and facilitating peer evaluation and data reproducibility. Attached Figure Description
[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings required in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0014] Figure 1 This is a test circuit topology diagram of a single test device in Example 1.
[0015] Figure 2 This is a test circuit topology diagram of multiple devices under test in Example 1.
[0016] Figure 3 This is the gate potential topology diagram of DUT1~DUT-n during leakage current testing of multiple devices under test in real-time Example 1. Detailed Implementation
[0017] To facilitate understanding by those skilled in the art, the structure of the present invention will now be described in further detail with reference to the accompanying drawings. It should be understood that, unless otherwise specified, the order of the steps mentioned in this embodiment can be adjusted according to actual needs, and they can even be executed simultaneously or partially simultaneously.
[0018] like Figure 1 As shown, Embodiment 1 provides an HTFB experimental circuit that supports in-situ parameter monitoring, including: An aging stress application module is connected to the device under test (DUT) and is used to apply a set aging current to the DUT. Specifically, it includes: The two ends of the aging current source DC1 are connected in parallel to the source and drain of the device under test through the equivalent switch S1 and the hydraulic connection device Q1, respectively, to apply the set aging current to the device and realize accelerated stress degradation test. Among them, the equivalent switch S1 is used for electronic on / off control of the main circuit; An equivalent switch S2 is connected in parallel across the two ends of the aging current source DC1, which works with the equivalent switch S1 to achieve circuit switching isolation. The hydraulic connection device Q1 is used for controlled clamping of the device under test. Its clamping surface integrates a water-cooled clamping plate structure that is connected to an external cooling system. The circulating cooling water can continuously remove the heat generated by the high current test.
[0019] In this embodiment, the aging stress application module provides a constant or pulsed aging stress current to the device under test (e.g., power MOSFET / IGBT) to accelerate life degradation and reliability assessment. A hydraulic connection device Q1 enables highly reliable, low-contact-resistance clamping between the device under test and the test circuit, overcoming problems such as overheating and poor contact in traditional spring clamps under prolonged high-current operation. By programmably disconnecting Q1, physical isolation between the aging circuit and the acquisition circuit is achieved during the parameter testing phase, effectively preventing high-voltage surges from damaging the main aging path, especially during high-voltage micro-current parameter acquisition. A water-cooled press-fit structure ensures safety and extends equipment lifespan during long-term HTFB testing under high-current conditions.
[0020] Specifically, Q1 is a hydraulic connection device. During the critical parameter testing phase, disconnecting Q1 physically isolates the parameter testing circuit from the aging circuit, especially when testing leakage current, to prevent high voltage damage to DC1, S1, and S2. It should be noted that the Q1 connection device is programmable, requiring a sufficiently large connection contact surface and minimal contact resistance. The design can be referenced from crimp-type IGBT connection fixtures. The contact surface can be designed for water cooling to ensure reliable long-term high-current operation during HTFB testing and minimize DC1 voltage drop.
[0021] The junction temperature detection module is connected to the device under test (DUT) and is used to measure and calculate the actual temperature of the junction region of the DUT in real time using electrical methods. Specifically, it includes: The low-power current source DC3 is connected to the source and drain of the device under test through switches K3 and K2 respectively, to provide the equivalent junction temperature test current. The voltage acquisition module is connected to the source and drain of the device under test (DUT) via switches K5 and K6, respectively, to acquire the forward voltage of the DUT during junction temperature detection. Calculate the current equivalent junction temperature.
[0022] In this embodiment, the junction temperature detection module detects the junction temperature of the device in real time and accurately during operation, analyzes the temperature rise caused by power loss, and evaluates thermal stability. A low-power current source (DC3) and switching switches (K3, K2) prevent excessive current acquisition from interfering with the device's temperature distribution during thermal sensing. Multi-stage, multi-point intermittent detection is supported, reducing interference with the main aging process. Disturbance-free online junction temperature acquisition is achieved, providing key thermal parameters and real-world operational big data for device failure analysis and lifetime prediction.
[0023] The in-situ parameter acquisition module is connected to the device under test (DUT) and is used to acquire various key electrical performance parameters of the DUT in real time during aging tests.
[0024] Specifically, it includes: The leakage current acquisition circuit is used to provide the test voltage and acquire the leakage current in situ. Specifically, the high-voltage, low-current source DC2 is connected to the source and drain of the device under test through resistor R1, switch K12, and switch K13, respectively, to provide leakage current. The test voltage; Among them, a leakage current acquisition module is connected in parallel with resistor R1 to collect leakage current. collection.
[0025] In this embodiment, the leakage current is the drain-source leakage current in the off state. It is closely related to deep failures such as intrinsic carrier surge, PN junction leakage, and structural breakdown. Especially during the high-temperature / high-voltage aging stage, leakage current is an effective evaluation parameter.
[0026] Threshold voltage and gate positive and negative leakage current acquisition circuits are used to provide test current and drive voltage and acquire threshold voltage and gate positive and negative leakage current in situ; Specifically, the low-power current source DC3 is connected to the source and drain of the device under test through switches K1 and K4 respectively to provide the test current for the threshold voltage. The drive unit is connected to the gate of the device under test (DUT) in sequence through resistor R2 and switch K7, and the other end is connected to the source of the DUT to apply a drive voltage to the gate of the DUT. The voltage acquisition module is connected to the source and drain of the device under test (DUT) via switches K5 and K6, respectively, to acquire the threshold voltage of the DUT. ; Among them, resistor R2 is connected in parallel with The acquisition module is used to collect positive and negative gate leakage currents. collection.
[0027] In this embodiment, the threshold voltage is the gate-source voltage required for MOSFET / IGBT devices to start conducting. With aging, oxide traps and interface states increase, causing the threshold voltage to drift. Excessive threshold voltage drift is usually one of the important criteria for determining failure. According to the pre-test settings, voltage preprocessing is performed before threshold voltage acquisition to meet the requirements of the standard JEP195 SICI MOSFET threshold voltage test sequence. During the threshold voltage test phase, the drive unit outputs a high-impedance state or disconnects the electrical connection between the drive unit and the device under test (DUT) via a switch.
[0028] Gate leakage currents are the leakage currents between the gate and the source, and are almost zero under ideal conditions. Deterioration of the gate oxide layer, impurities, defects, thermal breakdown, etc., can all cause a significant increase in gate leakage currents, which are a direct reflection of insulation failure in MOS devices.
[0029] The drain-source voltage, forward voltage, and on-resistance acquisition circuit is used to provide the test voltage and acquire the drain-source voltage in situ, and calculate the on-resistance.
[0030] Specifically, the high-current pulse power supply DC4 is connected to the source and drain of the device under test through switches K8 and K11, respectively, to provide the test current for the drain-source voltage. The voltage acquisition module is connected to the source and drain of the device under test (DUT) via switches K5 and K6, respectively, to acquire the source-drain voltage of the DUT. Through drain-source voltage Calculate the on-resistance ; The high-current pulse power supply DC4 is connected to the source and drain of the device under test through switches K10 and K9 respectively, to provide the test current for the positive voltage. The voltage acquisition module is connected to the source and drain of the device under test (DUT) via switches K5 and K6, respectively, to acquire the forward voltage of the DUT. .
[0031] In this embodiment, due to the influence of system parasitic parameters, the test current pulse width of the device under test (DUT) during on-resistance testing is recommended to be at least 1ms. The drain-source voltage is the voltage across the drain and source terminals when the device path is on, while the on-resistance is the equivalent resistance when the path is on. An increase in on-resistance is the most typical phenomenon of power degradation, reflecting various reasons such as reduced deep carrier mobility, contact deterioration, and bond wire aging. The drain-source voltage, combined with the drive current, allows for real-time calculation and tracking of changes in on-resistance.
[0032] Due to the influence of system parasitic parameters, the recommended minimum pulse width for the test current of the device under test (DUT) during forward voltage testing is 1ms. Forward voltage is the voltage drop across a diode when it is forward-biased, reflecting structural variations such as PN junction degradation, shortened carrier lifetime, and metal diffusion. A rise in forward voltage usually indicates increased internal losses, leading to eventual failure.
[0033] The voltage acquisition module is used to acquire drain-source voltage, threshold voltage, and forward voltage. A minimum sampling interval of 1µs is recommended. This module, in conjunction with the driver unit, can perform voltage preprocessing before threshold voltage acquisition, meeting the requirements of the standard JEP195SIC MOSFET threshold voltage test sequence. (Leakage current acquisition module...) The acquisition module, drive unit, and voltage acquisition module can be implemented in various ways, which will not be elaborated here.
[0034] Furthermore, the circuit containing the device under test (DUT) includes multiple DUTs connected in series. The source and drain of each DUT are connected to a voltage acquisition module, and the gate and source of each DUT are connected to a driving unit and... The acquisition module is used for simultaneous experimental measurements of multiple devices under test. Leakage current sampling When the gate of any device under test is at a low level, the gate potential of the other devices under test is set to a high level.
[0035] In this embodiment, to increase the number of samples in the aging test, the HTFB will use multiple devices connected in series, such as... Figure 2 As shown, DUT-n represents the nth device under test connected in series. The acquisition module n represents the nth isolation. The acquisition module, where drive unit n represents the nth isolated drive unit, and voltage acquisition module n represents the nth isolated voltage acquisition module, is similar to the single-device implementation scheme for HTFB with in-situ parameter testing, except for leakage current. Differences in DUT drive potential settings during data acquisition. Multi-device cascade testing. At this time, except for the device whose leakage current is being measured, whose gate potential is low, the gate potentials of other devices are high to ensure that the channel is open. Taking the IDSS test of DUT-1 as an example, as follows... Figure 3 As shown.
[0036] like Figure 3 As shown, Embodiment 2 provides a testing method for an HTFB experimental circuit that supports in-situ parameter monitoring, including: Close the equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, switch K6, and aging current source DC1 to apply aging current to the device under test for pre-aging. Close equivalent switch S2, hydraulic connection device Q1, switch K1, switch K4, switch K5, and switch K6. Disconnect the aging current source DC1 and switch to the voltage acquisition module to acquire the positive voltage of the device under test. Through positive voltage Calculate the equivalent junction temperature; In this step, during the calibration phase, the forward voltage is measured at two (or more) known temperature points, and the temperature coefficient is calculated using the two forward voltage drops and their temperature points. During the measurement phase, the equivalent junction temperature can be calculated using the temperature coefficient, the forward voltage at the reference point, and the real-time forward voltage. This step is existing technology and will not be described in detail in this invention.
[0037] Determine whether the current equivalent junction temperature meets the test requirements. If yes, proceed to the continuous aging stage; otherwise, continue with the pre-aging process. In this step, the heat dissipation capacity of the device under test (DUT) is adjusted to ensure that, under the set aging current, the junction temperature of the DUT after aging to thermal equilibrium is the temperature required by the test conditions.
[0038] Disconnect the equivalent switch S2, close the equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, and switch K6. Apply aging current to the device under test by aging current source DC1 for continuous aging until the set intermediate test time point. During the continuous aging phase, the in-situ acquisition module is controlled to switch on and off, and various key electrical performance data are collected in situ according to the sampling frequency.
[0039] Specifically: When switches K2, K3, K5, K6, and K7 are closed, the drive unit applies a drive voltage to the device under test (DUT), and the threshold voltage of the DUT is acquired by the voltage acquisition module. ,pass The acquisition module acquires the positive and negative gate leakage currents of the device under test. ; Close switches K5, K6, K8, and K11 to supply power to the device under test (DUT) via a high-current pulse power supply (DC4). The drain-source voltage of the DUT is then acquired by the voltage acquisition module. Through drain-source voltage The on-resistance is calculated from the pulse current of the high-current pulse power supply DC4. ; When switches K5, K6, K9, and K10 are closed, power is supplied to the device under test (DUT) via a high-current pulse power supply (DC4). The voltage acquisition module then acquires the forward voltage of the DUT. ; Close switches K12 and K13 to supply power to the device under test (DUT) through a high-voltage, low-current source DC2. The leakage current of the DUT is then collected by the leakage current acquisition module. .
[0040] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0041] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0042] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0043] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0044] It should be noted that any reference signs placed between parentheses in the claims should not be construed as limiting the claims. The word "comprising" does not exclude the presence of components or steps not listed in the claims. The word "a" or "an" preceding a component does not exclude the presence of a plurality of such components. The invention can be implemented by means of hardware comprising several different components and by means of a suitably programmed computer. In a unit claim enumerating several means, several of these means may be embodied by the same item of hardware. The words first, second, and third, etc., do not indicate any order. These words can be interpreted as names.
[0045] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the invention.
[0046] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.
[0047] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0048] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.
Claims
1. An HTFB experimental circuit supporting in-situ parameter monitoring, characterized in that, include: An aging stress application module is connected to the device under test (DUT) and is used to apply a set aging current to the DUT. The junction temperature detection module is connected to the device under test (DUT) and is used to measure and calculate the actual temperature of the junction region of the DUT in real time using electrical methods. The in-situ parameter acquisition module is connected to the device under test (DUT) and is used to acquire various key electrical performance parameters of the DUT in real time during aging tests.
2. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 1, characterized in that, The aging stress application module includes: The two ends of the aging current source DC1 are connected in parallel to the source and drain of the device under test through the equivalent switch S1 and the hydraulic connection device Q1, respectively, to apply the set aging current to the device and realize accelerated stress degradation test. Among them, the equivalent switch S1 is used for electronic on / off control of the main circuit; An equivalent switch S2 is connected in parallel across the two ends of the aging current source DC1, which works with the equivalent switch S1 to achieve circuit switching isolation. The hydraulic connection device Q1 is used for controlled clamping of the device under test. Its clamping surface integrates a water-cooled clamping plate structure that is connected to an external cooling system. The circulating cooling water can continuously remove the heat generated by the high current test.
3. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 1, characterized in that, The junction temperature detection module includes: The low-power current source DC3 is connected to the source and drain of the device under test through switches K3 and K2 respectively, to provide the equivalent junction temperature test current. The voltage collection module is connected to the source and drain of the device under test through switch K5 and switch K6 respectively, for collecting the forward voltage of the device under test when detecting the junction temperature Calculate the current equivalent junction temperature.
4. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 1, characterized in that, The in-situ parameter acquisition module includes: The leakage current acquisition circuit is used to provide the test voltage and acquire the leakage current in situ. Threshold voltage and gate positive and negative leakage current acquisition circuits are used to provide test current and drive voltage and acquire threshold voltage and gate positive and negative leakage current in situ; The drain-source voltage, forward voltage, and on-resistance acquisition circuit is used to provide the test voltage and acquire the drain-source voltage in situ, and calculate the on-resistance.
5. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 4, characterized in that, The leakage current acquisition circuit includes: A high-voltage small-current source DC2 is connected to the source and drain of the device under test through a resistor R1, a switch K12 and a switch K13, respectively, for providing a drain current of the test voltage; Wherein, the resistance R1 is connected with the leakage current collection module in parallel, for leakage current collection.
6. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 4, characterized in that, The threshold voltage and gate positive and negative leakage current acquisition circuit includes: The low-power current source DC3 is connected to the source and drain of the device under test through switches K1 and K4 respectively, to provide the test current for the threshold voltage. The drive unit is connected to the gate of the device under test (DUT) in sequence through resistor R2 and switch K7, and the other end is connected to the source of the DUT to apply a drive voltage to the gate of the DUT. The voltage collection module is connected to the source and drain of the device under test through switches K5 and K6 respectively, for collecting the threshold voltage of the device under test ; Wherein, the resistance R2 is connected in parallel with The acquisition module is used for collecting positive and negative gate and drain currents Acquisition.
7. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 4, characterized in that, The drain-source voltage, forward voltage, and on-resistance acquisition circuit includes: The high-current pulse power supply DC4 is connected to the source and drain of the device under test through switches K8 and K11 respectively, to provide the test current for the drain-source voltage; The voltage collection module is connected to the source and drain of the measured device through switches K5 and K6 respectively, for collecting the drain-source voltage of the measured device , calculating the on-resistance by the drain-source voltage ; and ; The high-current pulse power supply DC4 is connected to the source and drain of the device under test through switches K10 and K9 respectively, to provide the test current for the positive voltage. The voltage collection module is connected to the source and drain of the device under test through switches K5 and K6 respectively, for collecting the forward voltage of the device under test .
8. The HTFB experimental circuit supporting in-situ parameter monitoring according to claim 1, characterized in that, The measured device is connected in series with multiple measured devices in a loop, the source and the drain of each measured device are connected to a voltage acquisition module, the gate and the source of each measured device are connected to a driving unit, and An acquisition module is configured to simultaneously measure multiple measured devices. Leakage current is collected At this time, the gate potential of any measured device is low, and the gate potentials of the rest of the measured devices are set to high.
9. A method of testing an HTFB experimental circuit supporting in-situ parameter monitoring, characterized in that, An HTFB experimental circuit supporting in-situ parameter monitoring according to any one of claims 1-8, comprising: Close the equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, switch K6, and aging current source DC1 to apply aging current to the device under test for pre-aging. Close equivalent switch S2, hydraulic connecting device Q1, switch K1, switch K4, switch K5, switch K6, disconnect aging current source DC1 to voltage acquisition module to collect the forward voltage of the measured device , the equivalent junction temperature is calculated by the forward voltage ; Determine whether the current equivalent junction temperature meets the test requirements. If yes, proceed to the continuous aging stage; otherwise, continue with the pre-aging process. Open equivalent switch S2, close equivalent switch S1, hydraulic connection device Q1, switch K1, switch K4, switch K5, switch K6, the aging current source DC1 to the measured device applies aging current to continue aging until the set intermediate test time point; In the continuous aging stage, the in-situ parameter acquisition module is controlled to open and close the internal switch to collect the key electrical performance data in-situ according to the sampling frequency.
10. The test method of a HTFB experimental circuit supporting in-situ parameter monitoring according to claim 9, characterized in that, The in-situ parameter acquisition module is controlled to open and close the internal switch to collect the key electrical performance data in-situ according to the sampling frequency includes: Close the switch K2, switch K3, switch K5, switch K6, switch K7, drive unit to the device under test applies driving voltage, through the voltage acquisition module acquisition device under test threshold voltage , through acquisition module acquisition device under test gate positive and negative leakage current ; Close switch K5, switch K6, switch K8, switch K11, through the high current pulse power supply DC4 pulse power supply to the measured device, through the voltage acquisition module to collect the drain-source voltage of the measured device , through the drain-source voltage and the pulse current of high current pulse power supply DC4 to calculate the on-resistance ; Close K5, switch K6, switch K9, switch K10, through high current pulse power supply DC4 pulse power supply to the measured device, the voltage acquisition module collects the forward voltage of the measured device ; Close switch K12, switch K13, through the high-voltage small current source DC2 to the measured device, through the leakage current acquisition module to collect the leakage current of the measured device .