Gallium nitride power device with grid hot electron blocking structure and preparation method of gallium nitride power device

Abstract

The invention discloses a gallium nitride power device with a grid hot electron blocking structure. The gallium nitride power device comprises a substrate layer, a buffer layer, a channel layer and a barrier layer which are sequentially arranged from bottom to top, a first P-type material layer, a hot electron blocking structure layer, a second P-type material layer and gate metal are sequentially arranged above the barrier layer; and source metal and drain metal are respectively arranged at two ends of the barrier layer. The upper portion of the barrier layer, the side wall of the source electrode metal part, the side wall of the drain electrode metal part, the side wall of the first P-type material layer, the side wall of the hot electron blocking structure layer, the side wall of the second P-type material layer and the side wall of the grid electrode metal part are all covered with passivation layers. The hot electron blocking structure is introduced into the p-GaN gate gallium nitride power device, so that the movement process of hot electrons can be effectively prevented, the bombardment damage of the hot electrons to a gate Schottky junction is remarkably reduced, and the reliability of the device is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of gallium nitride high electron mobility transistors, and more particularly, to a gallium nitride power device with a gate hot electron blocking structure and a preparation method thereof. BACKGROUND

[0002] As a representative of the third generation of semiconductor materials, gallium nitride (GaN) has become the core material of a new generation of power electronic devices due to its wide band gap, high electron saturation drift speed, high breakdown electric field, and high electron mobility. Among them, gallium nitride high electron mobility transistor (GaN HEMT) has attracted much attention in the field of power electronics due to its low on-resistance, fast switching response, and high energy conversion efficiency.

[0003] The traditional AlGaN / GaN HEMT spontaneously forms a two-dimensional electron gas (2DEG) channel at the heterojunction interface due to polarization effect, which is usually a depletion mode (normally on) device. However, in practical applications, enhancement mode (normally off) devices are more in line with system safety and driving needs. The main technical approaches to realize enhancement mode GaN HEMT currently include recessed gate, fluorine ion implantation, p-type gate, and common source and common gate structure. Among them, the p-GaN gate structure can maintain a low gate leakage current while achieving stable normally off characteristics, and has become the most widely used solution in commercial applications.

[0004] Although p-GaN gate devices have been widely used in commercial applications, their gate structures still face challenges in terms of reliability. When the device is under positive gate bias, electrons escaping from the 2DEG channel are accelerated in the p-GaN region, reaching a peak energy near the p-GaN surface and impacting the gate metal, where the electric field is also the strongest. The synergistic effect of high hot electron bombardment and strong electric field stress accelerates the degradation of the metal / p-GaN Schottky junction, ultimately leading to gate failure.

[0005] To improve the reliability of the gate, two main ideas have been proposed in the academic community: (i) enhancing the hot electron bombardment resistance at the location where the electric field peak appears and (ii) reducing the hot electron energy by relieving the electric field. When using method (i), GaON, gallium oxide, or Al x Ga 1-x N is introduced as an enhancement layer, making it more immune to hot electron bombardment. When using method (ii), an intrinsic GaN (i-GaN) layer is often grown on the surface of p-GaN to reduce the electric field. However, these two methods do not solve the problem from the source, and hot electron bombardment still exists significantly.

[0006] Therefore, there is an urgent need and important application value to develop a technical solution that can inhibit hot electron bombardment from the source and improve the reliability of the gate structure. SUMMARY

[0007] The present application aims to overcome the above-mentioned deficiencies of the prior art, and provides a gallium nitride power device with a gate hot electron blocking structure to overcome the above-mentioned technical problems existing in the prior art. The present application blocks the movement of hot electrons escaping from 2DEG by changing the energy band structure of the p-GaN gate, and prevents the occurrence of hot electron bombardment.

[0008] Another object of the present application is to provide a preparation method of the above-mentioned gallium nitride power device with a gate hot electron blocking structure.

[0009] In order to achieve the above-mentioned application purposes, the present application provides a gallium nitride power device with a gate hot electron blocking structure, which comprises, from bottom to top, a substrate layer, a buffer layer, a channel layer, and a barrier layer; A first P-type material layer, a hot electron blocking structure layer, a second P-type material layer, and a gate metal are sequentially arranged in the middle of the upper part of the barrier layer; a source metal and a drain metal are respectively arranged at both ends of the upper part of the barrier layer; the hot electron blocking structure layer is composed of a plurality of periodically and alternately stacked gallium nitride material layers and interlayer structure material layers; the interlayer structure material layers are indium gallium nitride / aluminum gallium nitride material layers; The upper surface of the barrier layer, the partial sidewalls of the source metal and the drain metal, the two sides of the first P-type material layer, the two sides of the hot electron blocking structure layer, and the two sides of the second P-type material layer are all covered with a passivation layer, and the two sides of the gate metal are partially covered with a passivation layer.

[0010] The present application provides a gallium nitride power device with a gate hot electron blocking structure, which is designed with a hot electron blocking structure at the original p-GaN gate structure. The hot electron blocking structure is composed of a plurality of periodically and alternately stacked gallium nitride material layers and indium gallium nitride / aluminum gallium nitride material layers. The stacking structure can effectively reduce the bombardment damage of hot electrons to the gate Schottky junction. Due to the introduction of the hot electron blocking structure, the movement process of hot electrons can be effectively prevented when a positive bias is applied to the gate, thereby significantly reducing the bombardment damage of hot electrons to the gate Schottky junction and improving the reliability of the device. In addition, the hot electron blocking structure can respectively play the roles of promoting the recombination of hot electrons or blocking the movement of hot electrons by stacking different materials. When the hot electron recombination structure is used, the photons generated by the recombination of hot electrons and holes help to release the trapped carriers from the traps, thereby enhancing the stability of the device; when the electron potential barrier structure is used, the hot electrons moving towards the gate metal side are prevented by the electron potential barrier and form a charge accumulation in the gate structure, which is beneficial to improve the gate breakdown resistance of the device.

[0011] Preferably, the plurality of periods is 1-10 periods, further preferably 2-3 periods; the gallium nitride material layer is unintentionally doped, and has a thickness of 10-20 nm; the interlayer structure material layer has a thickness of 3-5 nm.

[0012] Further preferably, when the interlayer structure material layer is indium gallium nitride, the mole fraction or atomic percentage x of indium atoms in the In x Ga 1-x N ternary alloy is 0.1-1, preferably 0.1-0.25, to suppress V-type defects and regulate quantum confinement Stark effect. When the interlayer structure material layer is aluminum gallium nitride, the mole fraction or atomic percentage x of aluminum atoms in the Al x Ga 1-x N ternary alloy is 0.1-1, preferably 0.1-0.25, to improve Fermi level height of the material layer.

[0013] Preferably, the gate metal forms a Schottky contact with the second P-type material layer, constituting a Schottky junction; the first P-type material layer has a thickness greater than 20 nm, preferably 40-60 nm, to ensure that the two-dimensional electron gas at the bottom thereof is effectively depleted to realize normally-off; the second P-type material layer has a thickness greater than 40 nm, preferably 70-80 nm, to ensure that the depletion region in the Schottky junction does not spread to the hot electron blocking structure layer.

[0014] In the present application, the source metal and the drain metal both form ohmic contacts with the barrier layer; the gate metal forms a Schottky contact with the second P-type material layer, constituting a Schottky junction.

[0015] Preferably, the first P-type material layer and the second P-type material layer have the same composition, being one of gallium nitride, aluminum nitride, and aluminum gallium nitride. The first and second P-type material layers having the same composition have the same energy band relative to the hot electron blocking structure, facilitating the interlayer structure material layer in the hot electron blocking structure to adopt indium gallium nitride material with a lower energy band, and combining with the first and second P-type material layers to form a hot electron recombination structure capable of effectively absorbing hot electrons; or the interlayer structure material layer adopts aluminum gallium nitride material with a higher energy band, and combining with the first and second P-type material layers to form an electron potential barrier capable of effectively blocking hot electron movement, improving the gate reliability of the gallium nitride high electron mobility transistor.

[0016] Preferably, the gate metal, the source metal, and the drain metal are each one or more of titanium, gold, aluminum, nickel, tungsten, titanium nitride, and indium tin oxide in combination. The source, gate, and drain materials each adopt a metal material with low resistivity, aiming to reduce internal resistance and reduce conduction loss, and these materials are also commonly used in semiconductor processing.

[0017] Preferably, the material of the passivation layer is selected from at least one of aluminum oxide, silicon oxide, aluminum nitride, silicon nitride, gallium oxynitride, aluminum oxynitride, silicon oxynitride. The oxide, nitride and oxynitride materials used in the passivation layer all have insulating effects of hindering diffusion and preventing current flow, to ensure the performance stability of the high electron mobility transistor when working.

[0018] Preferably, the materials of the barrier layer, the channel layer and the buffer layer are all selected from one of gallium nitride, aluminum nitride and aluminum gallium nitride; and / or, the material of the substrate layer is selected from any one of silicon, silicon carbide and sapphire. The barrier layer and the channel layer form a two-dimensional electron gas with high electron mobility at the contact surface of the barrier layer and the channel layer through polarization effect. The presence of the first P-type material layer above the barrier layer raises the energy band here, effectively depletes the two-dimensional electron gas in the region directly below, and realizes the normally-off characteristic; the selection of the buffer layer material needs to consider the matching factor with the material of the substrate layer, and the main role of the buffer layer is to provide a high-quality growth basis for subsequent epitaxial layers, to relieve the lattice mismatch and thermal mismatch between the substrate layer and the channel layer, and to reduce the defect density. Selecting silicon, silicon carbide or sapphire material as the substrate not only considers the heat dissipation characteristics and cost problems, but also considers the technical adaptability problem with traditional industries. The above-mentioned materials have been proven to be suitable for commercial gallium nitride epitaxial technology.

[0019] In the present application, the source metal part sidewall and the drain metal part sidewall are both covered with a passivation layer, and the present application does not limit the covering height of the passivation layer on the source metal and the drain metal. The part on both sides of the gate metal is covered with a passivation layer, and the covering height of the part can be set as needed, which is not limited by the present application. As long as the covering height of the passivation layer can expose the contact area of the device gate metal and source-drain metal to be connected and tested after windowing, it is acceptable.

[0020] The present application also provides a preparation method of the gallium nitride power device with the gate hot electron blocking structure, comprising the following steps: S1, providing an epitaxial structure, the epitaxial structure comprising a substrate layer, a buffer layer, a channel layer and a barrier layer from bottom to top; S2, sequentially growing a first P-type material layer, a hot electron blocking structure layer and a second P-type material layer; S3, in the preset gate area of the second P-type material layer, taking the gate as a hard mask, and selectively etching the first P-type material layer, the hot electron blocking structure layer and the second P-type material layer outside the gate coverage; S4, defining the source and drain regions by lithography, depositing ohmic metal, and forming ohmic contact after high-temperature annealing; then depositing gate metal on the second P-type material layer to form Schottky contact; S5, depositing a passivation layer.

[0021] The preparation method of the above-mentioned materials is compatible with existing gate reliability processes designed to enhance Schottky junctions in terms of manufacturing cost and process feasibility, forming a synergistic enhancement effect, thereby maximizing the overall reliability level of the gate.

[0022] In this invention, electron beam evaporation, thermal evaporation or magnetron sputtering processes are used for the deposition of ohmic contact metals for the source and drain electrodes and the deposition of gate metals.

[0023] Compared with the prior art, this application has the following technical effects: 1. This invention proposes a gallium nitride power device with a gate hot electron blocking structure. A hot electron blocking structure is designed at the original p-GaN gate structure. This hot electron blocking structure is composed of multiple periodically stacked gallium nitride material layers and indium gallium nitride / aluminum gallium nitride material layers. This stacked structure can effectively reduce the bombardment damage of hot electrons to the gate Schottky junction.

[0024] 2. The hot electron blocking structure of the present invention can play the role of promoting the recombination of hot electrons or blocking the movement of hot electrons by stacking different materials.

[0025] 3. The technical solution of this invention is compatible with existing gate reliability enhancement processes for Schottky junctions, forming a synergistic enhancement effect, thereby maximizing the overall reliability level of the gate. Attached Figure Description

[0026] Figure 1 This is a simplified structural diagram of the gallium nitride power device with a gate hot electron blocking structure according to the present invention; Figure 2 This is a schematic diagram of the gallium nitride power device with a gate hot electron blocking structure according to the present invention; Figure 3 This is a top view of the gallium nitride power device with a gate hot electron blocking structure according to the present invention; Figure 4 This is a left view of the gallium nitride power device with a gate hot electron blocking structure according to the present invention. Figure 5 The transfer characteristic curves of the gallium nitride power device with a gate hot electron blocking structure according to the present invention are shown. Figure 6 The output characteristic curves of the gallium nitride power device with a gate hot electron blocking structure according to the present invention are shown.

[0027] In the attached figures: 1. Substrate layer; 2. Buffer layer; 3. Channel layer; 4. Barrier layer; 5. Source metal; 6. Gate metal; 7. Drain metal; 8. First P-type material layer; 9. Hot electron blocking structure layer; 10. Second P-type material layer; 11. Passivation layer; 12. First i-GaN material layer; 13. First In x Ga 1-x 14. Second i-GaN material layer; 15. Second In x Ga 1-x N material layer; 16. Third i-GaN material layer. Detailed Implementation

[0028] To enable those skilled in the art to better understand the present invention, the present invention will now be further described in conjunction with specific embodiments.

[0029] The accompanying drawings are for illustrative purposes only and represent schematic diagrams, not actual physical objects. They should not be construed as limiting the scope of this patent. To better illustrate the embodiments of the invention, some components in the drawings may be omitted, enlarged, or reduced, and do not represent the actual dimensions of the product. It is understandable that some well-known structures and their descriptions may be omitted in the drawings for those skilled in the art. The same or similar reference numerals in the accompanying drawings of the embodiments of the invention correspond to the same or similar components. In the description of the invention, it should be understood that if terms such as "upper," "lower," "left," and "right" indicate orientation or positional relationships based on the orientation or positional relationships shown in the drawings, they are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms describing positional relationships in the drawings are for illustrative purposes only and should not be construed as limiting the scope of this patent. Those skilled in the art can understand the specific meaning of the above terms according to the specific circumstances.

[0030] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations. The terms “comprising,” “including,” “having,” and variations thereof mean “including, but not limited to,” unless otherwise specifically emphasized. “A plurality” means one, two, or more.

[0031] Example 1: like Figure 1 , Figure 2 , Figure 3 , Figure 4 As shown, a gallium nitride power device with a gate hot electron blocking structure is disclosed. The gallium nitride power device includes a substrate layer 1, a buffer layer 2, a channel layer 3, and a barrier layer 4 arranged sequentially from bottom to top.

[0032] like Figure 1 As shown, a first P-type material layer 8, a hot electron blocking structure layer 9, a second P-type material layer 10, and a gate metal 6 are sequentially disposed above the center of the barrier layer 4; a source metal 5 and a drain metal 7 are respectively disposed at the two ends above the barrier layer 4. The hot electron blocking structure layer is composed of two periodically alternating gallium nitride material layers and a sandwich structure material layer. The sandwich structure material layer is an indium gallium nitride material layer, in which indium atoms are arranged in the In... x Ga 1-x The mole fraction or atomic percentage x in the N ternary alloy is 0.15. The hot electron blocking structure layer, from bottom to top, includes a first i-GaN material layer 12, a first In... x Ga 1-x N-material layer 13, second i-GaN material layer 14, second In x Ga 1-x N-material layer 15, third i-GaN material layer 16.

[0033] The upper surface of the barrier layer 4, the partial sidewalls of the source metal 5, the partial sidewalls of the drain metal 7, both sides of the first P-type material layer 8, both sides of the hot electron blocking structure layer 9, and both sides of the second P-type material layer 10 are all covered with passivation layers 11. The two sides of the gate metal 6 are also partially covered with passivation layers 11. Specifically, the partial sidewalls of the source metal and the partial sidewalls of the drain metal are covered with passivation layers, and the height of the passivation layers is half the height of the source and drain metals; the two sides of the gate metal are covered with passivation layers, and the height of the passivation layers is half the height of the gate metal.

[0034] Specifically, the source metal and the drain metal both form ohmic contacts with the barrier layer, and the gate metal forms a Schottky contact with the second P-type material layer, constituting a Schottky junction. The first P-type material layer has a thickness of 50 nm to ensure effective depletion of the two-dimensional electron gas at its bottom for normally-off operation; the second P-type material layer has a thickness of 70 nm to ensure that the depletion region within the Schottky junction does not extend into the hot electron blocking structure layer. The gallium nitride material layer is unintentionally doped and has a thickness of 10 nm; the sandwich structure material layer has a thickness of 3 nm.

[0035] Specifically, the first P-type material layer and the second P-type material layer have the same composition, being one of gallium nitride, aluminum nitride, and aluminum gallium nitride. The gate metal, the source metal, and the drain metal are all made of one or more of titanium, gold, aluminum, nickel, tungsten, titanium nitride, and indium tin oxide. The passivation layer is made of at least one of aluminum oxide, silicon oxide, aluminum nitride, silicon nitride, gallium oxynitride, aluminum oxynitride, and silicon oxynitride. The barrier layer, the channel layer, and the buffer layer are all made of one of gallium nitride, aluminum nitride, and aluminum gallium nitride, and the substrate layer is made of any one of silicon, silicon carbide, and sapphire.

[0036] The method for fabricating the gallium nitride power device with a gate hot electron blocking structure includes the following steps: S1. Provide an epitaxial structure, wherein the epitaxial structure comprises, from bottom to top, a substrate layer, a buffer layer, a channel layer, and a barrier layer; S2. The first P-type material layer, the hot electron blocking structure layer, and the second P-type material layer are grown sequentially. S3. In the pre-defined gate region of the second P-type material layer, using the gate as a hard mask, selectively etch the first P-type material layer, the hot electron blocking structure layer and the second P-type material layer outside the gate coverage; S4. Photolithography defines the source and drain regions, ohmic metal is deposited, and ohmic contacts are formed by high-temperature annealing; then gate metal is deposited on the second P-type material layer to form Schottky contacts; S5, deposited passivation layer.

[0037] In the above methods, electron beam evaporation, thermal evaporation, or magnetron sputtering processes are used for the deposition of ohmic contact metals for the source and drain electrodes, as well as the deposition of gate metals.

[0038] Example 2: Based on Example 1, the sandwich structure material layer is an aluminum gallium nitride material layer, where aluminum atoms are in Al x Ga 1-x The mole fraction or atomic percentage (x) of N in the ternary alloy is 0.25 to increase the Fermi level height of the material layer. Everything else is exactly the same as in Example 1.

[0039] Example 3: Based on Example 1, the hot electron blocking structure layer consists of a gallium nitride material layer and a sandwich structure material layer stacked alternately in one period, that is, the first and third layers are gallium nitride material layers, and the middle layer is an indium gallium nitride material layer. Everything else is exactly the same as in Example 1.

[0040] Performance testing For Example 1, the present invention provides simulation verification results based on Sentaurus TCAD software.

[0041] In the simulation model settings, the thickness of the first P-type material layer was set to 50 nm, and the thickness of the second P-type material layer was set to 70 nm; the thickness of the i-GaN material layer in both of the two periodic stacked materials was set to 10 nm. x Ga 1-x The thickness of the N material layer is set to 3 nm, and the molar composition x of In is 0.15.

[0042] like Figure 5 The figure shows the transfer characteristic curve of the device. The simulation conditions were set with the drain voltage maintained at 5V and the gate voltage scan range of 0~10V. As can be seen from the figure, the device current shows a significant upward trend with the increase of the gate voltage, exhibiting good turn-on characteristics.

[0043] like Figure 6 The figure shows the output characteristic curve of the device. The simulation conditions were set with a drain voltage scan range of 0~12V and gate voltages of 0V, 2V, 4V, 6V and 8V respectively. As can be seen from the figure, under different gate voltages, the output curve exhibits a clear linear region and a saturation region, and the drain current is effectively controlled by the gate voltage.

[0044] In summary, the simulation data shows that the device has excellent gate control capability and typical transistor current saturation characteristics, which fully demonstrates the feasibility and effectiveness of the technical solution proposed in this invention.

[0045] Based on the disclosure and teachings of the foregoing specification, those skilled in the art can make changes and modifications to the above embodiments. Therefore, the present invention is not limited to the specific embodiments disclosed and described above, and some modifications and changes to the present invention should also fall within the protection scope of the claims of the present invention. Furthermore, although some specific terms are used in this specification, these terms are only for convenience of explanation and do not constitute any limitation on the present invention.

Claims

1. A gallium nitride power device with a gate hot electron blocking structure, characterized in that, The gallium nitride power device comprises, from bottom to top, a substrate layer, a buffer layer, a channel layer, and a barrier layer; A first P-type material layer, a hot electron blocking structure layer, a second P-type material layer, and a gate metal are sequentially arranged in the middle of the barrier layer; source metal and drain metal are respectively arranged at both ends of the barrier layer; the hot electron blocking structure layer is composed of a plurality of periodically stacked gallium nitride material layers and interlayer structure material layers; the interlayer structure material layers are indium gallium nitride / aluminum gallium nitride material layers; The upper surface of the barrier layer, the side walls of the source metal and the drain metal, the two sides of the first P-type material layer, the two sides of the hot electron blocking structure layer, and the two sides of the second P-type material layer are all covered with a passivation layer, and the two sides of the gate metal are partially covered with a passivation layer.

2. The gallium nitride power device with gate hot electron blocking structure of claim 1, wherein, The plurality of periods is 1-10 periods, the gallium nitride material layer is unintentionally doped, and the thickness is 10-20 nm; the thickness of the interlayer structure material layer is 3-5 nm.

3. The gallium nitride power device with gate hot electron blocking structure of claim 2, wherein, When the sandwich structure material layer is indium gallium nitride, the mole fraction or atomic percentage x of indium atoms in the In x Ga 1-x N ternary alloy is 0.1-1; when the sandwich structure material layer is aluminum gallium nitride, the mole fraction or atomic percentage x of aluminum atoms in the Al x Ga 1-x N ternary alloy is 0.1-1.

4. The gallium nitride power device with gate hot electron blocking structure of claim 1, wherein, The gate metal and the second P-type material layer form a Schottky contact to constitute a Schottky junction; the thickness of the first P-type material layer is greater than 20 nm to ensure that the two-dimensional electron gas at the bottom is effectively depleted to achieve a normally-off state; the thickness of the second P-type material layer is greater than 40 nm to ensure that the depletion region in the Schottky junction does not widen to the hot electron blocking structure layer.

5. The gallium nitride power device with gate hot electron blocking structure of claim 1 wherein, The first P-type material layer and the second P-type material layer have the same composition, which is one of gallium nitride, aluminum nitride, and aluminum gallium nitride.

6. The gallium nitride power device with gate hot electron blocking structure of claim 1, wherein, The materials of the gate metal, the source metal, and the drain metal are one or a combination of titanium, gold, aluminum, nickel, tungsten, titanium nitride, and indium tin oxide.

7. The gallium nitride power device with gate hot electron blocking structure of claim 1 wherein, The material of the passivation layer is selected from at least one of aluminum oxide, silicon oxide, aluminum nitride, silicon nitride, gallium oxynitride, aluminum oxynitride, and silicon oxynitride.

8. The gallium nitride power device with gate hot electron blocking structure of claim 1 wherein, The materials of the barrier layer, the channel layer, and the buffer layer are selected from one of gallium nitride, aluminum nitride, and aluminum gallium nitride; And / or, The material of the substrate layer is selected from any one of silicon, silicon carbide, and sapphire.

9. The method of fabricating a gallium nitride power device with a gate hot electron barrier structure of claim 1, wherein, The method comprises the following steps: S1, providing an epitaxial structure comprising, from bottom to top, a substrate layer, a buffer layer, a channel layer, and a barrier layer; S2, sequentially growing a first P-type material layer, a hot electron blocking structure layer, and a second P-type material layer; S3, predefining a gate region on the second P-type material layer, and selectively etching the first P-type material layer, the hot electron blocking structure layer, and the second P-type material layer outside the gate coverage as a hard mask; S4, defining source and drain regions by lithography, depositing ohmic metal, and forming ohmic contact after high-temperature annealing; Then depositing gate metal on the second P-type material layer to form a Schottky contact; S5, depositing a passivation layer.

10. The method of fabricating a gallium nitride power device with a gate hot electron barrier structure of claim 9, wherein, Electron beam evaporation, thermal evaporation, or magnetron sputtering process is used for the deposition of ohmic contact metal for the source and drain and the deposition of gate metal.

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