Software phase locking method of series resonance induction circuit

Abstract

A software phase locking method of a series resonance induction circuit comprises the steps that a DSP module is adopted for sampling voltage and current to obtain phase information, PI control is conducted on the phase difference between the voltage and the current through the DSP module, output frequency needing to be adjusted is obtained through calculation, and corresponding numerical values are output through an EPWM module of the DSP module. Controlling the phase of the output voltage and current of the inverter; the DSP module is used for performing staged processing on voltage signals and current signals, the CAP module is combined for capturing square wave signals and ADC sampling sinusoidal signals, real-time calculation and dynamic adjustment of the voltage and current phase difference are achieved, and finally the target phase difference is maintained to be constant.

Description

Technical Field

[0001] This invention relates to the technical field of power supply equipment, and more particularly to a software phase-locked loop method for series resonant induction circuits. Background Technology

[0002] Induction heating is widely used in the machinery manufacturing and metallurgical industries, characterized by its rapid heating speed and easy temperature control. It is primarily used for quenching, through-heating, and smelting. Induction heating technology utilizes the principle of electromagnetic induction, generating eddy currents in metal workpieces through an alternating magnetic field to achieve heating. It offers advantages such as rapid heating, high efficiency, and no contact pollution. Traditional induction heating systems often use an LC series resonant circuit as the core component. Its working principle involves an inverter converting direct current into high-frequency alternating current, which excites the induction coil to generate an alternating magnetic field, thereby driving eddy currents within the workpiece to generate heat.

[0003] In an ideal resonant LC series resonant circuit, the voltage and current phases remain within a certain range. However, in actual operating conditions, due to load nonlinearity (e.g., uneven workpiece material or temperature gradient distribution), abrupt phase changes in voltage and current can occur, such as significant fluctuations in the hysteresis phase angle, leading to a decrease in power factor and energy conversion efficiency. Traditional phase-locked loops (PLLs) use analog circuit control, which is complex and costly. Furthermore, device aging and temperature drift reduce system reliability and efficiency. Analog technology also presents challenges in parameter adjustment. Therefore, there is an urgent need for an intelligent heating system capable of dynamically maintaining the stability of the series resonant circuit and precisely controlling the voltage and current phase relationship to address these technical shortcomings. Summary of the Invention

[0004] The purpose of this invention is to provide a software phase-locked loop (PLL) method for a series resonant induction circuit. A DSP module samples the voltage and current to obtain phase information. The DSP module then performs PI control on the phase difference between the voltage and current to calculate the required output frequency. The corresponding value is then output through the EPWM module of the DSP module to control the phase of the inverter's output voltage and current. By processing the voltage and current signals in stages through the DSP module, combined with the CAP module capturing square wave signals and the ADC sampling sinusoidal signals, real-time calculation and dynamic adjustment of the voltage and current phase difference are achieved, ultimately maintaining a constant target phase difference.

[0005] The objective of this invention is achieved through the following technical solution: A software phase-locked loop method for a series resonant induction circuit includes: The voltage signal in square wave form output by the inverter is acquired, and the first timestamp of the voltage signal is obtained through the CAP module; The current signal in sinusoidal form output by the inverter is preprocessed, and the preprocessed current signal is acquired; the second timestamp of the current signal is obtained through the CAP module; The actual phase difference between the voltage signal and the current signal is determined based on the first timestamp and the second timestamp; The PI controller performs voltage and current phase-locking processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between the voltage and current at the target phase difference.

[0006] In one embodiment, acquiring the square wave voltage signal output by the inverter includes: The square wave voltage signal output by the inverter is directly connected to the first pin of the CAP module of the DSP module, and the CAP module is used to acquire the square wave voltage signal output by the series resonant induction circuit.

[0007] In one embodiment, obtaining the first timestamp of the voltage signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the voltage signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of several rising edge pulses captured by the CAP module, the period and angular frequency of the voltage signal are determined, and these are used as the first timestamp of the voltage signal.

[0008] In one embodiment, preprocessing the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output by the series resonant induction circuit is sampled by an ADC. The zero-crossing signal is obtained by performing zero-crossing detection on the signal sampled by the ADC. The zero-crossing signal is converted into a square wave signal, thereby preprocessing the sinusoidal current signal into a square wave current signal.

[0009] In one embodiment, ADC sampling of the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output by the inverter is directly connected to the ADC pin of the DSP module and sampled at the same sampling frequency as the voltage signal to obtain several discrete sampling point signals, thereby realizing ADC sampling of the current signal.

[0010] In one embodiment, zero-crossing detection is performed on the signal sampled by the ADC to obtain a zero-crossing signal, including: Perform zero-crossing analysis on all discrete sampling point signals to determine the time interval between two adjacent zero-crossing points; Traverse all discrete sampled signal points to set a flag value corresponding to the time interval between each two adjacent zero-crossing points; wherein the value of the flag value is 1 or 0; Converting the zero-crossing signal into a square wave signal, thereby preprocessing the sinusoidal current signal into a square wave current signal, includes: The zero-crossing point of the current signal is used as the trigger condition. If the value of the flag is 1, the output is high; if the value of the flag is 0, the output is low.

[0011] In one embodiment, acquiring a preprocessed current signal includes: The preprocessed current signal is directly connected to the second pin of the CAP module of the DSP module, and the current signal is acquired using the CAP module.

[0012] In one embodiment, obtaining the second timestamp of the current signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the preprocessed current signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of the CAP module capturing several rising edge pulses in succession, the period and angular frequency of the preprocessed current signal are determined, and these are used as the second timestamps of the preprocessed current signal.

[0013] In one embodiment, determining the actual phase difference between the voltage signal and the current signal based on the first timestamp and the second timestamp includes: The actual phase difference between the voltage signal and the current signal is determined by comparing the period and angular frequency of the voltage signal included in the first timestamp with the period and angular frequency of the current signal included in the second timestamp.

[0014] In one embodiment, a PI controller performs voltage and current phase-locking processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between the voltage and current at a target phase difference, including: Using the target phase difference as a reference, determine the phase error between the actual phase difference and the target phase difference; Based on the phase error, the frequency increment output by the PI controller is superimposed on the current resonant frequency of the series resonant induction circuit to obtain a new resonant frequency. Based on the new resonant frequency, the EPWM module of the DSP module outputs an adjusted PWM signal to control the switching frequency of the inverter, thereby changing the excitation frequency of the series resonant induction circuit, so that the phase difference between voltage and current is stabilized at the target phase difference.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The software phase-locked loop method for the series resonant induction circuit provided in this application has the following advantages: First, the hardware cost is low. Limit detection and frequency adjustment can be achieved with only the CAP, ADC, DAC and EPWM modules of the DSP module. No additional hardware phase-locked loop (PLL) chip or zero-crossing detection circuit is required, which simplifies the system hardware design. Secondly, it has strong dynamic adaptability. By calculating the phase difference and adjusting the frequency in real time through software, it can quickly respond to load changes or resonant frequency drift. For example, it can respond to changes in the inductance of the induction coil due to temperature changes and maintain a stable phase difference. Third, it has high precision. By utilizing the high-precision timestamp of the CAP module and the high sampling rate of the ADC module, such as 12-bit or 16-bit sampling, the phase difference calculation error can be controlled within 0.1°, which is significantly better than the precision of traditional analog phase-locked loops. Fourth, it is highly flexible. By adjusting the parameters of the PI controller or the target phase difference, it can be adapted to different types of series resonant circuits, making it highly versatile. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein: Figure 1 This is a schematic diagram of the software phase-locked loop method for the series resonant induction circuit provided in this application.

[0017] Figure 2 This is a schematic diagram of the phase-locked system corresponding to the software phase-locked method for the series resonant induction circuit provided in this application.

[0018] Figure 3 This is a schematic diagram showing the phase difference between the voltage and current output by the inverter. Detailed Implementation

[0019] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, it should be noted that, for ease of description, only the parts relevant to this application are shown in the accompanying drawings, not the entire structure. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this application.

[0020] The terms “comprising” and “having”, and any variations thereof, used in this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0021] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0022] Please see Figures 1 to 3 As shown, an embodiment of this application provides a software phase-locked loop method for a series resonant induction circuit, comprising: Collect the square wave voltage signal output by the inverter and obtain the first timestamp of the voltage signal through the CAP module; The current signal in sinusoidal form output by the inverter is preprocessed, and the preprocessed current signal is acquired; the second timestamp of the current signal is obtained through the CAP module; The actual phase difference between the voltage signal and the current signal is determined based on the first and second timestamps. The PI controller performs phase-locked voltage and current processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between voltage and current at the target phase difference.

[0023] The beneficial effects of the above embodiments are as follows: the DSP module samples the voltage and current to obtain phase information, and then the DSP module performs PI control on the phase difference between the voltage and current to calculate the output frequency that needs to be adjusted. The corresponding value is then output through the EPWM module of the DSP module to control the phase of the inverter output voltage and current. The DSP module processes the voltage and current signals in stages, and combines the CAP module to capture the square wave signal and the ADC to sample the sine wave signal, so as to realize the real-time calculation and dynamic adjustment of the phase difference between the voltage and current, and finally maintain the target phase difference constant.

[0024] In one embodiment, acquiring the square wave voltage signal output by the inverter includes: The square wave voltage signal output by the inverter is directly connected to the first pin of the CAP module of the DSP module, and the CAP module is used to acquire the square wave voltage signal output by the series resonant induction circuit.

[0025] In one embodiment, obtaining the first timestamp of the voltage signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the voltage signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of several rising edge pulses captured by the CAP module, the period and angular frequency of the voltage signal are determined, and this is used as the first timestamp of the voltage signal.

[0026] The original voltage and current signal amplitudes of a series resonant induction circuit may fluctuate significantly with load changes. To adapt to the ADC sampling range of the DSP module (typically 0~3.3V or -1.65V~1.65V) and improve sampling accuracy, the voltage (V... in ), current (I) in The original signal undergoes amplitude reduction processing. Please refer to [link / reference]. Figure 3 Specifically, the inverter output voltage signal is a high-frequency square wave with an amplitude of V. DC By using a resistor divider network, it is reduced to 0~V. ADC_ref Range, where the partial pressure ratio K1 = V ADC_ref / V DC V ADC_ref The reference voltage for the ADC module; the inverter output current signal is a sine wave, which is converted into a voltage V through a sampling resistor. I The resistance of the sampling resistor is R. s And satisfy V I = I in ×R s Then, through the operational amplifier attenuation circuit, the attenuation coefficient K2 = V ADC_ref / V I_max VI_max The maximum value of the current sampling voltage is reduced to 0~V. ADC_ref scope.

[0027] The voltage signal of a series resonant induction circuit is typically a high-frequency square wave with steep rising and falling edges and a stable period. The CAP module of the DSP module can directly detect and capture the rising edges of the square wave signal and record the counter value corresponding to each rising edge. Specifically, the square wave voltage signal is directly connected to the first pin of the CAP module of the DSP module. The CAP module acquires the square wave voltage signal output from the series resonant induction circuit. When the rising edge of the voltage signal arrives, the CAP module automatically reads the current count value t of the timer. V And store it in a register; continuously capture the rising edge timestamp t of N cycles. V1 t V2 、…、t VN Calculate the period T of the voltage signal. V =(t VK - t V(K-N) ) / N (where K>N), and thus the angular frequency ω of the voltage signal is obtained. V =2π / T V .

[0028] In one embodiment, preprocessing the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output from the series resonant induction circuit is sampled by an ADC. Zero-crossing detection is performed on the signal sampled by the ADC to obtain the zero-crossing signal; The zero-crossing signal is converted into a square wave signal, thereby preprocessing the sinusoidal current signal into a square wave current signal.

[0029] In one embodiment, ADC sampling of the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output from the inverter is directly connected to the ADC pin of the DSP module and sampled at the same sampling frequency as the voltage signal to obtain several discrete sampling point signals, thereby realizing ADC sampling of the current signal.

[0030] In one embodiment, zero-crossing detection is performed on the signal sampled by the ADC to obtain a zero-crossing signal, including: Perform zero-crossing analysis on all discrete sampling point signals to determine the time interval between two adjacent zero-crossing points; Iterate through all discrete sampled signal points to set a flag value corresponding to the time interval between each two adjacent zero-crossing points; the value of the flag value is either 1 or 0. Converting zero-crossing signals into square wave signals, thereby preprocessing sinusoidal current signals into square wave current signals, includes: The zero-crossing point of the current signal is used as the trigger condition. If the value of the flag is 1, the output is high; if the value of the flag is 0, the output is low.

[0031] In one embodiment, acquiring a preprocessed current signal includes: The preprocessed current signal is directly connected to the second pin of the CAP module of the DSP module, and the current signal is acquired using the CAP module.

[0032] In one embodiment, obtaining the second timestamp of the current signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the preprocessed current signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of several rising edge pulses captured by the CAP module, the period and angular frequency of the preprocessed current signal are determined, and these are used as the second timestamp of the preprocessed current signal.

[0033] The current signal is a sine wave i(t) = I m sin(w I t+∅ I This signal cannot be directly captured by the CAP module. It needs to be converted into a captureable square wave signal through the following steps: First, the ADC sampler: The preprocessed current signal is input to the ADC pin of the DSP module, synchronized with the sampling frequency f of the voltage signal. s Sampling is performed to obtain discrete sampling points V. I [n]=I m R s K2sin(w I nT S +∅ I ); where T s =1 / f s is the sampling period, and n is the sampling sequence number.

[0034] Sub-step 2, zero-crossing detection: for V I [n] Perform zero-crossing analysis to find the time interval between two adjacent zero-crossing points, which is the half-cycle of the sine wave. The specific method is: traverse the sampling points, V I [n]×V I [n+1]<0, and V I [n+1]>V I If [n], then set the flag positive_flag = 1; V I [n]×V I[n+1]<0, and V I [n+1] <V I If [n], then the flag positive_flag = 0; Third, DAC to square wave conversion: This converts the zero-crossing information of the current signal into a square wave signal. Specifically, the zero-crossing point of the current signal is used as the trigger condition. If the flag value = 1, the DAC module outputs a high level; if the flag value = 0, the DAC module outputs a low level at a frequency of f. I =1 / T I The square wave signal.

[0035] Fourth, CAP capture of square wave: Connect the current signal in square wave form output from the DAC module to another CAP pin of the DSP module, and use the same CAP capture mode as for the voltage signal to record the count value t at the transition time of the square wave. I Calculate the period T of the current signal. I and angular frequency ω I =2π / T I .

[0036] In one embodiment, determining the actual phase difference between the voltage signal and the current signal based on a first timestamp and a second timestamp includes: The actual phase difference between the voltage signal and the current signal is determined by comparing the period and angular frequency of the voltage signal contained in the first time stamp and the period and angular frequency of the current signal contained in the second time stamp.

[0037] Through the above process, the period and angular frequency of the voltage signal included in the first timestamp and the period and angular frequency of the current signal included in the second timestamp are differentially calculated. The actual phase difference between the voltage and current signals is determined, providing a basis for subsequent phase-locked loop (PLL) adjustments.

[0038] In one embodiment, a PI controller performs voltage and current phase-locking processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between the voltage and current at a target phase difference, including: Using the target phase difference as a reference, determine the phase error between the actual phase difference and the target phase difference; Based on the phase error, the frequency increment output by the PI controller is superimposed on the current resonant frequency of the series resonant induction circuit to obtain a new resonant frequency. Based on the new resonant frequency, the adjusted PWM signal is output through the EPWM module of the DSP module to control the switching frequency of the inverter, thereby changing the excitation frequency of the series resonant induction circuit, so that the phase difference between voltage and current is stabilized at the target phase difference.

[0039] In practice, let the time of the kth rising edge of the voltage square wave be t.V [k], the time of the kth rising edge of the current square wave is t. I [k], then the phase difference ∆∅[k]=(w V t V [k]-w I t I [k]) / 2π. Since voltage and current are both periodic signals, this can be simplified to ∆∅[k]=2π(f V -f I )T sync / f0, where T sync f0 is the synchronization period and f0 is the target resonant frequency.

[0040] With the target phase difference Δϕ target For reference, calculate the phase error e[k] = Δϕ target -Δϕ[k]. PI controller output frequency increment Δf[k] = K p e[k]+K i ∑ k j=0 e[j], where K p K is the proportionality coefficient. i is the integral coefficient.

[0041] The frequency increment Δf[k] output by the PI controller is superimposed on the current resonant frequency f0 to obtain the new target frequency f. new =f0+Δf[k], and the adjusted PWM signal is output through the EPWM module of the DSP module to control the switching frequency of the inverter, thereby changing the excitation frequency of the series resonant circuit, and finally stabilizing the phase difference between voltage and current at Δϕ. target .

[0042] The above is only one specific embodiment of the present invention, and any improvements made based on the concept of the present invention shall be considered within the scope of protection of the present invention.

Claims

1. A software phase-locked loop method for a series resonant induction circuit, characterized in that, include: The voltage signal in square wave form output by the inverter is acquired, and the first timestamp of the voltage signal is obtained through the CAP module; The current signal in sinusoidal form output by the inverter is preprocessed, and the preprocessed current signal is acquired. The second timestamp of the current signal is obtained through the CAP module; The actual phase difference between the voltage signal and the current signal is determined based on the first timestamp and the second timestamp; The PI controller performs voltage and current phase-locking processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between the voltage and current at the target phase difference.

2. The software phase-locked loop method for the series resonant induction circuit according to claim 1, characterized in that, Acquire the square wave voltage signal output from the inverter, including: The square wave voltage signal output by the inverter is directly connected to the first pin of the CAP module of the DSP module, and the CAP module is used to acquire the square wave voltage signal output by the series resonant induction circuit.

3. The software phase-locked loop method for the series resonant induction circuit according to claim 2, characterized in that, Obtaining the first timestamp of the voltage signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the voltage signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of several rising edge pulses captured by the CAP module, the period and angular frequency of the voltage signal are determined, and these are used as the first timestamp of the voltage signal.

4. The software phase-locked loop method for the series resonant induction circuit according to claim 1, characterized in that, Preprocessing the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output by the series resonant induction circuit is sampled by an ADC. The zero-crossing signal is obtained by performing zero-crossing detection on the signal sampled by the ADC. The zero-crossing signal is converted into a square wave signal, thereby preprocessing the sinusoidal current signal into a square wave current signal.

5. The software phase-locked loop method for the series resonant induction circuit according to claim 4, characterized in that, ADC sampling of the sinusoidal current signal output by the inverter includes: The sinusoidal current signal output by the inverter is directly connected to the ADC pin of the DSP module and sampled at the same sampling frequency as the voltage signal to obtain several discrete sampling point signals, thereby realizing ADC sampling of the current signal.

6. The software phase-locked loop method for the series resonant induction circuit according to claim 4, characterized in that, The zero-crossing signal is obtained by performing zero-crossing detection on the signal sampled by the ADC, including: Perform zero-crossing analysis on all discrete sampling point signals to determine the time interval between two adjacent zero-crossing points; Traverse all discrete sampled signal points to set a flag value corresponding to the time interval between each two adjacent zero-crossing points; wherein the value of the flag value is 1 or 0; Converting the zero-crossing signal into a square wave signal, thereby preprocessing the sinusoidal current signal into a square wave current signal, includes: The zero-crossing point of the current signal is used as the trigger condition. If the value of the flag is 1, the output is high; if the value of the flag is 0, the output is low.

7. The software phase-locked loop method for the series resonant induction circuit according to claim 4, characterized in that, Acquire and preprocess the current signal, including: The preprocessed current signal is directly connected to the second pin of the CAP module of the DSP module, and the current signal is acquired using the CAP module.

8. The software phase-locked loop method for the series resonant induction circuit according to claim 7, characterized in that, Obtaining the second timestamp of the current signal through the CAP module includes: Configure the CAP module to enter rising edge capture mode. When the rising edge of the preprocessed current signal arrives, the CAP module automatically captures the timestamp of the rising edge pulse. Based on the timestamps of the CAP module capturing several rising edge pulses in succession, the period and angular frequency of the preprocessed current signal are determined, and these are used as the second timestamps of the preprocessed current signal.

9. The software phase-locked loop method for the series resonant induction circuit according to claim 1, characterized in that, Determining the actual phase difference between the voltage signal and the current signal based on the first timestamp and the second timestamp includes: The actual phase difference between the voltage signal and the current signal is determined by comparing the period and angular frequency of the voltage signal included in the first timestamp with the period and angular frequency of the current signal included in the second timestamp.

10. The software phase-locked loop method for the series resonant induction circuit according to claim 1, characterized in that, The PI controller performs voltage and current phase-locking processing on the series resonant induction circuit based on the actual phase difference, thereby stabilizing the phase difference between the voltage and current at the target phase difference, including: Using the target phase difference as a reference, determine the phase error between the actual phase difference and the target phase difference; Based on the phase error, the frequency increment output by the PI controller is superimposed on the current resonant frequency of the series resonant induction circuit to obtain a new resonant frequency. Based on the new resonant frequency, the EPWM module of the DSP module outputs an adjusted PWM signal to control the switching frequency of the inverter, thereby changing the excitation frequency of the series resonant induction circuit, so that the phase difference between voltage and current is stabilized at the target phase difference.

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