Positioning voltage-limiting bidirectional thyristor

Abstract

The invention belongs to the technical field of power semiconductors, and discloses a positioning voltage-limiting bidirectional thyristor, which comprises a chip, and a P-type gate pole region and isolation region, an N + amplification gate pole region, a P-type short circuit point, a P-type amplification gate pole region, an N + cathode region and an alternating doping region which are sequentially arranged on the front and back surfaces of the chip from the center to the edge, the alternating doping region is arranged around the N + cathode region, the alternating doping region is composed of a plurality of periodically arranged units, each unit comprises an N + type doping region and a P + type doping region which are symmetrically arranged, the doping types of the middle regions of the front and back surfaces of the chip are in left-right mirror symmetry, and the positions of the N + type doping region and the P + type doping region are exchanged. And each unit penetrates through the chip to longitudinally form a sub bidirectional thyristor. According to the invention, the N + and P + alternating doping regions are adopted, mirror symmetry three-dimensional structures are formed on the front and back surfaces of the chip, thousands of microscopic sub bidirectional thyristor units are formed in the device, and any local region has complete and symmetrical bidirectional conduction capability.

Description

Technical Field

[0001] This invention belongs to the field of power semiconductor technology, specifically a positioning voltage-limiting bidirectional thyristor. Background Technology

[0002] A bidirectional thyristor is a semiconductor switching device that conducts current in both directions. It is often used as a bypass protection device in flexible DC transmission converters such as multilevel converters. It is used to discharge current and clamp overvoltage when IGBTs experience short circuits or overcurrent faults, and to protect components such as capacitors, IGBTs and fast recovery diodes in the submodule.

[0003] However, conventional bidirectional thyristors in existing technologies have inherent defects. They typically employ a scheme of macroscopically anti-parallel integration of two unidirectional thyristors, i.e., large-area half-partition doping on the chip. This structure results in one half of the chip mainly supporting low-resistance conduction in one direction of current, while the other half supports the opposite direction. When the device experiences local failure under high voltage and high current impact, the half where the failure point is located will only have conductivity modulation capability in that direction when a forward current flows through the n+ doped surface, resulting in low-resistance conduction. When a reverse current flows through the damaged area, it can only conduct through the high-resistance failure short-circuit path, thereby causing a surge in local Joule heating, leading to thermal runaway, rapid expansion of the burnt area, and ultimately causing the entire device to structurally loosen and explode.

[0004] This fragile failure mode seriously threatens the overall reliability of the flexible DC converter valve and fails to meet its stringent requirements for long-term stable redundant operation after the failure of the protection device. Summary of the Invention

[0005] To address the problems mentioned in the background section, this invention provides a positioning and voltage-limiting bidirectional thyristor.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a positioning voltage-limiting bidirectional thyristor, comprising a chip, wherein the upper and lower parts of the chip are provided with an N-long base region and a P-short base region from the inside out; The chip has a P-type gate region and isolation region, an N+ amplification gate region, a P-type short circuit point, a P-type amplification gate region, an N+ cathode region, and an alternating doped region arranged sequentially from the center to the edge on both sides. The alternating doped region is arranged around the N+ cathode region. The alternating doped region is composed of multiple periodically arranged units. Each unit contains symmetrically arranged N+ type doped regions and P+ type doped regions. The doping types in the middle regions of the front and back sides of the chip are mirror symmetrical. The geometric dimensions of the alternating doped regions on both sides are the same as those on the front side. The positions of the N+ type and P+ type doped regions are interchanged. Each unit extends through the chip longitudinally to form a sub-bidirectional thyristor.

[0007] In the above technical solution, preferably, the alternating doped regions are distributed in a honeycomb shape, and the side length of the honeycomb unit is 0.1 mm to 0.8 mm.

[0008] The hexagonal honeycomb structure maximizes the number of integrated bidirectional thyristor units per unit area, ensuring that the current is evenly distributed across the chip cross-section, avoiding local overheating, and thus achieving optimal current carrying capacity and surge tolerance.

[0009] In the above technical solutions, preferably, the unit shape of the alternating doped region includes, but is not limited to, triangle, quadrilateral or sector.

[0010] In the above technical solution, preferably, it further includes a grooved ring, which is disposed in the middle of the alternating doping region. The grooved ring is grooved to form a recessed ring. Alternating doping is also performed in the recessed ring region. The PN junction surface in the recessed ring region protrudes relative to the PN junction surface inside the silicon body on both sides, forming an emitter junction protrusion ring.

[0011] A recessed ring can be created through a single trenching process, and then an emitter junction protrusion ring can be formed through alternating doping. The protrusion ring causes distortion of the PN junction surface, resulting in a current amplification factor α2 that is much higher than other flat areas of the chip. This precisely fixes the voltage inflection point in this ring-shaped area and clamps the inflection voltage value within a highly consistent and precise range, meeting the stringent requirements of overvoltage protection for threshold accuracy. This transforms uncontrollable and random breakdown into a controllable failure behavior that occurs at a predetermined location.

[0012] In the above technical solution, preferably, a P+ junction termination region is provided on the outer side of the alternating doped region, and a junction termination silicone rubber protective ring is provided outside the P+ junction termination region.

[0013] In the above technical solution, preferably, the chip further includes an aluminum metal electrode layer, which covers the outside of the chip.

[0014] In the above technical solution, preferably, the PN junction protrusion height of the emitter junction protrusion ring 11 and the depth of the recessed ring 15 are both 3μm to 8μm.

[0015] A method for manufacturing a thyristor is also provided, including the following steps: High-resistivity, thick N-type silicon single-crystal wafers are selected as the chip substrate. On both sides of the chip substrate, N-long base regions and P-type short base regions are formed sequentially from the inside to the outside through double-sided photolithography and selective doping processes. On the front side of the chip, from the center to the edge, a P-type gate region and isolation region, an N+ amplification gate region, a P-type short circuit point, a P-type amplification gate region, an N+ cathode region, and an alternating doped region are formed sequentially. The same regional structure as the front side is formed from the center to the edge on the reverse side of the chip, and the doping type on the reverse side is mirror-symmetrical to that on the front side. A sub-bidirectional thyristor is formed by longitudinally penetrating each unit of the alternating doped region through the chip.

[0016] In the above technical solution, preferably, the following steps are also included: A grooved ring is set in the middle of the alternating doped region. A recessed ring is formed by groove processing. Then, an emitter PN junction is formed by photolithography and alternating doping processes. The PN junction surface of the recessed ring region protrudes relative to the PN junction surface inside the silicon body on both sides, forming an emitter junction protrusion ring. A P+ junction termination region is formed on the outside of the alternating doped region, and a junction termination silicone rubber protective ring is provided outside the P+ junction termination region.

[0017] In the above technical solution, the preferred method includes sequentially preparing a front photolithography pattern, a back photolithography pattern, and a photolithography pattern for preparing an emitter junction protrusion ring; The diameter D1 of the central region of the front photolithography pattern is a common bidirectional thyristor pattern; the annular region from D1 to the junction terminal inner diameter D2 is a honeycomb pattern; the honeycomb pattern is composed of regular hexagonal units, each unit is divided into two equal trapezoidal regions, one bright and one dark, and the annular region outside D2 is a transparent junction terminal region pattern. The central region (within diameter D1) of the reverse photolithography pattern is symmetrical to the front pattern. The honeycomb pattern between D1 and D2 is interchanged with the bright and dark areas of the front pattern. The terminal area pattern outside D2 is the same as the front pattern. The photolithographic pattern for preparing the emitter junction protrusion ring is a circular ring pattern, located in the middle of the honeycomb alternating doped region, with the same pattern on both the front and back sides.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention employs alternating N+ and P+ doped regions and constructs a mirror-symmetrical three-dimensional structure on both sides of the chip, forming tens of thousands of microscopic sub-bidirectional thyristor units inside the device. This ensures that any local area possesses complete and symmetrical bidirectional conduction capability. Even if the device suffers local burnout due to overvoltage impact, the microscopic units around the failure point can still maintain excellent bidirectional conduction modulation effect, ensuring that the current continues to pass through in a low-resistance manner, rather than the short-circuit high-resistance path of traditional devices. This achieves the goal of long-term stable operation after failure, providing unprecedented reliability assurance for flexible DC transmission systems.

[0019] 2. This invention actively manufactures an emitter junction protrusion ring by slotting at a designed location, achieving precise control over the voltage transition process. By precisely controlling the protrusion height of the PN junction surface, the breakdown point is firmly confined within a preset annular area, thereby controlling the value, symmetry, and consistency of the forward and reverse transition voltages within an extremely high precision range. This allows the invention to function as a high-precision, high-consistency overvoltage protection device, directly connected in parallel to important AC circuit ports. Its action threshold is accurate and reliable, far exceeding that of traditional protection circuits composed of discrete components. Attached Figure Description

[0020] Figure 1 The circuit schematic of the full-bridge power module for the converter valve; Figure 2 This is a schematic diagram of the doping type distribution from a top-down view of the present invention; Figure 3 This is a schematic diagram of the back-side doping type distribution of the present invention; Figure 4 This is a schematic diagram of the cross-sectional structure of the die along the diameter of the present invention; Figure 5 This is an assembly diagram of the components of the present invention; Figure 6 This is a schematic diagram of the bulging ring of the emitter junction.

[0021] In the diagram: 1. P-type gate region and isolation region; 2. N+ amplification gate region; 3. P-type short circuit point; 4. P-type amplification gate region; 5. N+ cathode region; 6. Alternating doped region; 7. Grooved ring; 8. P+ junction termination region; 9. Junction termination silicone rubber protection ring; 10. Aluminum metal electrode layer; 11. Emitter junction protrusion ring; 12. P-type short base region; 13. N-long base region; 14. Sub-triac; 15. Dipping ring. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] like Figures 1 to 6 As shown, the present invention provides a positioning voltage-limiting bidirectional thyristor, including a chip, wherein the upper and lower parts of the chip are provided with an N-long base region 13 and a P-type short base region 12 from the inside to the outside; The P-type short base region 12 and the N-long base region 13 form a PN junction, which is one of the main blocking junctions between the main terminals of the thyristor. When the device is turned on, it serves as the emission source and transmission path of holes. The chip has a P-type gate region and isolation region 1, an N+ amplification gate region 2, a P-type short circuit point 3, a P-type amplification gate region 4, an N+ cathode region 5, and an alternating doped region 6 arranged sequentially from the center to the edge on both sides. When the gate current flows into the P-type gate region and isolation region 1, holes are injected, which "trigger" or "ignite" the adjacent NPN transistor structure, ultimately causing the entire thyristor to enter the conduction state. The P-type gate region 4 and the N+ gate region 2 together constitute a small-scale thyristor or transistor structure for amplifying the trigger signal. When the device is turned on, the N+ cathode region 5 acts as an electron emission source, injecting a large number of electrons into the base region. The P-type short circuit point 3 connects the P-type short base region 12 and the N+ cathode region 5 above through a low-impedance path. When the voltage changes rapidly, a displacement current will be generated through the junction capacitance. The P-type short circuit point 3 provides a low-impedance path for this displacement current to flow directly to the cathode. Alternating doped regions 6 are arranged around N+ cathode regions 5. Alternating doped regions 6 are composed of multiple periodically arranged units. Each unit contains symmetrically arranged N+ type doped regions and P+ type doped regions. The doping types in the middle regions of the front and back sides of the chip are mirror symmetrical. The geometric dimensions of the alternating doped regions 6 on both sides are the same as those on the front side. The positions of the N+ type and P+ type doped regions are interchanged. Each unit runs through the chip longitudinally to form a sub-bidirectional thyristor 14. Each vertical structure, consisting of alternating doped regions on both sides and a base region in the middle, is itself a miniature, independently operating bidirectional thyristor. Because the structures on both sides of the chip are mirror-symmetric and the doping types are interchangeable, it ensures that the electrical characteristics are highly symmetrical regardless of the direction of current flow.

[0024] In one implementation, the alternating doped regions 6 are distributed in a honeycomb pattern, with the side length of the honeycomb units ranging from 0.1 mm to 0.8 mm.

[0025] Specifically, the hexagonal honeycomb structure can maximize the number of integrated bidirectional thyristor units per unit area, ensuring that the current is evenly distributed across the chip cross-section, avoiding local overheating, and thus obtaining optimal current carrying capacity and surge tolerance.

[0026] As one implementation method, the unit shape of the alternating doped region 6 includes, but is not limited to, triangles, quadrilaterals, or sectors; triangles and quadrilaterals are simple and easy to implement, while sectors can achieve the best fit with the circumferential boundary of the junction terminal from a geometrical perspective.

[0027] As one embodiment, the positioning voltage-limiting bidirectional thyristor of the present invention further includes a grooved ring 7, which is disposed in the middle of the alternating doping region 6. The grooved ring 7 is grooved to form a recessed ring 15. After alternating doping in the recessed ring 15 region, the PN junction surface of the recessed ring 15 region protrudes relative to the PN junction surface inside the silicon body on both sides, forming an emitter junction protrusion ring 11. The groove position is located by the groove ring 7. A single groove process can produce a recessed ring 15. Then, an emitter junction protrusion ring 11 is formed by alternating doping. The emitter junction protrusion ring 11 causes the PN junction surface to be distorted, resulting in a current amplification factor α2 that is much higher than other flat areas of the chip. This precisely fixes the voltage turning point in this ring-shaped area and clamps the turning voltage value within a highly consistent and precise range, meeting the stringent requirements of overvoltage protection for threshold accuracy. This transforms uncontrollable and random breakdown into a controllable failure behavior that occurs at a predetermined location.

[0028] The recessed ring 15 is a ring-shaped channel formed relative to the chip surface after encapsulation. It can quickly disperse the intensity of the vaporization flow generated by high-energy breakdown and easily maintain the integrity of the device shape.

[0029] A P+ junction termination region 8 is provided on the outer side of the alternating doped region 6, and a junction termination silicone rubber protective ring 9 is provided outside the P+ junction termination region 8.

[0030] The P+ junction termination region 8 can force the depletion layer of the main junction to gradually widen in the horizontal direction instead of terminating abruptly, allowing the electric field to transition smoothly and evenly from the high-voltage main junction region to the zero-potential chip edge. The terminal silicone rubber protective ring 9 can passivate the chip surface, isolate moisture and contaminants, provide a stable, inert protective layer, and maintain the designed electric field distribution.

[0031] The chip also includes an aluminum metal electrode layer 10, which covers the outside of the chip and forms a low-resistance, linear current path with different doped regions on the chip surface. The entire aluminum film is patterned through photolithography and etching processes, thereby electrically connecting multiple regions on the chip that need to be connected together.

[0032] A method for manufacturing a thyristor is also provided, including the following steps: On both sides of a high-resistivity, thick N-type silicon wafer, a symmetrical device structure characterized by honeycomb-shaped alternating doped regions is simultaneously formed through precise photolithography and selective doping processes. A recessed ring is then created in the middle region of the alternating doped regions through photolithography and etching processes, and then alternating doping is performed to form an emitter junction protrusion ring 11, ultimately producing a bidirectional conductive device with precise voltage limiting function and high reliability.

[0033] This invention also relates to a method for manufacturing a thyristor, based on the aforementioned positioning and voltage-limiting bidirectional thyristor, comprising the following steps: A high-resistivity, thick N-type silicon single-crystal wafer is selected as the chip substrate. On both sides of the chip substrate, N-long base region 13 and P-type short base region 12 are formed sequentially from the inside to the outside through double-sided photolithography and selective doping processes. On the front side of the chip, from the center to the edge, the following are formed in sequence: P-type gate region and isolation region 1, N+ amplification gate region 2, P-type short circuit point 3, P-type amplification gate region 4, N+ cathode region 5, and alternating doped region 6. The same regional structure as the front side is formed from the center to the edge on the reverse side of the chip, and the doping type on the reverse side is mirror-symmetrical to that on the front side. Sub-bidirectional thyristors 14 are formed by longitudinally penetrating each unit of the alternating doped region 6 through the chip.

[0034] A grooved ring 7 is provided in the middle of the alternating doped region 6. A recessed ring 15 is formed by the grooved processing. Through photolithography and alternating doping processes, the PN junction surface at the recessed ring 15 is made to protrude relative to the PN junction surface inside the silicon body on both sides in the middle region of the alternating doped region 6, forming an emitter junction protrusion ring 11. A P+ junction termination region 8 is formed on the outside of the alternating doped region 6, and a junction termination silicone rubber protective ring 9 is provided outside the P+ junction termination region 8.

[0035] Specifically, this also includes sequentially preparing the front photolithography pattern, the back photolithography pattern, and the photolithography pattern for the emitter junction protrusion ring; The diameter D1 of the central region of the front photolithography pattern is a common bidirectional thyristor pattern; the annular region from D1 to the junction terminal inner diameter D2 is a honeycomb pattern; the honeycomb pattern is composed of regular hexagonal units, each unit is divided into two equal trapezoidal regions, one bright and one dark, and the annular region outside D2 is a transparent junction terminal region pattern. The central region (within diameter D1) of the reverse photolithography pattern is symmetrical to the front pattern. The honeycomb pattern between D1 and D2 is interchanged with the bright and dark areas of the front pattern. The terminal area pattern outside D2 is the same as the front pattern. The photolithographic pattern for preparing the emitter junction protrusion ring is a circular ring pattern, located in the middle of the honeycomb alternating doped region, with the same pattern on both the front and back sides.

[0036] On both sides of a high-resistivity, thick N-type silicon wafer, a symmetrical device structure characterized by honeycomb-shaped alternating doped regions is simultaneously formed through precise photolithography and selective doping processes. A recessed ring 15 is then fabricated in the middle of the alternating doped region 6 through photolithography and etching processes, and then an emitter junction protrusion ring 11 is formed through alternating doping. Finally, a bidirectional conductive device with precise voltage limiting function and high reliability is manufactured.

[0037] In this regard, the present invention also provides an embodiment of a method for manufacturing a thyristor, which specifically includes the following steps: Step 1: Prepare the front-side photolithography pattern: The central region of the pattern, with a diameter D1 of 12-18 mm, is a typical bidirectional thyristor pattern; the annular region from D1 to the junction terminal inner diameter D2 is a honeycomb pattern, which is composed of regular hexagonal units with a side length of 0.1-0.8 mm. Each unit is divided into two congruent trapezoidal regions, one bright and one dark. The annular region outside D2 is the transparent junction terminal region pattern. Preparation of reverse photolithography pattern: The area within the central diameter D1 of the pattern is symmetrical to the front pattern; the honeycomb pattern in the annular area between D1 and D2 is interchanged with the bright and dark areas of the front pattern; the junction terminal area pattern outside D2 is the same as the front pattern. Photolithographic pattern for preparing the emitter junction protrusion ring: The pattern includes a ring pattern with a width of 1mm-2mm, which is located in the middle of the honeycomb alternating doped region 6. The patterns are the same on both the front and back sides. Step 2: Select an N-type silicon single crystal wafer with a resistivity of 160±5%Ωcm and a thickness of 680±10μm; Step 3: Using the photolithography patterns on the front and back sides, the doped region structure of claim 1 is formed on the front and back sides of the wafer through photolithography and selective doping processes; Using the photolithographic pattern of the emitter junction protrusion ring, emitter junction protrusion rings 11 with a junction protrusion height of 3μm-8μm are formed at designated positions on the front and back sides of the wafer through photolithography and etching processes.

[0038] The size of the junction inner diameter D2 is determined based on the current carrying capacity of the device. For a 5-inch device with a target surge current of 80kA and a breakover voltage of 4200-4400V, D2 is 112mm.

[0039] Working principle and usage process of this invention: During normal operation, the core of the device consists of tens of thousands of miniature bidirectional thyristor units that run through both sides of the chip. Each unit has a bidirectional conduction four-layer structure naturally formed inside due to the honeycomb alternating doping on both sides and the mirror symmetry. When a trigger pulse is applied to the gate, the trigger current flows into the P-type gate region 1. This current serves as the initial seed current, triggering the injection of electrons / holes into the adjacent N+P+ junction, thereby initiating the latch-up effect in the active region of the entire chip. Thousands of microcells are triggered to conduct almost simultaneously, enabling the entire chip to enter a low-resistance conduction state and withstand huge forward or reverse surge currents.

[0040] During overvoltage protection, under normal operation, the device is subjected to high voltage. Due to the distortion of the PN junction surface at the emitter junction protrusion ring 11 caused by the trenching process, the current amplification factor α2 at this location is much higher than that in other flat areas of the chip. When the voltage across the terminals exceeds the preset clamping value, a huge avalanche multiplication current is first generated in the emitter junction protrusion ring 11 region, thereby triggering the device to quickly switch from a high-resistance blocking state to a low-resistance conducting state. Once turned on, the voltage across the device immediately drops from a high voltage of several kilovolts to the on-state voltage drop of the thyristor itself, thereby clamping the overvoltage across the protected submodule to a safe, extremely low level and preventing damage to the IGBT, diodes, and capacitors due to overvoltage.

[0041] Regardless of whether the device is turned on due to overvoltage or triggered, once one or more of its internal bidirectional thyristor units burn out due to excessive energy, its unique three-dimensional honeycomb structure will ensure excellent failure redundancy characteristics, and countless other micro-units around the failure point will remain intact. Since each unit is independent and symmetrical, the current can automatically pass through the failure point and quickly expand to induce other intact units to continue bidirectional, low-resistance conduction; therefore, the overall conduction function of the device is maintained, and thermal runaway and explosive damage will not be caused by local failure, enabling long-term stable operation after a fault.

[0042] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0043] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A positioning and voltage-limiting bidirectional thyristor, characterized in that: The chip includes an N-long base region (13) and a P-short base region (12) arranged sequentially from the inside to the outside in both the upper and lower parts of the chip. The chip has a P-type gate region and isolation region (1), an N+ amplification gate region (2), a P-type short circuit point (3), a P-type amplification gate region (4), an N+ cathode region (5), and an alternating doping region (6) arranged sequentially from the center to the edge on both sides. The alternating doped region (6) is arranged around the N+ cathode region (5). The alternating doped region (6) is composed of multiple periodically arranged units. Each unit contains symmetrically arranged N+ type doped regions and P+ type doped regions. The doping types of the middle regions on both sides of the chip are mirror symmetrical. The geometric dimensions of the alternating doped region (6) on both sides are the same as those on the front side. The positions of the N+ type and P+ type doped regions are interchanged. Each unit penetrates the chip longitudinally to form a sub-bidirectional thyristor (14).

2. The positioning and voltage-limiting bidirectional thyristor according to claim 1, characterized in that: The alternating doped regions (6) are distributed in a honeycomb pattern, with the side length of the honeycomb units ranging from 0.1 mm to 0.8 mm.

3. The positioning and voltage-limiting bidirectional thyristor according to claim 1, characterized in that: The unit shape of the alternating doped region (6) includes, but is not limited to, triangle, quadrilateral or sector.

4. A positioning and voltage-limiting bidirectional thyristor according to claim 1, characterized in that: It also includes a grooved ring (7), which is located in the middle of the alternating doped region (6). A groove is formed at the grooved ring (7) to form a recessed ring (15). The PN junction at the recessed ring (15) protrudes relative to the PN junction surface inside the silicon body on both sides, forming an emitter junction protrusion ring (11).

5. A positioning and voltage-limiting bidirectional thyristor according to claim 1, characterized in that: The alternating doped region (6) is provided with a P+ junction termination region (8) on the outside, and a junction termination silicone rubber protective ring (9) is provided outside the P+ junction termination region (8).

6. A positioning and voltage-limiting bidirectional thyristor according to claim 1, characterized in that: The chip also includes an aluminum metal electrode layer (10) that covers the outside of the chip.

7. A positioning and voltage-limiting bidirectional thyristor according to claim 4, characterized in that: The PN junction protrusion height of the emitter junction protrusion ring (11) and the depth of the recessed ring (15) are both 3μm to 8μm.

8. A method for manufacturing a thyristor, characterized in that, The positioning and voltage-limiting bidirectional thyristor based on any one of claims 1-7 includes the following steps: High-resistivity thick N-type silicon single crystal wafers are selected as the chip substrate. On both sides of the chip substrate, N-long base regions (13) and P-type short base regions (12) are formed sequentially from the inside to the outside through double-sided photolithography and selective doping processes. On the front side of the chip, from the center to the edge, a P-type gate region and isolation region (1), an N+ amplification gate region (2), a P-type short circuit point (3), a P-type amplification gate region (4), an N+ cathode region (5), and an alternating doped region (6) are formed in sequence. The same regional structure as the front side is formed from the center to the edge on the reverse side of the chip, and the doping type on the reverse side is mirror-symmetrical to that on the front side. A sub-bidirectional thyristor (14) is formed by longitudinally penetrating each unit of the alternating doped region (6) through the chip.

9. The method for manufacturing a thyristor according to claim 8, characterized in that, It also includes the following steps: A grooved ring (7) is provided in the middle of the alternating doped region (6). A recessed ring (15) is formed by the grooved process. Then, an emitter PN junction is formed by photolithography and alternating doping process, so that the PN junction at the recessed ring (15) protrudes relative to the PN junction surface inside the silicon body on both sides to form an emitter junction protrusion ring (11). A P+ junction termination region (8) is formed on the outside of the alternating doped region (6), and a junction termination silicone rubber protective ring (9) is provided outside the P+ junction termination region (8).

10. The method for manufacturing a thyristor according to claim 9, characterized in that, This includes sequentially preparing the front photolithography pattern, the back photolithography pattern, and the photolithography pattern for the emitter junction protrusion ring; The diameter D1 of the central region of the front photolithography pattern is a common bidirectional thyristor pattern; the annular region from D1 to the junction terminal inner diameter D2 is a honeycomb pattern; the honeycomb pattern is composed of regular hexagonal units, each unit is divided into two equal trapezoidal regions, one bright and one dark, and the annular region outside D2 is a transparent junction terminal region pattern. The central region (within diameter D1) of the reverse photolithography pattern is symmetrical to the front pattern. The honeycomb pattern between D1 and D2 is interchanged with the bright and dark areas of the front pattern. The terminal area pattern outside D2 is the same as the front pattern. The photolithographic pattern for preparing the emitter junction protrusion ring is a circular ring pattern, located in the middle of the honeycomb alternating doped region, with the same pattern on both the front and back sides.

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