Display panel and electronic device including the same

Abstract

The invention relates to a display panel and an electronic device including the same. The display panel includes: a substrate; a pixel electrode disposed on the substrate; a pixel defining layer having an opening, in which the pixel defining layer covers an edge of the pixel electrode, and the opening exposes a center of the pixel electrode; and a first line between the substrate and the pixel electrode and having a first portion overlapping the pixel electrode and the pixel defining layer and a second portion overlapping the opening, in which a shape of the first portion is different from a shape of the second portion when viewed from a direction perpendicular to the substrate.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0126172, filed on September 13, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments of this disclosure relate to a display panel and an electronic device including the display panel. More specifically, this disclosure relates to a display panel capable of displaying high-quality images and an electronic device including the display panel. Background Technology

[0004] Display panels, including organic light-emitting display panels, typically contain thin-film transistors located beneath the organic light-emitting elements. These transistors adjust the brightness of the organic light-emitting elements in response to data signals or similar inputs, thereby controlling the brightness of the corresponding elements. Summary of the Invention

[0005] In traditional display panels, the quality of the image generated by organic light-emitting diodes located at the top may be adversely affected by the underlying structure of thin-film transistors, resulting in image degradation.

[0006] One or more embodiments of this disclosure include a display panel thereon capable of displaying high-quality images and an electronic device including the display panel. However, the embodiments described herein are merely examples, and the scope of this disclosure is not limited thereto.

[0007] Additional aspects will be described in part in the following description, will be obvious from the description, or may be learned by practicing embodiments of the present disclosure.

[0008] According to one or more embodiments of the present disclosure, a display panel is provided, comprising: a substrate; a pixel electrode disposed on the substrate; a pixel defining layer having an opening, wherein the pixel defining layer covers the edge of the pixel electrode and the opening exposes the center of the pixel electrode; and a first line located between the substrate and the pixel electrode, having a first portion overlapping the pixel electrode and the pixel defining layer and a second portion overlapping the opening, wherein the shape of the first portion is different from the shape of the second portion when viewed from a direction perpendicular to the substrate.

[0009] When viewed from a direction perpendicular to the substrate, the first part is straight in the direction in which the first line extends, and the second part is curved.

[0010] When viewed from a direction perpendicular to the substrate, the second part is a repeating curve.

[0011] The display panel further includes: a second line located between the substrate and the pixel electrode and having a third portion and a fourth portion, wherein the third portion overlaps with the pixel electrode and the pixel defining layer, the fourth portion overlaps with the opening, and the shape of the third portion is different from the shape of the fourth portion when viewed from a direction perpendicular to the substrate.

[0012] When viewed from a direction perpendicular to the substrate, each of the first and third portions is straight in the direction in which the first line extends, and each of the second and fourth portions is curved.

[0013] When viewed from a direction perpendicular to the substrate, each of the second and fourth sections is a repeating curve.

[0014] The second part has a first protrusion that protrudes in the direction toward the second line, and the fourth part has a second protrusion that protrudes in the direction away from the first line.

[0015] A first imaginary straight line passing through the first protrusion and perpendicular to the direction in which the first line extends is spaced apart from a second imaginary straight line passing through the second protrusion and perpendicular to the direction in which the first line extends.

[0016] The second part has a plurality of first protrusions protruding in the direction toward the second line, and the fourth part has a plurality of second protrusions protruding in the direction away from the first line.

[0017] Multiple first imaginary straight lines passing through multiple first protrusions and perpendicular to the direction of extension of the first line are spaced apart from multiple second imaginary straight lines passing through multiple second protrusions and perpendicular to the direction of extension of the first line.

[0018] Multiple first imaginary lines and multiple second imaginary lines are arranged alternately in the direction in which the first line extends.

[0019] The first line includes a drive voltage line, and the second line includes a data line.

[0020] When viewed from a direction perpendicular to the substrate, the first line has a fifth portion that overlaps with the opening and is spaced apart from the second portion in the opening, wherein the second portion and the fifth portion are connected to the first portion.

[0021] When viewed from a direction perpendicular to the substrate, each of the first and third portions is straight in the direction in which the first line extends, and each of the second, fourth, and fifth portions is curved.

[0022] When viewed from a direction perpendicular to the substrate, each of the second, fourth, and fifth sections is a repeating curve.

[0023] The second part has a first protrusion protruding in the direction toward the second line, the fifth part has a third protrusion protruding in the direction toward the second line, and the fourth part has a second protrusion protruding in the direction away from the first line.

[0024] A first imaginary line passing through the first protrusion and perpendicular to the direction of the first line is spaced apart from a second imaginary line passing through the second protrusion and perpendicular to the direction of the first line, and a third imaginary line passing through the third protrusion and perpendicular to the direction of the first line coincides with the first imaginary line.

[0025] The second part has a plurality of first protrusions protruding in the direction toward the second line, the fifth part has a plurality of third protrusions protruding in the direction toward the second line, and the fourth part has a plurality of second protrusions protruding in the direction away from the first line.

[0026] Multiple first imaginary straight lines passing through multiple first protrusions and perpendicular to the direction of extension of the first line are spaced apart from multiple second imaginary straight lines passing through multiple second protrusions and perpendicular to the direction of extension of the first line, and multiple third imaginary straight lines passing through multiple third protrusions and perpendicular to the direction of extension of the first line coincide with multiple first imaginary straight lines respectively.

[0027] Multiple first imaginary lines and multiple second imaginary lines are arranged alternately in the direction in which the first line extends.

[0028] The display panel further includes: an auxiliary line disposed on a layer different from the layer on which the first line and the second line are disposed, and located between the first line and the second line, in an opening, when viewed from a direction perpendicular to the substrate.

[0029] The auxiliary lines are isolated.

[0030] According to one or more embodiments of the present disclosure, a display panel is provided, comprising: a substrate; a pixel electrode disposed on the substrate; a pixel defining layer configured to define an opening exposing a portion of the pixel electrode, wherein the pixel defining layer at least partially covers the pixel electrode; and a wire located between the substrate and the pixel electrode, the wire including a first region overlapping the pixel electrode and the pixel defining layer and a second region overlapping the opening, wherein, in a plan view, the first region has a shape different from that of the second region.

[0031] According to one or more embodiments of this disclosure, the electronic device includes one of the above-described display panels.

[0032] The above and / or other aspects will become apparent and more readily understood from the following description of the embodiments, the claims, and the accompanying drawings. Attached Figure Description

[0033] The above and other aspects and features of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0034] Figure 1 This is a schematic plan view of a display panel according to an embodiment of the present disclosure;

[0035] Figure 2 It is a schematic diagram. Figure 1 A side view of the display panel;

[0036] Figure 3 Is included Figure 1 The equivalent circuit diagram of the pixels in the display panel;

[0037] Figure 4 It is a schematic illustration including Figure 1 A plan view of the conductive layer in the display panel;

[0038] Figure 5 It is a schematic diagram. Figure 4 A planar view of the conductive layer and the pixel electrodes located on top of the conductive layer;

[0039] Figure 6 It is a diagram. Figure 4 An enlarged plan view of a portion;

[0040] Figure 7 , Figure 8 , Figure 9 and Figure 10 This is a diagram used to illustrate the effects of this disclosure;

[0041] Figure 11 This is a schematic plan view illustrating a portion of a display panel according to an embodiment of the present disclosure;

[0042] Figure 12 This is a schematic plan view illustrating a portion of a display panel according to an embodiment of the present disclosure;

[0043] Figure 13 This is a schematic plan view illustrating a portion of a display panel according to an embodiment of the present disclosure;

[0044] Figure 14 This is a schematic plan view illustrating a portion of a display panel according to an embodiment of the present disclosure;

[0045] Figure 15 It is a schematic diagram along Figure 6 A cross-sectional view of the conductive layer taken by line A-A';

[0046] Figure 16This is a schematic cross-sectional view of a portion of a display panel according to an embodiment of the present disclosure;

[0047] Figure 17 This is a perspective view illustrating an electronic device according to an embodiment of the present disclosure;

[0048] Figure 18 yes Figure 17 An exploded perspective view of an electronic device; and

[0049] Figure 19 It is a schematic diagram. Figure 17 A block diagram of an electronic device. Detailed Implementation

[0050] Reference will now be made in detail to embodiments illustrated in the accompanying drawings, wherein the same reference numerals consistently denote the same elements. It should be understood that the present embodiments may take various forms and are not limited to the description provided herein. Therefore, embodiments are described below with reference to the figures to explain aspects of this disclosure. As used herein, the term “and / or” includes any and all combinations of one or more of the listed items. Throughout the disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0051] This disclosure allows for various modifications and includes multiple embodiments. Certain embodiments are illustrated in the accompanying drawings and described in detail in this written description. The effects and features of this disclosure, as well as methods for implementing them, will be described in more detail with reference to the accompanying drawings depicting particular embodiments. However, this disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein.

[0052] One or more embodiments will now be described in more detail with reference to the accompanying drawings. In all the drawings, identical or corresponding parts are given the same reference numerals, and redundant descriptions are omitted.

[0053] It will be understood that when a component such as a layer, film, region, or plate is referred to as being "on" another component, the component may be directly on that other component, or an intermediary component may be present on it. For ease of description, the dimensions of elements in the figures may be enlarged or reduced. In other words, since the dimensions and thicknesses of the components in the figures are arbitrarily illustrated for ease of interpretation, the following embodiments are not limited thereto.

[0054] In the following embodiments, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0055] In the embodiments described below, terms such as “first” and “second” are used herein only to describe various elements, but these elements are not limited by these terms. These terms are used for the purpose of distinguishing one element from another.

[0056] In the embodiments described below, it will be further understood that the terms “comprising” and / or “including” as used herein specify the presence of the stated features or components, but do not exclude the presence or addition of one or more other features or components.

[0057] As used herein, “A and / or B” can include “A”, “B”, or “A and B”. Furthermore, “at least one of A and B” can include “A”, “B”, or “A and B”.

[0058] It will be understood that when a layer, area, or component is referred to as being "connected" to another layer, area, or component, it can be "directly connected" to the other layer, area, or component, or it can be "indirectly connected" to the other layer, area, or component with other layers, areas, or components in between. For example, it will be understood that when a layer, area, or component is referred to as being "electrically connected" to another layer, area, or component, it can be "directly electrically connected" to the other layer, area, or component, or it can be "indirectly electrically connected" to the other layer, area, or component with other layers, areas, or components in between.

[0059] This disclosure focuses on a display panel with a unique design for reducing the intensity of reflected light caused by external illumination. It achieves this by incorporating multiple conductors (such as drive voltage lines and data lines) with waveform portions in an open area of ​​the pixel-defined layer (PDL). These waveforms prevent strong luminance reflections caused by diffraction, thereby enhancing image visibility and supporting high-resolution display quality even under bright ambient light conditions.

[0060] Figure 1 This is a schematic plan view of a display panel according to an embodiment of the present disclosure.

[0061] Figure 1 This is a schematic plan view of the display panel 10 according to an embodiment, and Figure 2 It is a schematic diagram. Figure 1 A side view of the display panel 10. The display panel 10 according to this embodiment has, as shown... Figure 2 The bent portion shown is not explicitly described, but for ease of description, the display panel 10 is... Figure 1 The middle part is shown as not bent.

[0062] However, one or more embodiments are not limited thereto, and any electronic device including a display panel may fall within the scope of this disclosure. These electronic devices are means for displaying moving or still images and may be portable electronic devices such as display devices, mobile phones, smartphones, tablet PCs, laptops, mobile communication terminals, e-notebooks, e-books, portable multimedia players (PMPs), navigation devices, or ultra-mobile PCs (UMPCs). Alternatively, the electronic device may be a television, monitor, billboard, or Internet of Things (IoT) device that can display moving or still images. Alternatively, the electronic device may be a wearable device such as a smartwatch, watch phone, glasses display, or head-mounted display (HMD). Furthermore, the electronic device may be a dashboard for a vehicle, a central information display (CID) located on or on the center dashboard of a vehicle, a rearview mirror display replacing the side mirrors of a vehicle, or a display device located on the rear surface of the front seat for the entertainment of passengers in the rear seats of a vehicle.

[0063] Display panel 10 may include a display area DA and a peripheral area PA outside the display area DA. The display area DA is the portion used to display images, and multiple pixels may be disposed in the display area DA. When viewed from a direction substantially perpendicular to display panel 10, the display area DA may have various shapes such as circular, elliptical, polygonal, and specific graphic shapes. Figure 1 The diagram shows a display area DA with a roughly rectangular shape and rounded corners. The outer area PA may be located outside the display area DA.

[0064] Because the display panel 10 includes a substrate 100 (see...) Figure 15 Therefore, it can be understood that substrate 100 includes a display area DA and a peripheral area PA. Various components included in the display panel 10 can be located on substrate 100. Substrate 100 can include glass, metal, or polymer resin. As described below, when the display panel 10 is bent in the bending area BR, substrate 100 has flexible or bendable properties. In this case, substrate 100 can include polymer resins such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. However, various modifications can be made. For example, substrate 100 can have a multilayer structure including two layers and a barrier layer between the two layers, wherein each of the two layers includes the aforementioned polymer resin, and the barrier layer includes an inorganic material (e.g., silicon oxide, silicon nitride, or silicon oxynitride).

[0065] Multiple pixels P can be located within the display area DA. Each pixel P can refer to a subpixel and can include a display element such as an organic light-emitting diode (OLED). For example, pixel P can emit red, green, blue, or white light.

[0066] The display panel 10 may also have a main region MR, a bent region BR, and a sub-region SR, wherein the bent region BR is outside the main region MR, and the sub-region SR is located on the opposite side of the main region MR relative to the bent region BR. Figure 2 As shown, the display panel 10 is bent in the bending region BR such that, when viewed from the z-axis direction, at least a portion of the sub-region SR overlaps with the main region MR. However, this disclosure is not limited to the bendable display panel 10 and electronic devices having the display panel 10, but can be applied to non-bendable display panels. The sub-region SR can be a non-display area. Because the display panel 10 is bent in the bending region BR, the non-display area may be invisible when the display device is viewed from the front (towards the -z direction), or even if the non-display area is visible, the visible area may be reduced.

[0067] The driver chip 20 may be disposed in the sub-region SR of the display panel 10. The driver chip 20 may include an integrated circuit for driving the display panel 10. The integrated circuit may be a data driver integrated circuit for generating data signals, but one or more embodiments are not limited thereto.

[0068] The driver chip 20 can be mounted on the sub-region SR of the display panel 10. The driver chip 20 is mounted on the same surface as the display surface of the display area DA, but as described above, when the display panel 10 is bent in the bending area BR, the driver chip 20 can be located on the rear surface of the main area MR.

[0069] The printed circuit board 30, etc., can be attached to the end of the sub-region SR of the display panel 10. The printed circuit board 30, etc., can be electrically connected to the driver chip 20 through the pads on the substrate 100.

[0070] In the following description, an organic light-emitting display panel is used as an example of display panel 10 according to an embodiment. However, the display panel disclosed herein is not limited thereto. In another embodiment, the display panel of this disclosure may be, for example, an inorganic light-emitting display panel (or an inorganic electroluminescent (EL) display panel) or a quantum dot light-emitting display panel. For example, the emitting layer of the display element included in the display panel may comprise an organic or inorganic material. Furthermore, the display panel may have an emitting layer and quantum dots located in the path of light emitted from the emitting layer.

[0071] Figure 3 Is included Figure 1 The equivalent circuit diagram of pixel P in the display panel 10. (See diagram below.) Figure 3 As shown, pixel P may include pixel circuit PC and organic light-emitting diode (OLED) electrically connected to pixel circuit PC.

[0072] like Figure 3 As shown, the pixel circuit PC may include multiple thin-film transistors T1 to T7 and a storage capacitor Cst. The multiple thin-film transistors T1 to T7 and the storage capacitor Cst may be connected to signal lines SL1, SL2, SLp, SLn, EL and DL, a first initialization voltage line VL1, a second initialization voltage line VL2, and a drive voltage line PL, wherein signal lines SL1, SL2, SLp, and SLn are collectively referred to as scan lines SL. At least one of these lines (e.g., the drive voltage line PL) may be shared among adjacent pixels P.

[0073] The multiple thin-film transistors T1 to T7 may include a driving transistor T1, a writing transistor T2, a compensation transistor T3, a first initialization transistor T4, an operation control transistor T5, an emitter control transistor T6, and a second initialization transistor T7.

[0074] An organic light-emitting diode (OLED) can include a pixel electrode and a counter electrode. The pixel electrode of an OLED can be connected to a driving transistor T1 via an emitter control transistor T6 and can receive a driving current, while the counter electrode can receive a common voltage ELVSS. An OLED can generate light with a brightness corresponding to the driving current.

[0075] Some of the thin-film transistors T1 to T7 may be n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs; NMOS), while the remaining thin-film transistors may be p-channel MOSFETs (PMOS). For example, the compensation transistor T3 and the first initialization transistor T4 among the multiple thin-film transistors T1 to T7 may be NMOS, and the remaining thin-film transistors may be PMOS. Alternatively, the compensation transistor T3, the first initialization transistor T4, and the second initialization transistor T7 among the multiple thin-film transistors T1 to T7 may be NMOS, and the remaining thin-film transistors may be PMOS. Alternatively, the multiple thin-film transistors T1 to T7 may all be NMOS or PMOS. The multiple thin-film transistors T1 to T7 may comprise amorphous silicon or polycrystalline silicon. If desired, the NMOS thin-film transistors may comprise oxide semiconductors. In the following description, for convenience, the case in which the compensation transistor T3 and the first initialization transistor T4 are NMOS comprising oxide semiconductors and the remaining thin-film transistors are PMOS is described.

[0076] The signal lines may include a first scan line SL1 for transmitting a first scan signal Sn, a second scan line SL2 for transmitting a second scan signal Sn', a previous scan line SLp for transmitting a previous scan signal Sn-1 to a first initialization transistor T4, a next scan line SLn for transmitting a next scan signal Sn+1 to a second initialization transistor T7, an emit control line EL for transmitting an emit control signal En to an operation control transistor T5 and an emit control transistor T6, and a data line DL that intersects the first scan line SL1 and transmits a data signal Dm.

[0077] The driving voltage line PL can transmit the driving voltage ELVDD to the driving transistor T1, the first initialization voltage line VL1 can transmit the first initialization voltage Vint1 used to initialize the driving transistor T1, and the second initialization voltage line VL2 can transmit the second initialization voltage Vint2 used to initialize the pixel electrode of the organic light-emitting diode OLED.

[0078] The driving gate electrode of driving transistor T1 can be connected to the storage capacitor Cst via the second node N2. Either the source or drain region of driving transistor T1 can be connected to the driving voltage line PL via the first node N1 and the operation control transistor T5, and the other of the source and drain regions of driving transistor T1 can be electrically connected to the pixel electrode of the organic light-emitting diode (OLED) via the third node N3 and the emitter control transistor T6. Driving transistor T1 can receive the data signal Dm through the operation of the write transistor T2 and supply driving current to the OLED.

[0079] The switching gate electrode of the write transistor T2 can be connected to the first scan line SL1 for transmitting the first scan signal Sn. Either the source or drain region of the write transistor T2 can be connected to the data line DL, and the other of the source and drain regions of the write transistor T2 can be connected to the drive voltage line PL via the operation control transistor T5, and simultaneously connected to the drive transistor T1 via the first node N1. The write transistor T2 can be turned on in response to the first scan signal Sn received via the first scan line SL1, and can transmit the data signal Dm from the data line DL to the drive transistor T1 via the first node N1.

[0080] The compensation gate electrode of compensation transistor T3 can be connected to the second scan line SL2. Either the source or drain region of compensation transistor T3 can be connected to the pixel electrode of the organic light-emitting diode (OLED) via the third node N3 and the emitter control transistor T6. The other of the source and drain regions of compensation transistor T3 can be connected to the first capacitor electrode CE1 of the storage capacitor Cst and the drive gate electrode of the driving transistor T1 via the second node N2. Compensation transistor T3 can be turned on in response to the second scan signal Sn' received via the second scan line SL2 and can be diode-connected to the driving transistor T1.

[0081] The first initialization gate electrode of the first initialization transistor T4 can be connected to the previous scan line SLp. Either the source or drain region of the first initialization transistor T4 can be connected to the first initialization voltage line VL1. The other of the source and drain regions of the first initialization transistor T4 can be connected via the second node N2 to the first capacitor electrode CE1 of the storage capacitor Cst and the driving gate electrode of the driving transistor T1. The first initialization transistor T4 can be turned on in response to the previous scan signal Sn-1 received via the previous scan line SLp, and the voltage of the driving gate electrode of the driving transistor T1 can be initialized by transmitting the first initialization voltage Vint1 to the driving gate electrode of the driving transistor T1.

[0082] The operation control gate electrode of the operation control transistor T5 can be connected to the emitter control line EL. Either the source region or the drain region of the operation control transistor T5 can be connected to the drive voltage line PL, and the other of the source region or the drain region of the operation control transistor T5 can be connected to the drive transistor T1 and the write transistor T2 via the first node N1.

[0083] The emitter control gate electrode of emitter control transistor T6 can be connected to the emitter control line EL. Either the source region or the drain region of emitter control transistor T6 can be connected to the driving transistor T1 and the compensation transistor T3 via the third node N3, and the other source region or the drain region of emitter control transistor T6 can be electrically connected to the pixel electrode of organic light-emitting diode OLED.

[0084] The operation control transistor T5 and the emitter control transistor T6 can be simultaneously turned on in response to the emitter control signal En received via the emitter control line EL. This allows the drive current generated by the voltage difference between the voltage at the drive gate electrode of the drive transistor T1 and the drive transistor T1 itself to flow through the organic light-emitting diode (OLED).

[0085] The second initialization gate electrode of the second initialization transistor T7 can be connected to the next scan line SLn. Either the source or drain region of the second initialization transistor T7 can be connected to the pixel electrode of the organic light-emitting diode (OLED), and the other of the source and drain regions of the second initialization transistor T7 can be connected to the second initialization voltage line VL2 to receive the second initialization voltage Vint2. The second initialization transistor T7 can be turned on in response to the next scan signal Sn+1 received via the next scan line SLn, and can initialize the pixel electrode of the OLED. The next scan line SLn and the first scan line SL1 can be the same line. In this case, the corresponding scan lines can transmit the same electrical signal with a time difference and are used as either the first scan line SL1 or the next scan line SLn. In other words, the next scan line SLn can be the same as... Figure 3 The pixel P shown is adjacent to and electrically connected to the first scan line of the pixel on the data line DL.

[0086] like Figure 3 As shown, the second initialization transistor T7 can be connected to the next scan line SLn. However, one or more embodiments are not limited thereto, and the second initialization transistor T7 can be connected to the emit control line EL and driven in response to the emit control signal En.

[0087] The storage capacitor Cst may include a first capacitor electrode CE1 and a second capacitor electrode CE2. The first capacitor electrode CE1 of the storage capacitor Cst may be connected to the driving gate electrode of the driving transistor T1, and the second capacitor electrode CE2 of the storage capacitor Cst may be connected to the driving voltage line PL. The storage capacitor Cst may store a charge corresponding to the voltage difference between the driving gate electrode of the driving transistor T1 and the driving voltage ELVDD.

[0088] The detailed operation of each pixel P according to the embodiment is described below.

[0089] During the initialization period, when the previous scan signal Sn-1 is supplied via the previous scan line SLp, the first initialization transistor T4 can be turned on in response to the previous scan signal Sn-1. Therefore, the driving transistor T1 can be initialized by the first initialization voltage Vint1 provided via the first initialization voltage line VL1.

[0090] During the data programming period, when the first scan signal Sn and the second scan signal Sn' are supplied via the first scan line SL1 and the second scan line SL2, the write transistor T2 and the compensation transistor T3 can be turned on in response to the first scan signal Sn and the second scan signal Sn'. In this case, the drive transistor T1 can be connected to the turned-on compensation transistor T3 diode and forward biased. Then, the compensation voltage (Dm+Vth, where Vth is the negative value) obtained by subtracting the threshold voltage (Vth) of the drive transistor T1 from the data signal Dm received via the data line DL can be applied to the drive gate electrode of the drive transistor T1. The drive voltage ELVDD and the compensation voltage (Dm+Vth) can be applied to the two terminals of the storage capacitor Cst respectively. Then, the charge corresponding to the voltage difference between the voltages at these two terminals can be stored in the storage capacitor Cst.

[0091] During the emission period, the operation control transistor T5 and the emission control transistor T6 can be turned on in response to the emission control signal En received via the emission control line EL. A drive current can be generated based on the voltage difference between the voltage of the drive gate electrode of the drive transistor T1 and the drive voltage ELVDD. This drive current can then be supplied to the organic light-emitting diode (OLED) via the emission control transistor T6.

[0092] As described above, some of the thin-film transistors T1 to T7 may include oxide semiconductors. For example, compensation transistor T3 and first initialization transistor T4 may include oxide semiconductors.

[0093] Polysilicon, renowned for its high reliability, allows for precise control of the desired current. Therefore, when the driving transistor T1, which directly affects the brightness of the display panel, comprises a semiconductor layer made of highly reliable polysilicon, a high-resolution display panel can be achieved. On the other hand, oxide semiconductors exhibit high carrier mobility and low leakage current, resulting in minimal voltage drop even during long-term operation. In other words, even when driven at low frequencies, oxide semiconductors experience minimal color changes in the image due to voltage drops, enabling low-frequency operation. Therefore, when the compensation transistor T3 and the first initialization transistor T4 comprise oxide semiconductors, leakage current can be prevented, and a display panel with reduced power consumption can be achieved.

[0094] Oxide semiconductors are photosensitive, and external light can alter the amount of current or electrical properties. To mitigate this, a metal layer can be placed beneath the oxide semiconductor to absorb or reflect external light. Therefore, as... Figure 3As shown, each of the compensation transistor T3 and the first initialization transistor T4, which include an oxide semiconductor, may have gate electrodes located both above and below the oxide semiconductor layer. In other words, when viewed from the z-axis direction perpendicular to the upper surface of the substrate 100, the metal layer located below the oxide semiconductor may overlap with the oxide semiconductor.

[0095] like Figure 3 As shown, pixel circuits with this configuration can be formed using a semiconductor layer and multiple conductive layers. Furthermore, pixel electrodes, including those in an organic light-emitting diode (OLED), can be located on top of these layers. Figure 4 It is a schematic illustration including Figure 1 A plan view of the conductive layer in the display panel 10, and the organic light-emitting diode OLED can be as follows: Figure 4 As shown, it is located above the conductive layer. Figure 4 As shown, the conductive layer may include data lines 1710R, 1710G and 1710B, drive voltage line 1730 and connection lines 1740R, 1740G and 1740B.

[0096] Each of the data lines 1710R, 1710G, and 1710B may extend generally in a first direction (e.g., the y-axis direction). The drive voltage line 1730 may also extend generally in a first direction (e.g., the y-axis direction).

[0097] Data cables 1710R, 1710G, and 1710B can include a red data cable 1710R, a green data cable 1710G, and a blue data cable 1710B. These data cables 1710R, 1710G, and 1710B can be used with... Figure 3 The data lines DL and DL correspond to each other. The red data line 1710R can be electrically connected to the underlying semiconductor layer via the red contact hole 1710RCNT. This connection allows the red data signal Dm to be transmitted from the red data line 1710R to the semiconductor layer and subsequently to the write transistor T2 of the red pixel circuit. The green data line 1710G can be electrically connected to the underlying semiconductor layer via the green contact hole 1710GCNT. This connection allows the green data signal Dm to be transmitted from the green data line 1710G to the semiconductor layer and subsequently to the write transistor T2 of the green pixel circuit. Similarly, the blue data line 1710B can be electrically connected to the underlying semiconductor layer via the blue contact hole 1710BCNT. This connection allows the blue data signal Dm to be transmitted from the blue data line 1710B to the semiconductor layer and subsequently to the write transistor T2 of the blue pixel circuit.

[0098] Drive voltage line 1730 can be with Figure 3The driving voltage line 1730 corresponds to the driving voltage line PL. The driving voltage line 1730 can be configured to apply the driving voltage ELVDD to the pixel. The driving voltage line 1730 can be electrically connected to a connection line or similar structure in the underlying conductive layer via a contact hole 1730CNT. As described above, this connection facilitates the transfer of the driving voltage ELVDD to the operating control transistor T5 and the upper electrode of the capacitor. For two pixels (two sub-pixels) adjacent to each other in a second direction (e.g., the x-axis direction), the driving voltage line 1730 can be integrally provided as a single body.

[0099] Each of the connecting lines 1740R, 1740G, and 1740B can have an isolated shape. The red connecting line 1740R can be electrically connected to the underlying semiconductor layer via a red contact hole 1740RCNT1, and to the pixel electrode 210R of the red organic light-emitting diode OLED via a red contact hole 1740RCNT2 defined in the upper insulating layer (see...). Figure 5 and Figure 15 This configuration electrically connects the emitter control transistor T6 and the pixel electrode 210R to each other, allowing the drive current or the second initialization voltage Vint2 from the semiconductor layer to be transmitted to the pixel electrode 210R of the red organic light-emitting diode OLED. The green connection line 1740G can be electrically connected to the underlying semiconductor layer via the green contact hole 1740GCNT1, and to the pixel electrode 210G of the green organic light-emitting diode OLED via the green contact hole 1740GCNT2 defined in the upper insulating layer (see...). Figure 5 This arrangement electrically connects the emitter control transistor T6 and the pixel electrode 210G, allowing drive current or the second initialization voltage Vint2 from the semiconductor layer to be transmitted to the pixel electrode 210G of the green organic light-emitting diode OLED. Similarly, the blue connection line 1740B can be electrically connected to the underlying semiconductor layer via the blue contact hole 1740BCNT1, and electrically connected to the pixel electrode 210B of the blue organic light-emitting diode OLED via the blue contact hole 1740BCNT2 defined in the upper insulating layer (see...). Figure 5 This configuration electrically connects the emitter control transistor T6 to the pixel electrode 210B, enabling the drive current or the second initialization voltage Vint2 from the semiconductor layer to be transmitted to the pixel electrode 210B of the blue organic light-emitting diode OLED.

[0100] The conductive layer may include metals, alloys, conductive metal oxides, or transparent conductive materials. For example, Figure 4The conductive layer shown may include silver (Ag), Ag-containing alloys, molybdenum (Mo), Mo-containing alloys, aluminum (Al), Al-containing alloys, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), or indium zinc oxide (IZO). The conductive layer may have a multilayer structure. For example, the conductive layer may have a two-layer Ti / Al structure or a three-layer Ti / Al / Ti structure.

[0101] Figure 5 It is a schematic diagram. Figure 4 A plan view of the conductive layer and the pixel electrodes 210R, 210G and 210B located thereon. Figure 4 The connection relationship between the conductive layer and the pixel electrodes 210R, 210G and 210B located thereon is as shown in the reference above. Figure 4 As stated above.

[0102] Planarization layer 123 (see Figure 15 ) can be Figure 4 The conductive layer is located between the pixel electrodes 210R, 210G, and 210B situated thereon. The planarization layer 123 may include an organic insulating material. For example, the planarization layer 123 may include photoresist, benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), polystyrene, polymer derivatives having phenolic groups, propylene polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or any mixture thereof. The aforementioned contact holes 1740RCNT2, 1740GCNT2, and 1740BCNT2 may be defined within the planarization layer 123.

[0103] Pixel electrodes 210R, 210G, and 210B can be reflective electrodes. For example, pixel electrodes 210R, 210G, and 210B can include a reflective layer and a transparent or translucent electrode layer thereon, the reflective layer comprising Ag, magnesium (Mg), Al, platinum (Pt), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), and any compounds thereof. The transparent or translucent electrode layer can have at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and zinc aluminum oxide (AZO). For example, each of pixel electrodes 210R, 210G, and 210B can have a three-layer structure of ITO / Ag / ITO.

[0104] Pixel-limited layer 127 (see) Figure 15The pixel definition layer 127 can be disposed on the planarization layer 123. The pixel definition layer 127 can increase the respective edges of the pixel electrodes 210R, 210G, and 210B to the counter electrode 230 located above the pixel electrodes 210R, 210G, and 210B (see [reference]). Figure 15 The distance between them. This configuration helps prevent arcing or similar problems at the edges of the pixel electrodes 210R, 210G, and 210B.

[0105] The pixel defining layer 127 may include one or more organic insulating materials selected from the group consisting of polyimide, polyamide, acrylic resin, BCB, and phenolic resin. The pixel defining layer 127 may define an opening exposing the center of each of the pixel electrodes 210R, 210G, and 210B, and may cover the edges of the pixel electrodes 210R, 210G, and 210B.

[0106] Figure 6 It is a diagram. Figure 4 A magnified planar view of a portion, schematically showing the red pixel electrode 210R located in the red sub-pixel and the conductive layer beneath it. Figure 6 In the pixel definition layer 127, the opening 127OP at the center of the exposed red pixel electrode 210R is indicated by a dashed line.

[0107] The intermediate layer 220 of an organic light-emitting diode (OLED) (see...) Figure 15 At least a portion of the ) may be located in the opening 127OP. The intermediate layer 220 may include an emission layer. The emission layer may include an organic material, including fluorescent or phosphorescent materials that emit red, green, blue, or white light. The emission layer may be a low molecular weight organic material or a polymeric organic material, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may optionally be further disposed below and above the emission layer.

[0108] The emitter layer can have a patterned shape corresponding to each of the pixel electrodes 210R, 210G, and 210B. All layers included in the intermediate layer 220, except the emitter layer, can be integrally provided as a single integrated structure spanning the pixel electrodes 210R, 210G, and 210B. Various modifications to this configuration are also possible.

[0109] Counter electrode 230 (see Figure 15The counter electrode 230 can be a transparent electrode. For example, the counter electrode 230 can be a transparent or translucent electrode and can include a metal thin film with a low work function, including Li, calcium (Ca), Al, Ag, Mg, and any of their compounds (e.g., lithium fluoride (LiF)). Furthermore, the counter electrode 230 can further include a transparent conductive oxide (TCO) film, including ITO, IZO, ZnO, or In2O3, on top of the metal thin film. The counter electrode 230 can be integrally formed as a single integrated layer covering the entire surface of the display area DA and disposed above the intermediate layer 220 and the pixel electrodes 210R, 210G, and 210B.

[0110] The driving voltage line 1730 may include a first portion P1 and a second portion P2. The first portion P1 may overlap with the red pixel electrode 210R and the pixel defining layer 127. The second portion P2 may overlap with the opening 127OP in the pixel defining layer 127. In this case, when viewed from a direction perpendicular to the substrate 100 (z-axis direction) (i.e., in a plan view), the shapes of the first portion P1 and the second portion P2 may be different. For example, as Figure 6 As shown, the shape of the first portion P1 may include a straight line configuration extending in the y-axis direction, which is aligned with the approximate extension of the drive voltage line 1730. Conversely, the shape of the second portion P2 may include a curved configuration such as a repeating curved pattern. Figure 6 In the middle, the second part P2 is depicted as having a wavy shape.

[0111] Similarly, each of data lines 1710R and 1710G may include a third portion P3 and a fourth portion P4. The third portion P3 may overlap with the red pixel electrode 210R and the pixel defining layer 127. The fourth portion P4 may overlap with the opening 127OP defined in the pixel defining layer 127. In this case, when viewed from a direction perpendicular to the substrate 100 (z-axis direction) (i.e., in a plan view), the shapes of the third portion P3 and the fourth portion P4 may be different. For example, as... Figure 6 As shown, the third part P3 can have a straight line configuration extending in the y-axis direction, corresponding roughly to the extensions of data lines 1710R and 1710G. Conversely, the fourth part P4 can have a curved configuration such as a repeating curved pattern. Figure 6 In the middle, the fourth part, P4, is illustrated with a wavy shape.

[0112] As described above, the planarization layer 123 can be located in Figure 5As shown in the conductive layer, pixel electrodes 210R, 210G, and 210B can be located on planarization layer 123. Regardless of the shape of the underlying elements, planarization layer 123 theoretically has a flat upper surface, allowing pixel electrodes 210R, 210G, and 210B to be formed in a flat shape. However, in practice, the upper surface of planarization layer 123 is relatively flat compared to the steps of the elements below it, but may not be perfectly flat. Therefore, pixel electrodes 210R, 210G, and 210B formed on this upper surface of planarization layer 123 can exhibit the same shape as the elements below it (i.e., ...). Figure 4 and Figure 5 The curvature corresponding to the shape of the conductive layer shown in the figure.

[0113] Because pixel electrodes 210R, 210G, and 210B are reflective electrodes, external light incident on the display panel 10 can be reflected from the upper surfaces of the pixel electrodes 210R, 210G, and 210B and emitted again. Therefore, this reflected light may be visible to the user. Since reflected light can reduce the visibility of the image displayed by the display panel 10, it is important to approximately adjust the intensity or pattern of the reflected light.

[0114] Figures 7 to 10 This is a diagram used to illustrate the effects of this disclosure. Figure 7 This illustrates a scenario where reflected light from pixel electrodes 210R, 210G, and 210B is perceived by an observer as three spots, and... Figure 8 This illustrates a scenario where reflected light from pixel electrodes 210R, 210G, and 210B is perceived by an observer as seven spots. In this case, Figure 7 The average brightness of the three spots is greater than Figure 8 The average brightness of the seven spots. In other words, Figure 7 This illustrates a scenario where an observer identifies three reflective light spots with high average brightness, while Figure 8 This illustrates a scenario where an observer identifies seven reflective light spots with relatively low average brightness. To enhance the visibility of the image displayed on display panel 10, and... Figure 7 Compared to the scenes in [the previous text], in [the current text] Figure 8 In the scene illustrated in the image, the observer can perceive the image more clearly.

[0115] Figure 9 This illustrates a case where the conductive layer beneath the pixel electrode has a vertically extending, alternating pattern of repeating straight lines in the left-right direction. Even when a planarization layer exists between the conductive layer and the pixel electrode, the upper surface of the pixel electrode above this conductive layer can still exhibit a curved surface that roughly corresponds to the shape of the conductive layer beneath it. Therefore, external light incident on the upper surface of the pixel electrode is reflected, and then... Figure 9 A strong diffraction effect occurs in the left and right directions indicated by the arrows. For example... Figure 7 As shown, this reflection results in three bright spots with high average brightness in the left-right direction.

[0116] Figure 10 This illustrates a case where the conductive layer beneath the pixel electrode has a wave-like pattern that repeats in the left-right direction and extends approximately vertically rather than forming a straight line. Even when a planarization layer exists between the conductive layer and the pixel electrode, the upper surface of the pixel electrode above this conductive layer can have a curved surface that approximately corresponds to the shape of the underlying conductive layer. External light incident on the upper surface of the pixel electrode is reflected, causing diffraction. However, compared to... Figure 9 The situations shown are different, such as those by Figure 10 As indicated by the arrow, this diffraction phenomenon occurs in all directions. Therefore, as... Figure 8 As shown, seven reflective light spots with low brightness appeared.

[0117] As referenced above Figure 6 In the plan view, the second portion P2 of the driving voltage line 1730 can be located in the opening 127OP in the pixel defining layer 127. Furthermore, the second portion P2 can have a curved shape. For example, the second portion P2 can have a repeating curved shape. Figure 6 In the diagram, the second portion P2 is shown as having a waveform. Similarly, in the plan view, the fourth portion P4 of each of the data lines 1710R and 1710G can be located in the opening 127OP in the pixel defining layer 127. Furthermore, the fourth portion P4 can have a curved shape. For example, the fourth portion P4 can have a repeating curved shape. Figure 6 In the diagram, the fourth part, P4, is shown as having a waveform. This is because the portion of the conductive layer located in the opening 127OP within the pixel-defining layer 127 has a waveform as shown... Figure 10 The curved shape shown in the diagram allows the display panel 10 according to this embodiment to significantly enhance the user's image visibility. This design enables the display panel to present high-resolution images even in the presence of reflected light caused by external light sources.

[0118] The second portion P2 included in the drive voltage line 1730 may have a first protrusion protruding in the direction (+x direction) toward the nearest data line 1710G, and the fourth portion P4 of the data line 1710G may have a second protrusion protruding in the direction (+x direction) away from the nearest drive voltage line 1730. Figure 6As shown, the first imaginary straight line IL that passes through the first protrusion and extends perpendicularly to the direction of the drive voltage line 1730 (y-axis direction) can be aligned with the second imaginary straight line IL that passes through the second protrusion and extends perpendicularly to the direction of the data line 1710G (y-axis direction).

[0119] The second portion P2 in the driving voltage line 1730 may have multiple first protrusions protruding in the direction (+x direction) toward the nearest data line 1710G, and the fourth portion P4 of the data line 1710G may have multiple second protrusions protruding in the direction (+x direction) away from the nearest driving voltage line 1730. Therefore, in the plan view, the second portion P2 of the driving voltage line 1730 in the opening 127OP in the pixel limiting layer 127 and the fourth portion P4 of the data line 1710G in the opening 127OP in the pixel limiting layer 127 may have greater curvature.

[0120] Furthermore, when viewed from a direction perpendicular to the substrate, such as Figure 6 As shown, the driving voltage line 1730 may further include a fifth portion P5. Similar to the second portion P2, the fifth portion P5 may overlap with the opening 127OP in the pixel defining layer 127. In the plan view, the fifth portion P5 may be spaced apart from the second portion P2 in the opening 127OP in the pixel defining layer 127, but similar to the second portion P2, it may be connected to the first portion P1. In other words, the driving voltage line 1730 may be branched into the second portion P2 and the fifth portion P5.

[0121] Part P5 can have a curved shape. For example, part P5 can have a repeating curved shape. Figure 6 In the diagram, the fifth part, P5, is shown as having a waveform. This is because the portion of the conductive layer located in the opening 127OP within the pixel-defining layer 127 has a waveform as shown... Figure 10 The curved shape shown in the diagram allows the display panel 10 according to this embodiment to significantly enhance the user's image visibility. This design enables the display panel to present high-resolution images even in the presence of reflected light caused by external light sources.

[0122] The second portion P2 included in the drive voltage line 1730 may have a first protrusion protruding in the direction (+x direction) toward the nearest data line 1710G, and the fifth portion P5 of the drive voltage line 1730 may also have a third protrusion protruding in the direction (+x direction) toward the data line 1710G. For example... Figure 6As shown, the first imaginary straight line IL that passes through the first protrusion and extends perpendicularly to the direction of the drive voltage line 1730 (y-axis direction) can be aligned with the third imaginary straight line IL that passes through the third protrusion and extends perpendicularly to the direction of the data line 1710G (y-axis direction).

[0123] The second portion P2 in the driving voltage line 1730 may have multiple first protrusions protruding in the direction (+x direction) toward the nearest data line 1710G, and the fifth portion P5 of the driving voltage line 1730 may also have multiple third protrusions protruding in the direction (+x direction) toward the data line 1710G. As a result, in a plan view, the second portion P2 and the fifth portion P5 of the driving voltage line 1730 located in the opening 127OP in the pixel defining layer 127 may exhibit increased curvature.

[0124] Figure 11 This is a schematic plan view illustrating a portion of a display panel 10 according to an embodiment of the present disclosure. Figure 11 As shown, a first imaginary straight line IL1, extending approximately y-axis and passing through the first protrusion of the second portion P2 of the driving voltage line 1730, and a second imaginary straight line IL2, extending approximately y-axis and passing through the second protrusion of the fourth portion P4 of the data line 1710G, can be spaced apart. This arrangement increases the randomness of the curvature on the upper surface of the pixel electrode 210R, thereby preventing the diffraction of external incident light from concentrating in a specific direction. In this case, a third imaginary straight line, extending approximately y-axis and passing through the third protrusion of the fifth portion P5 of the driving voltage line 1730, can coincide with the first imaginary straight line IL1.

[0125] The second portion P2 of the drive voltage line 1730 may have multiple first protrusions, and the fourth portion P4 of the data line 1710G may have multiple second protrusions. In this case, multiple first imaginary lines IL1 passing through the multiple first protrusions of the second portion P2 of the drive voltage line 1730 and perpendicular to the direction of extension of the drive voltage line 1730 (y-axis direction), and multiple second imaginary lines IL2 passing through the multiple second protrusions of the fourth portion P4 of the data line 1710G and perpendicular to the direction of extension of the drive voltage line 1730 (y-axis direction), may be arranged alternately. In this case, multiple third imaginary lines passing through the third protrusion of the fifth portion P5 of the drive voltage line 1730 and perpendicular to the direction of extension of the drive voltage line 1730 (y-axis direction) may coincide with the multiple first imaginary lines IL1 respectively.

[0126] Figure 12 This is a schematic plan view illustrating a portion of a display panel 10 according to an embodiment of the present disclosure. Figure 12 As shown, the second portion P2 included in the drive voltage line 1730 may have a first protrusion protruding in the direction (+x direction) toward the nearest data line 1710G, and the fourth portion P4 of the data line 1710G may have a second protrusion protruding in the direction (+x direction) away from the nearest drive voltage line 1730. In this case, the radius of curvature of the second portion P2 in the first protrusion and the radius of curvature of the second portion P2 between the first protrusions may be different from each other. Figure 12 In this case, the radius of curvature of the second part P2 within the first protrusion is greater than the radius of curvature of the second part P2 between the first protrusions. Similarly, the radius of curvature of the fourth part P4 within the second protrusion and the radius of curvature of the fourth part P4 between the second protrusions can be different from each other. Figure 12 In the middle, the radius of curvature of the fourth part P4 in the second protrusion is greater than the radius of curvature of the fourth part P4 between the second protrusions.

[0127] Figure 13 This is a plan view schematically illustrating a portion of a display panel 10 according to an embodiment of the present disclosure. Figure 13 and Figure 6 The difference lies in the position of the imaginary straight line IL. This is achieved by allowing a red sub-pixel to be included in the display panel 10, such as... Figure 6 The location shown has an imaginary straight line IL, and allows another red sub-pixel to be positioned as shown. Figure 13 An imaginary straight line IL is shown at the position shown. The position of the imaginary straight line IL throughout the display panel 10 can be different or random. As a result, the visibility of reflected light can be further reduced.

[0128] exist Figure 6 and Figure 13 In this configuration, the second portion P2 within the drive voltage line 1730 may have two first protrusions projecting in a direction (+x direction) toward the nearest data line 1710G, and the fourth portion P4 of the data line 1710G may have two second protrusions projecting in a direction (+x direction) away from the nearest drive voltage line 1730. In other words, Figure 6 The diagram shows that each of the second portion P2 and the fourth portion P4 has a waveform similar to a sine wave traveling in the y-axis direction. For example, each of the second portion P2 and the fourth portion P4 has a sine wave shape of approximately two cycles. However, one or more embodiments are not limited thereto. For example, a plan view of a portion of a display panel 10 according to an embodiment of the present disclosure is shown as schematically illustrating the present disclosure. Figure 14As shown, each of the second part P2 and the fourth part P4 can have a sine wave shape that is approximately one period. Alternatively, each of the second part P2 and the fourth part P4 can have a sine wave shape that is 1.5 periods.

[0129] Figure 15 It is a schematic diagram along Figure 6 A cross-sectional view of the conductive layer intercepted by line A-A'. Figure 15 For convenience, the upper surface of the planarization layer 123 is completely flat. However, as described above, the upper surface of the planarization layer 123 may have a curve that substantially corresponds to the structure of the conductive layer beneath it. As a result, the pixel electrode 210R above the planarization layer 123 may also have a curved shape.

[0130] Figure 16 This is a schematic cross-sectional view of a portion of a display panel 10 according to an embodiment of the present disclosure. Figure 16 As shown, the display panel 10 according to this embodiment may further include auxiliary lines P2', P4' and P5' on layers different from those on which the driving voltage line 1730 and data lines 1710R, 1710G and 1710B are disposed. Figure 16 The diagram shows that auxiliary lines P2', P4', and P5' are located on planarization layer 123, additional planarization layer 125 covers auxiliary lines P2', P4', and P5', and pixel electrode 210R is located on additional planarization layer 125.

[0131] When viewed from a direction perpendicular to the substrate 100 (z-axis direction), auxiliary lines P2', P4', and P5' can be located in the opening 127OP in the pixel defining layer 127 between the driving voltage line 1730 and the data lines 1710R, 1710G, and 1710B. As described above, although the planarization layer 123 reduces the step difference of the driving voltage line 1730 and the data lines 1710R, 1710G, and 1710B, the upper surface of the planarization layer 123 is not completely flat and has a slight curvature corresponding to the driving voltage line 1730 and the data lines 1710R, 1710G, and 1710B. In other words, the upper surface of the planarization layer 123 can have slightly raised portions on the driving voltage line 1730 and the data lines 1710R, 1710G, and 1710B. Furthermore, the portion of the upper surface of the planarization layer 123 between the driving voltage line 1730 and the data lines 1710R, 1710G, and 1710B is slightly recessed. Because the auxiliary lines P2', P4', and P5' are located at the slightly recessed portion, the upper surface of the additional planarization layer 125 can have a flatter shape than the upper surface of the planarization layer 123. Therefore, the pixel electrode 210R can also have a flatter shape. These auxiliary lines P2', P4', and P5' can have electrically isolated island shapes, and therefore, electrical signals can be avoided being applied to them.

[0132] Although the above primarily describes the red pixel electrode 210R, one or more embodiments are not limited thereto. For example, such as Figure 5 As shown, the above-described content related to the red pixel electrode 210R can also be applied to the blue pixel electrode 210B, which is similarly located on the drive voltage line 1730 and data lines 1710G and 1710B. Furthermore, in a planar view, as... Figure 6 As shown, the green pixel electrode 210G can be located within a wider portion of the driving voltage line 1730. In this case, the green pixel electrode 210G is formed flat, thereby preventing the appearance of strong visible reflected light caused by diffraction in the green sub-pixel.

[0133] Although the display panel 10 has been described above, one or more embodiments are not limited thereto, and any electronic device including such a display panel 10 is within the scope of this disclosure. For example, Figure 17 This is a perspective view of the electronic device 1 according to an embodiment. Figure 18 It is an exploded perspective view of electronic device 1, and Figure 19 This is a block diagram schematically illustrating electronic device 1.

[0134] refer to Figure 17 and Figure 18The electronic device 1 according to the embodiment is a device for displaying moving or still images, and can be not only portable electronic devices such as mobile phones, smartphones, tablet PCs, laptops, mobile communication terminals, e-books, portable multimedia players (PMPs), navigators, or ultra-mobile PCs (UMPCs), but also various products such as televisions, monitors, billboards, and Internet of Things (IoT) devices. The electronic device 1 according to the embodiment can also be used in wearable devices such as smartwatches, watch phones, glasses displays, and head-mounted displays (HMDs). The electronic device 1 according to the embodiment can be used as a vehicle dashboard, a central information display (CID) disposed on or on a central dashboard, a rearview mirror display replacing the side mirrors of a vehicle, and / or a display disposed on the rear surface of the front seat for the entertainment of passengers in the rear seats of the vehicle.

[0135] exist Figure 17 and Figure 18 For ease of description, the electronic device 1 according to the embodiment is used in a smartphone. The electronic device 1 according to the embodiment may include a cover window 70, a display panel 10, a data driver 20, a display circuit board 30, a component 40, a main circuit board 50, a bracket 60, a battery 80, and a lower cover 90.

[0136] In the plan view, as used herein, "left," "right," "up," and "down" refer to the direction when viewing the display panel 10 from a direction perpendicular to the display panel 10. For example, "left" refers to the -x direction, "right" refers to the +x direction, "up" refers to the +y direction, and "down" refers to the -y direction.

[0137] In a plan view, electronic device 1 can have a rectangular shape. For example, as shown... Figure 17 As shown, the electronic device 1 can have a rectangular planar shape, which has a short side in the x-direction and a long side in the y-direction. The corner where the short side in the x-direction intersects the long side in the y-direction can be rounded with a certain curvature or formed as a right angle. The planar shape of the electronic device 1 is not limited to a rectangle, and can be formed into other polygonal, elliptical, or irregular shapes.

[0138] The cover window 70 can be disposed above the display panel 10 to cover the upper surface of the display panel 10. As a result, the cover window 70 can protect the upper surface of the display panel 10.

[0139] The cover window 70 may include a transmissive cover unit DA 70 corresponding to the display panel 10 and a light-shielding cover unit NDA 70 surrounding the transmissive cover unit DA 70. The light-shielding cover unit NDA 70 may include an opaque material (e.g., a colored opaque material) that blocks light. The light-shielding cover unit NDA 70 may include a pattern that can be shown to the user when no image is displayed.

[0140] The display panel 10 can be positioned below the cover window 70. The display panel 10 can overlap with the transmission cover unit DA70 of the cover window 70.

[0141] Display panel 10 may include a display area DA. The display area DA is the area on which an image is displayed, and the display area DA may include an area (hereinafter referred to as the "component area") that transmits light or signals emitted from a component 40 disposed below the display panel 10. Component 40 may include sensors and cameras that use visible light, infrared light, or sound.

[0142] Display panel 10 may be a light-emitting display panel including light-emitting diodes (LEDs). The LEDs may include organic light-emitting diodes (OLEDs) containing an organic emitting layer. In some embodiments, the LEDs may be inorganic light-emitting diodes comprising inorganic materials. Inorganic LEDs may include PN junction diodes comprising inorganic semiconductor materials. When a voltage is applied forward to the PN junction diode, holes and electrons can be injected, and the energy generated by the recombination of holes and electrons can be converted into light energy, enabling the emission of light of a specific color. The aforementioned inorganic LEDs may have a width ranging from a few micrometers to several hundred micrometers, and in some embodiments, the inorganic LED may be referred to as a micro LED.

[0143] The display panel 10 can be a rigid display panel that is not easily bent due to its rigidity, or a flexible display panel that is easily bent, folded, or rolled up due to its flexibility. For example, the display panel 10 can be a foldable display panel, a curved display panel with a bendable display surface, a bendable display panel in which the area other than the display surface is bendable, a rollable display panel, or a stretchable display panel.

[0144] Display panel 10 may be a transparent display panel in which an object or background disposed on the lower surface of display panel 10 is visible through the upper surface of display panel 10. Alternatively, display panel 10 may be a reflective display panel in which the object or background can be reflected from the upper surface of display panel 10.

[0145] The data driver 20 can be mounted on the display panel 10 in the form of an integrated circuit (IC). In another embodiment, the data driver 20 can be disposed on the display circuit board 30.

[0146] The display circuit board 30 can be attached to one side of the display panel 10. The display circuit board 30 can be a flexible printed circuit board (FPCB), a rigid printed circuit board (PCB) that is rigid and not easily bent, or a composite printed circuit board including a PCB and an FPCB.

[0147] In this embodiment, the touch sensor driving unit may be disposed on the display circuit board 30. The touch sensor driving unit may be formed as an IC. The touch sensor driving unit may be attached to the display circuit board 30. The touch sensor driving unit may be electrically connected to the touch electrodes of the touch screen layer of the display panel 10 through the display circuit board 30.

[0148] The touchscreen layer of display panel 10 can detect user touch input using at least one of various touch methods, such as resistive film methods and electrostatic capacitance methods. For example, when the touchscreen layer of display panel 10 detects user touch input using an electrostatic capacitance method, the touch sensor driving unit can apply a driving signal to the driving electrode of the touch electrode and detect the voltage charged in the mutual capacitance between the driving electrode and the sensing electrode. This allows the system to determine whether the user has touched the screen. User touch can include contact touch and proximity touch. Contact touch refers to an object such as a user's finger or pen directly touching the overlay window 70 disposed on the touchscreen layer. Proximity touch refers to an object such as a user's finger or pen being positioned near the overlay window 70 (e.g., hovering). The touch sensor driving unit can transmit sensor data to the main processor 510 according to the detected voltage, and the main processor 510 can analyze the sensor data to calculate the touch coordinates on which a touch input has occurred.

[0149] A control unit for supplying driving voltages for driving the pixel, gate driver, and data driver 20 of the display panel 10 can be mounted on the display circuit board 30.

[0150] A bracket 60 for supporting the display panel 10 may be disposed below the display panel 10. The bracket 60 may include plastic, metal, or both plastic and metal. A first camera hole CMH1 into which a camera device 531 is inserted, a battery hole BH into which a battery 80 is disposed, and a wire hole CAH through which wires connected to the display circuit board 30 pass may be provided in the bracket 60. A component hole CPH overlapping with the display panel 10 may be provided in the bracket 60. The component hole CPH may overlap with a component 40 of the main circuit board 50 in the third direction (z-direction). In one embodiment, the display area DA of the display panel 10 may overlap with a component 40 of the main circuit board 50 in the third direction (z-direction). In another embodiment, the component hole CPH may not be provided in the bracket 60.

[0151] In an embodiment, component 40 may include first to fourth components 41, 42, 43, and 44 overlapping with display panel 10. Each of the first to fourth components 41, 42, 43, and 44 may be provided as a proximity sensor, an illumination sensor, an iris sensor, a facial recognition sensor, and a camera (or image sensor). A proximity sensor using infrared light can detect objects positioned near the upper surface of electronic device 1, and an illumination sensor can detect the brightness of light incident on the upper surface of electronic device 1. Additionally, an iris sensor can capture images of the iris of a person located on the upper surface of electronic device 1, and a camera can capture images of objects located on the upper surface of electronic device 1. Component 40 is not limited to proximity sensors, illumination sensors, iris sensors, facial recognition sensors, and cameras, and may include various sensors described below.

[0152] The main circuit board 50 and the battery 80 can be located below the bracket 60. The main circuit board 50 can be a PCB or an FPCB.

[0153] The main circuit board 50 may include a main processor 510, a camera device 531, a main connector 55, and a component 40. The main processor 510 may be formed as an IC. The camera device 531 may be disposed on both the upper and lower surfaces of the main circuit board 50, and each of the main processor 510 and the main connector 55 may be disposed on either the upper or lower surface of the main circuit board 50.

[0154] The main processor 510 can control all functions of the electronic device 1. For example, the main processor 510 can output digital video data to the data driver 20 via the display circuit board 30, thereby displaying an image on the display panel 10. The main processor 510 can receive sensing data from the touch sensor driver unit. The main processor 510 can determine whether the user has touched the device based on the sensing data and perform an operation corresponding to the user's direct touch or proximity touch. The main processor 510 can be an application processor, a central processing unit, or a system-on-a-chip (SoC) including an IC.

[0155] Camera device 531 can process image frames (such as still images or moving images) acquired by an image sensor in camera mode and output the processed image frames to main processor 510. Camera device 531 may include at least one of a camera sensor (e.g., a charge-coupled device (CCD) or complementary metal-oxide-semiconductor (CMOS), a light sensor (or image sensor), and a laser sensor. Camera device 531 can be connected to an image sensor in a component overlapping with display area DA and can process images input to the image sensor.

[0156] The wires that have passed through the wire holes CAH provided in the bracket 60 can be connected to the main connector 55, so that the main connector 55 can be electrically connected to the display board 30.

[0157] In addition to the main processor 510, camera device 531, and main connector 55, the main circuit board 50 may further include Figure 19 The wireless communication unit 520, input unit 530, sensor unit 540, output unit 550, interface unit 560, memory 570 and / or power supply unit 580 shown are included.

[0158] The wireless communication unit 520 may include at least one of the following: a broadcast receiving module 521, a mobile communication module 522, a wireless internet module 523, a short-range communication module 524, and a location information module 525.

[0159] The broadcast receiving module 521 can receive broadcast signals and / or broadcast-related information from an external broadcast management server via a broadcast channel. The broadcast channel may include satellite channels and terrestrial channels.

[0160] The mobile communication module 522 can transmit and receive wireless signals from at least one of a base station, an external terminal, and a server on a mobile communication network established according to mobile communication technology standards or communication schemes (e.g., Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Code Division Multiple Access 2000 (CDMA2000), Enhanced Voice Data Optimized or Enhanced Voice Data Only (EV-DO), Wideband CDMA (WCDMA), High-Speed ​​Downlink Packet Access (HSDPA), High-Speed ​​Uplink Packet Access (HSUPA), Long Term Evolution (LTE), and LTE-A Advanced). The wireless signals may include various forms of data, including voice call signals, video call signals, or text / multimedia message transmission and reception.

[0161] Wireless Internet module 523 refers to a module used for accessing the wireless Internet. Wireless Internet module 523 can be configured to transmit and receive wireless signals over a communication network according to wireless Internet technologies. Wireless Internet technologies may include, for example, Wireless LAN (WLAN), Wi-Fi, Wi-Fi Direct, and Digital Living Network Alliance (DLNA).

[0162] The short-range communication module 524 is used for short-range communication and can be used via Bluetooth. TMThe short-range communication module 524 supports at least one of the following: Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra Wideband (UWB), ZigBee, Near Field Communication (NFC), Wi-Fi, Wi-Fi Direct, and Wireless Universal Serial Bus (Wireless USB). The short-range communication module 524 can support wireless communication between electronic device 1 and a wireless communication system, between electronic device 1 and another electronic device, or between electronic device 1 and the network where another electronic device (or an external server) is located, via a short-range wireless communication network (wireless local area network). The short-range wireless communication network can be a short-range wireless personal communication network (e.g., a wireless personal area network). The other electronic device can be a wearable device capable of exchanging (or linking) data with electronic device 1.

[0163] The location information module 525 is a module for obtaining the location (or current location) of the electronic device 1, and may include a Global Positioning System (GPS) module or a Wi-Fi module.

[0164] The input unit 530 may include an image input unit (such as a camera device 531) for receiving image signals, an audio input unit (such as a microphone 532) for receiving audio signals, and an input device 533 for receiving information from a user.

[0165] Camera device 531 can process image frames (such as still images or moving images) acquired by the image sensor in video call mode or shooting mode. The processed image frames can be displayed on display panel 10 or stored in memory 570.

[0166] Microphone 532 can process external audio signals into electronic voice data. The processed electronic voice data can be used differently depending on the function being performed (or the application being run) in electronic device 1.

[0167] The main processor 510 can control the operation of the electronic device 1 to correspond to information received through the input device 533. The input device 533 may include mechanical input devices or touch input devices such as buttons, dome switches, microwheels, or microswitches located on the rear or side surface of the electronic device 1. The touch input device may include the touch screen layer of the display panel 10.

[0168] Sensor unit 540 may include one or more sensors that sense at least one of the following: information within electronic device 1, information about the surrounding environment of electronic device 1, and user information, and generate corresponding sensing signals. Based on the aforementioned sensing signals, main processor 510 may control the driving or operation of electronic device 1, or perform data processing, functions, or operations related to applications installed on electronic device 1. Sensor unit 540 may include at least one of the following: proximity sensor, lighting sensor, accelerometer, magnetic sensor, G-sensor, gyroscope sensor, motion sensor, RGB sensor, infrared (IR) sensor, finger scanning sensor, ultrasonic sensor, optical sensor, battery level meter, environmental sensor (e.g., barometer, hygrometer, thermometer, radiation detection sensor, thermal detection sensor, or gas detection sensor), and chemical sensor (e.g., electronic nose, health sensor, or biometric sensor).

[0169] The output unit 550 is designed to generate outputs related to vision, hearing or touch, and may include at least one of the display panel 10, audio output unit 551, haptic module 552 and light output unit 553.

[0170] Display panel 10 can display (or output) information processed in electronic device 1. For example, display panel 10 can display execution screen information of an application running in electronic device 1, user interface (UI) or graphical user interface (GUI) information based on the execution screen information. Display panel 10 may include a display layer for displaying images and a touch screen layer for detecting user touch input. As a result, display panel 10 can be used as one of the input devices 533 that provide an input interface between electronic device 1 and the user, and simultaneously, it can be used as one of the output units 550 that provide an output interface between electronic device 1 and the user.

[0171] In call signal receiving mode, call mode, recording mode, voice recognition mode, or broadcast receiving mode, audio output unit 551 can output audio data received from wireless communication unit 520 or stored in memory 570. Audio output unit 551 can also output audio signals related to functions performed in electronic device 1 (e.g., call signal receiving sound and message receiving sound). Audio output unit 551 may include a receiver and a speaker. At least one of the receiver and speaker may be an audio generating device attached to the lower part of display panel 10 to vibrate display panel 10 and output sound. The audio generating device may be a piezoelectric element or piezoelectric actuator that contracts and expands in response to an electrical signal, or it may be an exciter that generates magnetic force by using a voice coil and vibrates display panel 10.

[0172] The haptic module 552 can generate various tactile effects that can be felt by the user. The haptic module 552 can provide vibrations as a tactile effect to the user. The haptic module 552 can provide tactile feedback not only through direct contact but also by stimulating the muscles in the user's fingers or arms, thus allowing them to perceive tactile effects.

[0173] The light output unit 553 can output a signal to notify of an event by using light from a light source. Examples of events occurring in the electronic device 1 may include receiving a message, receiving a call signal, receiving a missed call, an alarm, a schedule reminder, receiving an email, and receiving information through an application. The signal output from the light output unit 553 can be implemented by the electronic device 1 emitting light of one or more colors forward or backward. When the electronic device 1 detects user confirmation of the event, it can terminate the signal output.

[0174] Interface unit 560 can be used as a channel for connecting to various types of external devices of electronic device 1. Interface unit 560 may include at least one of a wired / wireless headphone port, an external charger port, a wired / wireless data port, a memory card port, a port for connecting a device with an identification module, an audio input / output (I / O) port, a video I / O port, and a headphone port. In response to an external device being connected to interface unit 560, electronic device 1 can perform appropriate controls associated with the connected external device.

[0175] Memory 570 can store data supporting various functions of electronic device 1. Memory 570 can store multiple applications running in electronic device 1, as well as data and / or instructions for operating electronic device 1. At least some of the multiple applications can be downloaded from an external server via wireless communication. Memory 570 can store applications for the operation of main processor 510, or can temporarily store input / output data such as phone books, messages, still images, and / or moving images. In addition, memory 570 can store tactile data of various modes of vibration provided to tactile module 552 and audio data about various sounds provided to audio output unit 551. Memory 570 can include at least one type of storage medium selected from flash memory, hard disk, solid-state drive (SSD), silicon disk drive (SDD), multimedia card micro, card memory (e.g., Secure Digital (SD) or Extreme Digital (XD) memory), random access memory (RAM), static RAM (SRAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), programmable ROM (PROM), magnetic storage, magnetic disk, and optical disk.

[0176] Under the control of the main processor 510, the power supply unit 580 can receive external and / or internal power and supply power to each of the components included in the electronic device 1. The power supply unit 580 may include a battery 80. Furthermore, the power supply unit 580 may have a connection port, which may be configured as an example of an interface unit 560 to which an external charger is electrically connected, wherein the external charger supplies power to charge the battery. Alternatively, the power supply unit 580 may be configured to wirelessly charge the battery 80 without using the connection port. The battery 80 may be configured not to overlap with the main circuit board 50 in the third direction (z-direction). The battery 80 may overlap with a battery hole BH provided in the bracket 60.

[0177] The lower cover 90 can form the appearance of the electronic device 1 and may have an opening in its front surface that exposes a portion of the display panel 10. The lower cover 90 may have a shape in which the surface corresponding to the display panel 10 is opened, and may be assembled with the display panel 10. The lower cover 90 may be located on the opposite side of the cover window 70, with the display panel 10 between the lower cover 90 and the cover window 70. The lower cover 90 may be disposed below the main circuit board 50 and the battery 80. The lower cover 90 may be fastened and fixed to the bracket 60. The lower cover 90 can form the appearance of the lower surface of the electronic device 1. The lower cover 90 may include plastic, metal, or both plastic and metal.

[0178] A second camera aperture CMH2 may be provided in the lower cover 90, through which the lower surface of the camera device 531 is exposed. The position of the camera device 531 and the positions of the corresponding first camera aperture CMH1 and second camera aperture CMH2 are not limited to... Figure 17 and Figure 18 The positions of the embodiments shown are as described, and various modifications can be made.

[0179] According to the embodiments configured as described above, a display panel capable of displaying high-quality images and an electronic device including the display panel can be realized. However, the scope of this disclosure is not limited to these effects.

[0180] It should be understood that the embodiments described herein are to be considered in a descriptive sense and not for limiting purposes. The description of features or aspects within each embodiment should be taken into account for other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the figures, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope set forth by the claims.

Claims

1. A display panel, comprising: substrate; Pixel electrodes disposed on the substrate; A pixel defining layer having an opening, wherein the pixel defining layer covers the edge of the pixel electrode, and the opening exposes the center of the pixel electrode; and A first line is located between the substrate and the pixel electrode, and has a first portion overlapping the pixel electrode and the pixel defining layer and a second portion overlapping the opening, wherein the shape of the first portion is different from the shape of the second portion when viewed from a direction perpendicular to the substrate.

2. The display panel according to claim 1, wherein, When viewed from a direction perpendicular to the substrate, the first portion is straight in the direction in which the first line extends, and the second portion is curved.

3. The display panel according to claim 2, wherein, When viewed from a direction perpendicular to the substrate, the second portion is a repeating curve.

4. The display panel according to claim 1, further comprising: The second line is located between the substrate and the pixel electrode and has a third portion and a fourth portion, wherein the third portion overlaps with the pixel electrode and the pixel defining layer, the fourth portion overlaps with the opening, and the shape of the third portion is different from the shape of the fourth portion when viewed from a direction perpendicular to the substrate.

5. The display panel according to claim 4, wherein, When viewed from a direction perpendicular to the substrate, each of the first and third portions is straight in the direction in which the first line extends, and each of the second and fourth portions is curved.

6. The display panel according to claim 5, wherein, When viewed from a direction perpendicular to the substrate, each of the second and fourth portions is a repeating curve.

7. The display panel according to claim 5, wherein, The second part has a first protrusion that protrudes in the direction toward the second line, and the fourth part has a second protrusion that protrudes in the direction away from the first line.

8. The display panel according to claim 7, wherein, A first imaginary straight line passing through the first protrusion and extending in a direction perpendicular to the first line is spaced apart from a second imaginary straight line passing through the second protrusion and extending in a direction perpendicular to the first line.

9. The display panel according to claim 4, wherein, The second portion has a plurality of first protrusions protruding in the direction toward the second line, and the fourth portion has a plurality of second protrusions protruding in the direction away from the first line.

10. The display panel according to claim 9, wherein, A plurality of first imaginary straight lines passing through the plurality of first protrusions and extending perpendicularly to the direction of the first line are spaced apart from a plurality of second imaginary straight lines passing through the plurality of second protrusions and extending perpendicularly to the direction of the first line.

11. The display panel according to claim 10, wherein, The plurality of first imaginary straight lines and the plurality of second imaginary straight lines are arranged alternately in the direction in which the first line extends.

12. The display panel according to claim 4, wherein, The first line includes a drive voltage line, and the second line includes a data line.

13. The display panel according to claim 4, wherein, When viewed from a direction perpendicular to the substrate, the first line has a fifth portion that overlaps with the opening and is spaced apart from the second portion in the opening, wherein the second portion and the fifth portion are connected to the first portion.

14. The display panel according to claim 13, wherein, When viewed from a direction perpendicular to the substrate, each of the first and third portions is straight in the direction in which the first line extends, and each of the second, fourth, and fifth portions is curved.

15. The display panel according to claim 14, wherein, When viewed from a direction perpendicular to the substrate, each of the second, fourth, and fifth portions is a repeating curve.

16. The display panel according to claim 14, wherein, The second portion has a first protrusion protruding in the direction toward the second line, the fifth portion has a third protrusion protruding in the direction toward the second line, and the fourth portion has a second protrusion protruding in the direction away from the first line.

17. The display panel according to claim 16, wherein, A first imaginary line passing through the first protrusion and extending perpendicularly to the direction of the first line is spaced apart from a second imaginary line passing through the second protrusion and extending perpendicularly to the direction of the first line, and a third imaginary line passing through the third protrusion and extending perpendicularly to the direction of the first line coincides with the first imaginary line.

18. The display panel according to claim 14, wherein, The second portion has a plurality of first protrusions protruding in the direction toward the second line, the fifth portion has a plurality of third protrusions protruding in the direction toward the second line, and the fourth portion has a plurality of second protrusions protruding in the direction away from the first line.

19. A display panel, comprising: substrate; Pixel electrodes disposed on the substrate; A pixel defining layer is configured to define an opening exposing a portion of the pixel electrode, wherein the pixel defining layer at least partially covers the pixel electrode; and A wire located between the substrate and the pixel electrode, the wire including a first region overlapping the pixel electrode and the pixel defining layer and a second region overlapping the opening, wherein, in a plan view, the first region has a shape different from that of the second region.

20. An electronic device comprising: Display panel according to any one of claims 1 to 19; as well as The lower cover forms the exterior of the electronic device and has an opening that exposes a portion of the display panel.

Images