Test structure and method for SRAM (Static Random Access Memory) shared contact hole
By testing the contact resistance of the shared contact hole and monitoring the sidewall etching status, the problem that the shared contact hole could not be completely encapsulated by metal silicide was solved, thus improving process stability and SRAM yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-04
- Publication Date
- 2026-03-13
AI Technical Summary
In the Share CT etching process, the mismatch between the Si/SiO2/SiN etching selectivity ratio leads to over-etching of the polysilicon gate sidewalls, causing the shared contact holes to be unable to be completely encapsulated by metal silicides, resulting in device failure and making online monitoring difficult.
A test structure for SRAM shared contact holes is provided. By testing the contact resistance of the shared contact holes, the etching status of the sidewalls is monitored to ensure that the width of the sidewalls before etching is not less than the width of the second metal silicide. A chain structure is used for resistance measurement to monitor the etching status of the sidewalls.
It enables the assessment of the integrity of the metal silicide at the bottom of the shared contact hole, supports online monitoring, and improves process stability and SRAM yield.
Smart Images

Figure CN121666032A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a test structure and method for SRAM shared contact holes. Background Technology
[0002] SRAM (Static Random-Access Memory) is a type of RAM capable of reading and writing data. It uses flip-flops composed of transistors to store data, and the data can be stably stored as long as a power supply is available. Unlike Dynamic Random-Access Memory (DRAM), SRAM does not require periodic refreshing to maintain data.
[0003] In the Share Contact (CT) etching process, etching is performed on the spacer region of the polysilicon gate. The spacers are composite films containing SiO2 and SiN. During the etching process, a mismatch in the Si / SiO2 / SiN etching selectivity can lead to over-etching of the polysilicon gate's spacers by the CT process. Figure 1 As shown, the substrate is exposed between the remaining sidewalls and the metal silicide, which prevents the Share CT from being completely encapsulated by the metal silicide on the active region, thus causing device failure.
[0004] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention
[0005] The purpose of this invention is to provide a test structure and method for SRAM shared contact holes to solve the problem of difficulty in monitoring over-etching phenomenon in Share CT.
[0006] To address the aforementioned technical problems, this invention provides a test structure for SRAM shared contact holes, characterized in that it includes at least one basic unit, wherein the basic unit comprises:
[0007] The active region is defined in the substrate through an isolation structure;
[0008] At least one polysilicon is located on the substrate and spans the boundary between the isolation structure and the active region, with sidewalls attached to both sides of the polysilicon.
[0009] A second metal silicide is disposed on the top surface of the active region;
[0010] A shared contact hole is disposed on the polysilicon, the sidewall, and the second metal silicide. The etching status of the sidewall is monitored by testing the contact resistance of the shared contact hole, wherein the width of the sidewall before etching the shared contact hole is not less than the width of the second metal silicide.
[0011] Preferably, the width of the active region is half the width of the shared contact hole.
[0012] Preferably, the length of the polysilicon is not less than 1.5 times the width of the shared contact hole, and the length direction of the polysilicon is perpendicular to the width direction of the shared contact hole.
[0013] Preferably, a first metal silicide is also formed on the top of the polycrystalline silicon.
[0014] Preferably, the active area is further provided with interconnection contact holes for connecting another basic unit or as a test port.
[0015] Preferably, it includes multiple basic units, which are arranged in a repeating periodic pattern. The basic units are connected to each other through the interconnecting contact holes or shared contact holes and arranged in a chain-like structure.
[0016] A testing method for SRAM shared contact holes employs at least one basic unit, the basic unit including an active region, at least one polysilicon, a second metal silicide, and a shared contact hole. The active region is defined in a substrate by an isolation structure. The polysilicon is located on the substrate and spans the boundary between the isolation structure and the active region. Sidewalls are attached to both sides of the polysilicon. The second metal silicide is disposed on the top surface of the active region. The shared contact hole is disposed on the polysilicon, the sidewalls, and the second metal silicide. Before etching the shared contact hole, the width of the sidewall is not less than the width of the second metal silicide. The contact resistance of the shared contact hole is tested using a two-end method, and the etching status of the sidewall is monitored.
[0017] Preferably, a basic unit is used, and an interconnecting contact hole is provided on the active area of the basic unit. A test voltage is applied to either the interconnecting contact hole or the shared contact hole, and the other is grounded. Based on the test results, the contact resistance of the shared contact hole is obtained, and the etching status of the sidewall is monitored.
[0018] Preferably, multiple basic units are used, and interconnection contact holes are provided on the active area of each basic unit. The basic units are arranged in a repeating periodic manner and are connected to each other through the interconnection contact holes or shared contact holes, and are arranged in a chain structure. A test voltage is applied to one end of the chain structure and the other end is grounded. Based on the test results, the contact resistance of the shared contact hole is obtained to monitor the etching status of the sidewall.
[0019] Preferably, the measured contact resistance of the shared contact hole is denoted as R. C Let Target be the contact resistance of the shared contact hole in the active region, and let Target*0.5≤R C When the value is ≤Target*0.8, the sidewall has been etched.
[0020] In the test structure for SRAM shared contact holes provided by this invention, the contact resistance of the shared contact hole is tested through the test structure, thereby assessing the integrity of the metal silicide at the bottom of the shared contact hole and monitoring the stability of related processes.
[0021] The test method for SRAM shared contact holes provided by this invention and the test structure for SRAM shared contact holes provided by this invention belong to the same inventive concept. Therefore, the test method for SRAM shared contact holes provided by this invention has at least all the advantages of the test structure for SRAM shared contact holes provided by this invention, which will not be repeated here. Attached Figure Description
[0022] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:
[0023] Figure 1 This is an electron microscope image of the metal silicide and sidewalls at the shared contact hole in the prior art;
[0024] Figure 2 This is a top view of an embodiment of the present invention;
[0025] Figure 3 This is a schematic diagram of two centrally symmetrical test units according to an embodiment of the present invention;
[0026] Figure 4 This is a schematic diagram of a test unit according to an embodiment of the present invention;
[0027] Figure 5 It is along Figure 4 A schematic diagram of the cross-sectional structure along the AA direction.
[0028] In the attached image:
[0029] 100, Active region; 200, Polysilicon; 300, Contact hole; 301, Shared contact hole; 302, Interconnect contact hole; 400, Metal layer; 500, First metal silicide; 600, Second metal silicide; 700, Sidewall; 800, Isolation structure. Detailed Implementation
[0030] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0031] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; the term “at least two” is generally used to mean “two or more”; furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," and "third" may explicitly or implicitly include one or at least two of those features. The term "proximal" typically refers to the end closer to the operator, and the term "distal" typically refers to the end closer to the patient. "One end" and "the other end," as well as "proximal" and "distal," generally refer to two corresponding parts, including not only endpoints. The terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can be fixed connections, detachable connections, or integral connections; they can be mechanical connections or electrical connections; they can be direct connections or indirect connections through an intermediate medium; they can be internal connections between two elements or interactions between two elements. Furthermore, as used in this invention, the placement of one element on another element generally only indicates a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of another element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0032] Research has found that, under ideal conditions, after etching the polysilicon gate sidewalls, there is no gap between the remaining sidewall edges and the metal silicide in the active region, and the substrate surface is shielded by the metal silicide and sidewalls. However, due to differences in etching selectivity, the sidewalls may be over-etched, and the metal silicide in the active region may not be able to completely cover the shared contact hole. This can only be detected by FA (Failure Analysis) slicing. This phenomenon of metal silicide not being able to completely cover the shared contact hole is very easy to occur and difficult to detect and monitor online.
[0033] Based on this, the core idea of the present invention is to provide a test structure for SRAM shared contact holes, and to evaluate the integrity of the metal silicide at the bottom of the shared contact holes by testing the contact resistance of the shared contact holes, thereby enabling the monitoring of the stability of related processes.
[0034] For details, please refer to Figures 2-5 This is a schematic diagram of an embodiment of the present invention. Figure 2 As shown, a test structure for an SRAM shared contact hole includes at least one basic unit, the basic unit comprising:
[0035] The active region 100 is defined in the substrate through the isolation structure 800;
[0036] At least one polysilicon 200 is located on the substrate and spans the boundary between the isolation structure 800 and the active region 100, with sidewalls 700 attached to both sides of the polysilicon 200.
[0037] A second metal silicide 600 is disposed on the top surface of the active region 100;
[0038] A shared contact hole 301 is disposed on the polysilicon 200, the sidewall 700, and the second metal silicide 600. The etching status of the sidewall 700 is monitored by testing the contact resistance of the shared contact hole 301. The width of the sidewall 700 before etching the shared contact hole 301 is not less than the width of the second metal silicide 600.
[0039] By providing a test structure for an SRAM shared contact hole, the contact resistance of the shared contact hole 301 is tested, and the degree of encapsulation of the second metal silicide 600 at the bottom of the shared contact hole 301 is monitored to determine whether the sidewall 700 has been etched, supporting inline monitoring. Furthermore, the size of the sidewall 700, i.e., its width, is denoted as L1, and the size of the edge active region 100, i.e., the width of the second metal silicide 600, is denoted as L2, where L1 ≥ L2, to improve the sensitivity of the contact resistance of the shared contact hole 301 to changes in the area of the second metal silicide 600. Figure 3 and Figure 4 The coordinate axes shown here represent the width of the sidewall 700 and the width of the second metal silicide 600, which are their respective lengths in the Y direction.
[0040] The isolation structure 800 is, for example, a shallow trench isolation structure (STI).
[0041] In the test key (TSK) provided by this invention, the length of the shared contact hole 301 is the same as that in the SRAM design. More preferably, the width of the active region 100 is half the width of the shared contact hole 301. Figure 3 and Figure 4 As shown, the width of the active region 100 is the distance between the two isolation structures 800, which is its length in the Y direction, i.e., W1. The width of the shared contact hole 301 is also its length in the Y direction, i.e., W2. The width of the active region 100 is approximately half the width of the conventional shared contact hole 301 to ensure that the resistance of the shared contact hole 301 on the active region 100 is not affected by OVL (Overlay) in the Y direction during testing.
[0042] Specifically, the length of the polysilicon 200 is not less than 1.5 times the width of the shared contact hole 301, and the length direction of the polysilicon 200 is perpendicular to the width direction of the shared contact hole 301.
[0043] Understandably, the length direction of the polysilicon 200 is the X direction, and the width direction of the shared contact hole 301 is the Y direction. Figure 4 The length of the polysilicon 200 is L3, and the width of the shared contact hole 301 is W2. L3 ≥ 1.5W2 to ensure that the test results of the test structure are not affected by the OVL of the shared contact hole 301 along the X direction.
[0044] like Figure 5 As shown, a first metal silicide 500 is also formed on the top of the polysilicon 200. A shared contact hole 301 covers the first metal silicide 500 above the polysilicon 200. Both the first metal silicide 500 and the second metal silicide 600 are used to reduce the contact resistance of the shared contact hole 301.
[0045] like Figure 3 and Figure 4 As shown, the active region 100 is also provided with an interconnecting contact hole 302 for connecting another basic unit or serving as a test port. When there is only one test structure, the resistance is measured using the two-end method. One of the interconnecting contact hole 302 and the shared contact hole 301 is connected to VDD (power supply voltage), and the other is connected to GND (ground), thereby applying a voltage to the test structure and measuring the input current.
[0046] Similarly, the test structure includes multiple basic units, which are arranged in a repeating cycle. The basic units are connected to each other through the interconnecting contact hole 302 or the shared contact hole 301 and are arranged in a chain-like structure.
[0047] More preferably, when setting multiple basic units, the basic units are arranged in, for example... Figure 3As shown, they are placed symmetrically to form a repeating structure, and then the basic units are connected using contact holes 300. The contact holes 300 are connected by a metal layer 400, as shown. Figure 2 As shown in Figure 4, the contact hole 300 includes an interconnecting contact hole 302 and a shared contact hole 301. A basic unit can be provided with interconnecting contact holes 302 and shared contact holes 301 for interconnection with other basic units or as test ports. A basic unit can also have a large active area 100, with two shared contact holes 301 on the active area 100 for interconnection with other basic units. The basic units are arranged into a chain structure through the interconnecting contact holes 302 and shared contact holes 301. The interconnecting contact holes 302 or shared contact holes 301 at both ends of the chain structure are connected to VDD and GND respectively for testing.
[0048] During testing, the contact resistance is measured using the two-end method. The two ends of the chain structure are connected to VDD and GND respectively. The current at the input end is measured, and then the formula R is applied. C =V / I / COUNT, where V represents voltage, I represents current, and COUNT represents the number of blocks. The contact resistance R is calculated from this. C .
[0049] The measured contact resistance of the shared contact hole 301 is R. C Let Target be the contact resistance of the shared contact hole 301 in the active region 100. Since the contact resistance of the shared contact hole 301 with that of the active region 100 without the second metal silicide 600 will reduce the total resistance of the shared contact hole 301, when Target*0.5≤R C When the value is ≤Target*0.8, it is assumed that the sidewall 700 is over-etched, which prevents the second metal silicide 600 from completely covering the shared contact hole 301, resulting in an extra part of parallel resistance.
[0050] Based on the same technical concept, this invention also provides a testing method for SRAM shared contact holes, employing at least one basic unit. The basic unit includes an active region 100, at least one polysilicon 200, a second metal silicide 600, and a shared contact hole 301. The active region 100 is defined in a substrate by an isolation structure 800. The polysilicon 200 is located on the substrate and spans the boundary between the isolation structure 800 and the active region 100. Sidewalls 700 are attached to both sides of the polysilicon 200. The second metal silicide 600 is disposed on the top surface of the active region 100. The shared contact hole 301 is disposed on the polysilicon 200, the sidewalls 700, and the second metal silicide 600. Before etching the shared contact hole 301, the width of the sidewalls 700 is not less than the width of the second metal silicide 600. The contact resistance of the shared contact hole 301 is tested using a two-end method, and the etching status of the sidewalls 700 is monitored.
[0051] In one embodiment, a basic unit is used, and an interconnecting contact hole 302 is also provided on the active region 100 of the basic unit. A test voltage is applied to either the interconnecting contact hole 302 or the shared contact hole 301, and the other is grounded. Based on the test results, the contact resistance of the shared contact hole 301 is obtained, and the etching status of the sidewall 700 is monitored.
[0052] In one embodiment, multiple basic units are used, and the active region 100 of each basic unit is provided with an interconnecting contact hole 302. The basic units are arranged in a repeating periodic manner and are connected to each other through the interconnecting contact hole 302 or a shared contact hole 301, and are arranged in a chain structure. A test voltage is applied to one end of the chain structure and the other end is grounded. Based on the test results, the contact resistance of the shared contact hole 301 is obtained, and the etching status of the sidewall 700 is monitored.
[0053] Let R be the sheet resistance of the second metal silicide 600 in the active region 100. A The sheet resistance of the active region 100 without the second metal silicide 600 is denoted as R. B Since the contact area between the second metal silicide 600 and the active region 100 remains unchanged, its contact resistance R with the shared contact hole 301 remains constant. A The resistance R of the active region 100 without the second metal silicide 600 is a constant value. B The resistance decreases as the degree of over-etching of the sidewall 700 increases. Furthermore, the area exposed after over-etching of the sidewall 700 will not exceed 10% of the area of the second metal silicide 600 on the active region 100. L2 ≥ 0.1 * L1, and R is defined as follows: B For R B _min.
[0054] Typically, R B =10R A Taking the D18 process as an example, R A =7.19 + / - 1.00 ohm / sq, R B =70.86+ / -5.0 ohm / sq, so R B _min= R A Since the total parallel resistance increases with the increase of the individual resistance values, the minimum contact resistance of the shared contact hole 301 is R. A and R B The total parallel resistance in _min is R. C =0.5*R A .
[0055] The measured contact resistance of the shared contact hole 301 is denoted as R.C Let the contact resistance of the shared contact hole 301 on the active region 100 be denoted as Target, which is the contact resistance when the second metal silicide 600 completely encapsulates the shared contact hole 301. Since the normal fluctuation range of the contact resistance of the shared contact hole 301 is within ±20% of Target, R... C The upper limit is set at 80% of Target, where Target * 0.5 ≤ R. C When the value is ≤Target*0.8, the sidewall 700 is over-etched.
[0056] This invention provides a test structure and method for SRAM shared contact holes. The test structure is not affected by the overlap between the shared contact hole 301 and the active region 100, the overlap between the shared contact hole 301 and the GT (Poly design minima), or the overlap between the active region 100 and the GT. It can accurately pinpoint process problems of the metal silicide at the bottom of the shared contact hole SCT, which helps to improve SRAM yield and monitor yield.
[0057] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.
Claims
1. A test structure for SRAM shared contact holes, characterized in that, It includes at least one basic unit, said basic unit comprising: The active region is defined in the substrate through an isolation structure; At least one polysilicon is located on the substrate and spans the boundary between the isolation structure and the active region, with sidewalls attached to both sides of the polysilicon. A second metal silicide is disposed on the top surface of the active region; A shared contact hole is disposed on the polysilicon, the sidewall, and the second metal silicide. The etching status of the sidewall is monitored by testing the contact resistance of the shared contact hole, wherein the width of the sidewall before etching the shared contact hole is not less than the width of the second metal silicide.
2. The test structure for the SRAM shared contact hole according to claim 1, characterized in that, The width of the active region is half the width of the shared contact hole.
3. The test structure for the SRAM shared contact hole according to claim 1, characterized in that, The length of the polysilicon is not less than 1.5 times the width of the shared contact hole, and the length direction of the polysilicon is perpendicular to the width direction of the shared contact hole.
4. The test structure for the SRAM shared contact hole according to claim 1, characterized in that, A first metal silicide is also formed on top of the polycrystalline silicon.
5. The test structure for the SRAM shared contact hole according to claim 1, characterized in that, The active area is also provided with interconnection contact holes for connecting to another basic unit or as a test port.
6. The test structure for the SRAM shared contact hole according to claim 5, characterized in that, It includes multiple basic units, which are arranged in a repeating cycle. The basic units are connected to each other through interconnecting contact holes or shared contact holes and arranged in a chain-like structure.
7. A test method for SRAM shared contact holes, characterized in that, At least one basic unit is used, the basic unit including an active region, at least one polysilicon, a second metal silicide, and a shared contact hole. The active region is defined in the substrate by an isolation structure. The polysilicon is located on the substrate and spans the boundary between the isolation structure and the active region. Sidewalls are attached to both sides of the polysilicon. The second metal silicide is disposed on the top surface of the active region. The shared contact hole is disposed on the polysilicon, the sidewalls, and the second metal silicide. The width of the sidewall before etching the shared contact hole is not less than the width of the second metal silicide. The contact resistance of the shared contact hole is tested using the two-end method, and the etching status of the sidewall is monitored.
8. The test method for SRAM shared contact holes according to claim 7, characterized in that, A basic unit is used, and an interconnecting contact hole is provided on the active area of the basic unit. A test voltage is applied to either the interconnecting contact hole or the shared contact hole, and the other is grounded. Based on the test results, the contact resistance of the shared contact hole is obtained, and the etching status of the sidewall is monitored.
9. The test method for SRAM shared contact holes according to claim 7, characterized in that, Multiple basic units are employed, and interconnection contact holes are provided on the active area of each basic unit. The basic units are arranged in a repeating cycle and are connected to each other through the interconnection contact holes or shared contact holes, and are arranged in a chain structure. A test voltage is applied to one end of the chain structure and the other end is grounded. Based on the test results, the contact resistance of the shared contact hole is obtained, and the etching status of the sidewall is monitored.
10. The test method for SRAM shared contact holes according to claim 7, characterized in that, The measured contact resistance of the shared contact hole is denoted as R. C Let Target be the contact resistance of the shared contact hole in the active region, and let Target*0.5≤R C When the value is ≤Target*0.8, the sidewall has been etched.