Method for improving CDU of active area in BCD technology

Abstract

The invention discloses a method for improving the CDU of an active region in a BCD process. The method comprises the following steps: sequentially depositing a buffer oxide layer, a SiN layer and a SiON layer on a silicon substrate; forming a shallow isolation trench on the silicon substrate through photoetching and etching processes; forming a high-temperature oxidation layer through a thermal oxidation process; removing a surface oxide layer formed on the surface of the SiON layer in the thermal oxidation process; and forming a deep isolation groove through a photoetching process so as to define an active region. According to the invention, the surface oxide layer formed on the surface of the SiON layer in the thermal oxidation process is removed, so that the anti-reflection performance of SiON is recovered; the DOF of active region photoetching is obviously improved, a process window is expanded, the CDU of an active region pattern is improved, the pattern deviation is reduced, and the consistency and the yield of the device are improved; and the process is simple, is compatible with the existing BCD platform process, and has high industrial practicability.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor integrated circuit manufacturing, and in particular relates to a method for improving the active region CDU in BCD process. Background Technology

[0002] BCD (Block Component Delivery) is a single-chip integration technology that enables the simultaneous fabrication of three different types of devices on a single chip. In the BCD process platform, the AA (Active Area) region is the core area for device formation, and its patterned CDU (Critical Dimension Uniformity) directly affects the consistency of device performance and wafer yield. However, in actual manufacturing, the DOF (Depth of Focus) of AA lithography is typically only 0.2μm, resulting in a narrow process window that easily leads to problems such as pattern distortion, bridging, or open circuits, severely impacting product yield and consistency. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is to provide a method for improving the active region CDU in BCD process.

[0004] To solve the above-mentioned technical problems, the present invention provides the following technical solution: A method for improving the active region CDU in a BCD process includes the following steps: S100, A buffer oxide layer, a SiN layer, and a SiON layer are sequentially deposited on a silicon substrate; S200: Shallow isolation trenches are formed on a silicon substrate through photolithography and etching processes; S300, a high-temperature oxide layer is formed through a thermal oxidation process; S400: Removes the surface oxide layer formed on the surface of the SiON layer during the thermal oxidation process; S500 uses photolithography to form deep isolation trenches, thereby defining the active region.

[0005] Furthermore, in step S100, the temperature at which the buffer oxide layer is deposited is 830℃~870℃, and the thickness of the buffer oxide layer is 110A±10A.

[0006] Furthermore, in step S100, the temperature for depositing the SiN layer is 750℃~770℃, the deposition rate is 20A / min~30A / min, and the thickness of the SiN layer is 1625A±160A.

[0007] Furthermore, in step S100, the temperature for depositing the SiON layer is 390℃~410℃, the deposition time is 7s~8s, and the thickness of the SiON layer is 320ű20Å.

[0008] Furthermore, step S200 includes the following sub-steps: S210. A photoresist layer is applied to the SiON layer; S220. Expose the shallow isolation trench pattern onto the photoresist layer to obtain the photoresist pattern; S230. Using shallow isolation trench patterns, SiON layer, SiN layer and buffer oxide layer are etched sequentially to form mask pattern; S240. Shallow isolation trenches are formed on a silicon substrate by etching using a mask pattern; S250, Remove the photoresist layer.

[0009] Furthermore, in step S300, the thermal oxidation process adopts a wet oxidation process with a temperature of 960℃~1000℃, and the thickness of the high-temperature oxide layer is 1000A±100A.

[0010] Furthermore, in step S400, the surface oxide layer formed on the surface of the SiON layer during the thermal oxidation process is removed using the HF DIP process.

[0011] Furthermore, the HF DIP process takes 8 to 12 minutes.

[0012] Furthermore, by removing the surface oxide layer formed on the SiON layer during the thermal oxidation process, the focal depth of the CDU in the active area photolithography process can reach 0.6.

[0013] Furthermore, by removing the surface oxide layer formed on the SiON layer during the thermal oxidation process, the critical size of the active region remains at 220nm ± 10nm when the focal length of the photolithography exposure varies within the range of ±0.3.

[0014] In this invention, by retaining the SiON layer in situ and combining it with HF Dip treatment, the surface oxide layer is effectively removed, restoring the anti-reflection properties of SiON; the DOF of AA lithography is significantly improved from 0.2μm to 0.6μm, expanding the process window; the CDU of AA patterns is improved, reducing pattern deviation and improving device consistency and yield; and the process is simple, compatible with existing BCD platform processes, and has high industrial applicability. Attached Figure Description

[0015] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a flowchart of an embodiment of the method for improving the active region CDU in the BCD process of the present invention.

[0016] Figure 2 This is a process flow diagram of the AA loop in the existing technology.

[0017] Figure 3 P1-Dense variability plot for four experimental results.

[0018] Figure 4 The graph shows the variability of P2-Iso for the four experimental results. Detailed Implementation

[0019] The following specific examples illustrate the implementation of the present invention. The illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0020] Please see Figure 1 , Figure 1 This is a flowchart of an embodiment of the method for improving the active region CDU in the BCD process of the present invention. The method for improving the active region CDU in the BCD process of this embodiment includes the following steps: S100. A buffer oxide layer (i.e., pad oxide), a SiN layer, and a SiON layer are sequentially deposited on the silicon substrate. These layers are used to form a hard mask. The buffer oxide layer is composed of silicon dioxide and primarily serves as a stress buffer, etching barrier, and interface protection. The buffer oxide layer is typically deposited in an oxidation furnace at a temperature of 830℃ to 870℃, preferably 850℃. The thickness of the buffer oxide layer is preferably 110 Å ± 10 Å.

[0021] The SiN layer is primarily used as a stop layer during subsequent chemical mechanical polishing. The SiN layer is typically deposited in an oxidation furnace at a temperature of 750℃ to 770℃, preferably 760℃. The deposition rate of the SiN layer is 20 Å / min to 30 Å / min, and the deposition time is 40 min to 55 min. The thickness of the SiN layer is 1625 Å ± 160 Å.

[0022] The SiON layer is primarily used to form an anti-reflective layer during photolithography to reduce standing wave effects. The SiON layer can be deposited using CVD (Chemical Vapor Deposition). CVD is a thin film deposition technique used to prepare high-purity, high-performance solid materials. Its core process involves introducing one or more gaseous reactants containing elements constituting the thin film into a reaction chamber, where a chemical reaction occurs on the surface of a substrate (such as a silicon wafer), generating a solid product that is deposited on the substrate, thus forming a thin film. The deposition temperature of the SiON layer is 390℃~410℃, preferably 400℃. The deposition time of the SiON layer is 7s~8s. The thickness of the SiON layer is 320ű20Å.

[0023] S200. Shallow isolation trenches are formed on the silicon substrate using photolithography and etching processes. This step includes the following sub-steps: S210. A photoresist layer is applied to the SiON layer as a template for subsequent photolithography.

[0024] S220. Expose the shallow isolation trench pattern onto the photoresist layer to obtain the photoresist pattern, which will facilitate subsequent etching of the hard mask.

[0025] S230. Using shallow isolation trench patterns, the SiON layer, SiN layer and buffer oxide layer are etched sequentially to form a mask pattern.

[0026] S240. Shallow isolation trenches are formed on a silicon substrate by etching using a mask pattern. The shallow isolation trenches are used for subsequent filling with an isolation medium (e.g., silicon dioxide) to form ST2 (Shallow Trench).

[0027] In standard ST processes, isolation trenches typically require only one photolithography and etching step. However, when manufacturing more complex, high-performance devices, it may be necessary to create isolation trenches with different depths or widths to optimize the performance of different functional areas. In this case, a single shallow trench cannot meet all requirements, thus introducing "dual shallow trench" or "multiple shallow trench" processes. ST2 (Shallow Trench 2) refers to the second photolithography and etching step in this process sequence to form a second type of shallow trench. As a key breakdown structure for high-voltage devices, ST2 optimizes the surface electric field, smooths the electric field distribution, and improves the breakdown voltage.

[0028] S250, Remove the photoresist layer.

[0029] S300. A high-temperature oxide layer is formed through a thermal oxidation process. The thermal oxidation process is a wet oxidation process, which can be completed in an oxidation furnace. The process temperature is 960℃~1000℃, preferably 980℃. The thickness of the high-temperature oxide layer is 1000ű100Å. The high-temperature oxide layer mainly has the following functions: (1) Repair etching damage and passivate silicon surface; (2) Round the groove corner to optimize the electric field; (3) Forming barrier adhesive layers; (4) Improved filling quality: the smoothing reduces the aspect ratio, which is more conducive to subsequent HDP filling.

[0030] S400: Remove the surface oxide layer formed on the SiON layer during the thermal oxidation process. In this embodiment, the HF DIP process is used to remove the surface oxide layer formed on the SiON layer during the thermal oxidation process. The HF DIP process takes 8 to 12 minutes, preferably 10 minutes. By removing the surface oxide layer formed on the SiON layer during the thermal oxidation process, the DOF of the AA PHOTO's CDU reaches 0.6; and when the focal length of the photolithography exposure varies within the range of ±0.3, the AA CD remains at 220nm ±10nm. The specific reasons and processes are as follows: Figure 2 The diagram shows the process flow of the AA loop in the existing technology. When investigating the cause of the CDU difference in AA, it was suspected that the SION, a critical anti-reflection layer in photolithography, had a different result. Since the SION underwent ST2 high-temperature oxidation, it changed. To investigate what specific changes occurred, the SION was monitored before and after ST2 high-temperature oxidation, as shown in Table 1. The monitored parameters included thickness (THK), measurement confidence level (GOF), and material properties (N, K).

[0031] Table 1. SION thickness measured before and after ST2 oxidation

[0032] The GOF values ​​were all greater than 0.95, indicating that the measurement of the SION film thickness was reliable. Secondly, the SION film thickness (THK) decreased from 318.23 Å ​​to 263.64 Å, a reduction of 54.59 Å. This means that the SION was converted into other substances with N and K values ​​of 1.78 and 0.25 respectively after being processed in a high-temperature furnace. This is very likely the fundamental reason why the AA PHOTO DOF was only 0.2.

[0033] In summary, through repeatable experiments on the AA loop, and focusing on the thickness and N, K values ​​of the SION layer before and after high-temperature oxidation of the ST2 loop, it is clear that the fundamental reason for the deterioration of AA photo DOF is likely due to changes in the anti-reflective layer (SION), which plays a crucial role in photo editing. Next, to further verify this hypothesis, the SION layer on the surface was treated after high-temperature oxidation of the ST2 loop.

[0034] Determining the product of SION after high-temperature oxidation at ST2 is crucial for solving AA CDU. SION reacts with oxygen at high temperatures, with the primary product being silicon dioxide and the release of nitrogen gas. This process is essentially an oxidation process in which nitrogen is "expelled." This is because, in a high-temperature, oxygen-rich environment, the silicon-oxygen bond is far more stable than the silicon-nitrogen bond. Therefore, oxygen preferentially combines with silicon, disrupting the Si-N bonds in the original Si-ON network structure. The reaction process is as follows: oxygen diffuses into the SION material, undergoing the following changes: oxygen attacks the Si-N bonds, converting them into more stable Si-O bonds; the substituted nitrogen atoms combine to form nitrogen molecules; and nitrogen gas diffuses out of the material. A simplified equation for this reaction can be expressed as follows: The reaction is primarily thermodynamically driven. Silica is the most stable silicon compound in an oxygen-rich environment. SiON materials are stable in oxygen-free or inert environments, but under high temperatures and with sufficient oxygen, they transform into their lowest energy state, producing SiO2 and N2. Furthermore, SiO2 has an N value of 1.57 and a K value of 2.4 at 248 nm, and the oxidation products fall between those of SION and SiO2, consistent with the hypothesis that it is a mixture of SION and SiO2.

[0035] Therefore, following this direction, the silicon wafer was processed using the HF DIP process. HF DIP refers to a wet process in semiconductor chip manufacturing that uses a dilute hydrofluoric acid solution for immersion cleaning or etching. HF stands for hydrofluoric acid, an extremely important and hazardous chemical reagent in semiconductor manufacturing. Its key characteristic is its ability to react chemically with and dissolve silicon dioxide. DIP stands for immersion, referring to the process of immersing the entire silicon wafer in a chemical bath. The HF DIP process is a standardized wet process that immerses the silicon wafer in a dilute hydrofluoric acid solution of a specific concentration and temperature to achieve a predetermined cleaning or etching purpose.

[0036] This embodiment designed an HF DIP process with a 2-minute interval between 0 and 10 minutes and conducted experiments, as shown in Table 2. The focus was on the impact on the uniformity of the AA PHOTO CD (critical dimension of the active area lithography process). The metric for AA PHOTOCDU is DOF, which in lithography refers to the tolerance range of defocus on the silicon wafer surface during exposure, ensuring the critical dimensions and shape of the pattern remain within acceptable limits. Specifically, when the exposure focal length varies from ±0.3 nm, the AA CD should remain within 220 nm ± 10 nm.

[0037] Table 2. Effect of HF DIP on DOF

[0038] In the HF DIP Recipe, the processing time is 2 min for H2MRCAM5M, 4 min for H4MRCAM5M, 6 min for H6MRCAM5M, 8 min for H8MRCAM5M, and 10 min for H10MRCAM5M. Based on the experimental results, the AA PHOTO DOF value is highest under the conditions of H8MRCAM5M and H10MRCAM5M. However, whether H12MRCAM5M will further increase the AA PHOTO DOF needs to be verified through further experiments. Therefore, using A4S046Wafer as the experimental target, experiments of 8 min, 10 min, and 12 min were further designed, and its AA PHOTO CD Fullmap was monitored. The experimental results are shown in Table 3.

[0039] Table 3. Impact of the second round of HF DIP on DOF

[0040] Wherein, #7, #8, #9, and #10 are wafer numbers of silicon wafers. Silicon wafers #7, #8, #9, and #10 were processed using HF DIP for 8 minutes, 10 minutes, 10 minutes, and 12 minutes, respectively. The uniformity of the AA PHOTO CD dense layer was then characterized. The standard deviation of HF DIP for 10 minutes was approximately 3.5, which was superior to HF DIP for 8 minutes and 12 minutes. The uniformity of the AA PHOTO CD PCM was also characterized, with values ​​of 16.78 and 13.14, both superior to HF DIP for 8 minutes and 12 minutes. Figure 3 and Figure 4As shown, silicon wafers #8 and #9 are more convergent than silicon wafers #7 and #10.

[0041] In step S500, a deep isolation trench is formed using photolithography, thereby defining the active region and forming an AA pattern with good CDU. The process of forming the deep isolation trench using photolithography is basically the same as the process of forming the shallow trench isolation in step S200, and will not be described in detail here.

[0042] In this embodiment, a new step of HF DIP for 10 min is added to the original flowchart, increasing the DOF of the AA PHOTO CDU from 0.2 to 0.6. This step is crucial for improving the interface state of the SION surface and for leveraging the SION as an anti-reflective layer. Compared with the prior art, this embodiment has the following advantages: (1) By retaining the SiON layer in situ and combining it with HF Dip treatment, the surface oxide layer was effectively removed and the anti-reflection properties of SiON were restored. (2) Significantly improved the DOF of AA lithography from 0.2 μm to 0.6 μm, expanding the process window; (3) Improved the CDU of AA pattern, reduced pattern deviation, and improved device consistency and yield; (4) The process is simple, compatible with existing BCD platform processes, and has high industrial applicability.

[0043] The above embodiments merely illustrate preferred implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention should be determined by the appended claims.

Claims

1. A method for improving the active region CDU in a BCD process, characterized in that, Includes the following steps: S100, A buffer oxide layer, a SiN layer, and a SiON layer are sequentially deposited on a silicon substrate; S200: Shallow isolation trenches are formed on a silicon substrate through photolithography and etching processes; S300, a high-temperature oxide layer is formed through a thermal oxidation process; S400: Removes the surface oxide layer formed on the surface of the SiON layer during the thermal oxidation process; S500 uses photolithography to form deep isolation trenches, thereby defining the active region.

2. The method for improving the active region CDU in the BCD process as described in claim 1, characterized in that: In step S100, the temperature at which the buffer oxide layer is deposited is 830℃~870℃, and the thickness of the buffer oxide layer is 110A±10A.

3. The method for improving the active region CDU in the BCD process as described in claim 1, characterized in that: In step S100, the temperature for depositing the SiN layer is 750℃~770℃, the deposition rate is 20A / min~30A / min, and the thickness of the SiN layer is 1625A±160A.

4. The method for improving the active region CDU in the BCD process as described in claim 1, characterized in that: In step S100, the temperature for depositing the SiON layer is 390℃~410℃, and the deposition time is 7s~8s / min; the thickness of the SiON layer is 320ű20Å.

5. The method for improving the active region CDU in the BCD process as described in claim 1, characterized in that, Step S200 includes the following sub-steps: S210. A photoresist layer is applied to the SiON layer; S220. Expose the shallow isolation trench pattern onto the photoresist layer to obtain the photoresist pattern; S230. Using shallow isolation trench patterns, SiON layer, SiN layer and buffer oxide layer are etched sequentially to form mask pattern; S240. Shallow isolation trenches are formed on a silicon substrate by etching using a mask pattern; S250, Remove the photoresist layer.

6. The method for improving the active region CDU in the BCD process as described in claim 1, characterized in that, In step S300, the thermal oxidation process adopts a wet oxidation process with a temperature of 960℃~1000℃ and the thickness of the high-temperature oxide layer is 1000A±100A.

7. The method for improving the active region CDU in the BCD process according to any one of claims 1 to 6, characterized in that: In step S400, the HF DIP process is used to remove the surface oxide layer formed on the SiON layer during the thermal oxidation process.

8. The method for improving the active region CDU in the BCD process as described in claim 7, characterized in that: The time for the HF DIP process is 8 to 12 minutes.

9. The method for improving the active region CDU in the BCD process according to any one of claims 1 to 6, characterized in that: By removing the surface oxide layer formed on the SiON layer during the thermal oxidation process, the depth of focus of the CDU in the active area photolithography process can reach 0.

6.

10. The method for improving the active region CDU in the BCD process according to any one of claims 1 to 6, characterized in that: By removing the surface oxide layer formed on the SiON layer during the thermal oxidation process, the critical size of the active region remains at 220nm ± 10nm when the focal length of the photolithography exposure varies within the range of ±0.3.

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