Membrane-based microelectromechanical system (MEMS) devices and methods of making

By incorporating a cavity groove and support pillar structure arranged on the substrate, combined with a dielectric layer and isolation ring design, and through precise control of gap and thermal stress mismatch, excellent electrical isolation performance and good thermal matching are achieved. This reduces parasitic capacitance during detection, improves electromechanical conversion sensitivity, and enables vertical interconnection and output of multiple independent signals. This solves the signal crosstalk problem in the manufacturing and packaging process of traditional MEMS devices, and improves the performance and reliability of the devices.

CN121672409BActive Publication Date: 2026-05-08PEKING UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
PEKING UNIV
Filing Date
2026-02-05
Publication Date
2026-05-08

AI Technical Summary

Technical Problem

Traditional MEMS devices suffer from problems such as large parasitic capacitance during manufacturing and packaging, poor electromechanical conversion sensitivity, poor thermal matching, thermal stress mismatch, and signal crosstalk, making it difficult to achieve high performance, high reliability, and low cost in mass production.

Method used

By employing an alternating cavity groove and support pillar structure within the substrate, combined with dielectric layer and isolation ring design, and through precise control of gaps and thermal stress, excellent electrical isolation performance and good thermal matching are achieved, reducing parasitic capacitance and improving electromechanical conversion sensitivity. At the same time, the bonding of semiconductor pillars and support pillars provides a vertical signal lead-out channel.

Benefits of technology

It effectively reduces parasitic capacitance during detection, improves electromechanical conversion sensitivity, enhances electrical isolation performance and reliability, and improves device yield and long-term reliability. While reducing parasitic capacitance during detection, it also achieves the reliability and stability of signals from the vertical interconnection output channels of multiple independent signals.

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Abstract

The present disclosure relates to the technical field of semiconductor manufacturing, and particularly relates to a MEMS device and a preparation method thereof. The MEMS device comprises a substrate, a device layer and a cap layer which are sequentially adjacent along a first direction; the substrate comprises cavity grooves and support columns which are alternately arranged along a second direction; the cap layer comprises a substrate and a plurality of semiconductor columns which penetrate the substrate along the first direction, and the semiconductor columns are isolated from the substrate by isolation rings surrounding the semiconductor columns; the device layer comprises a first driving electrode, a first movable driving comb, a first beam, a first anchor point, a second beam, a first movable detection comb and a first detection electrode which are sequentially arranged along the second direction; and the first movable driving comb is connected with the first anchor point through the first beam. At least a MEMS device with excellent electrical isolation performance, good thermal matching and high electromechanical conversion sensitivity can be provided, and while realizing multi-path independent signal vertical interconnection and output, signal crosstalk caused by excessive parasitic capacitance is avoided.
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Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a MEMS device and a method for fabricating the same. Background Technology

[0002] In the manufacturing and packaging of Micro Electro-Mechanical Systems (MEMS) devices, wafer-level packaging technology is one of the key technologies for achieving miniaturization, high performance, high reliability, and low-cost mass production. As various application scenarios place increasingly higher demands on device performance, reliability, and cost control, traditional MEMS manufacturing and packaging processes are facing increasingly severe challenges.

[0003] In terms of device structure, the gap between the movable structure and the substrate in traditional MEMS devices is small and difficult to control, resulting in large parasitic capacitance and reduced electromechanical conversion sensitivity. Vertical interconnection of electrical signals is the core link to achieve three-dimensional integration and high-density packaging, but through-silicon via (TSV) technology is prone to interface cracking or insulation layer failure. Summary of the Invention

[0004] According to various embodiments of this disclosure, a MEMS device and its fabrication method are provided, which can at least provide a MEMS device with excellent electrical isolation performance, good thermal matching, and high electromechanical conversion sensitivity, so as to realize the vertical interconnection and output of multiple independent signals while avoiding signal crosstalk caused by excessive parasitic capacitance.

[0005] According to some embodiments, a first aspect of this disclosure provides a MEMS device, including a substrate, a device layer, and a capping layer sequentially adjacent to each other along a first direction; the substrate includes cavity recesses and support pillars alternately arranged along a second direction; the capping layer includes a substrate and a plurality of semiconductor pillars penetrating the substrate along the first direction, the semiconductor pillars being isolated from the substrate by an isolation ring surrounding the semiconductor pillars; the device layer includes a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode sequentially arranged along the second direction; the first movable driving comb tooth is connected to the first anchor point via the first beam; the first movable detection comb tooth is connected to the first anchor point via the second beam; the first movable driving comb tooth and the first movable detection comb tooth move under the drive of an electric field force between the first driving electrode and the first detection electrode; the first driving electrode, the first anchor point, and the first detection electrode are respectively bonded to the support pillars and semiconductor pillars adjacent to each other along the first direction.

[0006] The MEMS device in the above embodiments defines multiple semiconductor pillars by multiple isolation rings extending along the direction perpendicular to the substrate and penetrating the substrate, providing a vertical signal output channel. This not only effectively reduces thermal stress mismatch between the substrate and the isolation rings but also effectively avoids problems with poor electrical insulation, improving electrical isolation performance while reducing parasitic capacitance. The substrate includes alternating cavity grooves and support pillars along a second direction. At least by precisely controlling the recess depth of the cavity grooves, the gap between the movable structure of the MEMS device and the substrate can be precisely controlled, reducing detection parasitic capacitance while improving electromechanical conversion sensitivity. The first driving electrode, the first anchor point, and the first detection electrode are respectively bonded to the support pillars and semiconductor pillars adjacent to them along the first direction, providing good support for the movable structure of the MEMS device while facilitating the torsion or vibration of the movable structure under the drive of the electric field, improving the performance and reliability of the MEMS device.

[0007] According to some embodiments, adjacent isolation rings along the second direction are isolated by isolation grooves; adjacent cavity grooves and isolation grooves along the first direction are connected, which effectively increases the gap between the movable structure and the substrate, significantly improving the device yield and long-term reliability.

[0008] According to some embodiments, the inner wall and bottom surface of the cavity groove are covered with a dielectric layer to protect the inner wall and bottom surface of the cavity groove and prevent subsequent etching processes from damaging the substrate.

[0009] According to some embodiments, a dielectric layer is included between the device layer and the support pillar, and the dielectric layer is used to achieve direct silicon-to-silicon bonding between the device layer and the support pillar.

[0010] According to some embodiments, the surface of the substrate facing away from the cavity groove is provided with alignment marks, so as to etch the substrate based on the alignment marks, and etch out multiple support pillars and multiple cavity grooves, thereby increasing the cavity volume of the movable structure.

[0011] According to some embodiments, an insulating layer is provided on the surface of the capping layer away from the cavity groove, and the insulating layer includes a plurality of contact portions that penetrate the insulating layer; the plurality of contact portions are correspondingly connected to a plurality of semiconductor pillars.

[0012] According to some embodiments, multiple semiconductor pillars are eutectic bonded to the device layer via a conductive layer.

[0013] According to some embodiments, the device layer further includes a first sensor structure, a support structure, and a second sensor structure arranged sequentially along a second direction; the first sensor structure includes a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode arranged sequentially along the second direction; the second sensor structure includes a second driving electrode, a second movable driving comb tooth, a third beam, a second anchor point, a fourth beam, a second movable detection comb tooth, and a second detection electrode arranged sequentially along the second direction; the second movable driving comb tooth is connected to the second anchor point via the third beam; the second movable detection comb tooth is connected to the second anchor point via the fourth beam; the second movable driving comb tooth and the second movable detection comb tooth move under the drive of the electric field force between the second driving electrode and the second detection electrode.

[0014] According to some embodiments, the first movable drive comb tooth and the first movable detection comb tooth move in the same direction.

[0015] According to some embodiments, the first movable drive comb tooth and the first movable detection comb tooth move in opposite directions.

[0016] According to some embodiments, the second movable drive comb tooth and the second movable detection comb tooth move in the same direction.

[0017] According to some embodiments, the second movable drive comb tooth and the second movable detection comb tooth move in opposite directions.

[0018] According to some embodiments, the first sensor structure, the support structure, and the second sensor structure are fabricated simultaneously in the same process steps, avoiding an increase in the number of photomasks used and reducing the complexity and cost of the fabrication process.

[0019] According to some embodiments, a second aspect of this application provides a method for fabricating a MEMS device, comprising:

[0020] A substrate is provided, the substrate including a bonding surface and a bottom surface opposite to each other along a first direction, and the substrate including cavity grooves and support pillars arranged alternately along a second direction, the cavity grooves being recessed into the substrate via the bonding surface;

[0021] A semiconductor layer is bonded to the top surface of a support pillar, and a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode are formed on the semiconductor layer in sequence along a second direction to form a device layer; the first movable driving comb tooth is connected to the first anchor point via the first beam; the first movable detection comb tooth is connected to the first anchor point via the second beam; the first movable driving comb tooth and the first movable detection comb tooth move under the drive of the electric field force between the first driving electrode and the first detection electrode;

[0022] A capping layer is provided, the capping layer including a substrate and a plurality of semiconductor pillars penetrating the substrate along a first direction, the semiconductor pillars being isolated from the substrate by an isolation ring surrounding the semiconductor pillars;

[0023] The capping layer is bonded to the device layer, and the first driving electrode, the first anchor point, and the first detection electrode are bonded to the support pillar and semiconductor pillar adjacent to each other along the first direction, respectively.

[0024] According to some embodiments, a substrate is provided, comprising:

[0025] An initial substrate is provided, the initial substrate including a bonding surface and a bottom surface opposite to each other along a first direction; the bottom surface includes alignment marks;

[0026] Based on the alignment mark etching of the bonding surface of the initial substrate, cavity grooves and support pillars are formed alternately arranged along the second direction, and the cavity grooves are recessed into the substrate via the bonding surface;

[0027] A dielectric layer is formed covering the inner surface of the cavity groove and the top surface of the support pillar to obtain the substrate.

[0028] The MEMS devices and their fabrication methods described in the above embodiments have at least the following unexpected technical effects:

[0029] The substrate includes alternating cavity grooves and support pillars arranged along a second direction. At least by precisely controlling the depth of the cavity grooves, the gap between the movable structure of the MEMS device and the substrate can be precisely controlled, reducing parasitic capacitance and improving electromechanical conversion sensitivity. Multiple isolation rings extending perpendicular to the substrate and penetrating the substrate define multiple semiconductor pillars, providing vertical signal output channels. This not only effectively reduces thermal stress mismatch between the substrate and the isolation rings but also effectively avoids electrical insulation problems, improving electrical isolation performance while reducing parasitic capacitance. The first driving electrode, the first anchor point, and the first detection electrode are bonded to the support pillars and semiconductor pillars adjacent to each other along the first direction, providing good support for the movable structure of the MEMS device while facilitating torsion or vibration of the movable structure under the drive of an electric field, improving the performance and reliability of the MEMS device. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a flowchart illustrating a method for fabricating a MEMS device provided in some embodiments;

[0032] Figure 2 This is a schematic diagram of the longitudinal cross-sectional structure of the substrate provided in step S10 of a MEMS device fabrication method provided in some embodiments;

[0033] Figure 3 This is a schematic diagram of the longitudinal section of the structure obtained after forming the support pillar and the cavity groove in step S10 of a MEMS device fabrication method provided in some embodiments;

[0034] Figure 4 This is a schematic diagram of the longitudinal cross-section of the structure obtained after forming a dielectric layer in step S10 of a MEMS device fabrication method provided in some embodiments;

[0035] Figure 5 This is a schematic diagram of the longitudinal section of the structure obtained after bonding the semiconductor layer to the substrate in step S20 of a MEMS device fabrication method provided in some embodiments;

[0036] Figure 6 This is a schematic diagram of the longitudinal section of the structure obtained after thinning the semiconductor layer in step S20 of a MEMS device fabrication method provided in some embodiments;

[0037] Figure 7 This is a schematic diagram of the longitudinal section of the structure obtained after forming the first hard mask layer in step S20 of a MEMS device fabrication method provided in some embodiments;

[0038] Figure 8 This is a schematic diagram of the longitudinal section of the structure obtained after forming the first patterned photoresist layer in step S20 of a MEMS device fabrication method provided in some embodiments;

[0039] Figure 9 This is a schematic diagram of the longitudinal section of the structure obtained after forming the sensor assembly in step S20 of a MEMS device fabrication method provided in some embodiments;

[0040] Figure 10 This is a schematic diagram of the longitudinal section of the structure obtained after forming an annular trench in step S30 of a MEMS device fabrication method provided in some embodiments;

[0041] Figure 11 This is a schematic diagram of the longitudinal section of the structure obtained after forming a dielectric material layer in step S30 of a MEMS device fabrication method provided in some embodiments;

[0042] Figure 12 This is a schematic diagram of the longitudinal section of the structure obtained after forming an isolation ring in step S30 of a MEMS device fabrication method provided in some embodiments;

[0043] Figure 13 This is a top view of the structure obtained after forming pads in step S30 of a MEMS device fabrication method provided in some embodiments;

[0044] Figure 14 This is a top view of the structure obtained after forming an isolation groove in step S30 of a MEMS device fabrication method provided in some embodiments;

[0045] Figure 15 This is a top view of the structure obtained after bonding the capping layer to the device layer in step S40 of a MEMS device fabrication method provided in some embodiments;

[0046] Figure 16 This is a top view of the structure obtained after step S40 in a MEMS device fabrication method provided in some embodiments, after an insulating layer is formed on the top surface of the capping layer;

[0047] Figure 17 This is a top view schematic diagram of the structure obtained after step S40 in a MEMS device fabrication method provided in some embodiments, after forming a contact portion that penetrates the insulating layer;

[0048] Figure 18 This is a top view schematic diagram of the structure obtained after step S40, in a MEMS device fabrication method provided in other embodiments, after forming a contact portion that penetrates the insulating layer.

[0049] Explanation of reference numerals in the attached figures:

[0050] 10. Substrate; 11. Alignment mark; 12. Cavity groove; 13. Support pillar; 14. Dielectric layer; 2. Semiconductor layer; Y10. First hard mask layer; Y11. First patterned mask layer; PR1. First patterned photoresist layer; 21. Silicon wall; 22. First driving electrode; 23. First movable driving comb tooth; 24. First beam; 25. First anchor point; 26. Second beam; 27. First movable detection comb tooth; 28. First detection electrode; 4. Sensor assembly; 29. ​​Support structure; 3. Substrate; 31a. Annular trench; 7. Dielectric material layer; 31. Isolation ring; 32. Pad; 33. Central support; 34. Semiconductor pillar; 35. Isolation groove; 36. Insulating layer; 37a. Through hole; 37. Contact portion; 38. Edge support. Detailed Implementation

[0051] To facilitate understanding of this disclosure, a more complete description will now be given with reference to the accompanying drawings, in which preferred embodiments of the present disclosure are shown. However, this disclosure may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0052] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0053] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, doping types, and / or portions, these elements, components, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or portion from another element, component, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be referred to as a second element, component, region, layer, or portion.

[0054] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0055] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0056] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of the invention, thus allowing for the anticipation of variations in the shown shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. The regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of the invention.

[0057] In traditional MEMS manufacturing and packaging processes, regarding device materials, the significant difference in thermal expansion coefficients between silicon and glass in traditional silicon-glass (SOG) composite structures introduces thermal stress during temperature cycling, leading to zero-point drift and sensitivity temperature drift, thus limiting their application accuracy across a wide temperature range. Regarding device structure, the gap between the movable structure and the substrate in traditional SOI-MEMS devices is determined by the thickness of the buried oxide layer, which is typically small (generally less than 2µm). This results in large parasitic capacitance, reduced electromechanical conversion sensitivity, and the possibility of the structure adhering to the substrate during wet etching of the buried oxide layer, severely impacting device yield and long-term reliability. In terms of electrical interconnection, complex lead structures need to be constructed internally to achieve effective transmission and isolation of drive and detection signals. Traditional processes typically fabricate metal leads on the device surface, which not only occupies valuable planar layout area but also faces the risk of metal corrosion or short circuits caused by residual etchant during structure release.

[0058] On the other hand, to meet the vacuum environment requirements of MEMS devices (such as gyroscopes, accelerometers, and RF switches), wafer-level hermetically sealed packaging has become essential. Traditional metal eutectic bonding is an effective means of achieving vacuum packaging, but during the bonding process, the molten eutectic metal is prone to lateral overflow, which may cause short circuits or contaminate movable structures, seriously affecting device yield and performance. Simultaneously, to achieve a long-term stable vacuum environment inside the package, it is necessary to integrate high-performance getters and ensure their effective activation during the packaging process, which places higher demands on the compatibility of the packaging structure and process.

[0059] Furthermore, traditional vertical interconnect solutions often rely on complex and costly TSV insulation processes. These processes are not only cumbersome, but also prone to crosstalk due to excessive parasitic capacitance when implementing multiple independent signal outputs, thus affecting the performance of high-frequency or high-precision MEMS devices. Therefore, there is an urgent need to develop a vertical interconnect solution that is simple to manufacture, has excellent electrical isolation performance, good thermal matching, and is suitable for wafer-level hermetically sealed packaging.

[0060] Based on this, this application aims to provide a MEMS device and its fabrication method, which can at least provide a MEMS device with excellent electrical isolation performance, good thermal matching, and high electromechanical conversion sensitivity, so as to realize the vertical interconnection and output of multiple independent signals while avoiding signal crosstalk caused by excessive parasitic capacitance.

[0061] Please refer to Figure 1 In some embodiments, a method for fabricating a MEMS device is provided, comprising:

[0062] Step S10: Provide a substrate, the substrate including a bonding surface and a bottom surface opposite to each other along a first direction, and the substrate including cavity grooves and support pillars arranged alternately along a second direction, the cavity grooves being recessed into the substrate via the bonding surface;

[0063] Step S20: Bond the semiconductor layer to the top surface of the support pillar to form a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode arranged sequentially along the second direction on the semiconductor layer to form a device layer; the first movable driving comb tooth is connected to the first anchor point via the first beam; the first movable detection comb tooth is connected to the first anchor point via the second beam; the first movable driving comb tooth and the first movable detection comb tooth move under the drive of the electric field force between the first driving electrode and the first detection electrode;

[0064] Step S30: Provide a capping layer, the capping layer including a substrate and a plurality of semiconductor pillars penetrating the substrate along a first direction, the semiconductor pillars being isolated from the substrate by an isolation ring surrounding the semiconductor pillars;

[0065] Step S40: Bond the capping layer to the device layer, and bond the first driving electrode, the first anchor point, and the first detection electrode to the support pillar and semiconductor pillar adjacent to each other along the first direction, respectively.

[0066] In some embodiments, in step S10, an initial substrate is provided, the initial substrate including a bonding surface and a bottom surface opposite to each other along a first direction; the bottom surface includes alignment marks; the bonding surface of the initial substrate is etched based on the alignment marks to form cavity grooves and support pillars arranged alternately along a second direction, the cavity grooves being recessed toward the substrate via the bonding surface; a dielectric layer is formed covering the inner surface of the cavity grooves and the top surface of the support pillars to obtain the substrate.

[0067] Please refer to Figure 2In some embodiments, in step S10, an N-type crystal with a crystal orientation of... <100> The substrate 10, after double-sided polishing, can be made of silicon. The resistivity of the substrate 10 can be 0.002 Ω·cm to 0.004 Ω·cm. For example, the resistivity of the substrate 10 can be 0.002 Ω·cm, 0.003 Ω·cm, or 0.004 Ω·cm. The thickness of the substrate 10 can be 380 µm to 400 µm. For example, the thickness of the substrate 10 can be 380 µm, 390 µm, or 400 µm. The substrate 10 can be organically cleaned using acetone or ethanol, then rinsed with deionized water and dried with a nitrogen gun to remove contaminants such as dirt, grease, and dust from the surface of the substrate 10.

[0068] Please continue to refer to this. Figure 2 In some embodiments, photoresist is spin-coated and photolithographically etched onto the lower surface of substrate 10, and then alignment marks 11 are etched out.

[0069] Please refer to Figure 3 In some embodiments, in step S10, photoresist is spin-coated on the upper surface of the substrate 10 and aligned and photolithographically formed with the alignment mark 11. Then, the upper surface of the substrate 10 is etched to a depth of 20µm-30µm, for example, the etching depth can be 20µm, 25µm or 30µm, etc.; a plurality of support pillars 13 are etched to form a cavity groove 12 for the movement of the movable structure.

[0070] Please refer to Figure 4 In some embodiments, in step S10, a dielectric layer 14 with a thickness of 700 nm to 1 µm can be formed on the upper surface of the substrate 10 and the inner surface of the cavity groove 12 using a thermal oxidation process. The dielectric layer 14 can be a silicon dioxide layer. The thickness of the silicon dioxide layer can be 700 nm, 800 nm, 900 nm, or 1 µm, etc.

[0071] Please refer to Figure 5 In some embodiments, in step S20, a semiconductor layer 2 is provided. The semiconductor layer 2 can be N-type and have a crystal orientation of <100> The resistivity of semiconductor layer 2 can be 0.001 Ω·cm to 0.003 Ω·cm. For example, the resistivity of semiconductor layer 2 can be 0.001 Ω·cm, 0.002 Ω·cm, or 0.003 Ω·cm. The thickness of semiconductor layer 2 can be 280 µm to 320 µm. For example, the thickness of semiconductor layer 2 can be 280 µm, 300 µm, or 320 µm. The lower surface of semiconductor layer 2 is bonded to substrate 10 via a silicon dioxide layer to achieve direct silicon-silicon bonding, followed by annealing in a high-temperature furnace.

[0072] Please refer to Figure 6In some embodiments, in step S20, grinding and chemical mechanical polishing can be used to reduce the thickness of the semiconductor layer 2 to a preset thickness, such as 80µm.

[0073] Please refer to Figure 7 In some embodiments, in step S20, a first hard mask layer Y10 is formed on the upper surface of the semiconductor layer 2. For example, an Al layer can be formed using a magnetron sputtering process as the first hard mask layer Y10.

[0074] Please refer to Figure 8 In some embodiments, in step S20, a first patterned photoresist layer PR1 is formed on the upper surface of the first hard mask layer Y10, and the first hard mask layer Y10 is etched using the first patterned photoresist layer PR1 as a mask to form a first patterned mask layer Y11.

[0075] Please refer to Figure 9 In some embodiments, in step S20, the semiconductor layer 2 is etched using the first patterned mask layer Y11 as a mask to form a first driving electrode 22, a first movable driving comb tooth 23, a first beam 24, a first anchor point 25, a second beam 26, a first movable detection comb tooth 27, and a first detection electrode 28 arranged sequentially along the second direction. The first movable driving comb tooth 23 is connected to the first anchor point 25 via the first beam 24; the first movable detection comb tooth 27 is connected to the first anchor point 25 via the second beam 26; the first movable driving comb tooth 23 and the first movable detection comb tooth 27 move under the drive of the electric field force between the first driving electrode 22 and the first detection electrode 28. The first driving electrode 22, the first movable driving comb tooth 23, the first beam 24, the first anchor point 25, the second beam 26, the first movable detection comb tooth 27, and the first detection electrode 28 can together constitute a sensor assembly 4, and two adjacent sensor assemblies 4 along the second direction are isolated by a support structure 29. Two sensor components 4, isolated along the second direction by the support structure 29, are fabricated simultaneously in the same process steps. A portion of the semiconductor layer 2 surrounding the two sensor components 4 isolated by the support structure 29 forms a silicon wall 21. The two sensor components 4, isolated along the second direction by the support structure 29, and the silicon wall 21 together form a device layer.

[0076] Please refer to Figure 10In some embodiments, in step S30, a substrate 3 is provided, the substrate 3 comprising an N-type substrate with a crystal orientation of [missing information]. <100> The resistivity of the silicon wafer, substrate 3, can be 0.002 Ω·cm to 0.004 Ω·cm. For example, the resistivity of substrate 3 can be 0.002 Ω·cm, 0.003 Ω·cm, or 0.004 Ω·cm, etc. The thickness of substrate 3 can be 380 µm to 400 µm, for example, 380 µm, 390 µm, or 400 µm, etc. Acetone or ethanol can be used for organic cleaning of substrate 3, followed by rinsing with deionized water and drying with a nitrogen gun to remove contaminants such as dirt, grease, and dust from the surface of substrate 3.

[0077] Please refer to Figure 10 In some embodiments, the resistivity of substrate 3 is 0.001 Ω·cm to 1 Ω·cm. For example, the resistivity of substrate 3 can be 0.001 Ω·cm, 0.005 Ω·cm, 0.009 Ω·cm, 0.01 Ω·cm, 0.05 Ω·cm, 0.1 Ω·cm, 0.5 Ω·cm, or 1 Ω·cm, which facilitates reducing the resistivity of vertical interconnect structures such as silicon pillars.

[0078] Please refer to Figure 10 In some embodiments, the cleaned substrate 3 can be placed in a magnetron sputtering apparatus to sputter a second hard mask layer (not shown) with a thickness of 95nm-105nm. The thickness of the second hard mask layer can be 95nm, 100nm, or 105nm, etc. The material of the second hard mask layer can be Al. Photoresist is spin-coated onto the top surface of the second hard mask layer and photolithography is performed to obtain a second patterned photoresist layer PR2 (not shown). The second patterned photoresist layer PR2 includes an opening pattern for defining the annular trench 31a. The linewidth of the pattern of the second patterned photoresist layer PR2 can be 19.5µm-20.5µm. For example, the linewidth of the pattern of the second patterned photoresist layer PR2 can be 19.5µm, 20µm, or 20.5µm, etc. The thickness of the second patterned photoresist layer PR2 is 1.95µm-2.05µm. For example, the thickness of the second patterned photoresist layer PR2 can be 1.95µm, 2.00µm, or 2.05µm, etc.

[0079] Please continue to refer to this. Figure 10 In some embodiments, in step S30, using the second patterned photoresist layer PR2 as a mask, the second hard mask layer is dry etched to obtain the second patterned hard mask layer. Using the second patterned hard mask layer as a mask, the substrate 3 is dry etched to a depth of 250µm~300µm, for example, 250µm, 260µm, 270µm, 280µm, 290µm or 300µm, to obtain an annular trench 31a. The annular trench 31a is used to define semiconductor pillars within the substrate 3. Figure 10 (Not shown).

[0080] Please refer to Figure 11 In some embodiments, after obtaining the annular trench 31a, the second patterned photoresist layer PR2 can be removed using an oxygen plasma dry process, or the second patterned photoresist layer PR2 and the second patterned hard mask layer can be removed simultaneously using a wet etching process. The depth of the annular trench 31a can be 250µm, 260µm, 270µm, 280µm, 290µm, or 300µm, etc. In step S30, the substrate 3 and a dielectric material layer 7 with a thickness of 290µm-310µm are anoly bonded to obtain a bonded sheet. The thickness of the dielectric material layer 7 can be 290µm, 300µm, or 310µm, etc. The material of the dielectric material layer 7 can be a borosilicate glass sheet. The borosilicate glass sheet can be used for subsequent glass reflow processes.

[0081] Please refer to Figure 12 In some embodiments, in step S30, the bonding wafer is reflowed in a high-temperature tube furnace. The target reflow temperature needs to be higher than the softening melting point of the borophosphate glass sheet to ensure that the softened glass melts and fills the etched annular trench 31a under atmospheric pressure. The target temperature range can be 850°C-1000°C, and the target temperature for the hot reflow treatment can be 850°C, 900°C, 950°C, or 1000°C, etc. After the annular trench 31a is filled with molten glass, it is gradually cooled to room temperature, and the backfilled glass re-solidifies to form a silicon-glass composite substrate.

[0082] Please continue to refer to this. Figure 12 In some embodiments, in step S30, the silicon-glass composite substrate is thinned by double-sided grinding until a top-surface flush isolation ring 31 and semiconductor pillar 34 are obtained. The remaining dielectric material layer 7 is used to form the isolation ring 31, and the remaining substrate 3 is used to form the semiconductor pillar 34. A chemical mechanical polishing process can be used to make the top surface of the isolation ring 31 flush with the top surface of the semiconductor pillar 34, and the bottom surface of the isolation ring 31 flush with the bottom surface of the semiconductor pillar 34. Compared with the deposition process, this is easier to implement, can effectively reduce the linewidth of the isolation ring 31, can avoid the problem of poor electrical insulation, and reduce parasitic capacitance; the smaller linewidth isolation ring 31 can effectively reduce the thermal stress mismatch between the semiconductor pillar 34 and the isolation ring 31.

[0083] Please refer to Figure 13In some embodiments, in step S30, photoresist is spin-coated onto the bonding surface of the remaining substrate 3 and photolithography is performed to obtain a third patterned photoresist layer PR3. The thickness of the third patterned photoresist layer PR3 can be 3.95µm-4.05µm. For example, 3.95µm, 4µm, or 4.05µm. The third patterned photoresist layer PR3 includes an opening pattern for defining the pads.

[0084] Please continue to refer to this. Figure 13 In some embodiments, in step S30, a conductive layer is sputtered onto the third patterned photoresist layer PR3. The conductive layer may include Ti, Pt, Au, or a combination thereof. For example, the conductive layer may be a composite metal layer of Ti, Pt, and Au. For instance, a Ti layer, a Pt layer, and an Au layer may be sequentially sputtered onto the third patterned photoresist layer PR3 along a direction away from the substrate 3. The Ti layer has a thickness of 40 nm, the Pt layer has a thickness of 60 nm, and the Au layer has a thickness of 300 nm. The Ti layer can serve as an adhesion layer, the Pt layer as a diffusion barrier layer, and the Au layer as a reaction layer. The Au layer can react with silicon in the substrate to be bonded to form an Au-Si eutectic bonding bonding metal layer. The third patterned photoresist layer PR3 and the conductive layer outside the opening pattern can be stripped using chemical reagents. A portion of the stripped conductive layer adheres to the top surface of the semiconductor pillar 34 to form the bonding pad 32. While enabling vertical interconnection and output of multiple independent signals, it avoids signal crosstalk caused by excessive parasitic capacitance. Compared with the horizontal output scheme, it reduces the length of interconnection signal lines and has broad application prospects in the field of three-dimensional integration.

[0085] Please refer to Figure 14 In some embodiments, in step S30, after forming a conductive layer on the bonding surface, a fourth patterned photoresist layer PR4 (not shown) covering the conductive layer is formed. The fourth patterned photoresist layer PR4 includes a first pattern for defining the isolation groove 35. Using the fourth patterned photoresist layer PR4 as a mask, the substrate 3 is etched to a second preset depth, simultaneously obtaining a central support 33, an edge support 38, and an isolation groove 35 at the second preset depth. The second preset depth can be 8µm-10µm, and the depth of the isolation groove 35 can be 8µm, 9µm, or 10µm, etc.

[0086] Please refer to Figure 15 In some embodiments, after the isolation groove 35 is formed, the pad 32 is gold-silicon eutectic bonded to the device layer. The isolation groove 35 provides an isolation and containment space for the subsequent molten bonding metal, preventing the subsequent bonding metal from overflowing and protruding, which would reduce the reliability of the electrical connection.

[0087] Please continue to refer to this. Figure 15In some embodiments, a fifth patterned photoresist layer PR5 is formed, covering the isolation groove 35, the isolation ring 31, and the conductive layer. The fifth patterned photoresist layer PR5 includes an opening pattern for defining a getter layer (not shown); a getter material layer is formed that at least fills the opening pattern; the getter material layer outside the fifth patterned photoresist layer PR5 and the opening pattern is removed, and the remaining getter material layer is used to constitute the getter layer. During eutectic bonding, the eutectic reaction conditions are 380°C-420°C, maintained for more than 30 minutes. During bonding, the getter layer can be activated simultaneously to provide vacuum-tight packaging for the MEMS device. The eutectic reaction temperature can be 380°C, 400°C, or 420°C, etc. After bonding, the substrate 3 and the semiconductor pillars 34 on it, as well as the isolation ring 31 surrounding the semiconductor pillars 34, are used to jointly constitute the capping layer.

[0088] Please refer to Figure 16 In some embodiments, an insulating layer 36 is formed on the surface of the substrate 3 away from the device layer. For example, a silicon dioxide insulating layer with a thickness of, for example, 800 nm can be deposited on the upper surface of the bonded substrate 3 using a plasma-enhanced chemical vapor deposition (PECVD) process, followed by spin-coating of photoresist and photolithography, and then etching of the silicon dioxide insulating layer with BOE solution to obtain a plurality of vias 37a exposing the top surfaces of a plurality of semiconductor pillars 34.

[0089] Please refer to Figure 17 In some embodiments, a contact portion 37 is formed on the upper surface of the substrate 3. For example, 30 nm Ti and 500 nm Au can be sputtered sequentially on the upper surface of the substrate 3 to form the contact portion 37, which can serve as the external metal electrode of the MEMS device, thereby completing the fabrication and wafer-level packaging of the entire MEMS device.

[0090] Please refer to Figure 18 In some embodiments, the main difference from the foregoing embodiments is that, Figure 4 After forming a dielectric layer 14 covering the inner surface of the cavity groove 12 and the outer surface of the support pillar 13, a dry etching process is used to remove the dielectric layer 14 on the inner surface of the cavity groove 12, leaving only the dielectric layer 14 on the top surface of the support pillar 13. Subsequently, direct silicon-to-silicon bonding is formed between the dielectric layer 14 on the top surface of the support pillar 13 and the semiconductor layer 2.

[0091] Please refer to Figure 17 or Figure 18In some embodiments, a MEMS device is provided, including a substrate 10, a device layer, and a capping layer sequentially adjacent to each other along a first direction; the substrate 10 includes cavity recesses 12 and support pillars 13 alternately arranged along a second direction; the capping layer includes a substrate 3 and a plurality of semiconductor pillars 34 penetrating the substrate 3 along the first direction, the semiconductor pillars 34 and the substrate 3 being isolated by an isolation ring 31 surrounding the semiconductor pillars 34; the device layer includes a first driving electrode 22, a first movable driving comb tooth 23, a first beam 24, and a first anchor point 25 sequentially arranged along the second direction. The system includes a second beam 26, a first movable detection comb tooth 27, and a first detection electrode 28; a first movable drive comb tooth 23 is connected to a first anchor point 25 via a first beam 24; a first movable detection comb tooth 27 is connected to a first anchor point 25 via a second beam 26; the first movable drive comb tooth 23 and the first movable detection comb tooth 27 move under the drive of the electric field force between the first drive electrode 22 and the first detection electrode 28; the first drive electrode 22, the first anchor point 25, and the first detection electrode 28 are respectively bonded to the support column 13 and the semiconductor column 34 adjacent to it along the first direction.

[0092] For example, please continue to refer to Figure 17 or Figure 18 Multiple semiconductor pillars 34 are defined by multiple isolation rings 31 extending along and penetrating the substrate 3, providing a vertical signal output channel. This not only effectively reduces the thermal stress mismatch between the substrate 3 and the isolation rings 31, but also effectively avoids the problem of poor electrical insulation, improving electrical isolation performance while reducing parasitic capacitance. The substrate 10 includes cavity grooves 12 and support pillars 13 arranged alternately along the second direction. At least by precisely controlling the recess depth of the cavity grooves 12, the gap between the movable structure of the MEMS device and the substrate 10 can be precisely controlled, reducing detection parasitic capacitance and improving electromechanical conversion sensitivity. The first driving electrode 22, the first anchor point 25, and the first detection electrode 28 are respectively bonded to the support pillars 13 and semiconductor pillars 34 adjacent to it along the first direction, providing good support for the movable structure of the MEMS device while facilitating the torsion or vibration of the movable structure under the drive of the electric field, improving the performance and reliability of the MEMS device.

[0093] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, adjacent isolation rings 31 along the second direction are isolated by isolation grooves 35; adjacent cavity grooves 12 and isolation grooves 35 along the first direction are connected, which effectively increases the gap between the movable structure and the substrate 10, significantly improving the device yield and long-term reliability.

[0094] Please continue to refer to this. Figure 17In some embodiments, the inner sidewalls and bottom surface of the cavity groove 12 are covered with a dielectric layer 14, which protects the inner sidewalls and bottom surface of the cavity groove 12 and prevents subsequent etching processes from damaging the substrate.

[0095] Please continue to refer to this. Figure 18 In some embodiments, a dielectric layer 14 is included between the device layer and the support pillar 13, and the dielectric layer 14 is used to achieve direct silicon-to-silicon bonding between the device layer and the support pillar 13.

[0096] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, an alignment mark 11 is provided on the surface of the substrate 10 opposite to the cavity groove 12, so as to etch the substrate 10 based on the alignment mark 11, and etch out a plurality of support pillars 13 and a plurality of cavity grooves 12, thereby increasing the cavity volume of the movable structure.

[0097] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, an insulating layer 36 is provided on the surface of the capping layer away from the cavity groove 12, and the insulating layer 36 includes a plurality of contact portions 37 penetrating the insulating layer 36; the plurality of contact portions 37 are correspondingly connected to a plurality of semiconductor pillars 34.

[0098] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, multiple semiconductor pillars 34 are eutectic bonded to the device layer via a conductive layer.

[0099] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the device layer further includes a first sensor structure, a support structure 29, and a second sensor structure arranged sequentially along the second direction; the first sensor structure includes a first driving electrode 22, a first movable driving comb tooth 23, a first beam 24, a first anchor point 25, a second beam 26, a first movable detection comb tooth 27, and a first detection electrode 28 arranged sequentially along the second direction; the second sensor structure includes a second driving electrode, a second movable driving comb tooth, a third beam, a second anchor point, a fourth beam, a second movable detection comb tooth, and a second detection electrode arranged sequentially along the second direction; the second movable driving comb tooth is connected to the second anchor point via the third beam; the second movable detection comb tooth is connected to the second anchor point via the fourth beam; the second movable driving comb tooth and the second movable detection comb tooth move under the drive of the electric field force between the second driving electrode and the second detection electrode.

[0100] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the first movable drive comb tooth 23 and the first movable detection comb tooth 27 move in the same direction, achieving unidirectional vibration.

[0101] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the first movable drive comb tooth 23 and the first movable detection comb tooth 27 move in opposite directions to achieve reverse movement.

[0102] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the second movable drive comb tooth and the second movable detection comb tooth move in the same direction.

[0103] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the second movable drive comb tooth and the second movable detection comb tooth move in opposite directions.

[0104] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, in the first sensor structure, the first movable drive comb tooth 23 and the first movable detection comb tooth 27 move in the same direction; in the second sensor structure, the second movable drive comb tooth and the second movable detection comb tooth move in the same direction; the first movable drive comb tooth 23 and the second movable drive comb tooth move in the same or opposite directions.

[0105] Please continue to refer to this. Figure 17 or Figure 18 In some embodiments, the first sensor structure, the support structure 29, and the second sensor structure are fabricated simultaneously in the same process steps, avoiding an increase in the number of photomasks used and reducing the complexity and cost of the fabrication process.

[0106] Please continue to refer to this. Figures 1-18 The MEMS devices and their fabrication methods in the above embodiments have at least the following unexpected technical effects:

[0107] The substrate 10 includes alternating cavity grooves 12 and support pillars 13 arranged along a second direction. At least by precisely controlling the recess depth of the cavity grooves 12, the gap between the movable structure of the MEMS device and the substrate 10 can be precisely controlled, reducing parasitic capacitance and improving electromechanical conversion sensitivity. Multiple isolation rings 31 extending perpendicular to and penetrating the substrate 3 define multiple semiconductor pillars 34, providing a vertical signal output channel. This not only effectively reduces thermal stress mismatch between the substrate 3 and the isolation rings 31 but also effectively avoids electrical insulation problems, improving electrical isolation performance while reducing parasitic capacitance. The first driving electrode 22, the first anchor point 25, and the first detection electrode 28 are bonded to their adjacent support pillars 13 and semiconductor pillars 34 along the first direction, providing good support for the movable structure of the MEMS device while facilitating torsion or vibration of the movable structure under the drive of an electric field, improving the performance and reliability of the MEMS device.

[0108] Although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the exact order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are executed, and they can be executed in other sequences. Moreover, although Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution of these sub-steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0109] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0110] The embodiments described above are merely illustrative of several implementation methods of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these modifications and improvements all fall within the scope of protection of this disclosure.

Claims

1. A MEMS device, characterized in that, It includes a substrate, a device layer, and a capping layer that are sequentially adjacent to each other along the first direction; The substrate includes cavity grooves and support pillars arranged alternately along the second direction; The capping layer includes a substrate and a plurality of semiconductor pillars penetrating the substrate along the first direction, wherein the semiconductor pillars are isolated from the substrate via an isolation ring surrounding the semiconductor pillars; The isolation ring is formed by etching annular grooves on the substrate, followed by glass reflow filling and chemical mechanical polishing. Adjacent isolation rings along the second direction are isolated by isolation grooves; The cavity groove and the isolation groove adjacent to each other along the first direction are connected; The device layer includes a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode arranged sequentially along the second direction; the first movable driving comb tooth is connected to the first anchor point via the first beam; the first movable detection comb tooth is connected to the first anchor point via the second beam; the first movable driving comb tooth and the first movable detection comb tooth move under the drive of the electric field force between the first driving electrode and the first detection electrode; The first driving electrode, the first anchor point, and the first detection electrode are respectively bonded to the support post and the semiconductor post adjacent to each other along the first direction.

2. The MEMS device according to claim 1, characterized in that, The inner wall and bottom surface of the cavity groove are covered with a dielectric layer.

3. The MEMS device according to claim 1, characterized in that, A dielectric layer is included between the device layer and the support pillar.

4. The MEMS device according to claim 1, characterized in that, Alignment marks are provided on the surface of the substrate that is opposite to the cavity groove.

5. The MEMS device according to claim 1, characterized in that, The surface of the capping layer opposite to the cavity groove is provided with an insulating layer, and the insulating layer includes a plurality of contact portions that penetrate the insulating layer. The plurality of contact portions are connected to the plurality of semiconductor pillars respectively.

6. The MEMS device according to claim 1, characterized in that, The plurality of semiconductor pillars are eutectic bonded to the device layer via a conductive layer.

7. The MEMS device according to claim 1, characterized in that, The device layer further includes a first sensor structure, a support structure, and a second sensor structure arranged sequentially along the second direction; The first sensor structure includes a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode arranged sequentially along the second direction; The second sensor structure includes a second driving electrode, a second movable driving comb tooth, a third beam, a second anchor point, a fourth beam, a second movable detection comb tooth, and a second detection electrode arranged sequentially along the second direction; the second movable driving comb tooth is connected to the second anchor point via the third beam; the second movable detection comb tooth is connected to the second anchor point via the fourth beam. The second movable drive comb tooth and the second movable detection comb tooth move under the drive of the electric field force between the second drive electrode and the second detection electrode.

8. The MEMS device according to claim 7, characterized in that, Includes at least one of the following features: The first sensor structure, the support structure, and the second sensor structure are manufactured simultaneously in the same process steps. The first movable drive comb tooth and the first movable detection comb tooth move in the same direction. The first movable drive comb tooth and the first movable detection comb tooth move in opposite directions; The second movable drive comb tooth and the second movable detection comb tooth move in the same direction. The second movable drive comb tooth and the second movable detection comb tooth move in opposite directions.

9. A method for fabricating a MEMS device, characterized in that, include: A substrate is provided, the substrate including a bonding surface and a bottom surface opposite to each other along a first direction, the substrate including cavity grooves and support pillars arranged alternately along a second direction, the cavity grooves being recessed into the substrate via the bonding surface; A semiconductor layer is bonded to the top surface of the support pillar, and a first driving electrode, a first movable driving comb tooth, a first beam, a first anchor point, a second beam, a first movable detection comb tooth, and a first detection electrode are formed on the semiconductor layer in sequence along the second direction to form a device layer; the first movable driving comb tooth is connected to the first anchor point via the first beam; the first movable detection comb tooth is connected to the first anchor point via the second beam; the first movable driving comb tooth and the first movable detection comb tooth move under the drive of the electric field force between the first driving electrode and the first detection electrode; A capping layer is provided, the capping layer comprising a substrate and a plurality of semiconductor pillars penetrating the substrate along a first direction, the semiconductor pillars being isolated from the substrate via an isolation ring surrounding the semiconductor pillars; the isolation ring is formed by etching annular trenches on the substrate, followed by glass reflow filling and chemical mechanical polishing; The capping layer is bonded to the device layer, and the first driving electrode, the first anchor point, and the first detection electrode are respectively bonded to the support pillar and the semiconductor pillar adjacent to it along the first direction; Adjacent isolation rings along the second direction are isolated by isolation grooves; The cavity grooves and the isolation grooves adjacent to each other along the first direction are connected.

10. The MEMS device fabrication method according to claim 9, characterized in that, The provision of the substrate includes: An initial substrate is provided, the initial substrate including a bonding surface and a bottom surface opposite to each other along a first direction; the bottom surface includes alignment marks; Based on the alignment marks, the bonding surface of the initial substrate is etched to form alternating cavity grooves and support pillars along the second direction. The cavity grooves are recessed into the substrate via the bonding surface. A dielectric layer is formed covering the inner surface of the cavity groove and the top surface of the support column.

Citation Information

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