Copper-ceramic bonded body and insulated circuit board

Abstract

A copper-ceramic bonded body (10) obtained by bonding a copper member (12, 13) having a Cu content of 99.96 mass% or more and a ceramic member (11), the copper-ceramic bonded body (10) being obtained by observing a cross-section in the thickness direction of the copper member after a thermal cycle test in which 3000 cycles are performed as one cycle by holding the copper member (12, 13) at-65 DEG C for 5 minutes and holding the copper member (12, 13) at 150 DEG C for 5 minutes in a liquid tank. The ratio (C / D) of the ratio (C) at which the KAM value in a measurement field of view disposed centered on the triple point of the grain boundary is 0.25 DEG or less to the ratio (D) at which the KAM value in the crystal grains is 0.25 DEG or less is within the range of 0.93-1.05.

Description

Technical Field

[0001] This invention relates to a copper-ceramic bond formed by joining copper and ceramic components, and an insulating circuit board formed by bonding a copper plate to the surface of a ceramic substrate.

[0002] This application claims priority based on Japanese Patent Application No. 2023-174525 filed on October 6, 2023 and Japanese Patent Application No. 2024-165171 filed on September 24, 2024, the contents of which are incorporated herein by reference. Background Technology

[0003] Power modules, LED modules, and thermoelectric modules are structures formed by bonding power semiconductor elements, LED elements, and thermoelectric elements onto an insulating circuit board on one side of an insulating layer where a circuit layer made of conductive material is formed.

[0004] For example, power semiconductor devices used for controlling high-power electricity in wind power generation, electric vehicles, and hybrid electric vehicles generate a lot of heat during operation. Therefore, the following insulating circuit board has been widely used as the substrate for mounting such power semiconductor devices. The insulating circuit board includes: a ceramic substrate; a circuit layer formed by bonding a metal plate with excellent conductivity to one side of the ceramic substrate; and a heat dissipation metal layer formed by bonding a metal plate to the other side of the ceramic substrate.

[0005] For example, Patent Document 1 proposes an insulating circuit board in which a circuit layer and a metal layer are formed by bonding a copper plate to one and the other sides of a ceramic substrate. In Patent Document 1, a copper plate is placed on one and the other sides of the ceramic substrate with an Ag-Cu-Ti based solder in between, and the copper plate is bonded by heat treatment (so-called active metal brazing). In this active metal brazing method, a solder containing Ti as an active metal is used, thus improving the wettability of the molten solder with the ceramic substrate and enabling good bonding between the ceramic substrate and the copper plate.

[0006] Here, semiconductor elements are bonded on the circuit layer, and heat sinks and the like are bonded on the metal layer.

[0007] Patent Document 1: Japanese Patent No. 3211856 (B)

[0008] However, semiconductor devices mounted on insulating circuit boards have recently shown a tendency to generate higher temperatures, and are sometimes used in high-current applications. Therefore, pure copper, which has particularly excellent electrical and thermal conductivity, can be considered as the copper material constituting the circuit layer and metal layer.

[0009] However, when pure copper is heat-treated, the grains tend to coarsen and the grain diameter can deviate significantly.

[0010] In this context, the insulating circuit board is sometimes subjected to severe thermal cycling, resulting in grain coarsening or uneven crystal growth in the circuit and metal layers. This leads to uneven strain distribution within the circuit and metal layers (especially at grain boundaries). This uneven strain distribution causes uneven yield stress within the circuit and metal layers, potentially leading to solidification or deformation of the layers and reducing the bonding reliability between the circuit and metal layers and the ceramic components. Furthermore, when other components (semiconductor elements, heat sinks, etc.) are bonded to the circuit and metal layers, the bonding reliability between these components may also decrease. Summary of the Invention

[0011] The present invention was made in view of the above circumstances, and its object is to provide a copper-ceramic joint that exhibits excellent bonding between ceramic and copper components even under severe thermal cycling conditions, and excellent thermal cycling reliability, as well as an insulating circuit board made from the copper-ceramic joint.

[0012] To address the aforementioned issues, aspect 1 of the present invention provides a copper-ceramic joint formed by joining a copper component and a ceramic component. The copper component contains 99.96% by mass or more of Cu. After undergoing a thermal cycling test of 3000 cycles, consisting of a cycle of holding the copper component at -65°C for 5 minutes and at 150°C for 5 minutes in a Galden bath, the ratio C / D of the proportion of KAM values ​​0.25° or less in the measurement field of view centered on the grain boundary triple point to the proportion of KAM values ​​0.25° or less within the grain, is observed to be in the range of 0.93 or more and 1.05 or less.

[0013] In the copper-ceramic joint of aspect 1 of the present invention, since the Cu content in the copper component is 99.96% by mass or more, the electrical and thermal conductivity of the copper component is particularly excellent.

[0014] Furthermore, after 3000 cycles of thermal cycling test were performed in a liquid bath (Galden liquid) with a cycle of holding at -65°C for 5 minutes and holding at 150°C for 5 minutes, the ratio C / D of the proportion of KAM values ​​of 0.25° or less in the measurement field of view centered on the grain boundary triple point to the proportion of KAM values ​​of 0.25° or less inside the grain is preferably in the range of 0.93 or more and 1.05 or less. Therefore, even under severe thermal cycling, the strain will not be unevenly distributed at the grain boundary, and the solidification or deformation of the copper component can be suppressed.

[0015] The copper-ceramic joint of aspect 2 of the present invention is characterized in that, in the copper-ceramic joint of aspect 1, the nanoindentation hardness at a position 100 μm away from the joint interface with the ceramic component in the copper component is in the range of 0.40 GPa or more and 1.03 GPa or less.

[0016] According to aspect 2 of the present invention, the nanoindentation hardness at a position 100 μm away from the interface with the ceramic component is in the range of 0.40 GPa or more and 1.03 GPa or less. Therefore, the interface between the copper component and the ceramic component will not be over-cured, thereby further improving the bonding reliability between the copper component and the ceramic component.

[0017] The copper-ceramic joint of aspect 3 of the present invention is characterized in that, in the copper-ceramic joint of aspect 1 or aspect 2, the copper component contains, by total amount, any one or both of group A elements and group B elements in the range of 10 ppm by mass and 300 ppm by mass, wherein the group A elements are selected from one or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, and the group B elements are selected from one or more of O, S, Se and Te.

[0018] According to aspect 3 of the present invention, the copper-ceramic joint contains any or both of the elements in group A and group B in a total mass range of 10 ppm or more and 300 ppm or less. Therefore, even under thermal cycling, crystal growth is suppressed, and grain coarsening or uneven crystal growth is not produced. Uneven strain distribution is suppressed, thereby reliably suppressing the solidification or deformation of the copper component.

[0019] The copper-ceramic joint of aspect 4 of the present invention is characterized in that, in the copper-ceramic joint of aspect 3, compound particles comprising any or both of the elements of group A and group B, as well as Cu, are precipitated in the copper component.

[0020] According to aspect 4 of the present invention, a copper-ceramic composite is precipitated containing compound particles comprising any or both of the elements in group A and group B, as well as Cu. Therefore, even under thermal cycling, grain growth can be suppressed, and grain coarsening or uneven crystal growth is not produced. Uneven strain distribution is suppressed, thereby reliably suppressing the solidification or deformation of the copper component.

[0021] The insulating circuit board of aspect 5 of the present invention is formed by bonding a copper plate to the surface of a ceramic substrate, characterized in that the Cu content in the copper plate is 99.96% by mass or more, and after a thermal cycling test of 3000 cycles of holding at -65°C for 5 minutes and at 150°C for 5 minutes as one cycle in a liquid bath (Galden liquid), the ratio C / D of the proportion of KAM values ​​of 0.25° or less in the measurement field of view arranged with the grain boundary triple points as the center to the proportion of KAM values ​​of 0.25° or less inside the grains is in the range of 0.93 or more and 1.05 or less.

[0022] In the insulating circuit board of aspect 5 of the present invention, since the Cu content in the copper plate is 99.96% by mass or more, the electrical conductivity and thermal conductivity of the copper plate are particularly excellent.

[0023] Furthermore, after 3000 cycles of thermal cycling test were performed in a liquid bath (Galden liquid) with a cycle of holding at -65°C for 5 minutes and holding at 150°C for 5 minutes, the ratio C / D of the proportion of KAM values ​​below 0.25° in the measurement field of view centered on the grain boundary triple point to the proportion of KAM values ​​below 0.25° inside the grains is preferably in the range of 0.93 or higher and 1.05 or lower. Therefore, even under severe thermal cycling, the strain will not be unevenly distributed at the grain boundaries, and the solidification or deformation of the copper plate can be suppressed.

[0024] The insulating circuit board of aspect 6 of the present invention is characterized in that, in the insulating circuit board of aspect 5, the nanoindentation hardness at a position 100 μm away from the interface with the ceramic substrate in the copper plate is in the range of 0.40 GPa or more and 1.03 GPa or less.

[0025] According to aspect 6 of the present invention, the nanoindentation hardness at a position 100 μm away from the interface with the ceramic substrate is in the range of 0.40 GPa or more and 1.03 GPa or less. Therefore, the interface between the copper plate and the ceramic substrate will not be over-cured, thereby further improving the bonding reliability between the copper plate and the ceramic substrate.

[0026] The insulating circuit board of aspect 7 of the present invention is characterized in that, in the insulating circuit board of aspect 5 or aspect 6, the copper component is Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, and the copper plate contains any or both of group A elements and group B elements in a total mass range of 10 ppm or more and 300 ppm or less, wherein the group A elements are selected from one or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and the group B elements are selected from one or more of O, S, Se, and Te.

[0027] According to aspect 7 of the present invention, the copper plate contains any or both of the elements in group A and group B in a total amount ranging from 10 ppm to 300 ppm. Therefore, even under load thermal cycling, crystal growth is suppressed, and grain coarsening or uneven crystal growth does not occur. Uneven strain distribution is suppressed, thereby reliably suppressing the solidification or deformation of the copper plate.

[0028] The insulating circuit substrate of aspect 8 of the present invention is characterized in that, in the insulating circuit substrate of aspect 7, compound particles comprising any or both of the elements of group A and group B, as well as Cu, are deposited in the copper plate.

[0029] According to aspect 8 of the invention, the insulating circuit substrate contains compound particles comprising any or both of the elements of group A and group B, as well as Cu, which are deposited in the copper plate. Therefore, even under thermal cycling, grain growth can be suppressed, and grain coarsening or uneven crystal growth is not produced. Uneven strain distribution is suppressed, thereby reliably suppressing the solidification or deformation of the copper plate.

[0030] According to the present invention, a copper-ceramic joint exhibits excellent bonding between ceramic and copper components, and excellent reliability under thermal cycling conditions, even when subjected to severe thermal cycling, and an insulating circuit board made from the copper-ceramic joint is provided. Attached Figure Description

[0031] Figure 1 This is a schematic diagram illustrating a power module using an insulating circuit board according to an embodiment of the present invention.

[0032] Figure 2 This is a diagram illustrating the KAM value.

[0033] Figure 3 These are microscopic images of the circuit layer and metal layer of the insulating circuit board according to embodiments of the present invention.

[0034] Figure 4 This is a flowchart of a method for manufacturing an insulating circuit board according to an embodiment of the present invention.

[0035] Figure 5 This is a schematic diagram illustrating a method for manufacturing an insulating circuit board according to an embodiment of the present invention.

[0036] Figure 6 This is a graph illustrating an example of the measurement results of the nanoindentation hardness of the circuit layer and metal layer of the insulating circuit board in the embodiment. Detailed Implementation

[0037] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0038] The copper-ceramic bonding body according to the embodiments of the present invention is an insulating circuit board 10 formed by bonding a ceramic substrate 11, which is a ceramic component made of ceramic, and copper plates 22 (circuit layer 12) and 23 (metal layer 13), which are copper components made of copper or copper alloy. Figure 1 A power module 1 equipped with the insulating circuit board 10 of this embodiment is shown.

[0039] The power module 1 includes: an insulating circuit board 10 provided with a circuit layer 12 and a metal layer 13; on one side of the circuit layer 12 (on Figure 1 The semiconductor element 3 (top) is bonded via bonding layer 2; and the semiconductor element 3 is disposed on the other side of metal layer 13 (in... Figure 1 The radiator 5 is located on the lower side (in the middle).

[0040] Semiconductor element 3 is made of semiconductor material such as Si. Semiconductor element 3 is bonded to circuit layer 12 via bonding layer 2.

[0041] The bonding layer 2 is composed of, for example, Sn-Ag, Sn-In, or Sn-Ag-Cu solder materials.

[0042] The heat sink 5 is used to dissipate heat from the insulating circuit board 10. The heat sink 5 is made of copper or a copper alloy; in this embodiment, it is made of phosphorus-deoxidized copper. A flow path for cooling fluid is provided in the heat sink 5.

[0043] In this embodiment, the heat sink 5 is bonded to the metal layer 13 via a solder layer 7 made of solder material. This solder layer 7 is, for example, made of Sn-Ag, Sn-In, or Sn-Ag-Cu solder material.

[0044] And, as Figure 1 As shown, the insulating circuit board 10 of this embodiment includes a ceramic substrate 11, and one side of the ceramic substrate 11 is disposed thereon (in... Figure 1 The circuit layer 12 (top) and the circuit layer disposed on the other side of the ceramic substrate 11 (in the middle). Figure 1 The metal layer 13 (bottom layer) is located in the middle.

[0045] The ceramic substrate 11 is made of ceramics such as silicon nitride (Si3N4) and aluminum nitride (AlN), which have excellent insulation and heat dissipation properties. In this embodiment, the ceramic substrate 11 is made of silicon nitride (Si3N4), which has particularly excellent heat dissipation properties. Furthermore, the thickness of the ceramic substrate 11 is set, for example, in the range of 0.2 mm or more and 1.5 mm or less; in this embodiment, it is set to 0.32 mm.

[0046] like Figure 5 As shown, the circuit layer 12 is located on one side of the ceramic substrate 11 ( Figure 5 It is formed by bonding a copper plate 22 to the circuit layer 12 (the middle part is the top part). A circuit pattern is formed on this circuit layer 12, one side of which ( Figure 1 (The top) is the mounting surface for mounting semiconductor element 3.

[0047] Furthermore, the thickness of the copper plate 22 that forms the circuit layer 12 is set to be in the range of 0.1 mm or more and 2.0 mm or less; in this embodiment, it is set to 0.8 mm.

[0048] like Figure 5 As shown, the metal layer 13 passes through the other side of the ceramic substrate 11 ( Figure 5 The metal layer 13 is formed by bonding a copper plate 23 to the top (the bottom layer). This metal layer 13 has the effect of effectively transferring heat from the semiconductor element 3 to the heat sink 5.

[0049] Furthermore, the thickness of the copper plate 23 that forms the metal layer 13 is set in the range of 0.1 mm or more and 2.0 mm or less; in this embodiment, it is set to 0.8 mm.

[0050] Furthermore, in the insulating circuit board 10 of this embodiment, the circuit layer 12 and the metal layer 13 are made of pure copper material with a Cu content of 99.96% by mass or more. After a thermal cycling test of 3000 cycles was performed, with each cycle consisting of holding the copper component in a liquid bath at -65°C for 5 minutes and at 150°C for 5 minutes, the cross-section of the copper component along the thickness direction was observed. The ratio C of the proportion of KAM values ​​of 0.25° or less in the measurement field of view centered on the grain boundary triple point to the proportion D of KAM values ​​of 0.25° or less inside the grain, C / D, was in the range of 0.93 or more and 1.05 or less.

[0051] Here, as Figure 2As shown, the KAM (Kernel Average Misorientation) value measured by EBSD is calculated by averaging the orientation differences between a pixel and its surrounding pixels. Since the pixel is a regular hexagon, the average of the orientation differences with the six adjacent pixels is calculated as the KAM value with an approximation order of 1. Using this KAM value, the local orientation difference, i.e., the strain distribution, can be visualized.

[0052] In addition, Figure 2 In the above, the KAM value of the measurement point MP is calculated by the following formula.

[0053] The KAM value of measurement point MP = (orientation difference with A + orientation difference with B + ... + orientation difference with F) / 6

[0054] That is, in this embodiment, the ratio C of the proportion of KAM values ​​of 0.25° or less in the measurement field of view arranged with the three grain boundary points as the center and the proportion D of the proportion of KAM values ​​of 0.25° or less inside the grain, C / D, is in the range of 0.93 or more and 1.05 or less. Therefore, the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) are pure copper materials with a Cu content of 99.96% by mass or more. Even under load thermal cycling, the strain will not be unevenly distributed at the grain boundary.

[0055] Furthermore, in the insulating circuit board 10 of this embodiment, the nanoindentation hardness at a position 100 μm away from the bonding interface with the ceramic substrate 11 in the circuit layer 12 and the metal layer 13 is preferably in the range of 0.40 GPa or more and 1.03 GPa or less.

[0056] Furthermore, in the insulating circuit board 10 of this embodiment, the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) preferably contain any one or both of group A elements and group B elements in a total mass range of 10 ppm or more and 300 ppm or less. The group A elements are selected from one or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. The group B elements are selected from one or more of O, S, Se and Te.

[0057] Furthermore, in the insulating circuit board 10 of this embodiment, such as Figure 3As shown, preferably, compound particles 18 containing any one or both of group A elements and group B elements, as well as Cu, are deposited in the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23). The group A elements are selected from one or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu. The group B elements are selected from one or more of O, S, Se and Te.

[0058] Furthermore, in the insulating circuit board 10 of this embodiment, after 3000 cycles of thermal cycling test were performed, with each cycle consisting of holding the substrate in a liquid bath (Galden liquid) at -65°C for 5 minutes and at 150°C for 5 minutes, no cracks were found in the ceramic substrate 11.

[0059] Furthermore, in the insulating circuit board 10 of this embodiment, after 3000 cycles of thermal cycling test were performed, with each cycle consisting of holding the circuit layer 12 at -65°C for 5 minutes and holding it at 150°C for 5 minutes in a Galden bath, the average crystal grain size in the cross section along the thickness direction of the circuit layer 12 and the metal layer 13 is preferably 100 μm or less.

[0060] Here, in the insulating circuit board 10 of this embodiment, as described above, the following will explain the reasons for specifying the ratio C / D of the proportion of KAM values ​​of 0.25° or less in the measurement field of view centered on the grain boundary triple point after the thermal cycling test to the proportion D of the KAM values ​​of 0.25° or less inside the grain, the nanoindentation hardness at a position 100 μm away from the interface with the ceramic substrate 11, the composition of the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23), the compound particles, the presence or absence of cracks in the ceramic substrate 11 after the thermal cycling test, and the average crystal grain size after the thermal cycling test.

[0061] (The ratio of C, the proportion of KAM values ​​below 0.25° in the measurement field centered on the grain boundary triple point after thermal cycling test, to D, the proportion of KAM values ​​below 0.25° inside the grain, is C / D.)

[0062] The power module 1 using the insulating circuit board 10 of this embodiment is used in high-temperature environments such as engine compartments, and sometimes undergoes severe thermal cycling. If strain accumulates at the grain boundaries during thermal cycling tests, the microstructure hardens, eventually making stress relaxation based on thermal cycling tests impossible, thus damaging the copper-ceramic interface. In this embodiment, as described above, the ratio C / D of the proportion C of KAM values ​​below 0.25° in the measurement field centered on the grain boundary triple point after the thermal cycling test to the proportion D of KAM values ​​below 0.25° inside the grain is in the range of 0.93 or higher and 1.05 or lower. After 3000 cycles of severe thermal cycling tests, each cycle consisting of holding at -65°C for 5 minutes and at 150°C for 5 minutes in a Galden bath, the strain is not unevenly distributed at the grain boundaries.

[0063] Furthermore, the ratio C / D of the proportion C of KAM values ​​of 0.25° or less in the measurement field centered on the grain boundary triple point after the above-mentioned thermal cycling test to the proportion D of KAM values ​​of 0.25° or less inside the grain is preferably 0.93 or more, more preferably 0.98 or more. Moreover, there is no particular limitation on the ratio C / D, but it is preferably 1.00 or less, and even considering errors caused by the field of view, it is approximately 1.05 or less.

[0064] (Nano-indentation hardness)

[0065] In the insulating circuit board 10 of this embodiment, if the hardness near the interface between the circuit layer 12 and the metal layer 13 and the ceramic substrate 11 is sufficiently low, the generation of cracks during load thermal cycling can be suppressed.

[0066] Therefore, in this embodiment, the nanoindentation hardness at a position 100 μm away from the bonding interface with the ceramic substrate 11 in the circuit layer 12 and the metal layer 13 is preferably in the range of 0.40 GPa or more and 1.03 GPa or less.

[0067] Furthermore, the lower the nanoindentation hardness, the better; more preferably, it is below 0.90 GPa; and even more preferably, it is below 0.81 GPa. On the other hand, excessively reducing the nanoindentation hardness would require significant costs; therefore, the lower limit of the nanoindentation hardness is preferably above 0.60 GPa; and even more preferably, it is above 0.70 GPa.

[0068] (Cu content: 99.96% by mass or more)

[0069] In the circuit layer 12 and metal layer 13 of the insulating circuit board 10 in this embodiment, excellent electrical conductivity and thermal conductivity are required in order to suppress heat generation when energized.

[0070] Therefore, in this embodiment, the purity of Cu in the circuit layer 12 (copper plate 22) and the metal layer 13 (copper plate 23) is specified to be 99.96% by mass or more.

[0071] Furthermore, the purity of Cu is preferably 99.965% by mass or higher, and more preferably 99.97% by mass or higher. While there is no particular upper limit to the purity of Cu, exceeding 99.999% by mass requires special refining processes, significantly increasing manufacturing costs; therefore, a purity of 99.999% by mass or lower is preferred.

[0072] In addition, if the purity of Cu in circuit layer 12 (copper plate 22) and metal layer 13 (copper plate 23) is 99.96% by mass or higher, then in addition to elements in group A and group B, it may also contain elements such as Mg.

[0073] (The total content of any one or both of the elements in Group A and Group B: 10 ppm by mass or more and 300 ppm by mass or less)

[0074] In the circuit layer 12 and metal layer 13 of the insulating circuit board 10 of this embodiment, compound particles 18 containing either or both of the elements from group A (Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu) and group B (O, S, Se, Te) and Cu are formed. These compound particles 18 are stable at high temperatures, thus suppressing grain boundary movement at high temperatures and inhibiting grain growth during thermal cycling. Furthermore, the presence of compound particles 18 minimizes changes in crystal structure after thermal cycling, resulting in a more uniform crystal structure. On the other hand, a large amount of either or both of the elements from group A and group B increases the likelihood of contamination around the furnace, potentially negatively impacting manufacturability.

[0075] Therefore, when the elements in group A and group B are present, it is preferable that their combined content is in the range of 10 ppm by mass or more and 300 ppm by mass or less.

[0076] Furthermore, the total content of any one or both of the elements in Group A and Group B is more preferably 15 ppm by mass or more, and even more preferably 20 ppm by mass or more. Moreover, the total content of any one or both of the elements in Group A and Group B is more preferably 290 ppm by mass or less, and even more preferably 280 ppm by mass or less.

[0077] (Including any or both of the elements in group A and group B, as well as Cu compound particles)

[0078] As described above, the compound particles 18 containing any or both of the elements in group A and group B, as well as Cu, exhibit high stability at high temperatures. Therefore, during thermal cycling under load, the pinning effect of these compound particles 18 effectively suppresses grain growth.

[0079] In particular, if the ratio of the total content of elements in group A (mass ppm) to the total content of elements in group B (mass ppm) (A / B) exceeds 1.0, the reaction between elements in group A and elements in group B can be suppressed, and a compound made of any one or both of elements in group A and group B and Cu can be reliably formed. Through the pinning effect of the compound, the growth of grains during heat treatment can be further reliably suppressed.

[0080] (Whether the substrate cracked after the thermal cycling test)

[0081] For the insulating circuit board that underwent 3000 cycles of thermal cycling testing, consisting of 5 minutes at -65°C and 5 minutes at 150°C in a Galden bath, the presence or absence of cracks was evaluated using an ultrasonic flaw detector (Hitachi Power Solutions Co., Ltd. FineSAT200). In the insulating circuit board 10 (copper-ceramic bond) of this embodiment, cracks were confirmed in any one of the circuit layer 12, the metal layer 13, and the ceramic substrate 11.

[0082] On the other hand, in the insulating circuit board using oxygen-free copper, slight cracks occurred in the ceramic substrate at the copper-ceramic interface.

[0083] (Average crystal size after thermal cycling test)

[0084] The power module 1 using the insulating circuit board 10 of this embodiment is used in high-temperature environments such as engine compartments, and sometimes undergoes severe thermal cycling. Even after a severe thermal cycling test of 3000 cycles, with each cycle consisting of holding the module at -65°C for 5 minutes and at 150°C for 5 minutes in a Galden bath, the average crystal grain size is less than 100 μm, and grain coarsening after thermal cycling is suppressed.

[0085] Furthermore, the average crystal grain size after 3000 cycles of the aforementioned thermal cycling test is preferably 90 μm or less, more preferably 80 μm or less. Moreover, a smaller average crystal grain size after 3000 cycles of the aforementioned thermal cycling test is preferred, but it can also be 30 μm or more, or 50 μm or more.

[0086] The following is for reference. Figure 4 and Figure 5 The manufacturing method of the insulating circuit board 10 involved in this embodiment will be described.

[0087] (Joint material preparation process S01)

[0088] First, prepare the ceramic substrate 11, such as... Figure 5 As shown, bonding material 25 is disposed between the copper plate 22, which forms the circuit layer 12, and the ceramic substrate 11, and between the copper plate 23, which forms the metal layer 13, and the ceramic substrate 11.

[0089] As the bonding material 25, for example, bonding materials containing Ag and active metals (Ti, Zr, Nb, Hf) can be used, namely Ag-Ti solders (specifically, Ag-Cu-Ti materials).

[0090] (Lamination process S02)

[0091] Next, the copper plate 22 and the ceramic substrate 11 are laminated via bonding material 25, and the ceramic substrate 11 and the copper plate 23 are laminated via bonding material 25.

[0092] (Jointing process S03)

[0093] Next, the stacked copper plate 22, bonding material 25, ceramic substrate 11, bonding material 25, and copper plate 23 are pressurized along the stacking direction and placed in a vacuum furnace for heating, thereby bonding the copper plate 22, ceramic substrate 11, and copper plate 23.

[0094] Here, the temperature conditions and other parameters in the joining process S03 are preferably set appropriately according to the joining material 25 used.

[0095] In addition, the pressure load P in the joining process S03 is preferably in the range of 0.098 MPa or more and 1.47 MPa or less.

[0096] As described above, the insulating circuit board 10 of this embodiment is manufactured by the bonding material application process S01, the lamination process S02, and the bonding process S03.

[0097] (Radiator assembly process S04)

[0098] Next, the heat sink 5 is bonded to the other side of the metal layer 13 of the insulating circuit board 10.

[0099] The insulating circuit board 10 and the heat sink 5 are stacked with solder material in between and placed in a heating furnace. The insulating circuit board 10 and the heat sink 5 are soldered together through the solder layer 7.

[0100] (Semiconductor component bonding process S05)

[0101] Next, the semiconductor element 3 is bonded to one side of the circuit layer 12 of the insulating circuit substrate 10 by soldering.

[0102] Through the above processes, a product is manufactured. Figure 1 The power module 1 shown.

[0103] According to the structure described above, the insulating circuit board 10 (copper-ceramic bond) of this embodiment has particularly excellent electrical and thermal conductivity because the Cu content in the circuit layer 12 and the metal layer 13 is 99.96% by mass or more.

[0104] Furthermore, after conducting 3000 cycles of thermal cycling tests, with each cycle consisting of holding the sample in a liquid bath at -65°C for 5 minutes and at 150°C for 5 minutes, the ratio C / D of the proportion of KAM values ​​below 0.25° in the measurement field centered on the grain boundary triple point to the proportion of KAM values ​​below 0.25° inside the grain is preferably in the range of 0.93 or higher and 1.05 or lower. Therefore, even under severe thermal cycling, the strain will not be unevenly distributed at the grain boundaries, and the curing or deformation of the circuit layer 12 and the metal layer 13 can be suppressed.

[0105] In the insulating circuit board 10 of this embodiment, when the nanoindentation hardness of the circuit layer 12 and the metal layer 13 at a position 100 μm away from the bonding interface with the ceramic substrate 11 is in the range of 0.40 GPa or more and 1.03 GPa or less, the bonding interface between the circuit layer 12 and the metal layer 13 and the ceramic substrate will not be over-cured, which can suppress the generation of cracks during load thermal cycling and further improve the bonding reliability between the circuit layer 12 and the metal layer 13 and the ceramic substrate 11.

[0106] In the insulating circuit board 10 of this embodiment, when the circuit layer 12 and the metal layer 13 contain any or both of Group A elements and Group B elements in a total mass range of 10 ppm or more and 300 ppm or less, crystal growth is suppressed even under load thermal cycling, and grain coarsening or uneven crystal growth is not produced. Strain non-uniformity distribution is suppressed, thereby reliably suppressing the curing or deformation of the circuit layer 12 and the metal layer 13. The Group A elements are selected from one or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, and the Group B elements are selected from one or more of O, S, Se and Te.

[0107] In the insulating circuit board 10 of this embodiment, when compound particles 18 containing any or both of the elements in group A and group B and Cu are precipitated in the circuit layer 12 and the metal layer 13, grain growth can be suppressed even under load thermal cycling, and grain coarsening or uneven crystal growth will not occur. Uneven strain distribution is suppressed, thereby reliably suppressing the solidification or deformation of the copper plate.

[0108] The embodiments of the present invention have been described above, but the present invention is not limited thereto, and appropriate changes can be made without departing from the technical concept of the present invention.

[0109] For example, this embodiment describes the case where a power module is constructed by mounting semiconductor elements on an insulating circuit board, but it is not limited to this. For example, an LED module can be constructed by mounting LED elements on the circuit layer of the insulating circuit board, or a thermoelectric module can be constructed by mounting thermoelectric elements on the circuit layer of the insulating circuit board.

[0110] Furthermore, in the insulating circuit board of this embodiment, an example of a ceramic substrate made of silicon nitride (Si3N4) has been described, but it is not limited to this, and other ceramic substrates such as aluminum nitride (AlN) and aluminum oxide (Al2O3) may also be used.

[0111] Furthermore, while this embodiment describes the formation of a circuit layer by bonding a copper plate to a ceramic substrate, it is not limited to this method. A circuit layer can also be formed by bonding copper sheets stamped from a copper plate into a circuit pattern onto a ceramic substrate. Additionally, the circuit pattern can be formed by etching.

[0112] Example

[0113] The results of the confirmation experiments conducted to verify the effectiveness of the present invention will be described below.

[0114] First, a ceramic substrate (40mm×40mm×0.32mm thick) made of silicon nitride was prepared.

[0115] Furthermore, in this example of the invention, a copper plate (37mm × 37mm × 0.8mm thick) with the composition shown in Tables 1 and 2 was used as the copper plate serving as both the circuit layer and the metal layer. Also, as a comparative example, a copper plate (37mm × 37mm × 0.8mm thick) made of commercially available oxygen-free copper was used.

[0116] Next, a bonding material containing Ag powder and active metal powder was coated on both sides of the ceramic substrate to a thickness of approximately 15 μm. Ti was selected as the active metal. The amounts of each metal powder in the slurry were set to 94% by mass Ag and 6% by mass Ti.

[0117] Next, the copper plate and the ceramic substrate were stacked and bonded in a vacuum at a temperature of 780°C or higher but less than 900°C for 30 minutes under a pressure of 0.6 MPa.

[0118] As described above, insulating circuit boards (copper-ceramic bonding bodies) of the present invention examples and comparative examples were fabricated.

[0119] (KAM value after thermal cycling test)

[0120] The obtained insulating circuit board (copper-ceramic bonding) was subjected to 3000 cycles of hot and cold cycling in a liquid bath (Galden liquid) at -65°C for 5 minutes ←→ 150°C for 5 minutes.

[0121] The KAM values ​​were measured in the measurement field centered on the grain boundary triple point after the thermal cycling test, and the ratio C / D of the proportion of KAM values ​​below 0.25° to the proportion of KAM values ​​below 0.25° inside the grain was calculated. The evaluation results are shown in Table 1.

[0122] (Average crystal size after thermal cycling test)

[0123] The average grain size in the cross-section along the thickness direction of the copper plate was measured before and after the above-mentioned thermal cycling test. The evaluation results are shown in Table 1.

[0124] In addition, the average crystal grain size was determined as follows.

[0125] The obtained insulating circuit board was cut along the stacking direction. After mechanical polishing of the cut surfaces using water-resistant abrasive paper and diamond abrasive grains, it was further finely polished using a colloidal silica solution. Then, using a scanning electron microscope, electron beams were irradiated onto each measurement point (pixel) within the measurement range of the sample surface. Orientation analysis based on backscattered electron diffraction was used to define boundaries with an orientation difference of 5° or more between adjacent measurement points as grain boundaries, boundaries with an orientation difference of 5° or more but less than 15° as small-angle grain boundaries, and boundaries with an orientation difference of 15° or more as large-angle grain boundaries. Bicrystal boundaries were also considered large-angle grain boundaries. Furthermore, measurements were performed on each sample with a field of view size of 2:1, where the thickness from the Cu / Si3N4 interface to the Cu circuit layer surface was defined as the vertical axis of the field of view.

[0126] Based on the obtained orientation analysis results, a grain boundary map is made using large-angle grain boundaries. Following the cutting method of Japanese Industrial Standard JIS H0501, five line segments of specified lengths are drawn on the grain boundary map in both the longitudinal and transverse directions. The number of grains that are completely cut off is counted, and the average value of the cutting length is recorded as the crystal grain size.

[0127] (Nano-indentation hardness)

[0128] The obtained insulating circuit board (copper-ceramic bonding body) was cut along the stacking direction. At the bonding interface between the ceramic substrate and the circuit layer and metal layer, the indentation hardness at a position 100 μm from the bonding surface of the ceramic substrate toward the circuit layer and metal layer was measured at 5 locations in one field of view and then at 5 locations in five fields of view, for a total of 50 measurements. The average value was calculated. The evaluation results are shown in Table 1.

[0129] Figure 6 The image shows an example of the measurement results of the nanoindentation hardness of the circuit layer 12 and the metal layer 13 of this embodiment.

[0130] (The presence or absence of compound particles)

[0131] Regarding the obtained insulating circuit board, after cutting along the stacking direction, the region containing the interface between the copper plate and the ceramic substrate (17μm×23μm) was observed on the cross section at the center of the width direction of the board using a scanning electron microscope (Carl Zeiss GeminiSEM 500) at a magnification of 5000x and an accelerating voltage of 5.0kV.

[0132] In this observation, SEM images and elemental mappings of one or more Group A elements selected from Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and one or more Group B elements selected from O, S, Se, and Te were acquired. Granular regions were observed in the SEM images, and in these regions, Cu coexisted with either Group A or Group B elements. The compound particles were then evaluated as "present". The evaluation results are shown in Table 1.

[0133] (Bonding rate before and after thermal cycling)

[0134] A thermal cycling test was performed in a Galden bath at -65°C for 5 minutes followed by a cycle of 150°C for 5 minutes, for a total of 3000 cycles. The bonding rate between the copper plate and the ceramic substrate was measured before and after the thermal cycling. The results are shown in Table 1.

[0135] The bonding rate of the interface between the ceramic substrate and the metal sheet after bonding was evaluated using an ultrasonic flaw detector (Hitachi Power Solutions Co., Ltd. FineSAT200) and calculated according to the following formula. Here, the initial bonding area refers to the area to be bonded before bonding, i.e., the area of ​​the circuit layer. In the image after binarizing the ultrasonic flaw detector image, the peeling is represented by the white area within the bonding region; therefore, the area of ​​this white area is taken as the peeling area (non-bonding region area).

[0136] (Joint ratio) = {(Initial joint area) - (Non-joint area)} / (Initial joint area) × 100

[0137] [Table 1]

[0138]

[0139] [Table 2]

[0140]

[0141] In this invention example, after the thermal cycling is performed, the ratio C of the proportion of KAM values ​​of 0.25° or less in the measurement field of view centered on the grain boundary triple point to the proportion D of the proportion of KAM values ​​of 0.25° or less inside the grain, C / D, is in the range of 0.93 or more and 1.05 or less.

[0142] Furthermore, in this example of the invention, it was confirmed that, similar to the comparative example (commercially available oxygen-free copper), the hardness decreases as it moves away from the interface with the ceramic substrate, exhibiting a sufficiently low value at a position 100 μm away from the interface with the ceramic substrate.

[0143] Moreover, in this invention, even after thermal cycling, the bonding rate is high, and the thermal cycling reliability is excellent.

[0144] According to an example of the present invention, it has been confirmed that an insulating circuit board (copper-ceramic joint) can be provided that exhibits excellent bonding between the ceramic substrate (ceramic component) and the copper plate (copper component) even under severe thermal cycling conditions, and excellent thermal cycling reliability.

[0145] Industrial availability

[0146] According to the present invention, a copper-ceramic joint can be provided that exhibits excellent bonding between ceramic and copper components even under severe thermal cycling conditions, and also demonstrates excellent reliability in thermal cycling.

[0147] Symbol Explanation

[0148] 10. Insulating circuit board (copper-ceramic bonding)

[0149] 11. Ceramic substrate (ceramic component)

[0150] 12 circuit layers (copper components)

[0151] 13 metal layers (copper components)

[0152] 18 compound particles

[0153] MP measurement point

Claims

1. A copper-ceramic bonded body formed by bonding a copper member with a ceramic member, characterized in that, the content of Cu in the copper member is 99.96 mass% or more, the proportion C of the KAM value of 0.25° or less in a measurement field centered on a grain boundary triple point to the proportion D of the KAM value of 0.25° or less in the interior of a grain is in the range of 0.93 or more and 1.05 or less, and after a thermal cycle test in which 3000 cycles of holding at -65°C for 5 minutes and at 150°C for 5 minutes in a liquid bath are performed as one cycle, the cross section of the copper member in the thickness direction is observed.

2. The copper-ceramic bonded body according to claim 1, characterized in that, the nanoindentation hardness at a position 100 μm away from the bonding interface with the ceramic member in the copper member is in the range of 0.40 GPa or more and 1.03 GPa or less.

3. The copper-ceramic bonded body according to claim 1, characterized in that, the copper member contains either or both of an A group element selected from one or two or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu and a B group element selected from one or two or more of O, S, Se and Te in a total amount in the range of 10 mass ppm or more and 300 mass ppm or less.

4. The copper-ceramic bonded body according to claim 3, characterized in that, compound particles containing either or both of the A group element and the B group element and Cu are precipitated in the copper member.

5. An insulating circuit substrate formed by bonding a copper plate to the surface of a ceramic substrate, characterized in that, the content of Cu in the copper plate is 99.96 mass% or more, the proportion C of the KAM value of 0.25° or less in a measurement field centered on a grain boundary triple point to the proportion D of the KAM value of 0.25° or less in the interior of a grain is in the range of 0.93 or more and 1.05 or less, and after a thermal cycle test in which 3000 cycles of holding at -65°C for 5 minutes and at 150°C for 5 minutes in a liquid bath are performed as one cycle, the cross section of the copper plate in the thickness direction is observed.

6. The insulating circuit substrate according to claim 5, characterized in that, the nanoindentation hardness at a position 100 μm away from the bonding interface with the ceramic substrate in the copper plate is in the range of 0.40 GPa or more and 1.03 GPa or less.

7. The insulating circuit substrate according to claim 5, characterized in that, ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ The copper plate contains either or both of an A group element selected from one or two or more of Ca, Ba, Sr, Zr, Hf, Y, Sc, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu, and a B group element selected from one or two or more of O, S, Se, and Te, in a range of 10 mass ppm or more and 300 mass ppm or less in total.

8. The insulated circuit board according to claim 7, wherein Compound particles containing either or both of the A group element and the B group element and Cu are precipitated in the copper plate.

Images